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4bc0104c WG |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* | |
3 | * Copyright (C) 2022 MediaTek Inc. All rights reserved. | |
4 | * | |
5 | * Author: Weijie Gao <weijie.gao@mediatek.com> | |
6 | */ | |
7 | ||
8 | #ifndef __CONFIG_MT7621_H | |
9 | #define __CONFIG_MT7621_H | |
10 | ||
aa6e94de | 11 | #define CFG_SYS_SDRAM_BASE 0x80000000 |
4bc0104c | 12 | |
1d457dbb | 13 | #define CFG_MAX_MEM_MAPPED 0x1c000000 |
4bc0104c | 14 | |
fd9385ab | 15 | #define CFG_SYS_INIT_SP_OFFSET 0x800000 |
4bc0104c | 16 | |
d678a59d TR |
17 | /* MMC */ |
18 | #define MMC_SUPPORTS_TUNING | |
19 | ||
4bc0104c WG |
20 | /* Serial SPL */ |
21 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) | |
91092132 TR |
22 | #define CFG_SYS_NS16550_CLK 50000000 |
23 | #define CFG_SYS_NS16550_COM1 0xbe000c00 | |
4bc0104c WG |
24 | #endif |
25 | ||
26 | /* Serial common */ | |
fd9385ab | 27 | #define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ |
4bc0104c WG |
28 | 230400, 460800, 921600 } |
29 | ||
30 | /* Dummy value */ | |
65cc0e2a | 31 | #define CFG_SYS_UBOOT_BASE 0 |
4bc0104c WG |
32 | |
33 | #endif /* __CONFIG_MT7621_H */ |