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1 | /* |
2 | * Copyright (C) 2015 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale i.MX7. | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __MX7_COMMON_H | |
10 | #define __MX7_COMMON_H | |
11 | ||
12 | #include <linux/sizes.h> | |
13 | #include <asm/arch/imx-regs.h> | |
14 | #include <asm/imx-common/gpio.h> | |
15 | ||
16 | #ifndef CONFIG_MX7 | |
17 | #define CONFIG_MX7 | |
18 | #endif | |
19 | ||
20 | /* Timer settings */ | |
21 | #define CONFIG_MXC_GPT_HCLK | |
22 | #define CONFIG_SYSCOUNTER_TIMER | |
23 | #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ | |
18fb0e3c | 24 | #define CONFIG_SYS_FSL_CLK |
1a8150d4 AA |
25 | |
26 | /* Enable iomux-lpsr support */ | |
27 | #define CONFIG_IOMUX_LPSR | |
28 | #define CONFIG_IMX_FIXED_IVT_OFFSET | |
29 | ||
30 | /* Size of malloc() pool */ | |
31 | #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) | |
32 | ||
33 | #define CONFIG_BOARD_EARLY_INIT_F | |
34 | #define CONFIG_BOARD_LATE_INIT | |
35 | ||
1a8150d4 AA |
36 | #define CONFIG_DISPLAY_CPUINFO |
37 | #define CONFIG_DISPLAY_BOARDINFO | |
38 | ||
39 | #define CONFIG_LOADADDR 0x80800000 | |
40 | #define CONFIG_SYS_TEXT_BASE 0x87800000 | |
41 | ||
42 | #ifndef CONFIG_BOOTDELAY | |
43 | #define CONFIG_BOOTDELAY 3 | |
44 | #endif | |
45 | ||
46 | /* allow to overwrite serial and ethaddr */ | |
47 | #define CONFIG_ENV_OVERWRITE | |
48 | #define CONFIG_CONS_INDEX 1 | |
49 | #define CONFIG_BAUDRATE 115200 | |
50 | ||
51 | /* Filesystems and image support */ | |
52 | #define CONFIG_OF_LIBFDT | |
53 | #define CONFIG_CMD_BOOTZ | |
54 | #define CONFIG_DOS_PARTITION | |
55 | #define CONFIG_CMD_EXT2 | |
56 | #define CONFIG_CMD_EXT4 | |
57 | #define CONFIG_CMD_EXT4_WRITE | |
58 | #define CONFIG_CMD_FAT | |
59 | ||
60 | /* Miscellaneous configurable options */ | |
61 | #undef CONFIG_CMD_IMLS | |
62 | #define CONFIG_SYS_LONGHELP | |
63 | #define CONFIG_SYS_HUSH_PARSER | |
64 | #define CONFIG_CMDLINE_EDITING | |
65 | #define CONFIG_AUTO_COMPLETE | |
66 | #define CONFIG_SYS_CBSIZE 512 | |
67 | #define CONFIG_SYS_MAXARGS 32 | |
68 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
69 | ||
70 | #ifndef CONFIG_SYS_DCACHE_OFF | |
71 | #define CONFIG_CMD_CACHE | |
72 | #endif | |
73 | ||
74 | /* GPIO */ | |
75 | #define CONFIG_MXC_GPIO | |
76 | #define CONFIG_CMD_GPIO | |
77 | ||
78 | /* UART */ | |
79 | #define CONFIG_MXC_UART | |
80 | #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR | |
81 | ||
82 | /* MMC */ | |
83 | #define CONFIG_MMC | |
84 | #define CONFIG_CMD_MMC | |
85 | #define CONFIG_GENERIC_MMC | |
86 | #define CONFIG_BOUNCE_BUFFER | |
87 | #define CONFIG_FSL_ESDHC | |
88 | #define CONFIG_FSL_USDHC | |
89 | ||
90 | /* Fuses */ | |
91 | #define CONFIG_CMD_FUSE | |
92 | #define CONFIG_MXC_OCOTP | |
93 | ||
94 | #endif |