]>
Commit | Line | Data |
---|---|---|
1a8150d4 AA |
1 | /* |
2 | * Copyright (C) 2015 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * Configuration settings for the Freescale i.MX7. | |
5 | * | |
6 | * SPDX-License-Identifier: GPL-2.0+ | |
7 | */ | |
8 | ||
9 | #ifndef __MX7_COMMON_H | |
10 | #define __MX7_COMMON_H | |
11 | ||
12 | #include <linux/sizes.h> | |
13 | #include <asm/arch/imx-regs.h> | |
14 | #include <asm/imx-common/gpio.h> | |
15 | ||
16 | #ifndef CONFIG_MX7 | |
17 | #define CONFIG_MX7 | |
18 | #endif | |
19 | ||
20 | /* Timer settings */ | |
21 | #define CONFIG_MXC_GPT_HCLK | |
22 | #define CONFIG_SYSCOUNTER_TIMER | |
23 | #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */ | |
18fb0e3c | 24 | #define CONFIG_SYS_FSL_CLK |
1a8150d4 | 25 | |
1ecd2eaa PF |
26 | #define CONFIG_SYS_BOOTM_LEN 0x1000000 |
27 | ||
1a8150d4 AA |
28 | /* Enable iomux-lpsr support */ |
29 | #define CONFIG_IOMUX_LPSR | |
1a8150d4 | 30 | |
ec7fde3e SA |
31 | #define CONFIG_ARCH_MISC_INIT |
32 | ||
1a8150d4 | 33 | #define CONFIG_DISPLAY_CPUINFO |
1a8150d4 AA |
34 | |
35 | #define CONFIG_LOADADDR 0x80800000 | |
36 | #define CONFIG_SYS_TEXT_BASE 0x87800000 | |
37 | ||
1a8150d4 AA |
38 | /* allow to overwrite serial and ethaddr */ |
39 | #define CONFIG_ENV_OVERWRITE | |
40 | #define CONFIG_CONS_INDEX 1 | |
41 | #define CONFIG_BAUDRATE 115200 | |
42 | ||
43 | /* Filesystems and image support */ | |
1a8150d4 | 44 | #define CONFIG_DOS_PARTITION |
1a8150d4 AA |
45 | |
46 | /* Miscellaneous configurable options */ | |
1a8150d4 | 47 | #define CONFIG_SYS_LONGHELP |
1a8150d4 AA |
48 | #define CONFIG_CMDLINE_EDITING |
49 | #define CONFIG_AUTO_COMPLETE | |
50 | #define CONFIG_SYS_CBSIZE 512 | |
51 | #define CONFIG_SYS_MAXARGS 32 | |
52 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
53 | ||
54 | #ifndef CONFIG_SYS_DCACHE_OFF | |
1a8150d4 AA |
55 | #endif |
56 | ||
57 | /* GPIO */ | |
58 | #define CONFIG_MXC_GPIO | |
1a8150d4 AA |
59 | |
60 | /* UART */ | |
61 | #define CONFIG_MXC_UART | |
1a8150d4 AA |
62 | |
63 | /* MMC */ | |
64 | #define CONFIG_MMC | |
1a8150d4 AA |
65 | #define CONFIG_GENERIC_MMC |
66 | #define CONFIG_BOUNCE_BUFFER | |
67 | #define CONFIG_FSL_ESDHC | |
68 | #define CONFIG_FSL_USDHC | |
69 | ||
70 | /* Fuses */ | |
71 | #define CONFIG_CMD_FUSE | |
72 | #define CONFIG_MXC_OCOTP | |
73 | ||
90ab4be1 PF |
74 | #define CONFIG_ARMV7_PSCI |
75 | #define CONFIG_ARMV7_PSCI_NR_CPUS 2 | |
76 | #define CONFIG_ARMV7_SECURE_BASE 0x00900000 | |
90ab4be1 | 77 | |
1a8150d4 | 78 | #endif |