[people/ms/u-boot.git] / include / configs / nokia_rx51.h

/*
 * (C) Copyright 2011-2012
 * Pali Rohár <pali.rohar@gmail.com>
 *
 * (C) Copyright 2010
 * Alistair Buxton <a.j.buxton@gmail.com>
 *
 * Derived from Beagle Board code:
 * (C) Copyright 2006-2008
 * Texas Instruments.
 * Richard Woodruff <r-woodruff2@ti.com>
 * Syed Mohammed Khasim <x0khasim@ti.com>
 *
 * Configuration settings for the Nokia RX-51 aka N900.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * High Level Configuration Options
 */
#define CONFIG_SYS_L2CACHE_OFF		/* pretend there is no L2 CACHE */

#define CONFIG_MACH_TYPE		MACH_TYPE_NOKIA_RX51

/*
 * Nokia X-Loader loading secondary image to address 0x80400000
 * NOLO loading boot image to random place, so it doesn't really
 * matter what we set this to. We have to copy u-boot to this address
 */
#define CONFIG_SYS_TEXT_BASE	0x80008000

#define CONFIG_SDRC			/* The chip has SDRC controller */

#include <asm/arch/cpu.h>		/* get chip and board defs */
#include <asm/arch/omap.h>
#include <asm/arch/mem.h>
#include <linux/stringify.h>

/* Clock Defines */
#define V_OSCK			26000000	/* Clock output from T2 */
#define V_SCLK			(V_OSCK >> 1)

#define CONFIG_MISC_INIT_R
#define CONFIG_SKIP_LOWLEVEL_INIT		/* X-Loader set everything up */

#define CONFIG_CMDLINE_TAG	/* enable passing kernel command line string */
#define CONFIG_INITRD_TAG			/* enable passing initrd */
#define CONFIG_REVISION_TAG			/* enable passing revision tag*/
#define CONFIG_SETUP_MEMORY_TAGS		/* enable memory tag */

/*
 * Size of malloc() pool
 */
#define CONFIG_ENV_SIZE			(128 << 10)
#define CONFIG_UBI_SIZE			(512 << 10)
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
					(128 << 10))

/*
 * Hardware drivers
 */

/*
 * NS16550 Configuration
 */
#define V_NS16550_CLK		48000000		/* 48MHz (APLL96/2) */

#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK

/*
 * select serial console configuration
 */
#define CONFIG_CONS_INDEX		3
#define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
#define CONFIG_SERIAL3			3		/* UART3 on RX-51 */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }

/* USB */
#define CONFIG_USB_MUSB_UDC
#define CONFIG_USB_MUSB_HCD
#define CONFIG_USB_OMAP3
#define CONFIG_TWL4030_USB

/* USB device configuration */
#define CONFIG_USB_DEVICE
#define CONFIG_USBD_VENDORID		0x0421
#define CONFIG_USBD_PRODUCTID		0x01c8
#define CONFIG_USBD_MANUFACTURER	"Nokia"
#define CONFIG_USBD_PRODUCT_NAME	"N900"

/* commands to include */

#define CONFIG_CMDLINE_EDITING		/* add command line history */
#define CONFIG_AUTO_COMPLETE		/* add autocompletion support */

#ifdef ONENAND_SUPPORT

#define CONFIG_CMD_ONENAND		/* ONENAND support */
#define CONFIG_CMD_MTDPARTS		/* mtd parts support */

#ifdef UBIFS_SUPPORT
#define CONFIG_CMD_UBIFS		/* UBIFS Support */
#endif

#endif

#define CONFIG_OMAP3_SPI
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED	100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE	1
#define CONFIG_SYS_I2C_OMAP34XX

/*
 * TWL4030
 */
#define CONFIG_TWL4030_LED
#define CONFIG_TWL4030_KEYPAD

#define GPIO_SLIDE			71

/*
 * Board ONENAND Info.
 */

#define PART1_NAME			"bootloader"
#define PART1_SIZE			128
#define PART1_MULL			1024
#define PART1_SUFF			"k"
#define PART1_OFFS			0x00000000
#define PART1_MASK			0x00000003

#define PART2_NAME			"config"
#define PART2_SIZE			384
#define PART2_MULL			1024
#define PART2_SUFF			"k"
#define PART2_OFFS			0x00020000
#define PART2_MASK			0x00000000

#define PART3_NAME			"log"
#define PART3_SIZE			256
#define PART3_MULL			1024
#define PART3_SUFF			"k"
#define PART3_OFFS			0x00080000
#define PART3_MASK			0x00000000

#define PART4_NAME			"kernel"
#define PART4_SIZE			2
#define PART4_MULL			1024*1024
#define PART4_SUFF			"m"
#define PART4_OFFS			0x000c0000
#define PART4_MASK			0x00000000

#define PART5_NAME			"initfs"
#define PART5_SIZE			2
#define PART5_MULL			1024*1024
#define PART5_SUFF			"m"
#define PART5_OFFS			0x002c0000
#define PART5_MASK			0x00000000

#define PART6_NAME			"rootfs"
#define PART6_SIZE			257280
#define PART6_MULL			1024
#define PART6_SUFF			"k"
#define PART6_OFFS			0x004c0000
#define PART6_MASK			0x00000000

#ifdef ONENAND_SUPPORT

#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS

#ifdef UBIFS_SUPPORT
#define CONFIG_RBTREE
#define CONFIG_LZO
#endif

#define MTDIDS_DEFAULT			"onenand0=onenand"
#define MTDPARTS_DEFAULT		"mtdparts=onenand:" \
		__stringify(PART1_SIZE) PART1_SUFF "(" PART1_NAME ")ro," \
		__stringify(PART2_SIZE) PART2_SUFF "(" PART2_NAME ")," \
		__stringify(PART3_SIZE) PART3_SUFF "(" PART3_NAME ")," \
		__stringify(PART4_SIZE) PART4_SUFF "(" PART4_NAME ")," \
		__stringify(PART5_SIZE) PART5_SUFF "(" PART5_NAME ")," \
		"-(" PART6_NAME ")"

#endif

/* Watchdog support */
#define CONFIG_HW_WATCHDOG

/*
 * Framebuffer
 */
/* Video console */
#define CONFIG_VIDEO_LOGO
#define VIDEO_FB_16BPP_PIXEL_SWAP
#define VIDEO_FB_16BPP_WORD_SWAP
#define CONFIG_SPLASH_SCREEN

/* functions for cfb_console */
#define VIDEO_KBD_INIT_FCT		rx51_kp_init()
#define VIDEO_TSTC_FCT			rx51_kp_tstc
#define VIDEO_GETC_FCT			rx51_kp_getc
#ifndef __ASSEMBLY__
struct stdio_dev;
int rx51_kp_init(void);
int rx51_kp_tstc(struct stdio_dev *sdev);
int rx51_kp_getc(struct stdio_dev *sdev);
#endif

#ifndef MTDPARTS_DEFAULT
#define MTDPARTS_DEFAULT
#endif

/* Environment information */
#define CONFIG_EXTRA_ENV_SETTINGS \
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"usbtty=cdc_acm\0" \
	"stdin=vga\0" \
	"stdout=vga\0" \
	"stderr=vga\0" \
	"setcon=setenv stdin ${con};" \
		"setenv stdout ${con};" \
		"setenv stderr ${con}\0" \
	"sercon=setenv con serial; run setcon\0" \
	"usbcon=setenv con usbtty; run setcon\0" \
	"vgacon=setenv con vga; run setcon\0" \
	"slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
	"switchmmc=mmc dev ${mmcnum}\0" \
	"kernaddr=0x82008000\0" \
	"initrdaddr=0x84008000\0" \
	"scriptaddr=0x86008000\0" \
	"fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
		"${loadaddr} ${mmcfile}\0" \
	"kernload=setenv loadaddr ${kernaddr};" \
		"setenv mmcfile ${mmckernfile};" \
		"run fileload\0" \
	"initrdload=setenv loadaddr ${initrdaddr};" \
		"setenv mmcfile ${mmcinitrdfile};" \
		"run fileload\0" \
	"scriptload=setenv loadaddr ${scriptaddr};" \
		"setenv mmcfile ${mmcscriptfile};" \
		"run fileload\0" \
	"scriptboot=echo Running ${mmcscriptfile} from mmc " \
		"${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
	"kernboot=echo Booting ${mmckernfile} from mmc " \
		"${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
	"kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
		"${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
	"attachboot=echo Booting attached kernel image ...;" \
		"setenv setup_omap_atag 1;" \
		"bootm ${attkernaddr};" \
		"setenv setup_omap_atag\0" \
	"trymmcscriptboot=if run switchmmc; then " \
			"if run scriptload; then " \
				"run scriptboot;" \
			"fi;" \
		"fi\0" \
	"trymmckernboot=if run switchmmc; then " \
			"if run kernload; then " \
				"run kernboot;" \
			"fi;" \
		"fi\0" \
	"trymmckerninitrdboot=if run switchmmc; then " \
			"if run initrdload; then " \
				"if run kernload; then " \
					"run kerninitrdboot;" \
				"fi;" \
			"fi; " \
		"fi\0" \
	"trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
		"setenv mmckernfile uImage; run trymmckernboot\0" \
	"trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
		"setenv mmcpart 2; run trymmcpartboot;" \
		"setenv mmcpart 3; run trymmcpartboot;" \
		"setenv mmcpart 4; run trymmcpartboot\0" \
	"trymmcboot=if run switchmmc; then " \
			"setenv mmctype fat;" \
			"run trymmcallpartboot;" \
			"setenv mmctype ext2;" \
			"run trymmcallpartboot;" \
			"setenv mmctype ext4;" \
			"run trymmcallpartboot;" \
		"fi\0" \
	"emmcboot=setenv mmcnum 1; run trymmcboot\0" \
	"sdboot=setenv mmcnum 0; run trymmcboot\0" \
	"menucmd=bootmenu\0" \
	"bootmenu_0=Attached kernel=run attachboot\0" \
	"bootmenu_1=Internal eMMC=run emmcboot\0" \
	"bootmenu_2=External SD card=run sdboot\0" \
	"bootmenu_3=U-Boot boot order=boot\0" \
	"bootmenu_delay=30\0" \
	""

#define CONFIG_PREBOOT \
	"setenv mmcnum 1; setenv mmcpart 1;" \
	"setenv mmcscriptfile bootmenu.scr;" \
	"if run switchmmc; then " \
		"setenv mmcdone true;" \
		"setenv mmctype fat;" \
		"if run scriptload; then true; else " \
			"setenv mmctype ext2;" \
			"if run scriptload; then true; else " \
				"setenv mmctype ext4;" \
				"if run scriptload; then true; else " \
					"setenv mmcdone false;" \
				"fi;" \
			"fi;" \
		"fi;" \
		"if ${mmcdone}; then " \
			"run scriptboot;" \
		"fi;" \
	"fi;" \
	"if run slide; then true; else " \
		"setenv bootmenu_delay 0;" \
		"setenv bootdelay 0;" \
	"fi"

#define CONFIG_POSTBOOTMENU \
	"echo;" \
	"echo Extra commands:;" \
	"echo run sercon - Use serial port for control.;" \
	"echo run usbcon - Use usbtty for control.;" \
	"echo run vgacon - Use framebuffer/keyboard.;" \
	"echo run sdboot - Boot from SD card slot.;" \
	"echo run emmcboot - Boot internal eMMC memory.;" \
	"echo run attachboot - Boot attached kernel image.;" \
	"echo"

#define CONFIG_BOOTCOMMAND \
	"run sdboot;" \
	"run emmcboot;" \
	"run attachboot;" \
	"echo"

#define CONFIG_MENU_SHOW

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_LONGHELP			/* undef to save memory */
#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
						sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)

#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + 0x01F00000)/*31MB*/

/* default load address */
#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)

/*
 * OMAP3 has 12 GP timers, they can be driven by the system clock
 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 * This rate is divided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */

/*
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS		2
#define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0

/*
 * FLASH and environment organization
 */

#define CONFIG_ENV_IS_NOWHERE

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
			CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)

/*
 * Attached kernel image
 */

#define SDRAM_SIZE			0x10000000	/* 256 MB */
#define SDRAM_END			(CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)

#define IMAGE_MAXSIZE			0x1FF800	/* 2 MB - 2 kB */
#define KERNEL_OFFSET			0x40000		/* 256 kB */
#define KERNEL_MAXSIZE			(IMAGE_MAXSIZE-KERNEL_OFFSET)
#define KERNEL_ADDRESS			(SDRAM_END-KERNEL_MAXSIZE)

/* Reserve protected RAM for attached kernel */
#define CONFIG_PRAM			((KERNEL_MAXSIZE >> 10)+1)

#endif /* __CONFIG_H */
Commit	Line	Data
ed407be5 PR	1	/*
	2	* (C) Copyright 2011-2012
	3	* Pali Rohár <pali.rohar@gmail.com>
	4	*
	5	* (C) Copyright 2010
	6	* Alistair Buxton <a.j.buxton@gmail.com>
	7	*
	8	* Derived from Beagle Board code:
	9	* (C) Copyright 2006-2008
	10	* Texas Instruments.
	11	* Richard Woodruff <r-woodruff2@ti.com>
	12	* Syed Mohammed Khasim <x0khasim@ti.com>
	13	*
	14	* Configuration settings for the Nokia RX-51 aka N900.
	15	*
3765b3e7	16	* SPDX-License-Identifier: GPL-2.0+
ed407be5 PR	17	*/
	18
	19	#ifndef __CONFIG_H
	20	#define __CONFIG_H
	21
	22	/*
	23	* High Level Configuration Options
	24	*/
ed407be5 PR	25	#define CONFIG_SYS_L2CACHE_OFF /* pretend there is no L2 CACHE */
	26
	27	#define CONFIG_MACH_TYPE MACH_TYPE_NOKIA_RX51
	28
	29	/*
	30	* Nokia X-Loader loading secondary image to address 0x80400000
	31	* NOLO loading boot image to random place, so it doesn't really
	32	* matter what we set this to. We have to copy u-boot to this address
	33	*/
	34	#define CONFIG_SYS_TEXT_BASE 0x80008000
	35
	36	#define CONFIG_SDRC /* The chip has SDRC controller */
	37
	38	#include <asm/arch/cpu.h> /* get chip and board defs */
987ec585	39	#include <asm/arch/omap.h>
ed407be5 PR	40	#include <asm/arch/mem.h>
	41	#include <linux/stringify.h>
	42
ed407be5 PR	43	/* Clock Defines */
	44	#define V_OSCK 26000000 /* Clock output from T2 */
	45	#define V_SCLK (V_OSCK >> 1)
	46
ed407be5 PR	47	#define CONFIG_MISC_INIT_R
	48	#define CONFIG_SKIP_LOWLEVEL_INIT /* X-Loader set everything up */
	49
	50	#define CONFIG_CMDLINE_TAG /* enable passing kernel command line string */
	51	#define CONFIG_INITRD_TAG /* enable passing initrd */
	52	#define CONFIG_REVISION_TAG /* enable passing revision tag*/
	53	#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
	54
	55	/*
	56	* Size of malloc() pool
	57	*/
	58	#define CONFIG_ENV_SIZE (128 << 10)
	59	#define CONFIG_UBI_SIZE (512 << 10)
	60	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + CONFIG_UBI_SIZE + \
	61	(128 << 10))
	62
	63	/*
	64	* Hardware drivers
	65	*/
	66
	67	/*
	68	* NS16550 Configuration
	69	*/
	70	#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
	71
ed407be5 PR	72	#define CONFIG_SYS_NS16550_SERIAL
	73	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	74	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
	75
	76	/*
	77	* select serial console configuration
	78	*/
	79	#define CONFIG_CONS_INDEX 3
	80	#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
	81	#define CONFIG_SERIAL3 3 /* UART3 on RX-51 */
	82
	83	/* allow to overwrite serial and ethaddr */
	84	#define CONFIG_ENV_OVERWRITE
ed407be5	85	#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
ed407be5 PR	86
ed407be5 PR	87	/* USB */
95de1e2f PK	88	#define CONFIG_USB_MUSB_UDC
95de1e2f PK	89	#define CONFIG_USB_MUSB_HCD
ed407be5 PR	90	#define CONFIG_USB_OMAP3
	91	#define CONFIG_TWL4030_USB
	92
	93	/* USB device configuration */
	94	#define CONFIG_USB_DEVICE
	95	#define CONFIG_USBD_VENDORID 0x0421
	96	#define CONFIG_USBD_PRODUCTID 0x01c8
	97	#define CONFIG_USBD_MANUFACTURER "Nokia"
	98	#define CONFIG_USBD_PRODUCT_NAME "N900"
	99
ed407be5	100	/* commands to include */
ed407be5 PR	101
	102	#define CONFIG_CMDLINE_EDITING /* add command line history */
	103	#define CONFIG_AUTO_COMPLETE /* add autocompletion support */
	104
ed407be5 PR	105	#ifdef ONENAND_SUPPORT
	106
	107	#define CONFIG_CMD_ONENAND /* ONENAND support */
	108	#define CONFIG_CMD_MTDPARTS /* mtd parts support */
	109
	110	#ifdef UBIFS_SUPPORT
ed407be5 PR	111	#define CONFIG_CMD_UBIFS /* UBIFS Support */
	112	#endif
	113
	114	#endif
	115
ed407be5	116	#define CONFIG_OMAP3_SPI
6789e84e HS	117	#define CONFIG_SYS_I2C
	118	#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
	119	#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
	120	#define CONFIG_SYS_I2C_OMAP34XX
ed407be5 PR	121
	122	/*
	123	* TWL4030
	124	*/
ed407be5 PR	125	#define CONFIG_TWL4030_LED
	126	#define CONFIG_TWL4030_KEYPAD
	127
ed407be5 PR	128	#define GPIO_SLIDE 71
	129
	130	/*
	131	* Board ONENAND Info.
	132	*/
	133
	134	#define PART1_NAME "bootloader"
	135	#define PART1_SIZE 128
	136	#define PART1_MULL 1024
	137	#define PART1_SUFF "k"
	138	#define PART1_OFFS 0x00000000
	139	#define PART1_MASK 0x00000003
	140
	141	#define PART2_NAME "config"
	142	#define PART2_SIZE 384
	143	#define PART2_MULL 1024
	144	#define PART2_SUFF "k"
	145	#define PART2_OFFS 0x00020000
	146	#define PART2_MASK 0x00000000
	147
	148	#define PART3_NAME "log"
	149	#define PART3_SIZE 256
	150	#define PART3_MULL 1024
	151	#define PART3_SUFF "k"
	152	#define PART3_OFFS 0x00080000
	153	#define PART3_MASK 0x00000000
	154
	155	#define PART4_NAME "kernel"
	156	#define PART4_SIZE 2
	157	#define PART4_MULL 1024*1024
	158	#define PART4_SUFF "m"
	159	#define PART4_OFFS 0x000c0000
	160	#define PART4_MASK 0x00000000
	161
	162	#define PART5_NAME "initfs"
	163	#define PART5_SIZE 2
	164	#define PART5_MULL 1024*1024
	165	#define PART5_SUFF "m"
	166	#define PART5_OFFS 0x002c0000
	167	#define PART5_MASK 0x00000000
	168
	169	#define PART6_NAME "rootfs"
	170	#define PART6_SIZE 257280
	171	#define PART6_MULL 1024
	172	#define PART6_SUFF "k"
	173	#define PART6_OFFS 0x004c0000
	174	#define PART6_MASK 0x00000000
	175
	176	#ifdef ONENAND_SUPPORT
	177
ed407be5 PR	178	#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
	179	#define CONFIG_MTD_DEVICE
	180	#define CONFIG_MTD_PARTITIONS
	181
	182	#ifdef UBIFS_SUPPORT
	183	#define CONFIG_RBTREE
	184	#define CONFIG_LZO
	185	#endif
	186
	187	#define MTDIDS_DEFAULT "onenand0=onenand"
	188	#define MTDPARTS_DEFAULT "mtdparts=onenand:" \
	189	__stringify(PART1_SIZE) PART1_SUFF "(" PART1_NAME ")ro," \
	190	__stringify(PART2_SIZE) PART2_SUFF "(" PART2_NAME ")," \
	191	__stringify(PART3_SIZE) PART3_SUFF "(" PART3_NAME ")," \
	192	__stringify(PART4_SIZE) PART4_SUFF "(" PART4_NAME ")," \
	193	__stringify(PART5_SIZE) PART5_SUFF "(" PART5_NAME ")," \
	194	"-(" PART6_NAME ")"
	195
	196	#endif
	197
	198	/* Watchdog support */
	199	#define CONFIG_HW_WATCHDOG
	200
	201	/*
	202	* Framebuffer
	203	*/
	204	/* Video console */
ed407be5 PR	205	#define CONFIG_VIDEO_LOGO
	206	#define VIDEO_FB_16BPP_PIXEL_SWAP
	207	#define VIDEO_FB_16BPP_WORD_SWAP
ed407be5 PR	208	#define CONFIG_SPLASH_SCREEN
	209
	210	/* functions for cfb_console */
	211	#define VIDEO_KBD_INIT_FCT rx51_kp_init()
	212	#define VIDEO_TSTC_FCT rx51_kp_tstc
	213	#define VIDEO_GETC_FCT rx51_kp_getc
	214	#ifndef __ASSEMBLY__
709ea543	215	struct stdio_dev;
ed407be5	216	int rx51_kp_init(void);
709ea543 SG	217	int rx51_kp_tstc(struct stdio_dev *sdev);
709ea543 SG	218	int rx51_kp_getc(struct stdio_dev *sdev);
ed407be5 PR	219	#endif
	220
	221	#ifndef MTDPARTS_DEFAULT
	222	#define MTDPARTS_DEFAULT
	223	#endif
	224
	225	/* Environment information */
ed407be5 PR	226	#define CONFIG_EXTRA_ENV_SETTINGS \
	227	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	228	"usbtty=cdc_acm\0" \
	229	"stdin=vga\0" \
	230	"stdout=vga\0" \
	231	"stderr=vga\0" \
	232	"setcon=setenv stdin ${con};" \
	233	"setenv stdout ${con};" \
	234	"setenv stderr ${con}\0" \
	235	"sercon=setenv con serial; run setcon\0" \
	236	"usbcon=setenv con usbtty; run setcon\0" \
	237	"vgacon=setenv con vga; run setcon\0" \
	238	"slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
	239	"switchmmc=mmc dev ${mmcnum}\0" \
	240	"kernaddr=0x82008000\0" \
	241	"initrdaddr=0x84008000\0" \
	242	"scriptaddr=0x86008000\0" \
	243	"fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
	244	"${loadaddr} ${mmcfile}\0" \
	245	"kernload=setenv loadaddr ${kernaddr};" \
	246	"setenv mmcfile ${mmckernfile};" \
	247	"run fileload\0" \
	248	"initrdload=setenv loadaddr ${initrdaddr};" \
	249	"setenv mmcfile ${mmcinitrdfile};" \
	250	"run fileload\0" \
	251	"scriptload=setenv loadaddr ${scriptaddr};" \
	252	"setenv mmcfile ${mmcscriptfile};" \
	253	"run fileload\0" \
	254	"scriptboot=echo Running ${mmcscriptfile} from mmc " \
	255	"${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
	256	"kernboot=echo Booting ${mmckernfile} from mmc " \
	257	"${mmcnum}:${mmcpart} ...; bootm ${kernaddr}\0" \
	258	"kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
	259	"${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr}\0" \
	260	"attachboot=echo Booting attached kernel image ...;" \
	261	"setenv setup_omap_atag 1;" \
	262	"bootm ${attkernaddr};" \
	263	"setenv setup_omap_atag\0" \
	264	"trymmcscriptboot=if run switchmmc; then " \
	265	"if run scriptload; then " \
	266	"run scriptboot;" \
	267	"fi;" \
	268	"fi\0" \
	269	"trymmckernboot=if run switchmmc; then " \
	270	"if run kernload; then " \
	271	"run kernboot;" \
	272	"fi;" \
	273	"fi\0" \
	274	"trymmckerninitrdboot=if run switchmmc; then " \
	275	"if run initrdload; then " \
	276	"if run kernload; then " \
	277	"run kerninitrdboot;" \
	278	"fi;" \
	279	"fi; " \
	280	"fi\0" \
	281	"trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
	282	"setenv mmckernfile uImage; run trymmckernboot\0" \
	283	"trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
	284	"setenv mmcpart 2; run trymmcpartboot;" \
	285	"setenv mmcpart 3; run trymmcpartboot;" \
	286	"setenv mmcpart 4; run trymmcpartboot\0" \
	287	"trymmcboot=if run switchmmc; then " \
	288	"setenv mmctype fat;" \
	289	"run trymmcallpartboot;" \
290	"setenv mmctype ext2;" \
291	"run trymmcallpartboot;" \
292	"setenv mmctype ext4;" \
293	"run trymmcallpartboot;" \
294	"fi\0" \
295	"emmcboot=setenv mmcnum 1; run trymmcboot\0" \
296	"sdboot=setenv mmcnum 0; run trymmcboot\0" \
d9993988 PR	297	"menucmd=bootmenu\0" \
	298	"bootmenu_0=Attached kernel=run attachboot\0" \
	299	"bootmenu_1=Internal eMMC=run emmcboot\0" \
	300	"bootmenu_2=External SD card=run sdboot\0" \
	301	"bootmenu_3=U-Boot boot order=boot\0" \
	302	"bootmenu_delay=30\0" \
ed407be5 PR	303	""
	304
	305	#define CONFIG_PREBOOT \
d9993988 PR	306	"setenv mmcnum 1; setenv mmcpart 1;" \
	307	"setenv mmcscriptfile bootmenu.scr;" \
	308	"if run switchmmc; then " \
	309	"setenv mmcdone true;" \
	310	"setenv mmctype fat;" \
	311	"if run scriptload; then true; else " \
	312	"setenv mmctype ext2;" \
	313	"if run scriptload; then true; else " \
	314	"setenv mmctype ext4;" \
	315	"if run scriptload; then true; else " \
	316	"setenv mmcdone false;" \
	317	"fi;" \
	318	"fi;" \
	319	"fi;" \
	320	"if ${mmcdone}; then " \
	321	"run scriptboot;" \
	322	"fi;" \
	323	"fi;" \
	324	"if run slide; then true; else " \
	325	"setenv bootmenu_delay 0;" \
	326	"setenv bootdelay 0;" \
	327	"fi"
	328
	329	#define CONFIG_POSTBOOTMENU \
	330	"echo;" \
ed407be5 PR	331	"echo Extra commands:;" \
	332	"echo run sercon - Use serial port for control.;" \
	333	"echo run usbcon - Use usbtty for control.;" \
	334	"echo run vgacon - Use framebuffer/keyboard.;" \
	335	"echo run sdboot - Boot from SD card slot.;" \
	336	"echo run emmcboot - Boot internal eMMC memory.;" \
	337	"echo run attachboot - Boot attached kernel image.;" \
	338	"echo"
	339
	340	#define CONFIG_BOOTCOMMAND \
	341	"run sdboot;" \
	342	"run emmcboot;" \
	343	"run attachboot;" \
	344	"echo"
	345
d9993988 PR	346	#define CONFIG_MENU_SHOW
d9993988 PR	347
ed407be5 PR	348	/*
	349	* Miscellaneous configurable options
	350	*/
	351	#define CONFIG_SYS_LONGHELP /* undef to save memory */
ed407be5 PR	352	#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
	353	/* Print Buffer Size */
	354	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
	355	sizeof(CONFIG_SYS_PROMPT) + 16)
	356	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
	357	/* Boot Argument Buffer Size */
	358	#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
	359
	360	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
	361	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + 0x01F00000)/31MB/
	362
	363	/* default load address */
	364	#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0)
	365
	366	/*
	367	* OMAP3 has 12 GP timers, they can be driven by the system clock
	368	* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
	369	* This rate is divided by a local divisor.
	370	*/
	371	#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
	372	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
ed407be5	373
ed407be5 PR	374	/*
	375	* Physical Memory Map
	376	*/
	377	#define CONFIG_NR_DRAM_BANKS 2
	378	#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
	379
	380	/*
	381	* FLASH and environment organization
	382	*/
	383
	384	#define CONFIG_ENV_IS_NOWHERE
	385
	386	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	387	#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
	388	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
	389	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	390	CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	391
	392	/*
	393	* Attached kernel image
	394	*/
	395
	396	#define SDRAM_SIZE 0x10000000 /* 256 MB */
	397	#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
	398
	399	#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
	400	#define KERNEL_OFFSET 0x40000 /* 256 kB */
	401	#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
	402	#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
	403
	404	/* Reserve protected RAM for attached kernel */
	405	#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
	406
	407	#endif /* __CONFIG_H */