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1/*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 *
7 * Configuration settings for the TI OMAP3530 Beagle board.
8 *
3765b3e7 9 * SPDX-License-Identifier: GPL-2.0+
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10 */
11
12#ifndef __CONFIG_H
13#define __CONFIG_H
f904cdbb 14
df4dbb5d
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15#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
16
f904cdbb 17/*
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18 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
19 * 64 bytes before this address should be set aside for u-boot.img's
20 * header. That is 0x800FFFC0--0x80100000 should not be used for any
21 * other needs. We use this rather than the inherited defines from
22 * ti_armv7_common.h for backwards compatibility.
f904cdbb 23 */
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24#define CONFIG_SYS_TEXT_BASE 0x80100000
25#define CONFIG_SPL_BSS_START_ADDR 0x80000000
26#define CONFIG_SPL_BSS_MAX_SIZE (512 << 10) /* 512 KB */
27#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
28#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
cae377b5 29
df4dbb5d 30#include <configs/ti_omap3_common.h>
f904cdbb 31
6a6b62e3
SP
32/*
33 * Display CPU and Board information
34 */
35#define CONFIG_DISPLAY_CPUINFO 1
36#define CONFIG_DISPLAY_BOARDINFO 1
37
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38#define CONFIG_MISC_INIT_R
39
f904cdbb 40#define CONFIG_REVISION_TAG 1
f904cdbb 41#define CONFIG_ENV_OVERWRITE
f904cdbb 42
70d8c944
JK
43/* Status LED */
44#define CONFIG_STATUS_LED 1
45#define CONFIG_BOARD_SPECIFIC_LED 1
46#define STATUS_LED_BIT 0x01
47#define STATUS_LED_STATE STATUS_LED_ON
48#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
49#define STATUS_LED_BIT1 0x02
50#define STATUS_LED_STATE1 STATUS_LED_ON
51#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
52#define STATUS_LED_BOOT STATUS_LED_BIT
53#define STATUS_LED_GREEN STATUS_LED_BIT1
54
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55/* Enable Multi Bus support for I2C */
56#define CONFIG_I2C_MULTI_BUS 1
57
58/* Probe all devices */
8c4e0ca6 59#define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
f74fc4ae 60
25374bfb 61/* USB */
c2af345e 62#define CONFIG_USB_MUSB_OMAP2PLUS
95de1e2f 63#define CONFIG_USB_MUSB_PIO_ONLY
25374bfb 64#define CONFIG_TWL4030_USB 1
c642b151
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65#define CONFIG_USB_ETHER
66#define CONFIG_USB_ETHER_RNDIS
17da3c0c 67#define CONFIG_USB_FUNCTION_FASTBOOT
dd5b68fb
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68#define CONFIG_CMD_FASTBOOT
69#define CONFIG_ANDROID_BOOT_IMAGE
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70#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
71#define CONFIG_FASTBOOT_BUF_SIZE 0x07000000
25374bfb 72
d90859a6 73/* USB EHCI */
d90859a6 74#define CONFIG_USB_EHCI
928c4bdf 75
29321c05 76#define CONFIG_USB_EHCI_OMAP
29321c05
IY
77#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 147
78
d90859a6 79#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
2162439a 80#define CONFIG_USB_HOST_ETHER
54b62d59 81#define CONFIG_USB_ETHER_ASIX
a743415f 82#define CONFIG_USB_ETHER_MCS7830
eddf6d28 83#define CONFIG_USB_ETHER_SMSC95XX
2162439a 84
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85/* GPIO banks */
86#define CONFIG_OMAP3_GPIO_5 /* GPIO128..159 is in GPIO bank 5 */
87#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO bank 6 */
d90859a6 88
f904cdbb 89/* commands to include */
df4dbb5d 90
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91#define MTDIDS_DEFAULT "nand0=nand"
92#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
93 "1920k(u-boot),128k(u-boot-env),"\
94 "4m(kernel),-(fs)"
f904cdbb 95
d90859a6 96#define CONFIG_USB_STORAGE /* USB storage support */
f904cdbb 97#define CONFIG_CMD_NAND /* NAND support */
70d8c944 98#define CONFIG_CMD_LED /* LED support */
f904cdbb 99
25a4d017 100#define CONFIG_VIDEO_OMAP3 /* DSS Support */
f904cdbb 101
2c155130
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102/*
103 * TWL4030
104 */
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105#define CONFIG_TWL4030_LED 1
106
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107/*
108 * Board NAND Info.
109 */
110#define CONFIG_NAND_OMAP_GPMC
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111#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
112 /* devices */
f904cdbb 113
f904cdbb 114#define CONFIG_EXTRA_ENV_SETTINGS \
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115 "loadaddr=0x80200000\0" \
116 "rdaddr=0x81000000\0" \
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117 "fdt_high=0xffffffff\0" \
118 "fdtaddr=0x80f80000\0" \
25374bfb 119 "usbtty=cdc_acm\0" \
a33e3c79 120 "bootfile=uImage\0" \
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121 "ramdisk=ramdisk.gz\0" \
122 "bootdir=/boot\0" \
123 "bootpart=0:2\0" \
27b8c8f2 124 "console=ttyO2,115200n8\0" \
f6e593bb 125 "mpurate=auto\0" \
847b83d0 126 "buddy=none\0" \
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127 "optargs=\0" \
128 "camera=none\0" \
13d2cb98 129 "vram=12M\0" \
f4b36ea9 130 "dvimode=640x480MR-16@60\0" \
13d2cb98 131 "defaultdisplay=dvi\0" \
0cd31144 132 "mmcdev=0\0" \
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133 "mmcroot=/dev/mmcblk0p2 rw\0" \
134 "mmcrootfstype=ext3 rootwait\0" \
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135 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
136 "nandrootfstype=ubifs\0" \
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137 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
138 "ramrootfstype=ext2\0" \
f904cdbb 139 "mmcargs=setenv bootargs console=${console} " \
c522eac4 140 "${optargs} " \
5af32460 141 "mpurate=${mpurate} " \
b1660314 142 "buddy=${buddy} "\
c522eac4 143 "camera=${camera} "\
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144 "vram=${vram} " \
145 "omapfb.mode=dvi:${dvimode} " \
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146 "omapdss.def_disp=${defaultdisplay} " \
147 "root=${mmcroot} " \
148 "rootfstype=${mmcrootfstype}\0" \
f904cdbb 149 "nandargs=setenv bootargs console=${console} " \
c522eac4 150 "${optargs} " \
5af32460 151 "mpurate=${mpurate} " \
b1660314 152 "buddy=${buddy} "\
c522eac4 153 "camera=${camera} "\
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154 "vram=${vram} " \
155 "omapfb.mode=dvi:${dvimode} " \
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156 "omapdss.def_disp=${defaultdisplay} " \
157 "root=${nandroot} " \
158 "rootfstype=${nandrootfstype}\0" \
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159 "findfdt=" \
160 "if test $beaglerev = AxBx; then " \
161 "setenv fdtfile omap3-beagle.dtb; fi; " \
162 "if test $beaglerev = Cx; then " \
163 "setenv fdtfile omap3-beagle.dtb; fi; " \
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164 "if test $beaglerev = C4; then " \
165 "setenv fdtfile omap3-beagle.dtb; fi; " \
2ade496f 166 "if test $beaglerev = xMAB; then " \
3d47ffb9 167 "setenv fdtfile omap3-beagle-xm-ab.dtb; fi; " \
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168 "if test $beaglerev = xMC; then " \
169 "setenv fdtfile omap3-beagle-xm.dtb; fi; " \
170 "if test $fdtfile = undefined; then " \
171 "echo WARNING: Could not determine device tree to use; fi; \0" \
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172 "validatefdt=" \
173 "if test $beaglerev = xMAB; then " \
174 "if test ! -e mmc ${bootpart} ${bootdir}/${fdtfile}; then " \
175 "setenv fdtfile omap3-beagle-xm.dtb; " \
176 "fi; " \
177 "fi; \0" \
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178 "bootenv=uEnv.txt\0" \
179 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
cf073e49 180 "importbootenv=echo Importing environment from mmc ...; " \
44bd26fa 181 "env import -t -r $loadaddr $filesize\0" \
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182 "ramargs=setenv bootargs console=${console} " \
183 "${optargs} " \
184 "mpurate=${mpurate} " \
185 "buddy=${buddy} "\
186 "vram=${vram} " \
187 "omapfb.mode=dvi:${dvimode} " \
188 "omapdss.def_disp=${defaultdisplay} " \
189 "root=${ramroot} " \
190 "rootfstype=${ramrootfstype}\0" \
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191 "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \
192 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
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193 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
194 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
195 "source ${loadaddr}\0" \
4fa2427c 196 "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
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197 "mmcboot=echo Booting from mmc ...; " \
198 "run mmcargs; " \
199 "bootm ${loadaddr}\0" \
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200 "mmcbootz=echo Booting with DT from mmc${mmcdev} ...; " \
201 "run mmcargs; " \
202 "bootz ${loadaddr} - ${fdtaddr}\0" \
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203 "nandboot=echo Booting from nand ...; " \
204 "run nandargs; " \
205 "nand read ${loadaddr} 280000 400000; " \
206 "bootm ${loadaddr}\0" \
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207 "ramboot=echo Booting from ramdisk ...; " \
208 "run ramargs; " \
209 "bootm ${loadaddr}\0" \
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210 "userbutton=if gpio input 173; then run userbutton_xm; " \
211 "else run userbutton_nonxm; fi;\0" \
212 "userbutton_xm=gpio input 4;\0" \
213 "userbutton_nonxm=gpio input 7;\0"
d7aff44a 214/* "run userbutton" will return 1 (false) if pressed and 0 (true) if not */
f904cdbb 215#define CONFIG_BOOTCOMMAND \
2ade496f 216 "run findfdt; " \
66968110 217 "mmc dev ${mmcdev}; if mmc rescan; then " \
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218 "if run userbutton; then " \
219 "setenv bootenv uEnv.txt;" \
220 "else " \
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221 "setenv bootenv user.txt;" \
222 "fi;" \
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223 "echo SD/MMC found on device ${mmcdev};" \
224 "if run loadbootenv; then " \
f835ea71 225 "echo Loaded environment from ${bootenv};" \
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226 "run importbootenv;" \
227 "fi;" \
228 "if test -n $uenvcmd; then " \
229 "echo Running uenvcmd ...;" \
230 "run uenvcmd;" \
231 "fi;" \
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232 "if run loadbootscript; then " \
233 "run bootscript; " \
234 "else " \
235 "if run loadimage; then " \
236 "run mmcboot;" \
237 "fi;" \
238 "fi; " \
cf073e49
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239 "fi;" \
240 "run nandboot;" \
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241 "setenv bootfile zImage;" \
242 "if run loadimage; then " \
243 "run loadfdt;" \
244 "run mmcbootz; " \
245 "fi; " \
f904cdbb 246
f904cdbb 247/*
d3a513c2
MP
248 * OMAP3 has 12 GP timers, they can be driven by the system clock
249 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
250 * This rate is divided by a local divisor.
f904cdbb 251 */
d3a513c2 252#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
f904cdbb 253
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254/*-----------------------------------------------------------------------
255 * FLASH and environment organization
256 */
257
258/* **** PISMO SUPPORT *** */
6cbec7b3 259#if defined(CONFIG_CMD_NAND)
222a3113 260#define CONFIG_SYS_FLASH_BASE NAND_BASE
6cbec7b3 261#endif
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262
263/* Monitor at start of flash */
264#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
265#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
266
267#define CONFIG_ENV_IS_IN_NAND 1
df4dbb5d 268#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
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269#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
270#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
271
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272#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
273#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
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274#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
275
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276#define CONFIG_OMAP3_SPI
277
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278#define CONFIG_SYS_CACHELINE_SIZE 64
279
75c57a35 280/* Defines for SPL */
75c57a35 281#define CONFIG_SPL_OMAP3_ID_NAND
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282
283/* NAND boot config */
55f1b39f 284#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
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285#define CONFIG_SYS_NAND_5_ADDR_CYCLE
286#define CONFIG_SYS_NAND_PAGE_COUNT 64
287#define CONFIG_SYS_NAND_PAGE_SIZE 2048
288#define CONFIG_SYS_NAND_OOBSIZE 64
289#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
290#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
291#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
292 10, 11, 12, 13}
293#define CONFIG_SYS_NAND_ECCSIZE 512
294#define CONFIG_SYS_NAND_ECCBYTES 3
3f719069 295#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
75c57a35 296#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
434f2cfc 297/* NAND: SPL falcon mode configs */
298#ifdef CONFIG_SPL_OS_BOOT
299#define CONFIG_CMD_SPL_NAND_OFS 0x240000
300#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
301#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
302#endif
75c57a35 303
f904cdbb 304#endif /* __CONFIG_H */