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3ef5ebeb LV |
1 | /* |
2 | * (C) Copyright 2013 | |
3 | * Texas Instruments Incorporated. | |
4 | * Sricharan R <r.sricharan@ti.com> | |
5 | * | |
6 | * Derived from OMAP4 done by: | |
7 | * Aneesh V <aneesh@ti.com> | |
8 | * | |
9 | * TI OMAP5 AND DRA7XX common configuration settings | |
10 | * | |
11 | * See file CREDITS for list of people who contributed to this | |
12 | * project. | |
13 | * | |
14 | * This program is free software; you can redistribute it and/or | |
15 | * modify it under the terms of the GNU General Public License as | |
16 | * published by the Free Software Foundation; either version 2 of | |
17 | * the License, or (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, write to the Free Software | |
26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
27 | * MA 02111-1307 USA | |
28 | */ | |
29 | ||
30 | #ifndef __CONFIG_OMAP5_COMMON_H | |
31 | #define __CONFIG_OMAP5_COMMON_H | |
32 | ||
33 | /* | |
34 | * High Level Configuration Options | |
35 | */ | |
36 | #define CONFIG_OMAP /* in a TI OMAP core */ | |
37 | #define CONFIG_OMAP54XX /* which is a 54XX */ | |
38 | #define CONFIG_OMAP_GPIO | |
39 | ||
40 | /* Get CPU defs */ | |
41 | #include <asm/arch/cpu.h> | |
42 | #include <asm/arch/omap.h> | |
43 | ||
44 | /* Display CPU and Board Info */ | |
45 | #define CONFIG_DISPLAY_CPUINFO | |
46 | #define CONFIG_DISPLAY_BOARDINFO | |
47 | ||
3ef5ebeb LV |
48 | #define CONFIG_MISC_INIT_R |
49 | ||
50 | #define CONFIG_OF_LIBFDT | |
51 | #define CONFIG_CMD_BOOTZ | |
52 | ||
53 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ | |
54 | #define CONFIG_SETUP_MEMORY_TAGS | |
55 | #define CONFIG_INITRD_TAG | |
56 | ||
57 | /* | |
58 | * Size of malloc() pool | |
59 | * Total Size Environment - 128k | |
60 | * Malloc - add 256k | |
61 | */ | |
62 | #define CONFIG_ENV_SIZE (128 << 10) | |
63 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (256 << 10)) | |
64 | /* Vector Base */ | |
65 | #define CONFIG_SYS_CA9_VECTOR_BASE SRAM_ROM_VECT_BASE | |
66 | ||
67 | /* | |
68 | * Hardware drivers | |
69 | */ | |
70 | ||
71 | /* | |
72 | * serial port - NS16550 compatible | |
73 | */ | |
74 | #define V_NS16550_CLK 48000000 | |
75 | ||
76 | #define CONFIG_SYS_NS16550 | |
77 | #define CONFIG_SYS_NS16550_SERIAL | |
78 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
79 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK | |
dd2445ec | 80 | |
47c6ea07 S |
81 | /* CPU */ |
82 | #define CONFIG_ARCH_CPU_INIT | |
83 | ||
3ef5ebeb LV |
84 | /* I2C */ |
85 | #define CONFIG_HARD_I2C | |
86 | #define CONFIG_SYS_I2C_SPEED 100000 | |
87 | #define CONFIG_SYS_I2C_SLAVE 1 | |
88 | #define CONFIG_DRIVER_OMAP34XX_I2C | |
89 | #define CONFIG_I2C_MULTI_BUS | |
90 | ||
3ef5ebeb LV |
91 | /* MMC */ |
92 | #define CONFIG_GENERIC_MMC | |
93 | #define CONFIG_MMC | |
94 | #define CONFIG_OMAP_HSMMC | |
95 | #define CONFIG_DOS_PARTITION | |
96 | ||
3ef5ebeb LV |
97 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
98 | ||
99 | /* Flash */ | |
100 | #define CONFIG_SYS_NO_FLASH | |
101 | ||
102 | /* Cache */ | |
103 | #define CONFIG_SYS_CACHELINE_SIZE 64 | |
104 | #define CONFIG_SYS_CACHELINE_SHIFT 6 | |
105 | ||
106 | /* commands to include */ | |
107 | #include <config_cmd_default.h> | |
108 | ||
109 | /* Enabled commands */ | |
110 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ | |
111 | #define CONFIG_CMD_FAT /* FAT support */ | |
112 | #define CONFIG_CMD_I2C /* I2C serial bus support */ | |
113 | #define CONFIG_CMD_MMC /* MMC support */ | |
3ef5ebeb LV |
114 | |
115 | /* Disabled commands */ | |
116 | #undef CONFIG_CMD_NET | |
117 | #undef CONFIG_CMD_NFS | |
118 | #undef CONFIG_CMD_FPGA /* FPGA configuration Support */ | |
119 | #undef CONFIG_CMD_IMLS /* List all found images */ | |
120 | ||
121 | /* | |
122 | * Environment setup | |
123 | */ | |
124 | ||
125 | #define CONFIG_BOOTDELAY 3 | |
143070df S |
126 | #define CONFIG_ENV_VARS_UBOOT_CONFIG |
127 | #define CONFIG_CMD_FS_GENERIC | |
128 | #define CONFIG_CMD_EXT2 | |
129 | #define CONFIG_CMD_EXT4 | |
3ef5ebeb LV |
130 | |
131 | #define CONFIG_ENV_OVERWRITE | |
132 | ||
9552ee3e TR |
133 | #ifndef PARTS_DEFAULT |
134 | #define PARTS_DEFAULT | |
135 | #endif | |
136 | ||
3ef5ebeb LV |
137 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
138 | "loadaddr=0x82000000\0" \ | |
139 | "console=ttyO2,115200n8\0" \ | |
d3501ed5 | 140 | "fdt_high=0xffffffff\0" \ |
143070df | 141 | "fdtaddr=0x80f80000\0" \ |
a7143215 | 142 | "fdtfile=undefined\0" \ |
143070df S |
143 | "bootpart=0:2\0" \ |
144 | "bootdir=/boot\0" \ | |
aaed0a23 | 145 | "bootfile=zImage\0" \ |
3ef5ebeb LV |
146 | "usbtty=cdc_acm\0" \ |
147 | "vram=16M\0" \ | |
9552ee3e | 148 | "partitions=" PARTS_DEFAULT "\0" \ |
85b7ac45 | 149 | "optargs=\0" \ |
3ef5ebeb LV |
150 | "mmcdev=0\0" \ |
151 | "mmcroot=/dev/mmcblk0p2 rw\0" \ | |
46afd3ef | 152 | "mmcrootfstype=ext4 rootwait\0" \ |
3ef5ebeb | 153 | "mmcargs=setenv bootargs console=${console} " \ |
85b7ac45 | 154 | "${optargs} " \ |
3ef5ebeb LV |
155 | "vram=${vram} " \ |
156 | "root=${mmcroot} " \ | |
157 | "rootfstype=${mmcrootfstype}\0" \ | |
158 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ | |
159 | "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ | |
160 | "source ${loadaddr}\0" \ | |
78fd0041 NM |
161 | "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ |
162 | "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ | |
163 | "env import -t ${loadaddr} ${filesize}\0" \ | |
143070df | 164 | "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ |
3ef5ebeb LV |
165 | "mmcboot=echo Booting from mmc${mmcdev} ...; " \ |
166 | "run mmcargs; " \ | |
aaed0a23 | 167 | "bootz ${loadaddr} - ${fdtaddr}\0" \ |
143070df S |
168 | "findfdt="\ |
169 | "if test $board_name = omap5_uevm; then " \ | |
a7143215 DM |
170 | "setenv fdtfile omap5-uevm.dtb; fi; " \ |
171 | "if test $fdtfile = undefined; then " \ | |
172 | "echo WARNING: Could not determine device tree to use; fi; \0" \ | |
143070df | 173 | "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ |
3ef5ebeb LV |
174 | |
175 | #define CONFIG_BOOTCOMMAND \ | |
143070df | 176 | "run findfdt; " \ |
3ef5ebeb LV |
177 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
178 | "if run loadbootscript; then " \ | |
179 | "run bootscript; " \ | |
180 | "else " \ | |
78fd0041 NM |
181 | "if run loadbootenv; then " \ |
182 | "run importbootenv; " \ | |
183 | "fi;" \ | |
184 | "if test -n ${uenvcmd}; then " \ | |
185 | "echo Running uenvcmd ...;" \ | |
186 | "run uenvcmd;" \ | |
187 | "fi;" \ | |
188 | "fi;" \ | |
143070df S |
189 | "if run loadimage; then " \ |
190 | "run loadfdt; " \ | |
78fd0041 | 191 | "run mmcboot; " \ |
3ef5ebeb LV |
192 | "fi; " \ |
193 | "fi" | |
194 | ||
195 | #define CONFIG_AUTO_COMPLETE 1 | |
196 | ||
197 | /* | |
198 | * Miscellaneous configurable options | |
199 | */ | |
200 | ||
201 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
202 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
203 | #define CONFIG_SYS_CBSIZE 256 | |
204 | /* Print Buffer Size */ | |
205 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
206 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
207 | #define CONFIG_SYS_MAXARGS 16 | |
208 | /* Boot Argument Buffer Size */ | |
209 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) | |
210 | ||
211 | /* | |
212 | * memtest setup | |
213 | */ | |
214 | #define CONFIG_SYS_MEMTEST_START 0x80000000 | |
215 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (32 << 20)) | |
216 | ||
217 | /* Default load address */ | |
218 | #define CONFIG_SYS_LOAD_ADDR 0x80000000 | |
219 | ||
220 | /* Use General purpose timer 1 */ | |
221 | #define CONFIG_SYS_TIMERBASE GPT2_BASE | |
222 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
223 | #define CONFIG_SYS_HZ 1000 | |
224 | ||
225 | /* | |
226 | * SDRAM Memory Map | |
227 | * Even though we use two CS all the memory | |
228 | * is mapped to one contiguous block | |
229 | */ | |
230 | #define CONFIG_NR_DRAM_BANKS 1 | |
231 | ||
232 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 | |
233 | #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ | |
234 | GENERATED_GBL_DATA_SIZE) | |
235 | ||
236 | #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS | |
237 | ||
238 | /* Defines for SDRAM init */ | |
239 | #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS | |
240 | #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION | |
241 | #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS | |
242 | #endif | |
243 | ||
a5d439c2 B |
244 | #ifndef CONFIG_SPL_BUILD |
245 | #define CONFIG_PALMAS_POWER | |
246 | #endif | |
247 | ||
3ef5ebeb LV |
248 | /* Defines for SPL */ |
249 | #define CONFIG_SPL | |
250 | #define CONFIG_SPL_FRAMEWORK | |
251 | #define CONFIG_SPL_TEXT_BASE 0x40300350 | |
252 | #define CONFIG_SPL_MAX_SIZE 0x19000 /* 100K */ | |
253 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR | |
254 | #define CONFIG_SPL_DISPLAY_PRINT | |
255 | ||
256 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ | |
257 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ | |
258 | #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 | |
259 | #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" | |
260 | ||
261 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
262 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
263 | #define CONFIG_SPL_I2C_SUPPORT | |
264 | #define CONFIG_SPL_MMC_SUPPORT | |
265 | #define CONFIG_SPL_FAT_SUPPORT | |
266 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
267 | #define CONFIG_SPL_SERIAL_SUPPORT | |
268 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" | |
269 | ||
270 | /* | |
271 | * 64 bytes before this address should be set aside for u-boot.img's | |
272 | * header. That is 80E7FFC0--0x80E80000 should not be used for any | |
273 | * other needs. | |
274 | */ | |
275 | #define CONFIG_SYS_TEXT_BASE 0x80E80000 | |
276 | ||
277 | /* | |
278 | * BSS and malloc area 64MB into memory to allow enough | |
279 | * space for the kernel at the beginning of memory | |
280 | */ | |
281 | #define CONFIG_SPL_BSS_START_ADDR 0x84000000 | |
282 | #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ | |
283 | #define CONFIG_SYS_SPL_MALLOC_START 0x84100000 | |
284 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ | |
285 | #define CONFIG_SPL_GPIO_SUPPORT | |
286 | ||
287 | #endif /* __CONFIG_OMAP5_COMMON_H */ |