[people/ms/u-boot.git] / include / configs / sunxi-common.h

/*
 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
 *
 * (C) Copyright 2007-2011
 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
 * Tom Cubie <tangliang@allwinnertech.com>
 *
 * Configuration settings for the Allwinner sunxi series of boards.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _SUNXI_COMMON_CONFIG_H
#define _SUNXI_COMMON_CONFIG_H

#include <asm/arch/cpu.h>
#include <linux/stringify.h>

#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
/*
 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
 * expense of restricting some features, so the regular machine id values can
 * be used.
 */
# define CONFIG_MACH_TYPE_COMPAT_REV	0
#else
/*
 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
 * beyond the machine id check.
 */
# define CONFIG_MACH_TYPE_COMPAT_REV	1
#endif

/* Serial & console */
#define CONFIG_SYS_NS16550_SERIAL
/* ns16550 reg in the low bits of cpu reg */
#define CONFIG_SYS_NS16550_CLK		24000000
#ifndef CONFIG_DM_SERIAL
# define CONFIG_SYS_NS16550_REG_SIZE	-4
# define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
# define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
# define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
# define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
# define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
#endif

/* CPU */
#define COUNTER_FREQUENCY		24000000

/*
 * The DRAM Base differs between some models. We cannot use macros for the
 * CONFIG_FOO defines which contain the DRAM base address since they end
 * up unexpanded in include/autoconf.mk .
 *
 * So we have to have this #ifdef #else #endif block for these.
 */
#ifdef CONFIG_MACH_SUN9I
#define SDRAM_OFFSET(x) 0x2##x
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
#define CONFIG_SYS_TEXT_BASE		0x2a000000
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 
 * since it needs to fit in with the other values. By also #defining it
 * we get warnings if the Kconfig value mismatches. */
#define CONFIG_SPL_STACK_R_ADDR		0x2fe00000
#define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
#else
#define SDRAM_OFFSET(x) 0x4##x
#define CONFIG_SYS_SDRAM_BASE		0x40000000
#define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
/* V3s do not have enough memory to place code at 0x4a000000 */
#ifndef CONFIG_MACH_SUN8I_V3S
#define CONFIG_SYS_TEXT_BASE		0x4a000000
#else
#define CONFIG_SYS_TEXT_BASE		0x42e00000
#endif
/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here 
 * since it needs to fit in with the other values. By also #defining it
 * we get warnings if the Kconfig value mismatches. */
#define CONFIG_SPL_STACK_R_ADDR		0x4fe00000
#define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
#endif

#define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */

#ifdef CONFIG_SUNXI_HIGH_SRAM
/*
 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
 * slightly bigger. Note that it is possible to map the first 32 KiB of the
 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
 */
#define CONFIG_SYS_INIT_RAM_ADDR	0x10000
#define CONFIG_SYS_INIT_RAM_SIZE	0x08000	/* FIXME: 40 KiB ? */
#else
#define CONFIG_SYS_INIT_RAM_ADDR	0x0
#define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
#endif

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */

#ifdef CONFIG_AHCI
#define CONFIG_LIBATA
#define CONFIG_SCSI_AHCI
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SUNXI_AHCI
#define CONFIG_SYS_64BIT_LBA
#define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
#define CONFIG_SYS_SCSI_MAX_LUN		1
#define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
					 CONFIG_SYS_SCSI_MAX_LUN)
#define CONFIG_SCSI
#endif

#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_CMDLINE_TAG
#define CONFIG_INITRD_TAG
#define CONFIG_SERIAL_TAG

#ifdef CONFIG_NAND_SUNXI
#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_SYS_MAX_NAND_DEVICE 8

#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#endif

#ifdef CONFIG_SPL_SPI_SUNXI
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
#endif

/* mmc config */
#ifdef CONFIG_MMC
#define CONFIG_MMC_SUNXI_SLOT		0
#endif

#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
#define CONFIG_SYS_MMC_MAX_DEVICE	4
#elif defined(CONFIG_ENV_IS_NOWHERE)
#define CONFIG_ENV_SIZE			(128 << 10)
#endif

#ifndef CONFIG_MACH_SUN8I_V3S
/* 64MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (64 << 20))
#else
/* 2MB of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (2 << 20))
#endif

/*
 * Miscellaneous configurable options
 */
#define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
#define CONFIG_SYS_MAXARGS	16	/* max number of command args */

/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

/* standalone support */
#define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR

/* FLASH and environment organization */

#define CONFIG_SYS_MONITOR_LEN		(768 << 10)	/* 768 KiB */

#define CONFIG_FAT_WRITE	/* enable write access */

#define CONFIG_SPL_FRAMEWORK

#ifndef CONFIG_ARM64		/* AArch64 FEL support is not ready yet */
#define CONFIG_SPL_BOARD_LOAD_IMAGE
#endif

#ifdef CONFIG_SUNXI_HIGH_SRAM
#define CONFIG_SPL_TEXT_BASE		0x10040		/* sram start+header */
#define CONFIG_SPL_MAX_SIZE		0x7fc0		/* 32 KiB */
#ifdef CONFIG_ARM64
/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
#define LOW_LEVEL_SRAM_STACK		0x00054000
#else
#define LOW_LEVEL_SRAM_STACK		0x00018000
#endif /* !CONFIG_ARM64 */
#else
#define CONFIG_SPL_TEXT_BASE		0x40		/* sram start+header */
#define CONFIG_SPL_MAX_SIZE		0x5fc0		/* 24KB on sun4i/sun7i */
#define LOW_LEVEL_SRAM_STACK		0x00008000	/* End of sram */
#endif

#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK

#ifndef CONFIG_ARM64
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
#endif

#define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */


/* I2C */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
    defined CONFIG_SY8106A_POWER
#endif

#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
    defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
    defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
#define CONFIG_SYS_I2C_MVTWSI
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_SPEED		400000
#define CONFIG_SYS_I2C_SLAVE		0x7f
#endif
#endif

#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
#define CONFIG_SYS_I2C_SOFT
#define CONFIG_SYS_I2C_SOFT_SPEED	50000
#define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
/* We use pin names in Kconfig and sunxi_name_to_gpio() */
#define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
#define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
#ifndef __ASSEMBLY__
extern int soft_i2c_gpio_sda;
extern int soft_i2c_gpio_scl;
#endif
#define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
#define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
#else
#define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
#define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
#endif

/* PMU */
#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
    defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
    defined CONFIG_SY8106A_POWER
#endif

#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
#if CONFIG_CONS_INDEX == 1
#ifdef CONFIG_MACH_SUN9I
#define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
#else
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
#endif
#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
#define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
#else
#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
#endif
#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */

/* GPIO */
#define CONFIG_SUNXI_GPIO

#ifdef CONFIG_VIDEO
/*
 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
 * to use as framebuffer. This must be a multiple of 4096.
 */
#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)

/* Do we want to initialize a simple FB? */
#define CONFIG_VIDEO_DT_SIMPLEFB

#define CONFIG_VIDEO_SUNXI

#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_STD_TIMINGS
#define CONFIG_I2C_EDID
#define VIDEO_LINE_LEN (pGD->plnSizeX)

/* allow both serial and cfb console. */
/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */

#endif /* CONFIG_VIDEO */

/* Ethernet support */
#ifdef CONFIG_SUNXI_EMAC
#define CONFIG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management		*/
#define CONFIG_PHYLIB
#endif

#ifdef CONFIG_SUNXI_GMAC
#define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
#define CONFIG_PHY_ADDR		1
#define CONFIG_MII			/* MII PHY management		*/
#define CONFIG_PHY_REALTEK
#endif

#ifdef CONFIG_USB_EHCI_HCD
#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_OHCI_SUNXI
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
#endif

#ifdef CONFIG_USB_MUSB_SUNXI
#define CONFIG_USB_MUSB_PIO_ONLY
#endif

#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_USB_FUNCTION_MASS_STORAGE
#endif

#ifdef CONFIG_USB_FUNCTION_FASTBOOT
#define CONFIG_CMD_FASTBOOT
#define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
#define CONFIG_FASTBOOT_BUF_SIZE	0x2000000
#define CONFIG_ANDROID_BOOT_IMAGE

#define CONFIG_FASTBOOT_FLASH

#ifdef CONFIG_MMC
#define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
#endif
#endif

#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
#endif

#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_PREBOOT
#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
#endif

#define CONFIG_MISC_INIT_R

#ifndef CONFIG_SPL_BUILD
#include <config_distro_defaults.h>

#ifdef CONFIG_ARM64
/*
 * Boards seem to come with at least 512MB of DRAM.
 * The kernel should go at 512K, which is the default text offset (that will
 * be adjusted at runtime if needed).
 * There is no compression for arm64 kernels (yet), so leave some space
 * for really big kernels, say 256MB for now.
 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
 * Align the initrd to a 2MB page.
 */
#define BOOTM_SIZE	__stringify(0xa000000)
#define KERNEL_ADDR_R	__stringify(SDRAM_OFFSET(0080000))
#define FDT_ADDR_R	__stringify(SDRAM_OFFSET(FA00000))
#define SCRIPT_ADDR_R	__stringify(SDRAM_OFFSET(FC00000))
#define PXEFILE_ADDR_R	__stringify(SDRAM_OFFSET(FD00000))
#define RAMDISK_ADDR_R	__stringify(SDRAM_OFFSET(FE00000))

#else
/*
 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
 * 1M script, 1M pxe and the ramdisk at the end.
 */
#ifndef CONFIG_MACH_SUN8I_V3S
#define BOOTM_SIZE     __stringify(0xa000000)
#define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(2000000))
#define FDT_ADDR_R     __stringify(SDRAM_OFFSET(3000000))
#define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(3100000))
#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
#else
/*
 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
 * 1M script, 1M pxe and the ramdisk at the end.
 */
#define BOOTM_SIZE     __stringify(0x2e00000)
#define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(1000000))
#define FDT_ADDR_R     __stringify(SDRAM_OFFSET(1800000))
#define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(1900000))
#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
#endif
#endif

#define MEM_LAYOUT_ENV_SETTINGS \
	"bootm_size=" BOOTM_SIZE "\0" \
	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
	"fdt_addr_r=" FDT_ADDR_R "\0" \
	"scriptaddr=" SCRIPT_ADDR_R "\0" \
	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"

#define DFU_ALT_INFO_RAM \
	"dfu_alt_info_ram=" \
	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
	"fdt ram " FDT_ADDR_R " 0x100000;" \
	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"

#ifdef CONFIG_MMC
#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
#else
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
#endif
#else
#define BOOT_TARGET_DEVICES_MMC(func)
#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
#endif

#ifdef CONFIG_AHCI
#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
#else
#define BOOT_TARGET_DEVICES_SCSI(func)
#endif

#ifdef CONFIG_USB_STORAGE
#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
#else
#define BOOT_TARGET_DEVICES_USB(func)
#endif

/* FEL boot support, auto-execute boot.scr if a script address was provided */
#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
	"bootcmd_fel=" \
		"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
			"echo '(FEL boot)'; " \
			"source ${fel_scriptaddr}; " \
		"fi\0"
#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
	"fel "

#define BOOT_TARGET_DEVICES(func) \
	func(FEL, fel, na) \
	BOOT_TARGET_DEVICES_MMC(func) \
	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
	BOOT_TARGET_DEVICES_SCSI(func) \
	BOOT_TARGET_DEVICES_USB(func) \
	func(PXE, pxe, na) \
	func(DHCP, dhcp, na)

#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
#define BOOTCMD_SUNXI_COMPAT \
	"bootcmd_sunxi_compat=" \
		"setenv root /dev/mmcblk0p3 rootwait; " \
		"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
			"echo Loaded environment from uEnv.txt; " \
			"env import -t 0x44000000 ${filesize}; " \
		"fi; " \
		"setenv bootargs console=${console} root=${root} ${extraargs}; " \
		"ext2load mmc 0 0x43000000 script.bin && " \
		"ext2load mmc 0 0x48000000 uImage && " \
		"bootm 0x48000000\0"
#else
#define BOOTCMD_SUNXI_COMPAT
#endif

#include <config_distro_bootcmd.h>

#ifdef CONFIG_USB_KEYBOARD
#define CONSOLE_STDIN_SETTINGS \
	"preboot=usb start\0" \
	"stdin=serial,usbkbd\0"
#else
#define CONSOLE_STDIN_SETTINGS \
	"stdin=serial\0"
#endif

#ifdef CONFIG_VIDEO
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial,vga\0" \
	"stderr=serial,vga\0"
#elif CONFIG_DM_VIDEO
#define CONFIG_SYS_WHITE_ON_BLACK
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial,vidconsole\0" \
	"stderr=serial,vidconsole\0"
#else
#define CONSOLE_STDOUT_SETTINGS \
	"stdout=serial\0" \
	"stderr=serial\0"
#endif

#ifdef CONFIG_MTDIDS_DEFAULT
#define SUNXI_MTDIDS_DEFAULT \
	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
#else
#define SUNXI_MTDIDS_DEFAULT
#endif

#ifdef CONFIG_MTDPARTS_DEFAULT
#define SUNXI_MTDPARTS_DEFAULT \
	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
#else
#define SUNXI_MTDPARTS_DEFAULT
#endif

#define CONSOLE_ENV_SETTINGS \
	CONSOLE_STDIN_SETTINGS \
	CONSOLE_STDOUT_SETTINGS

#ifdef CONFIG_ARM64
#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
#else
#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
#endif

#define CONFIG_EXTRA_ENV_SETTINGS \
	CONSOLE_ENV_SETTINGS \
	MEM_LAYOUT_ENV_SETTINGS \
	DFU_ALT_INFO_RAM \
	"fdtfile=" FDTFILE "\0" \
	"console=ttyS0,115200\0" \
	SUNXI_MTDIDS_DEFAULT \
	SUNXI_MTDPARTS_DEFAULT \
	BOOTCMD_SUNXI_COMPAT \
	BOOTENV

#else /* ifndef CONFIG_SPL_BUILD */
#define CONFIG_EXTRA_ENV_SETTINGS
#endif

#endif /* _SUNXI_COMMON_CONFIG_H */
Commit	Line	Data
cba69eee IC	1	/*
	2	* (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
	3	*
	4	* (C) Copyright 2007-2011
	5	* Allwinner Technology Co., Ltd. <www.allwinnertech.com>
	6	* Tom Cubie <tangliang@allwinnertech.com>
	7	*
	8	* Configuration settings for the Allwinner sunxi series of boards.
	9	*
	10	* SPDX-License-Identifier: GPL-2.0+
	11	*/
	12
	13	#ifndef _SUNXI_COMMON_CONFIG_H
	14	#define _SUNXI_COMMON_CONFIG_H
	15
daf6d399	16	#include <asm/arch/cpu.h>
e049fe28 HG	17	#include <linux/stringify.h>
e049fe28 HG	18
77ef1369 SS	19	#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
	20	/*
	21	* The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
	22	* expense of restricting some features, so the regular machine id values can
	23	* be used.
	24	*/
	25	# define CONFIG_MACH_TYPE_COMPAT_REV 0
	26	#else
	27	/*
	28	* A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
	29	* Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
	30	* beyond the machine id check.
	31	*/
	32	# define CONFIG_MACH_TYPE_COMPAT_REV 1
	33	#endif
	34
cba69eee	35	/* Serial & console */
cba69eee IC	36	#define CONFIG_SYS_NS16550_SERIAL
cba69eee IC	37	/* ns16550 reg in the low bits of cpu reg */
cba69eee	38	#define CONFIG_SYS_NS16550_CLK 24000000
4fb60552	39	#ifndef CONFIG_DM_SERIAL
1a81cf83 SG	40	# define CONFIG_SYS_NS16550_REG_SIZE -4
	41	# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
	42	# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
	43	# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
	44	# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
	45	# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
	46	#endif
cba69eee	47
8a65f69c	48	/* CPU */
e4916e85	49	#define COUNTER_FREQUENCY 24000000
8a65f69c	50
e049fe28 HG	51	/*
	52	* The DRAM Base differs between some models. We cannot use macros for the
	53	* CONFIG_FOO defines which contain the DRAM base address since they end
	54	* up unexpanded in include/autoconf.mk .
	55	*
	56	* So we have to have this #ifdef #else #endif block for these.
	57	*/
	58	#ifdef CONFIG_MACH_SUN9I
	59	#define SDRAM_OFFSET(x) 0x2##x
	60	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	61	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
	62	#define CONFIG_SYS_TEXT_BASE 0x2a000000
ff42d107 HG	63	/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
	64	* since it needs to fit in with the other values. By also #defining it
	65	* we get warnings if the Kconfig value mismatches. */
	66	#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
e049fe28 HG	67	#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
	68	#else
	69	#define SDRAM_OFFSET(x) 0x4##x
cba69eee	70	#define CONFIG_SYS_SDRAM_BASE 0x40000000
e049fe28	71	#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
c199489f IZ	72	/* V3s do not have enough memory to place code at 0x4a000000 */
c199489f IZ	73	#ifndef CONFIG_MACH_SUN8I_V3S
e049fe28	74	#define CONFIG_SYS_TEXT_BASE 0x4a000000
c199489f IZ	75	#else
	76	#define CONFIG_SYS_TEXT_BASE 0x42e00000
	77	#endif
ff42d107 HG	78	/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
	79	* since it needs to fit in with the other values. By also #defining it
	80	* we get warnings if the Kconfig value mismatches. */
	81	#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
e049fe28 HG	82	#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
	83	#endif
	84
	85	#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
e049fe28	86
bc613d85	87	#ifdef CONFIG_SUNXI_HIGH_SRAM
77fe9887 HG	88	/*
	89	* The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
	90	* slightly bigger. Note that it is possible to map the first 32 KiB of the
	91	* A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
	92	* undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
	93	* the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
	94	*/
	95	#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
eb504fa1	96	#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
77fe9887	97	#else
cba69eee IC	98	#define CONFIG_SYS_INIT_RAM_ADDR 0x0
cba69eee IC	99	#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
77fe9887	100	#endif
cba69eee IC	101
	102	#define CONFIG_SYS_INIT_SP_OFFSET \
	103	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	104	#define CONFIG_SYS_INIT_SP_ADDR \
	105	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	106
	107	#define CONFIG_NR_DRAM_BANKS 1
	108	#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
	109	#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
	110
a6e50a88 IC	111	#ifdef CONFIG_AHCI
	112	#define CONFIG_LIBATA
	113	#define CONFIG_SCSI_AHCI
	114	#define CONFIG_SCSI_AHCI_PLAT
	115	#define CONFIG_SUNXI_AHCI
0751b138	116	#define CONFIG_SYS_64BIT_LBA
a6e50a88 IC	117	#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
	118	#define CONFIG_SYS_SCSI_MAX_LUN 1
	119	#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
	120	CONFIG_SYS_SCSI_MAX_LUN)
c649e3c9	121	#define CONFIG_SCSI
a6e50a88 IC	122	#endif
a6e50a88 IC	123
cba69eee IC	124	#define CONFIG_SETUP_MEMORY_TAGS
	125	#define CONFIG_CMDLINE_TAG
	126	#define CONFIG_INITRD_TAG
9f852211	127	#define CONFIG_SERIAL_TAG
cba69eee	128
e5268616	129	#ifdef CONFIG_NAND_SUNXI
a0dfa88b	130	#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
4ccae81c BB	131	#define CONFIG_SYS_NAND_ONFI_DETECTION
4ccae81c BB	132	#define CONFIG_SYS_MAX_NAND_DEVICE 8
d482a8df HG	133
	134	#define CONFIG_MTD_DEVICE
	135	#define CONFIG_MTD_PARTITIONS
960caeba PZ	136	#endif
960caeba PZ	137
19e99fb4	138	#ifdef CONFIG_SPL_SPI_SUNXI
19e99fb4 SS	139	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
	140	#endif
	141
e24ea55c	142	/* mmc config */
44c79879	143	#ifdef CONFIG_MMC
e24ea55c	144	#define CONFIG_MMC_SUNXI_SLOT 0
fb1c43cc MR	145	#endif
	146
	147	#if defined(CONFIG_ENV_IS_IN_MMC)
e24ea55c	148	#define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
ae042beb	149	#define CONFIG_SYS_MMC_MAX_DEVICE 4
d6a7e0cb MR	150	#elif defined(CONFIG_ENV_IS_NOWHERE)
d6a7e0cb MR	151	#define CONFIG_ENV_SIZE (128 << 10)
ff2b47f6	152	#endif
e24ea55c	153
c199489f	154	#ifndef CONFIG_MACH_SUN8I_V3S
5c965ed9 HG	155	/* 64MB of malloc() pool */
5c965ed9 HG	156	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
c199489f IZ	157	#else
	158	/* 2MB of malloc() pool */
	159	#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
	160	#endif
cba69eee IC	161
	162	/*
	163	* Miscellaneous configurable options
	164	*/
06beadb0 IC	165	#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
06beadb0 IC	166	#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
cba69eee	167	#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
cba69eee IC	168
	169	/* Boot Argument Buffer Size */
	170	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	171
cba69eee	172	/* standalone support */
e049fe28	173	#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
cba69eee	174
cba69eee IC	175	/* FLASH and environment organization */
cba69eee IC	176
fa5e1020	177	#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
cba69eee	178
cba69eee IC	179	#define CONFIG_FAT_WRITE /* enable write access */
	180
	181	#define CONFIG_SPL_FRAMEWORK
cba69eee	182
eb77f5c9	183	#ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */
942cb0b6	184	#define CONFIG_SPL_BOARD_LOAD_IMAGE
eb77f5c9	185	#endif
942cb0b6	186
bc613d85	187	#ifdef CONFIG_SUNXI_HIGH_SRAM
b19236fd	188	#define CONFIG_SPL_TEXT_BASE 0x10040 /* sram start+header */
bc613d85	189	#define CONFIG_SPL_MAX_SIZE 0x7fc0 /* 32 KiB */
54522c92 AP	190	#ifdef CONFIG_ARM64
	191	/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
	192	#define LOW_LEVEL_SRAM_STACK 0x00054000
	193	#else
bc613d85	194	#define LOW_LEVEL_SRAM_STACK 0x00018000
54522c92	195	#endif /* !CONFIG_ARM64 */
d96ebc46	196	#else
b19236fd SS	197	#define CONFIG_SPL_TEXT_BASE 0x40 /* sram start+header */
b19236fd SS	198	#define CONFIG_SPL_MAX_SIZE 0x5fc0 /* 24KB on sun4i/sun7i */
bc613d85	199	#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
d96ebc46	200	#endif
50827a59	201
bc613d85 AP	202	#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
bc613d85 AP	203
d96ebc46	204	#ifndef CONFIG_ARM64
50827a59	205	#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
d96ebc46	206	#endif
50827a59	207
50827a59 IC	208	#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
50827a59 IC	209
cba69eee	210
6620377e	211	/* I2C */
0d8382ae JW	212	#if defined CONFIG_AXP152_POWER \|\| defined CONFIG_AXP209_POWER \|\| \
0d8382ae JW	213	defined CONFIG_SY8106A_POWER
ad40610b HG	214	#endif
ad40610b HG	215
6c739c5d PK	216	#if defined CONFIG_I2C0_ENABLE \|\| defined CONFIG_I2C1_ENABLE \|\| \
6c739c5d PK	217	defined CONFIG_I2C2_ENABLE \|\| defined CONFIG_I2C3_ENABLE \|\| \
9d082687	218	defined CONFIG_I2C4_ENABLE \|\| defined CONFIG_R_I2C_ENABLE
6620377e	219	#define CONFIG_SYS_I2C_MVTWSI
a8f01ccf JS	220	#ifndef CONFIG_DM_I2C
a8f01ccf JS	221	#define CONFIG_SYS_I2C
6620377e HG	222	#define CONFIG_SYS_I2C_SPEED 400000
6620377e HG	223	#define CONFIG_SYS_I2C_SLAVE 0x7f
8b2db32a	224	#endif
a8f01ccf	225	#endif
55410089 HG	226
	227	#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
	228	#define CONFIG_SYS_I2C_SOFT
	229	#define CONFIG_SYS_I2C_SOFT_SPEED 50000
	230	#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
55410089 HG	231	/* We use pin names in Kconfig and sunxi_name_to_gpio() */
	232	#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
	233	#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
	234	#ifndef __ASSEMBLY__
	235	extern int soft_i2c_gpio_sda;
	236	extern int soft_i2c_gpio_scl;
	237	#endif
1fc42018 HG	238	#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
	239	#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
	240	#else
	241	#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
	242	#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
55410089 HG	243	#endif
55410089 HG	244
14bc66bd	245	/* PMU */
95ab8fee	246	#if defined CONFIG_AXP152_POWER \|\| defined CONFIG_AXP209_POWER \|\| \
0d8382ae JW	247	defined CONFIG_AXP221_POWER \|\| defined CONFIG_AXP818_POWER \|\| \
0d8382ae JW	248	defined CONFIG_SY8106A_POWER
14bc66bd HN	249	#endif
14bc66bd HN	250
a5da3c83	251	#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
f3133962 HG	252	#if CONFIG_CONS_INDEX == 1
	253	#ifdef CONFIG_MACH_SUN9I
	254	#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
	255	#else
	256	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
	257	#endif
	258	#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
	259	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
5cd83b11 LI	260	#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
5cd83b11 LI	261	#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
f3133962 HG	262	#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
	263	#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
	264	#else
	265	#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
	266	#endif
a5da3c83	267	#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
f3133962	268
abce2c62 IC	269	/* GPIO */
abce2c62 IC	270	#define CONFIG_SUNXI_GPIO
abce2c62	271
7f2c521f LV	272	#ifdef CONFIG_VIDEO
7f2c521f LV	273	/*
5633a296 HG	274	* The amount of RAM to keep free at the top of RAM when relocating u-boot,
5633a296 HG	275	* to use as framebuffer. This must be a multiple of 4096.
7f2c521f	276	*/
5c965ed9	277	#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
7f2c521f	278
2d7a084b LV	279	/* Do we want to initialize a simple FB? */
	280	#define CONFIG_VIDEO_DT_SIMPLEFB
	281
7f2c521f LV	282	#define CONFIG_VIDEO_SUNXI
7f2c521f LV	283
7f2c521f	284	#define CONFIG_VIDEO_LOGO
be8ec633	285	#define CONFIG_VIDEO_STD_TIMINGS
75481607	286	#define CONFIG_I2C_EDID
58332f89	287	#define VIDEO_LINE_LEN (pGD->plnSizeX)
7f2c521f LV	288
7f2c521f LV	289	/* allow both serial and cfb console. */
7f2c521f	290	/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
7f2c521f	291
7f2c521f LV	292	#endif /* CONFIG_VIDEO */
7f2c521f LV	293
c26fb9db HG	294	/* Ethernet support */
c26fb9db HG	295	#ifdef CONFIG_SUNXI_EMAC
8145dea4	296	#define CONFIG_PHY_ADDR 1
c26fb9db	297	#define CONFIG_MII /* MII PHY management */
8145dea4	298	#define CONFIG_PHYLIB
c26fb9db HG	299	#endif
c26fb9db HG	300
5835823d	301	#ifdef CONFIG_SUNXI_GMAC
5835823d IC	302	#define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
	303	#define CONFIG_PHY_ADDR 1
	304	#define CONFIG_MII /* MII PHY management */
1eae8f66	305	#define CONFIG_PHY_REALTEK
5835823d IC	306	#endif
5835823d IC	307
2582ca0d	308	#ifdef CONFIG_USB_EHCI_HCD
6a72e804 HG	309	#define CONFIG_USB_OHCI_NEW
	310	#define CONFIG_USB_OHCI_SUNXI
	311	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
3584f30c	312	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
1a800f7a HG	313	#endif
	314
	315	#ifdef CONFIG_USB_MUSB_SUNXI
95de1e2f	316	#define CONFIG_USB_MUSB_PIO_ONLY
1a800f7a HG	317	#endif
1a800f7a HG	318
b21144eb	319	#ifdef CONFIG_USB_MUSB_GADGET
aaa4a9e3 SP	320	#define CONFIG_USB_FUNCTION_FASTBOOT
aaa4a9e3 SP	321	#define CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb PK	322	#endif
	323
	324	#ifdef CONFIG_USB_FUNCTION_FASTBOOT
	325	#define CONFIG_CMD_FASTBOOT
	326	#define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
	327	#define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
bac83fb0	328	#define CONFIG_ANDROID_BOOT_IMAGE
b21144eb PK	329
b21144eb PK	330	#define CONFIG_FASTBOOT_FLASH
44c79879 MR	331
44c79879 MR	332	#ifdef CONFIG_MMC
b21144eb	333	#define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
b21144eb	334	#endif
44c79879	335	#endif
b21144eb PK	336
b21144eb PK	337	#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
b21144eb PK	338	#endif
b21144eb PK	339
86b49093	340	#ifdef CONFIG_USB_KEYBOARD
86b49093	341	#define CONFIG_PREBOOT
eab9433a	342	#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
86b49093 HG	343	#endif
86b49093 HG	344
b41d7d05 JL	345	#define CONFIG_MISC_INIT_R
b41d7d05 JL	346
cba69eee IC	347	#ifndef CONFIG_SPL_BUILD
cba69eee IC	348	#include <config_distro_defaults.h>
2ec3a612	349
671f9ad8 AP	350	#ifdef CONFIG_ARM64
	351	/*
	352	* Boards seem to come with at least 512MB of DRAM.
	353	* The kernel should go at 512K, which is the default text offset (that will
	354	* be adjusted at runtime if needed).
	355	* There is no compression for arm64 kernels (yet), so leave some space
	356	* for really big kernels, say 256MB for now.
	357	* Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
	358	* Align the initrd to a 2MB page.
	359	*/
c199489f	360	#define BOOTM_SIZE __stringify(0xa000000)
671f9ad8 AP	361	#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
	362	#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
	363	#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
	364	#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
	365	#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
	366
	367	#else
8c95c556	368	/*
5c965ed9	369	* 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
8c95c556 HG	370	* 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
	371	* 1M script, 1M pxe and the ramdisk at the end.
	372	*/
c199489f IZ	373	#ifndef CONFIG_MACH_SUN8I_V3S
c199489f IZ	374	#define BOOTM_SIZE __stringify(0xa000000)
2a909c5f SS	375	#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
	376	#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
	377	#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
	378	#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
	379	#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
c199489f IZ	380	#else
	381	/*
	382	* 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
	383	* 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
	384	* 1M script, 1M pxe and the ramdisk at the end.
	385	*/
	386	#define BOOTM_SIZE __stringify(0x2e00000)
	387	#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
	388	#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
	389	#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
	390	#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
	391	#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
	392	#endif
671f9ad8	393	#endif
2a909c5f	394
846e3254	395	#define MEM_LAYOUT_ENV_SETTINGS \
c199489f	396	"bootm_size=" BOOTM_SIZE "\0" \
2a909c5f SS	397	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
	398	"fdt_addr_r=" FDT_ADDR_R "\0" \
	399	"scriptaddr=" SCRIPT_ADDR_R "\0" \
	400	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
	401	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
	402
	403	#define DFU_ALT_INFO_RAM \
	404	"dfu_alt_info_ram=" \
	405	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
	406	"fdt ram " FDT_ADDR_R " 0x100000;" \
	407	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
846e3254	408
41f8e9f5 CYT	409	#ifdef CONFIG_MMC
41f8e9f5 CYT	410	#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
5a37a400 KM	411	#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
	412	#define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
	413	#else
	414	#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
	415	#endif
41f8e9f5 CYT	416	#else
41f8e9f5 CYT	417	#define BOOT_TARGET_DEVICES_MMC(func)
5a37a400	418	#define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
41f8e9f5 CYT	419	#endif
41f8e9f5 CYT	420
2ec3a612 HG	421	#ifdef CONFIG_AHCI
	422	#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
	423	#else
	424	#define BOOT_TARGET_DEVICES_SCSI(func)
	425	#endif
	426
2582ca0d	427	#ifdef CONFIG_USB_STORAGE
859b3f14 CYT	428	#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
	429	#else
	430	#define BOOT_TARGET_DEVICES_USB(func)
	431	#endif
	432
f3b589c0 BN	433	/* FEL boot support, auto-execute boot.scr if a script address was provided */
	434	#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
	435	"bootcmd_fel=" \
	436	"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
	437	"echo '(FEL boot)'; " \
	438	"source ${fel_scriptaddr}; " \
	439	"fi\0"
	440	#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
	441	"fel "
	442
2ec3a612	443	#define BOOT_TARGET_DEVICES(func) \
f3b589c0	444	func(FEL, fel, na) \
41f8e9f5	445	BOOT_TARGET_DEVICES_MMC(func) \
5a37a400	446	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
2ec3a612	447	BOOT_TARGET_DEVICES_SCSI(func) \
859b3f14	448	BOOT_TARGET_DEVICES_USB(func) \
2ec3a612 HG	449	func(PXE, pxe, na) \
	450	func(DHCP, dhcp, na)
	451
3b824025 HG	452	#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
	453	#define BOOTCMD_SUNXI_COMPAT \
	454	"bootcmd_sunxi_compat=" \
	455	"setenv root /dev/mmcblk0p3 rootwait; " \
	456	"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
	457	"echo Loaded environment from uEnv.txt; " \
	458	"env import -t 0x44000000 ${filesize}; " \
	459	"fi; " \
	460	"setenv bootargs console=${console} root=${root} ${extraargs}; " \
	461	"ext2load mmc 0 0x43000000 script.bin && " \
	462	"ext2load mmc 0 0x48000000 uImage && " \
	463	"bootm 0x48000000\0"
	464	#else
	465	#define BOOTCMD_SUNXI_COMPAT
	466	#endif
	467
2ec3a612 HG	468	#include <config_distro_bootcmd.h>
2ec3a612 HG	469
86b49093 HG	470	#ifdef CONFIG_USB_KEYBOARD
	471	#define CONSOLE_STDIN_SETTINGS \
	472	"preboot=usb start\0" \
	473	"stdin=serial,usbkbd\0"
	474	#else
7f2c521f LV	475	#define CONSOLE_STDIN_SETTINGS \
7f2c521f LV	476	"stdin=serial\0"
86b49093	477	#endif
7f2c521f LV	478
	479	#ifdef CONFIG_VIDEO
	480	#define CONSOLE_STDOUT_SETTINGS \
	481	"stdout=serial,vga\0" \
	482	"stderr=serial,vga\0"
56009451 JS	483	#elif CONFIG_DM_VIDEO
	484	#define CONFIG_SYS_WHITE_ON_BLACK
	485	#define CONSOLE_STDOUT_SETTINGS \
	486	"stdout=serial,vidconsole\0" \
	487	"stderr=serial,vidconsole\0"
7f2c521f LV	488	#else
	489	#define CONSOLE_STDOUT_SETTINGS \
	490	"stdout=serial\0" \
	491	"stderr=serial\0"
	492	#endif
	493
c8564b24 MR	494	#ifdef CONFIG_MTDIDS_DEFAULT
	495	#define SUNXI_MTDIDS_DEFAULT \
	496	"mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
	497	#else
	498	#define SUNXI_MTDIDS_DEFAULT
	499	#endif
	500
	501	#ifdef CONFIG_MTDPARTS_DEFAULT
	502	#define SUNXI_MTDPARTS_DEFAULT \
	503	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
	504	#else
	505	#define SUNXI_MTDPARTS_DEFAULT
	506	#endif
	507
7f2c521f LV	508	#define CONSOLE_ENV_SETTINGS \
	509	CONSOLE_STDIN_SETTINGS \
	510	CONSOLE_STDOUT_SETTINGS
	511
2eff3b71 AF	512	#ifdef CONFIG_ARM64
	513	#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
	514	#else
	515	#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
	516	#endif
	517
2ec3a612	518	#define CONFIG_EXTRA_ENV_SETTINGS \
7f2c521f	519	CONSOLE_ENV_SETTINGS \
846e3254	520	MEM_LAYOUT_ENV_SETTINGS \
2a909c5f	521	DFU_ALT_INFO_RAM \
2eff3b71	522	"fdtfile=" FDTFILE "\0" \
846e3254	523	"console=ttyS0,115200\0" \
c8564b24 MR	524	SUNXI_MTDIDS_DEFAULT \
c8564b24 MR	525	SUNXI_MTDPARTS_DEFAULT \
3b824025	526	BOOTCMD_SUNXI_COMPAT \
2ec3a612 HG	527	BOOTENV
	528
	529	#else /* ifndef CONFIG_SPL_BUILD */
	530	#define CONFIG_EXTRA_ENV_SETTINGS
cba69eee IC	531	#endif
	532
	533	#endif /* _SUNXI_COMMON_CONFIG_H */