]>
Commit | Line | Data |
---|---|---|
3ef5ebeb LV |
1 | /* |
2 | * (C) Copyright 2013 | |
3 | * Texas Instruments Incorporated. | |
4 | * Sricharan R <r.sricharan@ti.com> | |
5 | * | |
6 | * Derived from OMAP4 done by: | |
7 | * Aneesh V <aneesh@ti.com> | |
8 | * | |
9 | * TI OMAP5 AND DRA7XX common configuration settings | |
10 | * | |
3765b3e7 | 11 | * SPDX-License-Identifier: GPL-2.0+ |
a8017574 TR |
12 | * |
13 | * For more details, please see the technical documents listed at | |
14 | * http://www.ti.com/product/omap5432 | |
3ef5ebeb LV |
15 | */ |
16 | ||
3d657a05 EBS |
17 | #ifndef __CONFIG_TI_OMAP5_COMMON_H |
18 | #define __CONFIG_TI_OMAP5_COMMON_H | |
3ef5ebeb | 19 | |
a8017574 | 20 | #define CONFIG_OMAP54XX |
3ef5ebeb LV |
21 | #define CONFIG_DISPLAY_CPUINFO |
22 | #define CONFIG_DISPLAY_BOARDINFO | |
3ef5ebeb | 23 | #define CONFIG_MISC_INIT_R |
a8017574 | 24 | #define CONFIG_ARCH_CPU_INIT |
3ef5ebeb | 25 | |
a8017574 | 26 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
3ef5ebeb | 27 | |
a8017574 TR |
28 | /* Use General purpose timer 1 */ |
29 | #define CONFIG_SYS_TIMERBASE GPT2_BASE | |
30 | ||
078aa4f1 TR |
31 | /* |
32 | * For the DDR timing information we can either dynamically determine | |
33 | * the timings to use or use pre-determined timings (based on using the | |
34 | * dynamic method. Default to the static timing infomation. | |
35 | */ | |
a8017574 | 36 | #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS |
a8017574 TR |
37 | #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS |
38 | #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION | |
39 | #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS | |
40 | #endif | |
41 | ||
42 | #ifndef CONFIG_SPL_BUILD | |
43 | #define CONFIG_PALMAS_POWER | |
44 | #endif | |
45 | ||
46 | #include <asm/arch/cpu.h> | |
47 | #include <asm/arch/omap.h> | |
3ef5ebeb | 48 | |
a8017574 | 49 | #include <configs/ti_armv7_common.h> |
3ef5ebeb LV |
50 | |
51 | /* | |
a8017574 | 52 | * Hardware drivers |
3ef5ebeb | 53 | */ |
3ef5ebeb LV |
54 | #define CONFIG_SYS_NS16550 |
55 | #define CONFIG_SYS_NS16550_SERIAL | |
56 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) | |
a8017574 | 57 | #define CONFIG_SYS_NS16550_CLK 48000000 |
3ef5ebeb | 58 | |
a8017574 | 59 | /* Per-SoC commands */ |
3ef5ebeb LV |
60 | #undef CONFIG_CMD_NET |
61 | #undef CONFIG_CMD_NFS | |
3ef5ebeb LV |
62 | |
63 | /* | |
64 | * Environment setup | |
65 | */ | |
9552ee3e TR |
66 | #ifndef PARTS_DEFAULT |
67 | #define PARTS_DEFAULT | |
68 | #endif | |
69 | ||
3ef5ebeb | 70 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
fb3ad9bd | 71 | DEFAULT_LINUX_BOOT_ENV \ |
f6723794 | 72 | "console=" CONSOLEDEV ",115200n8\0" \ |
a7143215 | 73 | "fdtfile=undefined\0" \ |
143070df S |
74 | "bootpart=0:2\0" \ |
75 | "bootdir=/boot\0" \ | |
aaed0a23 | 76 | "bootfile=zImage\0" \ |
3ef5ebeb LV |
77 | "usbtty=cdc_acm\0" \ |
78 | "vram=16M\0" \ | |
9552ee3e | 79 | "partitions=" PARTS_DEFAULT "\0" \ |
85b7ac45 | 80 | "optargs=\0" \ |
3ef5ebeb | 81 | "mmcdev=0\0" \ |
7406d321 | 82 | "mmcroot=/dev/mmcblk1p2 rw\0" \ |
46afd3ef | 83 | "mmcrootfstype=ext4 rootwait\0" \ |
3ef5ebeb | 84 | "mmcargs=setenv bootargs console=${console} " \ |
85b7ac45 | 85 | "${optargs} " \ |
3ef5ebeb LV |
86 | "vram=${vram} " \ |
87 | "root=${mmcroot} " \ | |
88 | "rootfstype=${mmcrootfstype}\0" \ | |
89 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ | |
90 | "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ | |
91 | "source ${loadaddr}\0" \ | |
78fd0041 NM |
92 | "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ |
93 | "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ | |
94 | "env import -t ${loadaddr} ${filesize}\0" \ | |
143070df | 95 | "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ |
7406d321 TR |
96 | "mmcboot=mmc dev ${mmcdev}; " \ |
97 | "if mmc rescan; then " \ | |
98 | "echo SD/MMC found on device ${mmcdev};" \ | |
99 | "if run loadbootenv; then " \ | |
100 | "echo Loaded environment from ${bootenv};" \ | |
101 | "run importbootenv;" \ | |
102 | "fi;" \ | |
103 | "if test -n $uenvcmd; then " \ | |
104 | "echo Running uenvcmd ...;" \ | |
105 | "run uenvcmd;" \ | |
106 | "fi;" \ | |
107 | "if run loadimage; then " \ | |
108 | "run loadfdt; " \ | |
109 | "echo Booting from mmc${mmcdev} ...; " \ | |
110 | "run mmcargs; " \ | |
111 | "bootz ${loadaddr} - ${fdtaddr}; " \ | |
112 | "fi;" \ | |
113 | "fi;\0" \ | |
143070df S |
114 | "findfdt="\ |
115 | "if test $board_name = omap5_uevm; then " \ | |
a7143215 | 116 | "setenv fdtfile omap5-uevm.dtb; fi; " \ |
45dbbf29 DM |
117 | "if test $board_name = dra7xx; then " \ |
118 | "setenv fdtfile dra7-evm.dtb; fi;" \ | |
a7143215 DM |
119 | "if test $fdtfile = undefined; then " \ |
120 | "echo WARNING: Could not determine device tree to use; fi; \0" \ | |
143070df | 121 | "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile};\0" \ |
3ef5ebeb LV |
122 | |
123 | #define CONFIG_BOOTCOMMAND \ | |
143070df | 124 | "run findfdt; " \ |
7406d321 TR |
125 | "run mmcboot;" \ |
126 | "setenv mmcdev 1; " \ | |
127 | "setenv bootpart 1:2; " \ | |
128 | "setenv mmcroot /dev/mmcblk0p2 rw; " \ | |
129 | "run mmcboot;" \ | |
3ef5ebeb | 130 | |
a5d439c2 | 131 | |
078aa4f1 TR |
132 | /* |
133 | * SPL related defines. The Public RAM memory map the ROM defines the | |
134 | * area between 0x40300000 and 0x4031E000 as a download area for OMAP5 | |
135 | * (dra7xx is larger, but we do not need to be larger at this time). We | |
136 | * set CONFIG_SPL_DISPLAY_PRINT to have omap_rev_string() called and | |
137 | * print some information. | |
138 | */ | |
c3799fce TR |
139 | #define CONFIG_SPL_TEXT_BASE 0x40300000 |
140 | #define CONFIG_SPL_MAX_SIZE (0x4031E000 - CONFIG_SPL_TEXT_BASE) | |
3ef5ebeb | 141 | #define CONFIG_SPL_DISPLAY_PRINT |
3ef5ebeb LV |
142 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" |
143 | ||
70e71b61 EBS |
144 | #ifdef CONFIG_NAND |
145 | #define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */ | |
146 | #endif | |
147 | ||
3d657a05 | 148 | #endif /* __CONFIG_TI_OMAP5_COMMON_H */ |