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d55c5c3f RM |
1 | /* |
2 | * (C) Copyright 2010 | |
3 | * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de | |
4 | * | |
5 | * Configuation settings for the TOP9000 CPU module with AT91SAM9XE. | |
6 | * | |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
d55c5c3f RM |
8 | */ |
9 | /* | |
10 | * top9000 with at91sam9xe256 or at91sam9xe512 | |
11 | * | |
12 | * Initial Bootloader is in embedded flash. | |
13 | * Vital Product Data, U-Boot Environment are in I2C-EEPROM. | |
14 | * U-Boot is in embedded flash, a backup U-Boot can be in NAND flash. | |
15 | * kernel and file system are either in NAND flash or on a micro SD card. | |
16 | * NAND flash is optional. | |
17 | * I2C EEPROM is never optional. | |
18 | * SPI FRAM is optional. | |
19 | * SPI ENC28J60 is optional. | |
20 | * 16 or 32 bit wide SDRAM. | |
21 | */ | |
22 | #ifndef __CONFIG_H | |
23 | #define __CONFIG_H | |
24 | ||
9b372b2c RM |
25 | /* SoC must be defined first, before hardware.h is included */ |
26 | #define CONFIG_AT91SAM9XE | |
27 | #include <asm/hardware.h> | |
28 | ||
d55c5c3f RM |
29 | /* |
30 | * Warning: changing CONFIG_SYS_TEXT_BASE requires | |
f805548b | 31 | * adapting the initial boot program. |
d55c5c3f | 32 | */ |
f805548b | 33 | #define CONFIG_SYS_TEXT_BASE 0x20000000 /* start of SDRAM */ |
d55c5c3f RM |
34 | |
35 | /* Command line configuration */ | |
36 | #include <config_cmd_default.h> | |
37 | #undef CONFIG_CMD_FPGA | |
38 | #undef CONFIG_CMD_SETGETDCR | |
39 | #undef CONFIG_CMD_XIMG | |
40 | #define CONFIG_CMD_ASKENV | |
41 | #define CONFIG_SYS_CBSIZE 256 | |
42 | #define CONFIG_SYS_MAXARGS 16 | |
43 | #define CONFIG_SYS_PBSIZE \ | |
44 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
45 | #define CONFIG_SYS_PROMPT "TOP9000> " | |
46 | #define CONFIG_SYS_LONGHELP | |
47 | #define CONFIG_CMDLINE_EDITING | |
48 | #define CONFIG_CMD_BDI | |
49 | #define CONFIG_CMD_CACHE | |
50 | ||
51 | /* ARM asynchronous clock */ | |
9b372b2c RM |
52 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
53 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ | |
d55c5c3f | 54 | |
d55c5c3f | 55 | /* Misc CPU related */ |
d55c5c3f | 56 | #define CONFIG_ARCH_CPU_INIT |
d55c5c3f RM |
57 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
58 | #define CONFIG_SETUP_MEMORY_TAGS | |
59 | #define CONFIG_INITRD_TAG | |
60 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
61 | #define CONFIG_BOARD_EARLY_INIT_F | |
62 | #define CONFIG_DISPLAY_CPUINFO | |
63 | #define CONFIG_AT91RESET_EXTRST /* assert external reset */ | |
64 | ||
65 | /* general purpose I/O */ | |
9b372b2c | 66 | #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ |
d55c5c3f RM |
67 | #define CONFIG_AT91_GPIO |
68 | #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ | |
69 | ||
70 | /* serial console */ | |
71 | #define CONFIG_ATMEL_USART | |
9b372b2c RM |
72 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
73 | #define CONFIG_USART_ID ATMEL_ID_SYS | |
d55c5c3f | 74 | #define CONFIG_BAUDRATE 115200 |
d55c5c3f RM |
75 | |
76 | /* SD/MMC card */ | |
77 | #define CONFIG_MMC | |
78 | #define CONFIG_GENERIC_MMC | |
79 | #define CONFIG_GENERIC_ATMEL_MCI | |
80 | #define CONFIG_SYS_MMC_CD_PIN AT91_PIN_PC9 | |
81 | #define CONFIG_CMD_MMC | |
82 | ||
83 | /* Ethernet */ | |
84 | #define CONFIG_MACB | |
85 | #define CONFIG_SYS_PHY_ID 1 | |
86 | #define CONFIG_RMII | |
d55c5c3f RM |
87 | #define CONFIG_NET_RETRY_COUNT 20 |
88 | ||
89 | /* real time clock */ | |
90 | #define CONFIG_RTC_AT91SAM9_RTT | |
91 | #define CONFIG_CMD_DATE | |
92 | ||
93 | #if defined(CONFIG_AT91SAM9XE) | |
94 | /* | |
95 | * NOR flash - use embedded flash of SAM9XE256/512 | |
96 | * U-Boot will not fit into 128K ! | |
97 | * 2010.09 will not fit into 256K with all options enabled ! | |
98 | * | |
99 | * Layout: | |
100 | * 16kB 1st Bootloader | |
101 | * Rest U-Boot | |
102 | * the first sector (16kB) of EFLASH cannot be unprotected | |
103 | * with u-boot commands | |
104 | */ | |
105 | # define CONFIG_AT91_EFLASH | |
9b372b2c | 106 | # define CONFIG_SYS_FLASH_BASE ATMEL_BASE_FLASH |
d55c5c3f RM |
107 | # define CONFIG_SYS_MAX_FLASH_SECT 32 |
108 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 | |
109 | # define CONFIG_SYS_FLASH_PROTECTION | |
110 | # define CONFIG_EFLASH_PROTSECTORS 1 /* protect first sector */ | |
111 | #endif | |
112 | ||
113 | /* SPI */ | |
114 | #define CONFIG_ATMEL_SPI | |
115 | #define CONFIG_CMD_SPI | |
116 | ||
117 | /* RAMTRON FRAM */ | |
118 | #define CONFIG_CMD_SF | |
119 | #define CONFIG_ATMEL_SPI0 /* SPI used for FRAM is SPI0 */ | |
120 | #define FRAM_SPI_BUS 0 | |
121 | #define FRAM_CS_NUM 0 | |
d55c5c3f RM |
122 | #define CONFIG_SPI_FRAM_RAMTRON |
123 | #define CONFIG_SF_DEFAULT_SPEED 1000000 /* be conservative here... */ | |
124 | #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 | |
125 | #define CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC "FM25H20" | |
126 | ||
127 | /* Microchip ENC28J60 (second LAN) */ | |
128 | #if defined(CONFIG_EVAL9000) | |
129 | # define CONFIG_ENC28J60 | |
130 | # define CONFIG_ATMEL_SPI1 /* SPI used for ENC28J60 is SPI1 */ | |
131 | # define ENC_SPI_BUS 1 | |
132 | # define ENC_CS_NUM 0 | |
133 | # define ENC_SPI_CLOCK 1000000 | |
134 | #endif /* CONFIG_EVAL9000 */ | |
135 | ||
136 | /* | |
137 | * SDRAM: 1 bank, min 32, max 128 MB | |
138 | * Initialized before u-boot gets started. | |
139 | */ | |
140 | #define CONFIG_NR_DRAM_BANKS 1 | |
9b372b2c | 141 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
d55c5c3f RM |
142 | #define CONFIG_SYS_SDRAM_SIZE 0x08000000 |
143 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE | |
9b372b2c | 144 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01e00000) |
d55c5c3f RM |
145 | #define CONFIG_SYS_LOAD_ADDR \ |
146 | (CONFIG_SYS_SDRAM_BASE + 0x01000000) | |
147 | /* | |
148 | * Initial stack pointer: 16k - GENERATED_GBL_DATA_SIZE in internal SRAM, | |
149 | * leaving the correct space for initial global data structure above | |
150 | * that address while providing maximum stack area below. | |
151 | */ | |
152 | #define CONFIG_SYS_INIT_SP_ADDR \ | |
9b372b2c | 153 | (ATMEL_BASE_SRAM + 0x4000 - GENERATED_GBL_DATA_SIZE) |
d55c5c3f RM |
154 | |
155 | /* | |
156 | * NAND flash: 256 MB (optional) | |
157 | * | |
158 | * Layout: | |
159 | * 640kB: u-boot (includes space for spare sectors, handled by | |
160 | * initial loader) | |
161 | * 2MB: kernel | |
162 | * rest: file system | |
163 | */ | |
164 | #define CONFIG_NAND_ATMEL | |
165 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 | |
9b372b2c | 166 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
d55c5c3f RM |
167 | #define CONFIG_SYS_NAND_DBW_8 |
168 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) | |
169 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) | |
170 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 | |
171 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 | |
172 | #define CONFIG_CMD_NAND | |
173 | ||
174 | /* USB */ | |
175 | #define CONFIG_USB_ATMEL | |
176 | #define CONFIG_USB_OHCI_NEW | |
177 | #define CONFIG_DOS_PARTITION | |
178 | #define CONFIG_SYS_USB_OHCI_CPU_INIT | |
9b372b2c | 179 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE |
d55c5c3f RM |
180 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "top9000" |
181 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 | |
182 | #define CONFIG_USB_STORAGE | |
183 | #define CONFIG_CMD_USB | |
184 | ||
185 | /* I2C support must always be enabled */ | |
d55c5c3f | 186 | #define CONFIG_CMD_I2C |
ea818dbb HS |
187 | #define CONFIG_SYS_I2C |
188 | #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ | |
189 | #define CONFIG_SYS_I2C_SOFT_SPEED 400000 | |
190 | #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F | |
191 | ||
d55c5c3f RM |
192 | #define I2C0_PORT AT91_PIO_PORTA |
193 | #define SDA0_PIN 23 | |
194 | #define SCL0_PIN 24 | |
195 | #define I2C1_PORT AT91_PIO_PORTB | |
196 | #define SDA1_PIN 12 | |
197 | #define SCL1_PIN 13 | |
198 | #define I2C_SOFT_DECLARATIONS void iic_init(void);\ | |
199 | int iic_read(void);\ | |
200 | void iic_sda(int);\ | |
201 | void iic_scl(int); | |
202 | #define I2C_ACTIVE | |
203 | #define I2C_TRISTATE | |
204 | #define I2C_INIT iic_init() | |
205 | #define I2C_READ iic_read() | |
206 | #define I2C_SDA(bit) iic_sda(bit) | |
207 | #define I2C_SCL(bit) iic_scl(bit) | |
208 | #define I2C_DELAY udelay(3) | |
209 | /* EEPROM configuration */ | |
210 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 | |
211 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 | |
212 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
213 | #define CONFIG_SYS_EEPROM_SIZE 0x2000 | |
214 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 | |
215 | /* later: #define CONFIG_I2C_ENV_EEPROM_BUS 0 */ | |
216 | /* ENV is always in I2C-EEPROM */ | |
217 | #define CONFIG_ENV_IS_IN_EEPROM | |
218 | #define CONFIG_ENV_OFFSET 0x1000 | |
219 | #define CONFIG_ENV_SIZE 0x0f00 | |
220 | /* VPD settings */ | |
221 | #define CONFIG_SYS_I2C_FACT_ADDR 0x57 | |
222 | #define CONFIG_SYS_FACT_OFFSET 0x1F00 | |
223 | #define CONFIG_SYS_FACT_SIZE 0x0100 | |
224 | /* later: #define CONFIG_MISC_INIT_R */ | |
225 | /* define the next only if you want to allow users to enter VPD data */ | |
226 | #define CONFIG_SYS_FACT_ENTRY | |
227 | #ifndef __ASSEMBLY__ | |
228 | extern void read_factory_r(void); | |
229 | #endif | |
230 | ||
231 | /* | |
232 | * Only interrupt autoboot if <space> is pressed. Otherwise, garbage | |
233 | * data on the serial line may interrupt the boot sequence. | |
234 | */ | |
235 | #define CONFIG_BOOTDELAY 1 | |
236 | #define CONFIG_AUTOBOOT | |
237 | #define CONFIG_AUTOBOOT_KEYED | |
238 | #define CONFIG_AUTOBOOT_PROMPT \ | |
239 | "Press SPACE to abort autoboot in %d seconds\n", bootdelay | |
240 | #define CONFIG_AUTOBOOT_DELAY_STR "d" | |
241 | #define CONFIG_AUTOBOOT_STOP_STR " " | |
242 | ||
243 | /* | |
244 | * add filesystem commands if we have at least 1 storage | |
245 | * media with filesystem | |
246 | */ | |
247 | #if defined(CONFIG_NAND_ATMEL) \ | |
248 | || defined(CONFIG_USB_ATMEL) \ | |
249 | || defined(CONFIG_MMC) | |
250 | # define CONFIG_DOS_PARTITION | |
251 | # define CONFIG_CMD_FAT | |
252 | # define CONFIG_CMD_EXT2 | |
253 | /* later: #define CONFIG_CMD_JFFS2 */ | |
254 | #endif | |
255 | ||
256 | /* add NET commands if we have at least 1 LAN */ | |
257 | #if defined(CONFIG_MACB) || defined(CONFIG_ENC28J60) | |
258 | # define CONFIG_CMD_PING | |
259 | # define CONFIG_CMD_DHCP | |
260 | # define CONFIG_CMD_MII | |
261 | /* is this really needed ? */ | |
262 | # define CONFIG_RESET_PHY_R | |
263 | /* BOOTP options */ | |
264 | # define CONFIG_BOOTP_BOOTFILESIZE | |
265 | # define CONFIG_BOOTP_BOOTPATH | |
266 | # define CONFIG_BOOTP_GATEWAY | |
267 | # define CONFIG_BOOTP_HOSTNAME | |
268 | #endif | |
269 | ||
270 | /* linux in NAND flash */ | |
271 | #define CONFIG_BOOTCOUNT_LIMIT 1 | |
272 | #define CONFIG_BOOTCOMMAND \ | |
273 | "nand read 0x21000000 0xA0000 0x200000; bootm" | |
274 | #define CONFIG_BOOTARGS \ | |
275 | "console=ttyS0,115200 " \ | |
276 | "root=/dev/mtdblock2 " \ | |
277 | "mtdparts=atmel_nand:" \ | |
278 | "640k(uboot)ro," \ | |
279 | "2M(linux)," \ | |
280 | "16M(root)," \ | |
281 | "-(rest) " \ | |
282 | "rw "\ | |
283 | "rootfstype=jffs2" | |
284 | ||
285 | /* Size of malloc() pool */ | |
286 | #define CONFIG_SYS_MALLOC_LEN \ | |
287 | ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) | |
d55c5c3f RM |
288 | |
289 | #endif |