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c609719b | 1 | /* |
414eec35 | 2 | * (C) Copyright 2002-2005 |
c609719b WD |
3 | * Gary Jennejohn <gj@denx.de> |
4 | * | |
5 | * Configuation settings for the TRAB board. | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #ifndef __CONFIG_H | |
27 | #define __CONFIG_H | |
28 | ||
b2001f27 WD |
29 | /* |
30 | * Default configuration is with 8 MB Flash, 32 MB RAM | |
31 | */ | |
32 | #if (!defined(CONFIG_FLASH_8MB)) && (!defined(CONFIG_FLASH_16MB)) | |
33 | # define CONFIG_FLASH_8MB /* 8 MB Flash */ | |
34 | #endif | |
35 | #if (!defined(CONFIG_RAM_16MB)) && (!defined(CONFIG_RAM_32MB)) | |
36 | # define CONFIG_RAM_32MB /* 32 MB SDRAM */ | |
b0639ca3 WD |
37 | #endif |
38 | ||
c609719b WD |
39 | /* |
40 | * High Level Configuration Options | |
41 | * (easy to change) | |
42 | */ | |
43 | #define CONFIG_ARM920T 1 /* This is an arm920t CPU */ | |
6dff5529 WD |
44 | #define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */ |
45 | #define CONFIG_TRAB 1 /* on a TRAB Board */ | |
46 | #undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */ | |
149dded2 | 47 | #define LITTLEENDIAN 1 /* used by usb_ohci.c */ |
c609719b | 48 | |
f54ebdfa WD |
49 | /* automatic software updates (see board/trab/auto_update.c) */ |
50 | #define CONFIG_AUTO_UPDATE 1 | |
51 | ||
c609719b | 52 | /* input clock of PLL */ |
7f6c2cbc | 53 | #define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */ |
c609719b WD |
54 | |
55 | #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ | |
56 | ||
57 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ | |
58 | #define CONFIG_SETUP_MEMORY_TAGS 1 | |
59 | #define CONFIG_INITRD_TAG 1 | |
60 | ||
6d0f6bcf | 61 | #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enble null device */ |
f72da340 | 62 | #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */ |
6dff5529 | 63 | |
a0f2fe52 WD |
64 | #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ |
65 | ||
6dff5529 WD |
66 | /*********************************************************** |
67 | * I2C stuff: | |
68 | * the TRAB is equipped with an ATMEL 24C04 EEPROM at | |
69 | * address 0x54 with 8bit addressing | |
70 | ***********************************************************/ | |
71 | #define CONFIG_HARD_I2C /* I2C with hardware support */ | |
6d0f6bcf JCPV |
72 | #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */ |
73 | #define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave addr */ | |
6dff5529 | 74 | |
6d0f6bcf JCPV |
75 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 /* EEPROM address */ |
76 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */ | |
6dff5529 | 77 | |
6d0f6bcf JCPV |
78 | #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x01 |
79 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */ | |
80 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 | |
6dff5529 | 81 | |
149dded2 | 82 | /* USB stuff */ |
7b59b3c7 | 83 | #define CONFIG_USB_OHCI_NEW 1 |
149dded2 WD |
84 | #define CONFIG_USB_STORAGE 1 |
85 | #define CONFIG_DOS_PARTITION 1 | |
86 | ||
6d0f6bcf JCPV |
87 | #undef CONFIG_SYS_USB_OHCI_BOARD_INIT |
88 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 | |
19d763c3 | 89 | |
6d0f6bcf JCPV |
90 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x14200000 |
91 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "s3c2400" | |
92 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 | |
ddf83a2f | 93 | |
c609719b WD |
94 | /* |
95 | * Size of malloc() pool | |
96 | */ | |
6d0f6bcf JCPV |
97 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) |
98 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ | |
c609719b WD |
99 | |
100 | /* | |
101 | * Hardware drivers | |
102 | */ | |
103 | #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */ | |
104 | #define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */ | |
105 | #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */ | |
106 | ||
6dff5529 WD |
107 | #define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */ |
108 | ||
c609719b WD |
109 | #define CONFIG_VFD 1 /* VFD linear frame buffer driver */ |
110 | #define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */ | |
111 | ||
112 | /* | |
113 | * select serial console configuration | |
114 | */ | |
6dff5529 | 115 | #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */ |
c609719b WD |
116 | |
117 | #define CONFIG_HWFLOW /* include RTS/CTS flow control support */ | |
118 | ||
119 | #define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */ | |
120 | ||
121 | #define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */ | |
122 | ||
123 | /* | |
124 | * The following enables modem debugging stuff. The dbg() and | |
125 | * 'char screen[1024]' are used for debug printfs. Unfortunately, | |
126 | * it is usable only from BDI | |
127 | */ | |
128 | #undef CONFIG_MODEM_SUPPORT_DEBUG | |
129 | ||
130 | /* allow to overwrite serial and ethaddr */ | |
131 | #define CONFIG_ENV_OVERWRITE | |
132 | ||
133 | #define CONFIG_BAUDRATE 115200 | |
134 | ||
135 | #define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */ | |
136 | ||
48b42616 WD |
137 | /* Use s3c2400's RTC */ |
138 | #define CONFIG_RTC_S3C24X0 1 | |
139 | ||
6c18eb98 | 140 | |
079a136c JL |
141 | /* |
142 | * BOOTP options | |
143 | */ | |
144 | #define CONFIG_BOOTP_BOOTFILESIZE | |
145 | #define CONFIG_BOOTP_BOOTPATH | |
146 | #define CONFIG_BOOTP_GATEWAY | |
147 | #define CONFIG_BOOTP_HOSTNAME | |
148 | ||
149 | ||
6c18eb98 JL |
150 | /* |
151 | * Command line configuration. | |
152 | */ | |
153 | #include <config_cmd_default.h> | |
154 | ||
155 | #define CONFIG_CMD_BSP | |
156 | #define CONFIG_CMD_DATE | |
157 | #define CONFIG_CMD_DHCP | |
158 | #define CONFIG_CMD_FAT | |
159 | #define CONFIG_CMD_NFS | |
160 | #define CONFIG_CMD_SNTP | |
161 | #define CONFIG_CMD_USB | |
162 | ||
c609719b | 163 | #ifdef CONFIG_HWFLOW |
6c18eb98 | 164 | #define CONFIG_CMD_HWFLOW |
c609719b WD |
165 | #endif |
166 | ||
167 | #ifdef CONFIG_VFD | |
6c18eb98 | 168 | #define CONFIG_CMD_VFD |
c609719b WD |
169 | #endif |
170 | ||
6dff5529 | 171 | #ifdef CONFIG_DRIVER_S3C24X0_I2C |
6c18eb98 JL |
172 | #define CONFIG_CMD_EEPROM |
173 | #define CONFIG_CMD_I2C | |
6dff5529 WD |
174 | #endif |
175 | ||
c609719b | 176 | #ifndef USE_920T_MMU |
6c18eb98 | 177 | #undef CONFIG_CMD_CACHE |
c609719b WD |
178 | #endif |
179 | ||
6c18eb98 | 180 | |
149dded2 | 181 | /* moved up */ |
6d0f6bcf | 182 | #define CONFIG_SYS_HUSH_PARSER 1 /* use "hush" command parser */ |
149dded2 | 183 | |
c609719b | 184 | #define CONFIG_BOOTDELAY 5 |
c8c3a8be | 185 | #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */ |
c609719b | 186 | #define CONFIG_PREBOOT "echo;echo *** booting ***;echo" |
6dff5529 WD |
187 | #define CONFIG_BOOTARGS "console=ttyS0" |
188 | #define CONFIG_NETMASK 255.255.0.0 | |
6069ff26 | 189 | #define CONFIG_IPADDR 192.168.3.68 |
43d9616c | 190 | #define CONFIG_HOSTNAME trab |
c609719b | 191 | #define CONFIG_SERVERIP 192.168.3.1 |
a0ff7f2e | 192 | #define CONFIG_BOOTCOMMAND "burn_in" |
47cd00fa | 193 | |
b0639ca3 | 194 | #ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */ |
6d0f6bcf | 195 | #ifdef CONFIG_SYS_HUSH_PARSER |
149dded2 WD |
196 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
197 | "nfs_args=setenv bootargs root=/dev/nfs rw " \ | |
198 | "nfsroot=$serverip:$rootpath\0" \ | |
199 | "rootpath=/opt/eldk/arm_920TDI\0" \ | |
200 | "ram_args=setenv bootargs root=/dev/ram rw\0" \ | |
201 | "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \ | |
202 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \ | |
203 | "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \ | |
f54ebdfa WD |
204 | "u-boot=/tftpboot/TRAB/u-boot.bin\0" \ |
205 | "load=tftp C100000 ${u-boot}\0" \ | |
206 | "update=protect off 0 5FFFF;era 0 5FFFF;" \ | |
207 | "cp.b C100000 0 $filesize\0" \ | |
149dded2 WD |
208 | "loadfile=/tftpboot/TRAB/uImage\0" \ |
209 | "loadaddr=c400000\0" \ | |
210 | "net_load=tftpboot $loadaddr $loadfile\0" \ | |
211 | "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \ | |
4654af27 | 212 | "kernel_addr=00060000\0" \ |
149dded2 WD |
213 | "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \ |
214 | "mdm_init1=ATZ\0" \ | |
215 | "mdm_init2=ATS0=1\0" \ | |
216 | "mdm_flow_control=rts/cts\0" | |
6d0f6bcf | 217 | #else /* !CONFIG_SYS_HUSH_PARSER */ |
c609719b WD |
218 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
219 | "nfs_args=setenv bootargs root=/dev/nfs rw " \ | |
fe126d8b | 220 | "nfsroot=${serverip}:${rootpath}\0" \ |
c609719b WD |
221 | "rootpath=/opt/eldk/arm_920TDI\0" \ |
222 | "ram_args=setenv bootargs root=/dev/ram rw\0" \ | |
fe126d8b WD |
223 | "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \ |
224 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \ | |
225 | "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \ | |
f54ebdfa | 226 | "u-boot=/tftpboot/TRAB/u-boot.bin\0" \ |
fe126d8b | 227 | "load=tftp C100000 ${u-boot}\0" \ |
f54ebdfa | 228 | "update=protect off 0 5FFFF;era 0 5FFFF;" \ |
fe126d8b | 229 | "cp.b C100000 0 ${filesize}\0" \ |
47cd00fa | 230 | "loadfile=/tftpboot/TRAB/uImage\0" \ |
c609719b | 231 | "loadaddr=c400000\0" \ |
fe126d8b | 232 | "net_load=tftpboot ${loadaddr} ${loadfile}\0" \ |
c609719b | 233 | "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \ |
f54ebdfa | 234 | "kernel_addr=000C0000\0" \ |
fe126d8b | 235 | "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \ |
c609719b WD |
236 | "mdm_init1=ATZ\0" \ |
237 | "mdm_init2=ATS0=1\0" \ | |
238 | "mdm_flow_control=rts/cts\0" | |
6d0f6bcf | 239 | #endif /* CONFIG_SYS_HUSH_PARSER */ |
53677ef1 | 240 | #else /* CONFIG_FLASH_8MB => 8 MB flash */ |
6d0f6bcf | 241 | #ifdef CONFIG_SYS_HUSH_PARSER |
149dded2 WD |
242 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
243 | "nfs_args=setenv bootargs root=/dev/nfs rw " \ | |
244 | "nfsroot=$serverip:$rootpath\0" \ | |
245 | "rootpath=/opt/eldk/arm_920TDI\0" \ | |
246 | "ram_args=setenv bootargs root=/dev/ram rw\0" \ | |
247 | "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \ | |
248 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \ | |
249 | "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \ | |
efa329cb | 250 | "u-boot=/tftpboot/TRAB/u-boot.bin\0" \ |
f54ebdfa WD |
251 | "load=tftp C100000 ${u-boot}\0" \ |
252 | "update=protect off 0 3FFFF;era 0 3FFFF;" \ | |
253 | "cp.b C100000 0 $filesize;" \ | |
254 | "setenv filesize;saveenv\0" \ | |
149dded2 | 255 | "loadfile=/tftpboot/TRAB/uImage\0" \ |
f54ebdfa | 256 | "loadaddr=C400000\0" \ |
149dded2 WD |
257 | "net_load=tftpboot $loadaddr $loadfile\0" \ |
258 | "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \ | |
f54ebdfa | 259 | "kernel_addr=000C0000\0" \ |
149dded2 WD |
260 | "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \ |
261 | "mdm_init1=ATZ\0" \ | |
262 | "mdm_init2=ATS0=1\0" \ | |
263 | "mdm_flow_control=rts/cts\0" | |
6d0f6bcf | 264 | #else /* !CONFIG_SYS_HUSH_PARSER */ |
47cd00fa WD |
265 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
266 | "nfs_args=setenv bootargs root=/dev/nfs rw " \ | |
fe126d8b | 267 | "nfsroot=${serverip}:${rootpath}\0" \ |
47cd00fa WD |
268 | "rootpath=/opt/eldk/arm_920TDI\0" \ |
269 | "ram_args=setenv bootargs root=/dev/ram rw\0" \ | |
fe126d8b WD |
270 | "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \ |
271 | "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \ | |
272 | "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \ | |
efa329cb | 273 | "u-boot=/tftpboot/TRAB/u-boot.bin\0" \ |
fe126d8b | 274 | "load=tftp C100000 ${u-boot}\0" \ |
f54ebdfa | 275 | "update=protect off 0 3FFFF;era 0 3FFFF;" \ |
fe126d8b | 276 | "cp.b C100000 0 ${filesize};" \ |
f54ebdfa | 277 | "setenv filesize;saveenv\0" \ |
47cd00fa | 278 | "loadfile=/tftpboot/TRAB/uImage\0" \ |
f54ebdfa | 279 | "loadaddr=C400000\0" \ |
fe126d8b | 280 | "net_load=tftpboot ${loadaddr} ${loadfile}\0" \ |
47cd00fa | 281 | "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \ |
f54ebdfa | 282 | "kernel_addr=000C0000\0" \ |
fe126d8b | 283 | "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \ |
47cd00fa WD |
284 | "mdm_init1=ATZ\0" \ |
285 | "mdm_init2=ATS0=1\0" \ | |
286 | "mdm_flow_control=rts/cts\0" | |
6d0f6bcf | 287 | #endif /* CONFIG_SYS_HUSH_PARSER */ |
b0639ca3 | 288 | #endif /* CONFIG_FLASH_8MB */ |
c609719b | 289 | |
151ab83a | 290 | #if 1 /* feel free to disable for development */ |
c609719b | 291 | #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */ |
f2302d44 SR |
292 | #define CONFIG_AUTOBOOT_PROMPT \ |
293 | "\nEnter password - autoboot in %d sec...\n", bootdelay | |
151ab83a | 294 | #define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */ |
c609719b WD |
295 | #endif |
296 | ||
6c18eb98 | 297 | #if defined(CONFIG_CMD_KGDB) |
c609719b WD |
298 | #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ |
299 | /* what's this ? it's not used anywhere */ | |
300 | #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ | |
301 | #endif | |
302 | ||
303 | /* | |
304 | * Miscellaneous configurable options | |
305 | */ | |
6d0f6bcf JCPV |
306 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
307 | #define CONFIG_SYS_PROMPT "TRAB # " /* Monitor Command Prompt */ | |
308 | #ifdef CONFIG_SYS_HUSH_PARSER | |
309 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " | |
6dff5529 WD |
310 | #endif |
311 | ||
6d0f6bcf JCPV |
312 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
313 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ | |
314 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
315 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ | |
c609719b | 316 | |
6d0f6bcf JCPV |
317 | #define CONFIG_SYS_MEMTEST_START 0x0C000000 /* memtest works on */ |
318 | #define CONFIG_SYS_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */ | |
c609719b | 319 | |
6d0f6bcf | 320 | #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */ |
c609719b | 321 | |
6d0f6bcf | 322 | #define CONFIG_SYS_LOAD_ADDR 0x0CF00000 /* default load address */ |
c609719b WD |
323 | |
324 | #ifdef CONFIG_TRAB_50MHZ | |
325 | /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */ | |
326 | /* it to wrap 100 times (total 1562500) to get 1 sec. */ | |
327 | /* this should _really_ be calculated !! */ | |
6d0f6bcf | 328 | #define CONFIG_SYS_HZ 1562500 |
c609719b WD |
329 | #else |
330 | /* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */ | |
331 | /* it to wrap 100 times (total 1039000) to get 1 sec. */ | |
332 | /* this should _really_ be calculated !! */ | |
6d0f6bcf | 333 | #define CONFIG_SYS_HZ 1039000 |
c609719b WD |
334 | #endif |
335 | ||
336 | /* valid baudrates */ | |
6d0f6bcf | 337 | #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } |
c609719b WD |
338 | |
339 | #define CONFIG_MISC_INIT_R /* have misc_init_r() function */ | |
340 | ||
4f7cb08e | 341 | /*----------------------------------------------------------------------- |
a0ff7f2e | 342 | * burn-in test stuff. |
42d1f039 | 343 | * |
a0ff7f2e WD |
344 | * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle |
345 | * Because the burn-in test itself causes also an delay of about 4 seconds, | |
346 | * this time must be subtracted from the desired overall burn-in cycle time. | |
4f7cb08e | 347 | */ |
a0ff7f2e | 348 | #define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */ |
4f7cb08e | 349 | |
c609719b WD |
350 | /*----------------------------------------------------------------------- |
351 | * Stack sizes | |
352 | * | |
353 | * The stack sizes are set up in start.S using the settings below | |
354 | */ | |
355 | #define CONFIG_STACKSIZE (128*1024) /* regular stack */ | |
356 | #ifdef CONFIG_USE_IRQ | |
357 | #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ | |
358 | #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ | |
359 | #endif | |
360 | ||
361 | /*----------------------------------------------------------------------- | |
362 | * Physical Memory Map | |
363 | */ | |
6dff5529 | 364 | #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ |
f54ebdfa | 365 | #define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */ |
b0639ca3 | 366 | #ifndef CONFIG_RAM_16MB |
f54ebdfa WD |
367 | #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ |
368 | #else | |
6dff5529 | 369 | #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */ |
f54ebdfa | 370 | #endif |
c609719b | 371 | |
6d0f6bcf | 372 | #define CONFIG_SYS_FLASH_BASE 0x00000000 /* Flash Bank #1 */ |
c609719b WD |
373 | |
374 | /* The following #defines are needed to get flash environment right */ | |
6d0f6bcf JCPV |
375 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
376 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) | |
c609719b | 377 | |
6ebc7921 WD |
378 | /* Dynamic MTD partition support */ |
379 | #define CONFIG_JFFS2_CMDLINE | |
380 | #define MTDIDS_DEFAULT "nor0=0" | |
381 | ||
382 | /* production flash layout */ | |
33322403 | 383 | #define MTDPARTS_DEFAULT "mtdparts=0:16k(Firmware1)ro," \ |
6ebc7921 WD |
384 | "16k(Env1)," \ |
385 | "16k(Env2)," \ | |
33322403 | 386 | "336k(Firmware2)ro," \ |
6ebc7921 WD |
387 | "896k(Kernel)," \ |
388 | "5376k(Root-FS)," \ | |
389 | "1408k(JFFS2)," \ | |
390 | "-(VFD)" | |
391 | ||
c609719b WD |
392 | /*----------------------------------------------------------------------- |
393 | * FLASH and environment organization | |
394 | */ | |
6d0f6bcf | 395 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
b0639ca3 | 396 | #ifndef CONFIG_FLASH_8MB |
6d0f6bcf | 397 | #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ |
f54ebdfa | 398 | #else |
6d0f6bcf | 399 | #define CONFIG_SYS_MAX_FLASH_SECT 71 /* max number of sectors on one chip */ |
43d9616c | 400 | #endif |
c609719b WD |
401 | |
402 | /* timeout values are in ticks */ | |
6d0f6bcf JCPV |
403 | #define CONFIG_SYS_FLASH_ERASE_TOUT (15*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
404 | #define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ | |
c609719b | 405 | |
5a1aceb0 | 406 | #define CONFIG_ENV_IS_IN_FLASH 1 |
c609719b WD |
407 | |
408 | /* Address and size of Primary Environment Sector */ | |
b0639ca3 | 409 | #ifndef CONFIG_FLASH_8MB |
6d0f6bcf | 410 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x60000) |
0e8d1586 JCPV |
411 | #define CONFIG_ENV_SIZE 0x4000 |
412 | #define CONFIG_ENV_SECT_SIZE 0x20000 | |
43d9616c | 413 | #else |
6d0f6bcf | 414 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x4000) |
0e8d1586 JCPV |
415 | #define CONFIG_ENV_SIZE 0x4000 |
416 | #define CONFIG_ENV_SECT_SIZE 0x4000 | |
43d9616c | 417 | #endif |
c609719b WD |
418 | |
419 | /* Address and size of Redundant Environment Sector */ | |
0e8d1586 JCPV |
420 | #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_ADDR+CONFIG_ENV_SECT_SIZE) |
421 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) | |
c609719b | 422 | |
6d0f6bcf | 423 | #define CONFIG_SYS_USE_PPCENV /* Environment embedded in sect .ppcenv */ |
67c31036 | 424 | |
1cb8e980 | 425 | /* Initial value of the on-board touch screen brightness */ |
6d0f6bcf | 426 | #define CONFIG_SYS_BRIGHTNESS 0x20 |
1cb8e980 | 427 | |
c609719b | 428 | #endif /* __CONFIG_H */ |