[people/ms/u-boot.git] / include / configs / usbarmory.h

/*
 * USB armory MkI board configuration settings
 * http://inversepath.com/usbarmory
 *
 * Copyright (C) 2015, Inverse Path
 * Andrej Rosano <andrej@inversepath.com>
 *
 * SPDX-License-Identifier:|____GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_SYS_FSL_CLK
#define CONFIG_MXC_GPIO

#include <asm/arch/imx-regs.h>

#include <config_distro_defaults.h>

/* U-Boot environment */
#define CONFIG_ENV_OFFSET	(6 * 64 * 1024)
#define CONFIG_ENV_SIZE		(8 * 1024)
#define CONFIG_SYS_MMC_ENV_DEV	0

/* U-Boot general configurations */
#define CONFIG_SYS_CBSIZE	512

/* UART */
#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE	UART1_BASE
#define CONFIG_CONS_INDEX	1

/* SD/MMC */
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	0
#define CONFIG_SYS_FSL_ESDHC_NUM	1

/* USB */
#define CONFIG_USB_EHCI_MX5
#define CONFIG_MXC_USB_PORT	1
#define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
#define CONFIG_MXC_USB_FLAGS	0

/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */

/* Fuse */
#define CONFIG_FSL_IIM

/* U-Boot memory offsets */
#define CONFIG_LOADADDR		0x72000000
#define CONFIG_SYS_TEXT_BASE	0x77800000
#define CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR

/* Linux boot */
#define CONFIG_HOSTNAME		usbarmory
#define CONFIG_BOOTCOMMAND						\
	"run distro_bootcmd; "						\
	"setenv bootargs console=${console} ${bootargs_default}; "	\
	"ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; "		\
	"ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; "		\
	"bootz ${kernel_addr_r} - ${fdt_addr_r}"

#define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)

#include <config_distro_bootcmd.h>

#define MEM_LAYOUT_ENV_SETTINGS			\
	"kernel_addr_r=0x70800000\0"		\
	"fdt_addr_r=0x71000000\0"		\
	"scriptaddr=0x70800000\0"		\
	"pxefile_addr_r=0x70800000\0"		\
	"ramdisk_addr_r=0x73000000\0"

#define CONFIG_EXTRA_ENV_SETTINGS				\
	MEM_LAYOUT_ENV_SETTINGS					\
	"bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0"	\
	"fdtfile=imx53-usbarmory.dtb\0"				\
	"console=ttymxc0,115200\0"				\
	BOOTENV

#ifndef CONFIG_CMDLINE
#define USBARMORY_FIT_PATH	"/boot/usbarmory.itb"
#define USBARMORY_FIT_ADDR	"0x70800000"
#endif

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			CSD0_BASE_ADDR
#define PHYS_SDRAM_SIZE			(gd->ram_size)

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

#define CONFIG_SYS_MEMTEST_START	0x70000000
#define CONFIG_SYS_MEMTEST_END		0x90000000

#define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)

#endif				/* __CONFIG_H */
Commit	Line	Data
3bf801a2 AR	1	/*
	2	* USB armory MkI board configuration settings
	3	* http://inversepath.com/usbarmory
	4	*
	5	* Copyright (C) 2015, Inverse Path
	6	* Andrej Rosano <andrej@inversepath.com>
	7	*
	8	* SPDX-License-Identifier:\|____GPL-2.0+
	9	*/
	10
	11	#ifndef __CONFIG_H
	12	#define __CONFIG_H
	13
18fb0e3c	14	#define CONFIG_SYS_FSL_CLK
3bf801a2 AR	15	#define CONFIG_MXC_GPIO
	16
	17	#include <asm/arch/imx-regs.h>
3bf801a2 AR	18
	19	#include <config_distro_defaults.h>
	20
3bf801a2	21	/* U-Boot environment */
3bf801a2 AR	22	#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
3bf801a2 AR	23	#define CONFIG_ENV_SIZE (8 * 1024)
3bf801a2 AR	24	#define CONFIG_SYS_MMC_ENV_DEV 0
	25
	26	/* U-Boot general configurations */
	27	#define CONFIG_SYS_CBSIZE 512
3bf801a2 AR	28
	29	/* UART */
	30	#define CONFIG_MXC_UART
	31	#define CONFIG_MXC_UART_BASE UART1_BASE
	32	#define CONFIG_CONS_INDEX 1
3bf801a2 AR	33
3bf801a2 AR	34	/* SD/MMC */
3bf801a2 AR	35	#define CONFIG_FSL_ESDHC
	36	#define CONFIG_SYS_FSL_ESDHC_ADDR 0
	37	#define CONFIG_SYS_FSL_ESDHC_NUM 1
3bf801a2 AR	38
3bf801a2 AR	39	/* USB */
3bf801a2	40	#define CONFIG_USB_EHCI_MX5
3bf801a2 AR	41	#define CONFIG_MXC_USB_PORT 1
	42	#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI \| PORT_PTS_PTW)
	43	#define CONFIG_MXC_USB_FLAGS 0
	44
	45	/* I2C */
3bf801a2 AR	46	#define CONFIG_SYS_I2C
3bf801a2 AR	47	#define CONFIG_SYS_I2C_MXC
03544c66 AA	48	#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
03544c66 AA	49	#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
3bf801a2 AR	50
3bf801a2 AR	51	/* Fuse */
3bf801a2 AR	52	#define CONFIG_FSL_IIM
3bf801a2 AR	53
9a45ec3e	54	/* U-Boot memory offsets */
3bf801a2 AR	55	#define CONFIG_LOADADDR 0x72000000
	56	#define CONFIG_SYS_TEXT_BASE 0x77800000
	57	#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
9a45ec3e AR	58
9a45ec3e AR	59	/* Linux boot */
3bf801a2 AR	60	#define CONFIG_HOSTNAME usbarmory
	61	#define CONFIG_BOOTCOMMAND \
	62	"run distro_bootcmd; " \
	63	"setenv bootargs console=${console} ${bootargs_default}; " \
9a45ec3e	64	"ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \
3bf801a2	65	"ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
9a45ec3e	66	"bootz ${kernel_addr_r} - ${fdt_addr_r}"
3bf801a2 AR	67
	68	#define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
	69
	70	#include <config_distro_bootcmd.h>
	71
	72	#define MEM_LAYOUT_ENV_SETTINGS \
	73	"kernel_addr_r=0x70800000\0" \
	74	"fdt_addr_r=0x71000000\0" \
	75	"scriptaddr=0x70800000\0" \
	76	"pxefile_addr_r=0x70800000\0" \
	77	"ramdisk_addr_r=0x73000000\0"
	78
	79	#define CONFIG_EXTRA_ENV_SETTINGS \
	80	MEM_LAYOUT_ENV_SETTINGS \
	81	"bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \
	82	"fdtfile=imx53-usbarmory.dtb\0" \
	83	"console=ttymxc0,115200\0" \
	84	BOOTENV
	85
a02ab5ea	86	#ifndef CONFIG_CMDLINE
a02ab5ea AR	87	#define USBARMORY_FIT_PATH "/boot/usbarmory.itb"
	88	#define USBARMORY_FIT_ADDR "0x70800000"
	89	#endif
	90
3bf801a2 AR	91	/* Physical Memory Map */
	92	#define CONFIG_NR_DRAM_BANKS 1
	93	#define PHYS_SDRAM CSD0_BASE_ADDR
	94	#define PHYS_SDRAM_SIZE (gd->ram_size)
	95
	96	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
	97	#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
	98	#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
	99
	100	#define CONFIG_SYS_INIT_SP_OFFSET \
	101	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
	102	#define CONFIG_SYS_INIT_SP_ADDR \
	103	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
	104
	105	#define CONFIG_SYS_MEMTEST_START 0x70000000
	106	#define CONFIG_SYS_MEMTEST_END 0x90000000
	107
	108	#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
	109
	110	#endif /* __CONFIG_H */