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ae691e57 SR |
1 | /* |
2 | * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
ae691e57 SR |
5 | */ |
6 | ||
7 | /* | |
8 | * This file contains the configuration parameters for the VCT board | |
9 | * family: | |
10 | * | |
11 | * vct_premium | |
12 | * vct_premium_small | |
13 | * vct_premium_onenand | |
14 | * vct_premium_onenand_small | |
15 | * vct_platinum | |
16 | * vct_platinum_small | |
17 | * vct_platinum_onenand | |
18 | * vct_platinum_onenand_small | |
19 | * vct_platinumavc | |
20 | * vct_platinumavc_small | |
21 | * vct_platinumavc_onenand | |
22 | * vct_platinumavc_onenand_small | |
23 | */ | |
24 | ||
25 | #ifndef __CONFIG_H | |
26 | #define __CONFIG_H | |
27 | ||
ae691e57 SR |
28 | #define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */ |
29 | #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2) | |
ae691e57 SR |
30 | |
31 | #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */ | |
32 | ||
14d0a02a | 33 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
ae691e57 | 34 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) |
ae691e57 SR |
35 | #define CONFIG_SYS_MALLOC_LEN (1 << 20) |
36 | #define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10) | |
37 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 | |
38 | ||
39 | #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND) | |
40 | #define CONFIG_VCT_NOR | |
ae691e57 SR |
41 | #endif |
42 | ||
43 | /* | |
44 | * UART | |
45 | */ | |
294f10ca DZ |
46 | #ifdef CONFIG_VCT_PLATINUMAVC |
47 | #define UART_1_BASE 0xBDC30000 | |
48 | #else | |
49 | #define UART_1_BASE 0xBF89C000 | |
50 | #endif | |
51 | ||
52 | #define CONFIG_SYS_NS16550_SERIAL | |
294f10ca DZ |
53 | #define CONFIG_SYS_NS16550_REG_SIZE -4 |
54 | #define CONFIG_SYS_NS16550_COM1 UART_1_BASE | |
55 | #define CONFIG_CONS_INDEX 1 | |
56 | #define CONFIG_SYS_NS16550_CLK 921600 | |
ae691e57 SR |
57 | |
58 | /* | |
59 | * SDRAM | |
60 | */ | |
61 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 | |
62 | #define CONFIG_SYS_MBYTES_SDRAM 128 | |
63 | #define CONFIG_SYS_MEMTEST_START 0x80200000 | |
64 | #define CONFIG_SYS_MEMTEST_END 0x80400000 | |
65 | #define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */ | |
66 | ||
67 | #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM) | |
68 | /* | |
69 | * SMSC91C11x Network Card | |
70 | */ | |
736fead8 BW |
71 | #define CONFIG_SMC911X |
72 | #define CONFIG_SMC911X_BASE 0x00000000 | |
73 | #define CONFIG_SMC911X_32_BIT | |
ae691e57 SR |
74 | #define CONFIG_NET_RETRY_COUNT 20 |
75 | #endif | |
76 | ||
77 | /* | |
78 | * Commands | |
79 | */ | |
ae691e57 | 80 | #define CONFIG_CMD_EEPROM |
ae691e57 SR |
81 | |
82 | /* | |
83 | * Only Premium/Platinum have ethernet support right now | |
84 | */ | |
383015b2 DS |
85 | #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \ |
86 | !defined(CONFIG_VCT_SMALL_IMAGE) | |
ae691e57 SR |
87 | #endif |
88 | ||
89 | /* | |
90 | * Only Premium/Platinum have USB-EHCI support right now | |
91 | */ | |
383015b2 DS |
92 | #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \ |
93 | !defined(CONFIG_VCT_SMALL_IMAGE) | |
ae691e57 SR |
94 | #endif |
95 | ||
96 | #if defined(CONFIG_CMD_USB) | |
ae691e57 SR |
97 | #define CONFIG_SUPPORT_VFAT |
98 | ||
99 | /* | |
100 | * USB/EHCI | |
101 | */ | |
ae691e57 | 102 | #define CONFIG_USB_EHCI_VCT /* on VCT platform */ |
ae691e57 SR |
103 | #define CONFIG_EHCI_MMIO_BIG_ENDIAN |
104 | #define CONFIG_EHCI_DESC_BIG_ENDIAN | |
105 | #define CONFIG_EHCI_IS_TDI | |
106 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */ | |
107 | #endif /* CONFIG_CMD_USB */ | |
108 | ||
ae691e57 SR |
109 | #if defined(CONFIG_VCT_NAND) |
110 | #define CONFIG_CMD_NAND | |
111 | #endif | |
112 | ||
113 | #if defined(CONFIG_VCT_ONENAND) | |
114 | #define CONFIG_CMD_ONENAND | |
115 | #endif | |
116 | ||
117 | /* | |
118 | * BOOTP options | |
119 | */ | |
120 | #define CONFIG_BOOTP_BOOTFILESIZE | |
121 | #define CONFIG_BOOTP_BOOTPATH | |
122 | #define CONFIG_BOOTP_GATEWAY | |
123 | #define CONFIG_BOOTP_HOSTNAME | |
124 | #define CONFIG_BOOTP_SUBNETMASK | |
125 | ||
126 | /* | |
127 | * Miscellaneous configurable options | |
128 | */ | |
129 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
ae691e57 SR |
130 | #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
131 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ | |
132 | sizeof(CONFIG_SYS_PROMPT) + 16) | |
133 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ | |
134 | #define CONFIG_TIMESTAMP /* Print image info with timestamp */ | |
135 | #define CONFIG_CMDLINE_EDITING /* add command line history */ | |
ae691e57 SR |
136 | |
137 | /* | |
138 | * FLASH and environment organization | |
139 | */ | |
140 | #if defined(CONFIG_VCT_NOR) | |
141 | #define CONFIG_ENV_IS_IN_FLASH | |
142 | #define CONFIG_FLASH_NOT_MEM_MAPPED | |
143 | ||
144 | /* | |
145 | * We need special accessor functions for the CFI FLASH driver. This | |
146 | * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option. | |
147 | */ | |
148 | #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS | |
149 | ||
150 | /* | |
151 | * For the non-memory-mapped NOR FLASH, we need to define the | |
152 | * NOR FLASH area. This can't be detected via the addr2info() | |
153 | * function, since we check for flash access in the very early | |
154 | * U-Boot code, before the NOR FLASH is detected. | |
155 | */ | |
156 | #define CONFIG_FLASH_BASE 0xb0000000 | |
157 | #define CONFIG_FLASH_END 0xbfffffff | |
158 | ||
159 | /* | |
160 | * CFI driver settings | |
161 | */ | |
162 | #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */ | |
163 | #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */ | |
164 | #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */ | |
165 | #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */ | |
166 | ||
167 | #define CONFIG_SYS_FLASH_BASE 0xb0000000 | |
168 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } | |
169 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ | |
170 | #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ | |
171 | ||
172 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ | |
173 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ | |
174 | ||
175 | #ifdef CONFIG_ENV_IS_IN_FLASH | |
176 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */ | |
177 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) | |
178 | #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ | |
179 | ||
180 | /* Address and size of Redundant Environment Sector */ | |
181 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) | |
182 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) | |
183 | #endif /* CONFIG_ENV_IS_IN_FLASH */ | |
184 | #endif /* CONFIG_VCT_NOR */ | |
185 | ||
186 | #if defined(CONFIG_VCT_ONENAND) | |
187 | #define CONFIG_USE_ONENAND_BOARD_INIT | |
188 | #define CONFIG_ENV_IS_IN_ONENAND | |
189 | #define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */ | |
190 | #define CONFIG_SYS_FLASH_BASE 0x00000000 | |
191 | #define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */ | |
192 | #define CONFIG_ENV_SIZE (128 << 10) /* erase size */ | |
193 | #endif /* CONFIG_VCT_ONENAND */ | |
194 | ||
ae691e57 SR |
195 | /* |
196 | * I2C/EEPROM | |
197 | */ | |
ea818dbb HS |
198 | #define CONFIG_SYS_I2C |
199 | #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ | |
200 | #define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */ | |
201 | #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f | |
ae691e57 SR |
202 | |
203 | /* | |
204 | * Software (bit-bang) I2C driver configuration | |
205 | */ | |
206 | #define CONFIG_SYS_GPIO_I2C_SCL 11 | |
207 | #define CONFIG_SYS_GPIO_I2C_SDA 10 | |
208 | ||
209 | #ifndef __ASSEMBLY__ | |
210 | int vct_gpio_dir(int pin, int dir); | |
211 | void vct_gpio_set(int pin, int val); | |
212 | int vct_gpio_get(int pin); | |
213 | #endif | |
214 | ||
215 | #define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1) | |
216 | #define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1) | |
217 | #define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0) | |
218 | #define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA) | |
219 | #define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit) | |
220 | #define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit) | |
221 | #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */ | |
222 | ||
223 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 | |
224 | /* CAT24WC32 */ | |
225 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */ | |
226 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */ | |
227 | /* 32 byte page write mode using*/ | |
228 | /* last 5 bits of the address */ | |
229 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */ | |
230 | ||
231 | #define CONFIG_BOOTCOMMAND "run test3" | |
ae691e57 | 232 | |
ae691e57 SR |
233 | /* |
234 | * UBI configuration | |
235 | */ | |
236 | #if defined(CONFIG_VCT_ONENAND) | |
237 | #define CONFIG_SYS_USE_UBI | |
238 | #define CONFIG_CMD_JFFS2 | |
ae691e57 | 239 | #define CONFIG_RBTREE |
942556a9 | 240 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
ae691e57 | 241 | #define CONFIG_MTD_PARTITIONS |
68d7d651 | 242 | #define CONFIG_CMD_MTDPARTS |
ae691e57 SR |
243 | |
244 | #define MTDIDS_DEFAULT "onenand0=onenand" | |
245 | #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \ | |
246 | "128k(env)," \ | |
247 | "20m(kernel)," \ | |
248 | "-(rootfs)" | |
249 | #endif | |
250 | ||
251 | /* | |
252 | * We need a small, stripped down image to fit into the first 128k OneNAND | |
253 | * erase block (gzipped). This image only needs basic commands for FLASH | |
254 | * (NOR/OneNAND) usage and Linux kernel booting. | |
255 | */ | |
256 | #if defined(CONFIG_VCT_SMALL_IMAGE) | |
74de7aef | 257 | #undef CONFIG_CMD_EEPROM |
ae691e57 | 258 | #undef CONFIG_CMD_EEPROM |
ae691e57 | 259 | #undef CONFIG_CMD_IRQ |
74de7aef | 260 | #undef CONFIG_CMD_LOADY |
ae691e57 SR |
261 | #undef CONFIG_CMD_REGINFO |
262 | #undef CONFIG_CMD_STRINGS | |
263 | #undef CONFIG_CMD_TERMINAL | |
ae691e57 | 264 | |
736fead8 | 265 | #undef CONFIG_SMC911X |
ea818dbb | 266 | #undef CONFIG_SYS_I2C_SOFT |
74de7aef | 267 | #undef CONFIG_SOURCE |
ae691e57 SR |
268 | #undef CONFIG_SYS_LONGHELP |
269 | #undef CONFIG_TIMESTAMP | |
270 | #endif /* CONFIG_VCT_SMALL_IMAGE */ | |
271 | ||
272 | #endif /* __CONFIG_H */ |