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1/*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale Vybrid vf610twr board.
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
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12#define CONFIG_SYS_CACHELINE_SIZE 32
13
8c653124 14#include <asm/arch/imx-regs.h>
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15
16#define CONFIG_VF610
17
18#define CONFIG_DISPLAY_CPUINFO
19#define CONFIG_DISPLAY_BOARDINFO
18fb0e3c 20#define CONFIG_SYS_FSL_CLK
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21
22#define CONFIG_MACH_TYPE 4146
23
24#define CONFIG_SKIP_LOWLEVEL_INIT
25
26/* Enable passing of ATAGs */
27#define CONFIG_CMDLINE_TAG
28
29#define CONFIG_CMD_FUSE
30#ifdef CONFIG_CMD_FUSE
31#define CONFIG_MXC_OCOTP
32#endif
33
34/* Size of malloc() pool */
35#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
36
37#define CONFIG_BOARD_EARLY_INIT_F
38
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39/* Allow to overwrite serial and ethaddr */
40#define CONFIG_ENV_OVERWRITE
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41#define CONFIG_BAUDRATE 115200
42
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43/* NAND support */
44#define CONFIG_CMD_NAND
45#define CONFIG_CMD_NAND_TRIMFFS
8fca2d8c 46#define CONFIG_SYS_NAND_ONFI_DETECTION
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47
48#ifdef CONFIG_CMD_NAND
d6d07a9b 49#define CONFIG_USE_ARCH_MEMCPY
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50#define CONFIG_SYS_MAX_NAND_DEVICE 1
51#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
52
53/* UBI */
54#define CONFIG_CMD_UBI
55#define CONFIG_CMD_UBIFS
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56#define CONFIG_RBTREE
57#define CONFIG_LZO
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58
59/* Dynamic MTD partition support */
60#define CONFIG_CMD_MTDPARTS
61#define CONFIG_MTD_PARTITIONS
62#define CONFIG_MTD_DEVICE
63#define MTDIDS_DEFAULT "nand0=fsl_nfc"
64#define MTDPARTS_DEFAULT "mtdparts=fsl_nfc:" \
65 "128k(vf-bcb)ro," \
66 "1408k(u-boot)ro," \
67 "512k(u-boot-env)," \
68 "4m(kernel)," \
69 "512k(fdt)," \
70 "-(rootfs)"
71#endif
72
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73#define CONFIG_MMC
74#define CONFIG_FSL_ESDHC
75#define CONFIG_SYS_FSL_ESDHC_ADDR 0
76#define CONFIG_SYS_FSL_ESDHC_NUM 1
77
78#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
79
80#define CONFIG_CMD_MMC
81#define CONFIG_GENERIC_MMC
82#define CONFIG_CMD_FAT
83#define CONFIG_DOS_PARTITION
84
8c653124 85#define CONFIG_CMD_MII
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86#define CONFIG_FEC_MXC
87#define CONFIG_MII
88#define IMX_FEC_BASE ENET_BASE_ADDR
89#define CONFIG_FEC_XCV_TYPE RMII
90#define CONFIG_FEC_MXC_PHYADDR 0
91#define CONFIG_PHYLIB
92#define CONFIG_PHY_MICREL
93
cb6d04d6 94/* QSPI Configs*/
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95
96#ifdef CONFIG_FSL_QSPI
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97#define FSL_QSPI_FLASH_SIZE (1 << 24)
98#define FSL_QSPI_FLASH_NUM 2
99#define CONFIG_SYS_FSL_QSPI_LE
100#endif
101
1221b3d7 102/* I2C Configs */
b089d039 103#define CONFIG_SYS_I2C
104#define CONFIG_SYS_I2C_MXC
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105#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
106#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
b089d039 107#define CONFIG_SYS_SPD_BUS_NUM 0
1221b3d7 108
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109#define CONFIG_BOOTDELAY 3
110
cf04ad32 111#define CONFIG_SYS_LOAD_ADDR 0x82000000
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112
113/* We boot from the gfxRAM area of the OCRAM. */
114#define CONFIG_SYS_TEXT_BASE 0x3f408000
115#define CONFIG_BOARD_SIZE_LIMIT 524288
8c653124 116
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117/*
118 * We do have 128MB of memory on the Vybrid Tower board. Leave the last
119 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
120 * DDR3. Hence, limit the memory range for image processing to 112MB
121 * using bootm_size. All of the following must be within this range.
122 * We have the default load at 32MB into DDR (for the kernel), FDT at
123 * 64MB and the ramdisk 512KB above that (allowing for hopefully never
124 * seen large trees). This allows a reasonable split between ramdisk
125 * and kernel size, where the ram disk can be a bit larger.
126 */
127#define MEM_LAYOUT_ENV_SETTINGS \
128 "bootm_size=0x07000000\0" \
129 "loadaddr=0x82000000\0" \
130 "kernel_addr_r=0x82000000\0" \
131 "fdt_addr=0x84000000\0" \
132 "fdt_addr_r=0x84000000\0" \
133 "rdaddr=0x84080000\0" \
134 "ramdisk_addr_r=0x84080000\0"
135
ca21f61e 136#define CONFIG_EXTRA_ENV_SETTINGS \
cf04ad32 137 MEM_LAYOUT_ENV_SETTINGS \
ca21f61e 138 "script=boot.scr\0" \
c0a5b081 139 "image=zImage\0" \
ca21f61e 140 "console=ttyLP1\0" \
ca21f61e 141 "fdt_file=vf610-twr.dtb\0" \
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142 "boot_fdt=try\0" \
143 "ip_dyn=yes\0" \
144 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
145 "mmcpart=1\0" \
146 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
147 "update_sd_firmware_filename=u-boot.imx\0" \
148 "update_sd_firmware=" \
149 "if test ${ip_dyn} = yes; then " \
150 "setenv get_cmd dhcp; " \
151 "else " \
152 "setenv get_cmd tftp; " \
153 "fi; " \
154 "if mmc dev ${mmcdev}; then " \
155 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
156 "setexpr fw_sz ${filesize} / 0x200; " \
157 "setexpr fw_sz ${fw_sz} + 1; " \
158 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
159 "fi; " \
160 "fi\0" \
161 "mmcargs=setenv bootargs console=${console},${baudrate} " \
162 "root=${mmcroot}\0" \
163 "loadbootscript=" \
164 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
165 "bootscript=echo Running bootscript from mmc ...; " \
166 "source\0" \
c0a5b081 167 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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168 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
169 "mmcboot=echo Booting from mmc ...; " \
170 "run mmcargs; " \
171 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
172 "if run loadfdt; then " \
c0a5b081 173 "bootz ${loadaddr} - ${fdt_addr}; " \
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174 "else " \
175 "if test ${boot_fdt} = try; then " \
c0a5b081 176 "bootz; " \
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177 "else " \
178 "echo WARN: Cannot load the DT; " \
179 "fi; " \
180 "fi; " \
181 "else " \
c0a5b081 182 "bootz; " \
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183 "fi;\0" \
184 "netargs=setenv bootargs console=${console},${baudrate} " \
185 "root=/dev/nfs " \
186 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
187 "netboot=echo Booting from net ...; " \
188 "run netargs; " \
189 "if test ${ip_dyn} = yes; then " \
190 "setenv get_cmd dhcp; " \
191 "else " \
192 "setenv get_cmd tftp; " \
193 "fi; " \
c0a5b081 194 "${get_cmd} ${image}; " \
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195 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
196 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
c0a5b081 197 "bootz ${loadaddr} - ${fdt_addr}; " \
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198 "else " \
199 "if test ${boot_fdt} = try; then " \
c0a5b081 200 "bootz; " \
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201 "else " \
202 "echo WARN: Cannot load the DT; " \
203 "fi; " \
204 "fi; " \
205 "else " \
c0a5b081 206 "bootz; " \
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207 "fi;\0"
208
209#define CONFIG_BOOTCOMMAND \
210 "mmc dev ${mmcdev}; if mmc rescan; then " \
211 "if run loadbootscript; then " \
212 "run bootscript; " \
213 "else " \
c0a5b081 214 "if run loadimage; then " \
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215 "run mmcboot; " \
216 "else run netboot; " \
217 "fi; " \
218 "fi; " \
219 "else run netboot; fi"
220
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221/* Miscellaneous configurable options */
222#define CONFIG_SYS_LONGHELP /* undef to save memory */
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223#undef CONFIG_AUTO_COMPLETE
224#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
225#define CONFIG_SYS_PBSIZE \
226 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
227#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
228#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
229
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230#define CONFIG_SYS_MEMTEST_START 0x80010000
231#define CONFIG_SYS_MEMTEST_END 0x87C00000
232
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233/*
234 * Stack sizes
235 * The stack sizes are set up in start.S using the settings below
236 */
237#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
238
239/* Physical memory map */
240#define CONFIG_NR_DRAM_BANKS 1
241#define PHYS_SDRAM (0x80000000)
242#define PHYS_SDRAM_SIZE (128 * 1024 * 1024)
243
244#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
245#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
246#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
247
248#define CONFIG_SYS_INIT_SP_OFFSET \
249 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
250#define CONFIG_SYS_INIT_SP_ADDR \
251 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
252
253/* FLASH and environment organization */
254#define CONFIG_SYS_NO_FLASH
255
d6d07a9b 256#ifdef CONFIG_ENV_IS_IN_MMC
8c653124 257#define CONFIG_ENV_SIZE (8 * 1024)
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258
259#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
260#define CONFIG_SYS_MMC_ENV_DEV 0
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261#endif
262
263#ifdef CONFIG_ENV_IS_IN_NAND
264#define CONFIG_ENV_SIZE (64 * 2048)
265#define CONFIG_ENV_SECT_SIZE (64 * 2048)
266#define CONFIG_ENV_RANGE (512 * 1024)
267#define CONFIG_ENV_OFFSET 0x180000
268#endif
8c653124 269
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270#define CONFIG_CMD_BOOTZ
271
272#endif