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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / include / configs / walnut.h
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0f8c9768 1/*
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2 * (C) Copyright 2000-2005
3 * Stefan Roese, DENX Software Engineering, sr@denx.de.
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4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * board/config.h - configuration options, board specific
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
30
31/*
32 * High Level Configuration Options
33 * (easy to change)
34 */
35
36#define CONFIG_405GP 1 /* This is a PPC405 CPU */
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37#define CONFIG_4xx 1 /* ...member of PPC4xx family */
38#define CONFIG_WALNUT 1 /* ...on a WALNUT board */
39 /* ...and on a SYCAMORE board */
0f8c9768 40
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41/*
42 * Include common defines/options for all AMCC eval boards
43 */
44#define CONFIG_HOSTNAME walnut
45#include "amcc-common.h"
46
c837dcb1 47#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
0f8c9768 48
095b8a37 49#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
0f8c9768 50
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51/*
52 * Default environment variables
53 */
54#define CONFIG_EXTRA_ENV_SETTINGS \
55 CONFIG_AMCC_DEF_ENV \
56 CONFIG_AMCC_DEF_ENV_POWERPC \
57 CONFIG_AMCC_DEF_ENV_PPC_OLD \
58 CONFIG_AMCC_DEF_ENV_NOR_UPD \
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59 "kernel_addr=fff80000\0" \
60 "ramdisk_addr=fff80000\0" \
8a316c9b 61 ""
0f8c9768 62
095b8a37 63#define CONFIG_PHY_ADDR 1 /* PHY address */
a00eccfe 64#define CONFIG_HAS_ETH0 1
4f92ed5f 65
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66#define CONFIG_RTC_DS174x 1 /* use DS1743 RTC in Walnut */
67
dca3b3d6 68/*
72675dc6 69 * Commands additional to the ones defined in amcc-common.h
dca3b3d6 70 */
dca3b3d6 71#define CONFIG_CMD_DATE
dca3b3d6 72#define CONFIG_CMD_PCI
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73#define CONFIG_CMD_SDRAM
74#define CONFIG_CMD_SNTP
75
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76#define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
77
0f8c9768 78/*
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79 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
80 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
81 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
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82 * The Linux BASE_BAUD define should match this configuration.
83 * baseBaud = cpuClock/(uartDivisor*16)
6d0f6bcf 84 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
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85 * set Linux BASE_BAUD to 403200.
86 */
8a316c9b 87#undef CONFIG_SERIAL_SOFTWARE_FIFO
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88#undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
89#undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
90#define CONFIG_SYS_BASE_BAUD 691200
0f8c9768 91
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92/*-----------------------------------------------------------------------
93 * I2C stuff
94 *-----------------------------------------------------------------------
95 */
6d0f6bcf 96#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
0f8c9768 97
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98#define CONFIG_SYS_I2C_MULTI_EEPROMS
99#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
100#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
101#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
102#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
4f92ed5f 103
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104/*-----------------------------------------------------------------------
105 * PCI stuff
106 *-----------------------------------------------------------------------
107 */
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108#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
109#define PCI_HOST_FORCE 1 /* configure as pci host */
110#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
111
112#define CONFIG_PCI /* include pci support */
113#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
114#define CONFIG_PCI_PNP /* do pci plug-and-play */
115 /* resource configuration */
8a316c9b 116#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
0f8c9768 117
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118#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
119#define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
120#define CONFIG_SYS_PCI_PTM1LA 0x00000000 /* point to sdram */
121#define CONFIG_SYS_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */
122#define CONFIG_SYS_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
123#define CONFIG_SYS_PCI_PTM2LA 0x00000000 /* disabled */
124#define CONFIG_SYS_PCI_PTM2MS 0x00000000 /* disabled */
125#define CONFIG_SYS_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
0f8c9768 126
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127/*-----------------------------------------------------------------------
128 * Start addresses for the final memory configuration
129 * (Set up by the startup code)
0f8c9768 130 */
6d0f6bcf 131#define CONFIG_SYS_FLASH_BASE 0xFFF80000
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132
133/*
134 * Define here the location of the environment variables (FLASH or NVRAM).
135 * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
095b8a37 136 * supported for backward compatibility.
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137 */
138#if 1
5a1aceb0 139#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
8a316c9b 140#else
9314cee6 141#define CONFIG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
8a316c9b 142#endif
0f8c9768 143
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144/*-----------------------------------------------------------------------
145 * FLASH organization
146 */
6d0f6bcf 147#define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
095b8a37 148#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
8a316c9b 149
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150#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
151#define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
0f8c9768 152
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153#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
154#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
0f8c9768 155
6d0f6bcf 156#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
8a316c9b 157
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158#define CONFIG_SYS_FLASH_ADDR0 0x5555
159#define CONFIG_SYS_FLASH_ADDR1 0x2aaa
160#define CONFIG_SYS_FLASH_WORD_SIZE unsigned char
8a316c9b 161
5a1aceb0 162#ifdef CONFIG_ENV_IS_IN_FLASH
0e8d1586 163#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
6d0f6bcf 164#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
0e8d1586 165#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
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166
167/* Address and size of Redundant Environment Sector */
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168#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
169#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
5a1aceb0 170#endif /* CONFIG_ENV_IS_IN_FLASH */
8a316c9b 171
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172/*-----------------------------------------------------------------------
173 * NVRAM organization
174 */
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175#define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
176#define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */
0f8c9768 177
9314cee6 178#ifdef CONFIG_ENV_IS_IN_NVRAM
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179#define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
180#define CONFIG_ENV_ADDR \
6d0f6bcf 181 (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
0f8c9768 182#endif
8a316c9b 183
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184/*-----------------------------------------------------------------------
185 * External Bus Controller (EBC) Setup
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186 */
187
8a316c9b 188/* Memory Bank 0 (Flash Bank 0) initialization */
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189#define CONFIG_SYS_EBC_PB0AP 0x9B015480
190#define CONFIG_SYS_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
8a316c9b 191
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192#define CONFIG_SYS_EBC_PB1AP 0x02815480
193#define CONFIG_SYS_EBC_PB1CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
8a316c9b 194
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195#define CONFIG_SYS_EBC_PB2AP 0x04815A80
196#define CONFIG_SYS_EBC_PB2CR 0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */
0f8c9768 197
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198#define CONFIG_SYS_EBC_PB3AP 0x01815280
199#define CONFIG_SYS_EBC_PB3CR 0xF0218000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit */
0f8c9768 200
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201#define CONFIG_SYS_EBC_PB7AP 0x01815280
202#define CONFIG_SYS_EBC_PB7CR 0xF0318000 /* BAS=0xF03,BS=1MB,BU=R/W,BW=8bit */
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203
204/*-----------------------------------------------------------------------
205 * External peripheral base address
206 *-----------------------------------------------------------------------
207 */
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208#define CONFIG_SYS_KEY_REG_BASE_ADDR 0xF0100000
209#define CONFIG_SYS_IR_REG_BASE_ADDR 0xF0200000
210#define CONFIG_SYS_FPGA_REG_BASE_ADDR 0xF0300000
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211
212/*-----------------------------------------------------------------------
8a316c9b 213 * Definitions for initial stack pointer and data area
0f8c9768 214 */
6d0f6bcf 215#define CONFIG_SYS_INIT_DCACHE_CS 4 /* use cs # 4 for data cache memory */
0f8c9768 216
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217#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 /* inside of SDRAM */
218#define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
219#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
220#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
221#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
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222
223/*-----------------------------------------------------------------------
224 * Definitions for Serial Presence Detect EEPROM address
225 * (to get SDRAM settings)
226 */
095b8a37 227#define SPD_EEPROM_ADDRESS 0x50
0f8c9768 228
0f8c9768 229#endif /* __CONFIG_H */