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rename CFG_ macros to CONFIG_SYS
[people/ms/u-boot.git] / include / configs / xupv2p.h
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17980495 1/*
cf5c679c 2 * (C) Copyright 2007-2008 Michal Simek
17980495
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3 *
4 * Michal SIMEK <monstr@monstr.eu>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
28#include "../board/xilinx/xupv2p/xparameters.h"
29
30#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
31#define CONFIG_XUPV2P 1
32
33/* uart */
af7ae1a4 34#ifdef XILINX_UARTLITE_BASEADDR
f8bf9046 35#define CONFIG_XILINX_UARTLITE
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36#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
37#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
6d0f6bcf 38#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE }
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39#else
40#ifdef XILINX_UART16550_BASEADDR
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41#define CONFIG_SYS_NS16550
42#define CONFIG_SYS_NS16550_SERIAL
43#define CONFIG_SYS_NS16550_REG_SIZE 4
af7ae1a4 44#define CONFIG_CONS_INDEX 1
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45#define CONFIG_SYS_NS16550_COM1 XILINX_UART16550_BASEADDR
46#define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
af7ae1a4 47#define CONFIG_BAUDRATE 115200
6d0f6bcf 48#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 115200 }
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49#endif
50#endif
17980495 51
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52/*
53 * setting reset address
31c98a88 54 *
17980495 55 * TEXT_BASE is set to place, where the U-BOOT run in RAM, but
6d0f6bcf 56 * if you want to store U-BOOT in flash, set CONFIG_SYS_RESET_ADDRESS
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57 * to FLASH memory and after loading bitstream jump to FLASH.
58 * U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze
6d0f6bcf 59 * jump to CONFIG_SYS_RESET_ADDRESS where is the original U-BOOT code.
17980495 60 */
6d0f6bcf 61/* #define CONFIG_SYS_RESET_ADDRESS 0x36000000 */
17980495 62
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63/* ethernet */
64#ifdef XILINX_EMAC_BASEADDR
65#define CONFIG_XILINX_EMAC 1
6d0f6bcf 66#define CONFIG_SYS_ENET
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67#else
68#ifdef XILINX_EMACLITE_BASEADDR
69#define CONFIG_XILINX_EMACLITE 1
6d0f6bcf 70#define CONFIG_SYS_ENET
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71#endif
72#endif
73#undef ET_DEBUG
74
17980495 75/* gpio */
f8bf9046 76#ifdef XILINX_GPIO_BASEADDR
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77#define CONFIG_SYS_GPIO_0 1
78#define CONFIG_SYS_GPIO_0_ADDR XILINX_GPIO_BASEADDR
f8bf9046 79#endif
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80
81/* interrupt controller */
4d49b280 82#ifdef XILINX_INTC_BASEADDR
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83#define CONFIG_SYS_INTC_0 1
84#define CONFIG_SYS_INTC_0_ADDR XILINX_INTC_BASEADDR
85#define CONFIG_SYS_INTC_0_NUM XILINX_INTC_NUM_INTR_INPUTS
4d49b280 86#endif
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87
88/* timer */
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89#ifdef XILINX_TIMER_BASEADDR
90#if (XILINX_TIMER_IRQ != -1)
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91#define CONFIG_SYS_TIMER_0 1
92#define CONFIG_SYS_TIMER_0_ADDR XILINX_TIMER_BASEADDR
93#define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ
17980495 94#define FREQUENCE XILINX_CLOCK_FREQ
6d0f6bcf 95#define CONFIG_SYS_TIMER_0_PRELOAD ( FREQUENCE/1000 )
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96#endif
97#else
98#ifdef XILINX_CLOCK_FREQ
f8bf9046 99#define CONFIG_XILINX_CLOCK_FREQ XILINX_CLOCK_FREQ
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100#else
101#error BAD CLOCK FREQ
102#endif
103#endif
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104/*
105 * memory layout - Example
106 * TEXT_BASE = 0x3600_0000;
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107 * CONFIG_SYS_SRAM_BASE = 0x3000_0000;
108 * CONFIG_SYS_SRAM_SIZE = 0x1000_0000;
17980495 109 *
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110 * CONFIG_SYS_GBL_DATA_OFFSET = 0x3000_0000 + 0x1000_0000 - 0x1000 = 0x3FFF_F000
111 * CONFIG_SYS_MONITOR_BASE = 0x3FFF_F000 - 0x40000 = 0x3FFB_F000
112 * CONFIG_SYS_MALLOC_BASE = 0x3FFB_F000 - 0x40000 = 0x3FF7_F000
17980495 113 *
6d0f6bcf 114 * 0x3000_0000 CONFIG_SYS_SDRAM_BASE
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115 * FREE
116 * 0x3600_0000 TEXT_BASE
117 * U-BOOT code
118 * 0x3602_0000
119 * FREE
120 *
121 * STACK
6d0f6bcf 122 * 0x3FF7_F000 CONFIG_SYS_MALLOC_BASE
17980495 123 * MALLOC_AREA 256kB Alloc
6d0f6bcf 124 * 0x3FFB_F000 CONFIG_SYS_MONITOR_BASE
17980495 125 * MONITOR_CODE 256kB Env
6d0f6bcf 126 * 0x3FFF_F000 CONFIG_SYS_GBL_DATA_OFFSET
53677ef1 127 * GLOBAL_DATA 4kB bd, gd
6d0f6bcf 128 * 0x4000_0000 CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
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129 */
130
131/* ddr sdram - main memory */
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132#define CONFIG_SYS_SDRAM_BASE XILINX_RAM_START
133#define CONFIG_SYS_SDRAM_SIZE XILINX_RAM_SIZE
134#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
135#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
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136
137/* global pointer */
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138#define CONFIG_SYS_GBL_DATA_SIZE 0x1000 /* size of global data */
139#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - CONFIG_SYS_GBL_DATA_SIZE) /* start of global data */
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140
141/* monitor code */
142#define SIZE 0x40000
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143#define CONFIG_SYS_MONITOR_LEN SIZE
144#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_MONITOR_LEN)
145#define CONFIG_SYS_MONITOR_END (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
146#define CONFIG_SYS_MALLOC_LEN SIZE
147#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
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148
149/* stack */
6d0f6bcf 150#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_MALLOC_BASE
17980495 151
6d0f6bcf 152#define CONFIG_SYS_NO_FLASH 1
93f6d725 153#define CONFIG_ENV_IS_NOWHERE 1
0e8d1586 154#define CONFIG_ENV_SIZE 0x1000
6d0f6bcf 155#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
17980495 156
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157/*
158 * BOOTP options
159 */
160#define CONFIG_BOOTP_BOOTFILESIZE
161#define CONFIG_BOOTP_BOOTPATH
162#define CONFIG_BOOTP_GATEWAY
163#define CONFIG_BOOTP_HOSTNAME
164
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165/*
166 * Command line configuration.
167 */
168#include <config_cmd_default.h>
169
f8bf9046 170#undef CONFIG_CMD_FLASH
cf5c679c 171#undef CONFIG_CMD_JFFS2
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172#undef CONFIG_CMD_IMLS
173
b90c045f 174#define CONFIG_CMD_ASKENV
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175#define CONFIG_CMD_CACHE
176#define CONFIG_CMD_IRQ
4d49b280 177
6d0f6bcf 178#ifndef CONFIG_SYS_ENET
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179 #undef CONFIG_CMD_NET
180#else
181 #define CONFIG_CMD_PING
182#endif
dca3b3d6 183
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184#ifdef XILINX_SYSACE_BASEADDR
185#define CONFIG_CMD_EXT2
186#define CONFIG_CMD_FAT
187#endif
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188
189/* Miscellaneous configurable options */
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190#define CONFIG_SYS_PROMPT "U-Boot-mONStR> "
191#define CONFIG_SYS_CBSIZE 512 /* size of console buffer */
192#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */
193#define CONFIG_SYS_MAXARGS 15 /* max number of command args */
194#define CONFIG_SYS_LONGHELP
195#define CONFIG_SYS_LOAD_ADDR 0x12000000 /* default load address */
17980495 196
53677ef1 197#define CONFIG_BOOTDELAY 30
17980495 198#define CONFIG_BOOTARGS "root=romfs"
f8bf9046 199#define CONFIG_HOSTNAME "xupv2p"
53677ef1 200#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
17980495 201#define CONFIG_IPADDR 192.168.0.3
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202#define CONFIG_SERVERIP 192.168.0.5
203#define CONFIG_GATEWAYIP 192.168.0.1
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204#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
205
206/* architecture dependent code */
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207#define CONFIG_SYS_USR_EXCEP /* user exception */
208#define CONFIG_SYS_HZ 1000
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209
210#define CONFIG_PREBOOT "echo U-BOOT by mONStR;" \
211 "base 0;" \
212 "echo"
213
17980495 214/* system ace */
f8bf9046 215#ifdef XILINX_SYSACE_BASEADDR
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216#define CONFIG_SYSTEMACE
217/* #define DEBUG_SYSTEMACE */
218#define SYSTEMACE_CONFIG_FPGA
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219#define CONFIG_SYS_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
220#define CONFIG_SYS_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
32556443 221#define CONFIG_DOS_PARTITION
f8bf9046 222#endif
17980495 223
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224#define CONFIG_CMDLINE_EDITING
225#define CONFIG_OF_LIBFDT 1 /* flat device tree */
226
17980495 227#endif /* __CONFIG_H */