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34fa7e83 LA |
1 | /* |
2 | * Inter-Thread Communication Unit emulation. | |
3 | * | |
4 | * Copyright (c) 2016 Imagination Technologies | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #ifndef MIPS_ITU_H | |
21 | #define MIPS_ITU_H | |
22 | ||
921e1a2a | 23 | #include "hw/sysbus.h" |
db1015e9 | 24 | #include "qom/object.h" |
921e1a2a | 25 | |
34fa7e83 | 26 | #define TYPE_MIPS_ITU "mips-itu" |
db1015e9 | 27 | typedef struct MIPSITUState MIPSITUState; |
34fa7e83 LA |
28 | #define MIPS_ITU(obj) OBJECT_CHECK(MIPSITUState, (obj), TYPE_MIPS_ITU) |
29 | ||
30 | #define ITC_CELL_DEPTH_SHIFT 2 | |
31 | #define ITC_CELL_DEPTH (1u << ITC_CELL_DEPTH_SHIFT) | |
32 | ||
33 | typedef struct ITCStorageCell { | |
34 | struct { | |
35 | uint8_t FIFODepth; /* Log2 of the cell depth */ | |
36 | uint8_t FIFOPtr; /* Number of elements in a FIFO cell */ | |
37 | uint8_t FIFO; /* 1 - FIFO cell, 0 - Semaphore cell */ | |
38 | uint8_t T; /* Trap Bit */ | |
39 | uint8_t F; /* Full Bit */ | |
40 | uint8_t E; /* Empty Bit */ | |
41 | } tag; | |
42 | ||
43 | /* Index of the oldest element in the queue */ | |
44 | uint8_t fifo_out; | |
45 | ||
46 | /* Circular buffer for FIFO. Semaphore cells use index 0 only */ | |
47 | uint64_t data[ITC_CELL_DEPTH]; | |
48 | ||
49 | /* Bitmap tracking blocked threads on the cell. | |
50 | TODO: support >64 threads ? */ | |
51 | uint64_t blocked_threads; | |
52 | } ITCStorageCell; | |
53 | ||
54 | #define ITC_ADDRESSMAP_NUM 2 | |
55 | ||
db1015e9 | 56 | struct MIPSITUState { |
34fa7e83 LA |
57 | /*< private >*/ |
58 | SysBusDevice parent_obj; | |
59 | /*< public >*/ | |
60 | ||
61 | int32_t num_fifo; | |
62 | int32_t num_semaphores; | |
63 | ||
64 | /* ITC Storage */ | |
65 | ITCStorageCell *cell; | |
66 | MemoryRegion storage_io; | |
67 | ||
68 | /* ITC Configuration Tags */ | |
69 | uint64_t ITCAddressMap[ITC_ADDRESSMAP_NUM]; | |
70 | MemoryRegion tag_io; | |
e5345d96 YK |
71 | |
72 | /* ITU Control Register */ | |
73 | uint64_t icr0; | |
74 | ||
043715d1 YK |
75 | /* SAAR */ |
76 | bool saar_present; | |
77 | void *saar; | |
78 | ||
db1015e9 | 79 | }; |
34fa7e83 LA |
80 | |
81 | /* Get ITC Configuration Tag memory region. */ | |
82 | MemoryRegion *mips_itu_get_tag_region(MIPSITUState *itu); | |
83 | ||
84 | #endif /* MIPS_ITU_H */ |