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Add support for MX35 processor
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1/*
2 * (C) Copyright 2008
3 * Benjamin Warren, biggerbadderben@gmail.com
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
ae0b05df 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * netdev.h - definitions an prototypes for network devices
26 */
27
28#ifndef _NETDEV_H_
29#define _NETDEV_H_
30
31/*
32 * Board and CPU-specific initialization functions
33 * board_eth_init() has highest priority. cpu_eth_init() only
34 * gets called if board_eth_init() isn't instantiated or fails.
35 * Return values:
36 * 0: success
37 * -1: failure
38 */
39
40int board_eth_init(bd_t *bis);
41int cpu_eth_init(bd_t *bis);
42
43/* Driver initialization prototypes */
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44int altera_tse_initialize(u8 dev_num, int mac_base,
45 int sgdma_rx_base, int sgdma_tx_base);
36de2110 46int ax88180_initialize(bd_t *bis);
5dfb3ee3 47int au1x00_enet_initialize(bd_t*);
c041e9d2 48int at91emac_register(bd_t *bis, unsigned long iobase);
89973f8a 49int bfin_EMAC_initialize(bd_t *bis);
b1c0eaac 50int cs8900_initialize(u8 dev_num, int base_addr);
8ca0b3f9 51int dc21x4x_initialize(bd_t *bis);
8453587e 52int davinci_emac_initialize(void);
5b1b1883 53int designware_initialize(u32 id, ulong base_addr, u32 phy_addr);
62cbc408 54int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr);
ad3381cf 55int e1000_initialize(bd_t *bis);
10efa024 56int eepro100_initialize(bd_t *bis);
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57int enc28j60_initialize(unsigned int bus, unsigned int cs,
58 unsigned int max_hz, unsigned int mode);
594d57d0 59int ep93xx_eth_initialize(u8 dev_num, int base_addr);
f6569884 60int ethoc_initialize(u8 dev_num, int base_addr);
164846ee 61int eth_3com_initialize (bd_t * bis);
3456a148 62int fec_initialize (bd_t *bis);
0b23fb36 63int fecmxc_initialize (bd_t *bis);
b3dbf4a5 64int ftgmac100_initialize(bd_t *bits);
750326e5 65int ftmac100_initialize(bd_t *bits);
89973f8a 66int greth_initialize(bd_t *bis);
6aca145e 67void gt6426x_eth_initialize(bd_t *bis);
8218bd2a 68int inca_switch_initialize(bd_t *bis);
b7ad4109 69int lan91c96_initialize(u8 dev_num, int base_addr);
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70int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
71int mcdmafec_initialize(bd_t *bis);
72int mcffec_initialize(bd_t *bis);
a0aad08f 73int mpc512x_fec_initialize(bd_t *bis);
e1d7480b 74int mpc5xxx_fec_initialize(bd_t *bis);
a9bec96d 75int mpc8220_fec_initialize(bd_t *bis);
ba705b5b 76int mpc82xx_scc_enet_initialize(bd_t *bis);
d44265ad 77int mvgbe_initialize(bd_t *bis);
b902b8dd 78int natsemi_initialize(bd_t *bis);
cc94074e 79int npe_initialize(bd_t *bis);
19403633 80int ns8382x_initialize(bd_t *bis);
e3090534 81int pcnet_initialize(bd_t *bis);
4fce2ace 82int plb2800_eth_initialize(bd_t *bis);
25a85906 83int ppc_4xx_eth_initialize (bd_t *bis);
0b252f50 84int rtl8139_initialize(bd_t *bis);
02d69891 85int rtl8169_initialize(bd_t *bis);
9eb79bd8 86int scc_initialize(bd_t *bis);
89973f8a 87int skge_initialize(bd_t *bis);
736fead8 88int smc911x_initialize(u8 dev_num, int base_addr);
7194ab80 89int smc91111_initialize(u8 dev_num, int base_addr);
ccdd12f8 90int tsi108_eth_initialize(bd_t *bis);
2b5243fc 91int uec_standard_init(bd_t *bis);
89973f8a 92int uli526x_initialize(bd_t *bis);
042272a6 93int xilinx_emaclite_initialize (bd_t *bis, int base_addr);
bd3980cc 94int sh_eth_initialize(bd_t *bis);
60f61e6d 95int dm9000_initialize(bd_t *bis);
b9bb0531 96int fecmxc_initialize(bd_t *bis);
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97
98/* Boards with PCI network controllers can call this from their board_eth_init()
99 * function to initialize whatever's on board.
100 * Return value is total # of devices found */
101
102static inline int pci_eth_init(bd_t *bis)
103{
104 int num = 0;
e3090534 105
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106#ifdef CONFIG_PCI
107
108#ifdef CONFIG_EEPRO100
109 num += eepro100_initialize(bis);
110#endif
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111#ifdef CONFIG_TULIP
112 num += dc21x4x_initialize(bis);
113#endif
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114#ifdef CONFIG_E1000
115 num += e1000_initialize(bis);
116#endif
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117#ifdef CONFIG_PCNET
118 num += pcnet_initialize(bis);
119#endif
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120#ifdef CONFIG_NATSEMI
121 num += natsemi_initialize(bis);
122#endif
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123#ifdef CONFIG_NS8382X
124 num += ns8382x_initialize(bis);
125#endif
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126#if defined(CONFIG_RTL8139)
127 num += rtl8139_initialize(bis);
128#endif
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129#if defined(CONFIG_RTL8169)
130 num += rtl8169_initialize(bis);
131#endif
b11f664f 132#if defined(CONFIG_ULI526X)
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133 num += uli526x_initialize(bis);
134#endif
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135
136#endif /* CONFIG_PCI */
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137 return num;
138}
139
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140/*
141 * Boards with mv88e61xx switch can use this by defining
142 * CONFIG_MV88E61XX_SWITCH in respective board configheader file
143 * the stuct and enums here are used to specify switch configuration params
144 */
145#if defined(CONFIG_MV88E61XX_SWITCH)
146enum mv88e61xx_cfg_vlan {
147 MV88E61XX_VLANCFG_DEFAULT,
148 MV88E61XX_VLANCFG_ROUTER
149};
150
151enum mv88e61xx_cfg_mdip {
152 MV88E61XX_MDIP_NOCHANGE,
153 MV88E61XX_MDIP_REVERSE
154};
155
156enum mv88e61xx_cfg_ledinit {
157 MV88E61XX_LED_INIT_DIS,
158 MV88E61XX_LED_INIT_EN
159};
160
161enum mv88e61xx_cfg_rgmiid {
162 MV88E61XX_RGMII_DELAY_DIS,
163 MV88E61XX_RGMII_DELAY_EN
164};
165
166enum mv88e61xx_cfg_prtstt {
167 MV88E61XX_PORTSTT_DISABLED,
168 MV88E61XX_PORTSTT_BLOCKING,
169 MV88E61XX_PORTSTT_LEARNING,
170 MV88E61XX_PORTSTT_FORWARDING
171};
172
173struct mv88e61xx_config {
174 char *name;
175 enum mv88e61xx_cfg_vlan vlancfg;
176 enum mv88e61xx_cfg_rgmiid rgmii_delay;
177 enum mv88e61xx_cfg_prtstt portstate;
178 enum mv88e61xx_cfg_ledinit led_init;
179 enum mv88e61xx_cfg_mdip mdip;
180 u32 ports_enabled;
181 u8 cpuport;
182};
183
184int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
185#endif /* CONFIG_MV88E61XX_SWITCH */
186
89973f8a 187#endif /* _NETDEV_H_ */