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2000-12-29 H.J. Lu <hjl@gnu.org>
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
3e73aa7c
JH		 1Wed Dec 20 14:22:03 MET 2000 Jan Hubicka <jh@suse.cz>
2
3 * i386.h (i386_optab): Replace "Imm" with "EncImm".
4 (i386_regtab): Add flags field.
5
bf40d919
NC		 62000-12-12 Nick Clifton <nickc@redhat.com>
7
8 * mips.h: Fix formatting.
9
4372b673
NC		 102000-12-01 Chris Demetriou <cgd@sibyte.com>
11
12 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
13 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
14 OP_*_SYSCALL definitions.
15 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
16 19 bit wait codes.
17 (MIPS operand specifier comments): Remove 'm', add 'U' and
18 'J', and update the meaning of 'B' so that it's more general.
19
e7af610e
NC		 20 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
21 INSN_ISA5): Renumber, redefine to mean the ISA at which the
22 instruction was added.
23 (INSN_ISA32): New constant.
24 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
25 Renumber to avoid new and/or renumbered INSN_* constants.
26 (INSN_MIPS32): Delete.
27 (ISA_UNKNOWN): New constant to indicate unknown ISA.
28 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
29 ISA_MIPS32): New constants, defined to be the mask of INSN_*
30 constants available at that ISA level.
31 (CPU_UNKNOWN): New constant to indicate unknown CPU.
32 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
33 define it with a unique value.
34 (OPCODE_IS_MEMBER): Update for new ISA membership-related
35 constant meanings.
36
84ea6cf2
NC		 37 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
38 definitions.
39
c6c98b38
NC		 40 * mips.h (CPU_SB1): New constant.
41
19f7b010
JJ		 422000-10-20 Jakub Jelinek <jakub@redhat.com>
43
44 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
45 Note that '3' is used for siam operand.
46
139368c9
JW		 472000-09-22 Jim Wilson <wilson@cygnus.com>
48
49 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
50
156c2f8b
NC		 512000-09-13 Anders Norlander <anorland@acc.umu.se>
52
53 * mips.h: Use defines instead of hard-coded processor numbers.
54 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
55 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
56 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
57 CPU_4KC, CPU_4KM, CPU_4KP): Define..
58 (OPCODE_IS_MEMBER): Use new defines.
59 (OP_MASK_SEL, OP_SH_SEL): Define.
60 (OP_MASK_CODE20, OP_SH_CODE20): Define.
61 Add 'P' to used characters.
62 Use 'H' for coprocessor select field.
63 Use 'm' for 20 bit breakpoint code.
64 Document new arg characters and add to used characters.
65 (INSN_MIPS32): New define for MIPS32 extensions.
66 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
67
3c5ce02e
AM		 682000-09-05 Alan Modra <alan@linuxcare.com.au>
69
70 * hppa.h: Mention cz completer.
71
50b81f19
JW		 722000-08-16 Jim Wilson <wilson@cygnus.com>
73
74 * ia64.h (IA64_OPCODE_POSTINC): New.
75
fc29466d
L		 762000-08-15 H.J. Lu <hjl@gnu.org>
77
78 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
79 IgnoreSize change.
80
45ee1401
DC		 812000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
82
83 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
84 Move related opcodes closer to each other.
85 Minor changes in comments, list undefined opcodes.
86
9d551405
DB		 872000-07-26 Dave Brolley <brolley@redhat.com>
88
89 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
90
c8488617
HPN		 912000-07-20 Hans-Peter Nilsson <hp@axis.com>
92
93 cris.h: New file.
94
65aa24b6
NC		 952000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
96
97 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
98 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
99 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
100 (AVR_ISA_M83): Define for ATmega83, ATmega85.
101 (espm): Remove, because ESPM removed in databook update.
102 (eicall, eijmp): Move to the end of opcode table.
103
60bcf0fa
NC		 1042000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
105
106 * m68hc11.h: New file for support of Motorola 68hc11.
107
60a2978a
DC		 108Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
109
110 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
111
68ab2dd9
DC		 112Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
113
114 * avr.h: New file with AVR opcodes.
115
f0662e27
DL		 116Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
117
118 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
119
b722f2be
AM		 1202000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
121
122 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
123
f9e0cf0b
AM		 1242000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
125
126 * i386.h: Use sl_FP, not sl_Suf for fild.
127
f660ee8b
FCE		 1282000-05-16 Frank Ch. Eigler <fche@redhat.com>
129
130 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
131 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
132 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
133 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
134
558b0a60
AM		 1352000-05-13 Alan Modra <alan@linuxcare.com.au>,
136
137 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
138
e413e4e9
AM		 1392000-05-13 Alan Modra <alan@linuxcare.com.au>,
140 Alexander Sokolov <robocop@netlink.ru>
141
142 * i386.h (i386_optab): Add cpu_flags for all instructions.
143
1442000-05-13 Alan Modra <alan@linuxcare.com.au>
145
146 From Gavin Romig-Koch <gavin@cygnus.com>
147 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
148
5c84d377
TW		 1492000-05-04 Timothy Wall <twall@cygnus.com>
150
151 * tic54x.h: New.
152
966f959b
C		 1532000-05-03 J.T. Conklin <jtc@redback.com>
154
155 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
156 (PPC_OPERAND_VR): New operand flag for vector registers.
157
c5d05dbb
JL		 1582000-05-01 Kazu Hirata <kazu@hxi.com>
159
160 * h8300.h (EOP): Add missing initializer.
161
a7fba0e0
JL		 162Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
163
164 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
165 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
166 New operand types l,y,&,fe,fE,fx added to support above forms.
167 (pa_opcodes): Replaced usage of 'x' as source/target for
168 floating point double-word loads/stores with 'fx'.
169
800eeca4
JW		 170Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
171 David Mosberger <davidm@hpl.hp.com>
172 Timothy Wall <twall@cygnus.com>
173 Jim Wilson <wilson@cygnus.com>
174
175 * ia64.h: New file.
176
ba23e138
NC		 1772000-03-27 Nick Clifton <nickc@cygnus.com>
178
179 * d30v.h (SHORT_A1): Fix value.
180 (SHORT_AR): Renumber so that it is at the end of the list of short
181 instructions, not the end of the list of long instructions.
182
d0b47220
AM		 1832000-03-26 Alan Modra <alan@linuxcare.com>
184
185 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
186 problem isn't really specific to Unixware.
187 (OLDGCC_COMPAT): Define.
188 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
189 destination %st(0).
190 Fix lots of comments.
191
866afedc
NC		 1922000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
193
194 * d30v.h:
195 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
196 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
197 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
198 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
199 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
200 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
201 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
202
cc5ca5ce
AM		 2032000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
204
205 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
206 fistpd without suffix.
207
68e324a2
NC		 2082000-02-24 Nick Clifton <nickc@cygnus.com>
209
210 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
211 'signed_overflow_ok_p'.
212 Delete prototypes for cgen_set_flags() and cgen_get_flags().
213
60f036a2
AH		 2142000-02-24 Andrew Haley <aph@cygnus.com>
215
216 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
217 (CGEN_CPU_TABLE): flags: new field.
218 Add prototypes for new functions.
219
9b9b5cd4
AM		 2202000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
221
222 * i386.h: Add some more UNIXWARE_COMPAT comments.
223
5b93d8bb
AM		 2242000-02-23 Linas Vepstas <linas@linas.org>
225
226 * i370.h: New file.
227
87f398dd
AH		 2282000-02-22 Andrew Haley <aph@cygnus.com>
229
230 * mips.h: (OPCODE_IS_MEMBER): Add comment.
231
367c01af
AH		 2321999-12-30 Andrew Haley <aph@cygnus.com>
233
9a1e79ca
AH		 234 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
235 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
236 insns.
367c01af 237
add0c677
AM		 2382000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
239
240 * i386.h: Qualify intel mode far call and jmp with x_Suf.
241
3138f287
AM		 2421999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
243
244 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
245 indirect jumps and calls. Add FF/3 call for intel mode.
246
ccecd07b
JL		 247Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
248
249 * mn10300.h: Add new operand types. Add new instruction formats.
250
b37e19e9
JL		 251Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
252
253 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
254 instruction.
255
5fce5ddf
GRK		 2561999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
257
258 * mips.h (INSN_ISA5): New.
259
2bd7f1f3
GRK		 2601999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
261
262 * mips.h (OPCODE_IS_MEMBER): New.
263
4df2b5c5
NC		 2641999-10-29 Nick Clifton <nickc@cygnus.com>
265
266 * d30v.h (SHORT_AR): Define.
267
446a06c9
MM		 2681999-10-18 Michael Meissner <meissner@cygnus.com>
269
270 * alpha.h (alpha_num_opcodes): Convert to unsigned.
271 (alpha_num_operands): Ditto.
272
eca04c6a
JL		 273Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
274
275 * hppa.h (pa_opcodes): Add load and store cache control to
276 instructions. Add ordered access load and store.
277
278 * hppa.h (pa_opcode): Add new entries for addb and addib.
279
280 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
281
282 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
283
c43185de
DN		 284Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
285
286 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
287
ec3533da
JL		 288Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
289
390f858d
JL		 290 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
291 and "be" using completer prefixes.
292
8c47ebd9
JL		 293 * hppa.h (pa_opcodes): Add initializers to silence compiler.
294
ec3533da
JL		 295 * hppa.h: Update comments about character usage.
296
18369bea
JL		 297Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
298
299 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
300 up the new fstw & bve instructions.
301
c36efdd2
JL		 302Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
303
d3ffb032
JL		 304 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
305 instructions.
306
c49ec3da
JL		 307 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
308
5d2e7ecc
JL		 309 * hppa.h (pa_opcodes): Add long offset double word load/store
310 instructions.
311
6397d1a2
JL		 312 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
313 stores.
314
142f0fe0
JL		 315 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
316
f5a68b45
JL		 317 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
318
8235801e
JL		 319 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
320
35184366
JL		 321 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
322
f0bfde5e
JL		 323 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
324
27bbbb58
JL		 325 * hppa.h (pa_opcodes): Add support for "b,l".
326
c36efdd2
JL		 327 * hppa.h (pa_opcodes): Add support for "b,gate".
328
f2727d04
JL		 329Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
330
9392fb11
JL		 331 * hppa.h (pa_opcodes): Use 'fX' for first register operand
332 in xmpyu.
333
e0c52e99
JL		 334 * hppa.h (pa_opcodes): Fix mask for probe and probei.
335
f2727d04
JL		 336 * hppa.h (pa_opcodes): Fix mask for depwi.
337
52d836e2
JL		 338Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
339
340 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
341 an explicit output argument.
342
90765e3a
JL		 343Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
344
345 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
346 Add a few PA2.0 loads and store variants.
347
8340b17f
ILT		 3481999-09-04 Steve Chamberlain <sac@pobox.com>
349
350 * pj.h: New file.
351
5f47d35b
AM		 3521999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
353
354 * i386.h (i386_regtab): Move %st to top of table, and split off
355 other fp reg entries.
356 (i386_float_regtab): To here.
357
1c143202
JL		 358Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
359
7d8fdb64
JL		 360 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
361 by 'f'.
362
90927b9c
JL		 363 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
364 Add supporting args.
365
1d16bf9c
JL		 366 * hppa.h: Document new completers and args.
367 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
368 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
369 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
370 pmenb and pmdis.
371
96226a68
JL		 372 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
373 hshr, hsub, mixh, mixw, permh.
374
5d4ba527
JL		 375 * hppa.h (pa_opcodes): Change completers in instructions to
376 use 'c' prefix.
377
e9fc28c6
JL		 378 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
379 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
380
1c143202
JL		 381 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
382 fnegabs to use 'I' instead of 'F'.
383
9e525108
AM		 3841999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
385
386 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
387 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
388 Alphabetically sort PIII insns.
389
e8da1bf1
DE		 390Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
391
392 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
393
7d627258
JL		 394Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
395
5696871a
JL		 396 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
397 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
398
7d627258
JL		 399 * hppa.h: Document 64 bit condition completers.
400
c5e52916
JL		 401Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
402
403 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
404
eecb386c
AM		 4051999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
406
407 * i386.h (i386_optab): Add DefaultSize modifier to all insns
408 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
409 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
410
88a380f3
JL		 411Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
412 Jeff Law <law@cygnus.com>
413
414 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
415
416 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 417
418 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
419 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
420
145cf1f0
AM		 4211999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
422
423 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
424
73826640
JL		 425Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
426
427 * hppa.h (struct pa_opcode): Add new field "flags".
428 (FLAGS_STRICT): Define.
429
b65db252
JL		 430Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
431 Jeff Law <law@cygnus.com>
432
f7fc668b
JL		 433 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
434
435 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 436
10084519
AM		 4371999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
438
439 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
440 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
441 flag to fcomi and friends.
442
cd8a80ba
JL		 443Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
444
445 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
446 integer logical instructions.
447
1fca749b
ILT		 4481999-05-28 Linus Nordberg <linus.nordberg@canit.se>
449
450 * m68k.h: Document new formats `E', `G', `H' and new places `N',
451 `n', `o'.
452
453 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
454 and new places `m', `M', `h'.
455
aa008907
JL		 456Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
457
458 * hppa.h (pa_opcodes): Add several processor specific system
459 instructions.
460
e26b85f0
JL		 461Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
462
463 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
464 "addb", and "addib" to be used by the disassembler.
465
c608c12e
AM		 4661999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
467
468 * i386.h (ReverseModrm): Remove all occurences.
469 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
470 movmskps, pextrw, pmovmskb, maskmovq.
471 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
472 ignore the data size prefix.
473
474 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
475 Mostly stolen from Doug Ledford <dledford@redhat.com>
476
45c18104
RH		 477Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
478
479 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
480
252b5132
RH		 4811999-04-14 Doug Evans <devans@casey.cygnus.com>
482
483 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
484 (CGEN_ATTR_TYPE): Update.
485 (CGEN_ATTR_MASK): Number booleans starting at 0.
486 (CGEN_ATTR_VALUE): Update.
487 (CGEN_INSN_ATTR): Update.
488
489Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
490
491 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
492 instructions.
493
494Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
495
496 * hppa.h (bb, bvb): Tweak opcode/mask.
497
498
4991999-03-22 Doug Evans <devans@casey.cygnus.com>
500
501 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
502 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
503 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
504 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
505 Delete member max_insn_size.
506 (enum cgen_cpu_open_arg): New enum.
507 (cpu_open): Update prototype.
508 (cpu_open_1): Declare.
509 (cgen_set_cpu): Delete.
510
5111999-03-11 Doug Evans <devans@casey.cygnus.com>
512
513 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
514 (CGEN_OPERAND_NIL): New macro.
515 (CGEN_OPERAND): New member `type'.
516 (@arch@_cgen_operand_table): Delete decl.
517 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
518 (CGEN_OPERAND_TABLE): New struct.
519 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
520 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
521 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
522 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
523 {get,set}_{int,vma}_operand.
524 (@arch@_cgen_cpu_open): New arg `isa'.
525 (cgen_set_cpu): Ditto.
526
527Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
528
529 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
530
5311999-02-25 Doug Evans <devans@casey.cygnus.com>
532
533 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
534 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
535 enum cgen_hw_type.
536 (CGEN_HW_TABLE): New struct.
537 (hw_table): Delete declaration.
538 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
539 to table entry to enum.
540 (CGEN_OPINST): Ditto.
541 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
542
543Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
544
545 * alpha.h (AXP_OPCODE_EV6): New.
546 (AXP_OPCODE_NOPAL): Include it.
547
5481999-02-09 Doug Evans <devans@casey.cygnus.com>
549
550 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
551 All uses updated. New members int_insn_p, max_insn_size,
552 parse_operand,insert_operand,extract_operand,print_operand,
553 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
554 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
555 extract_handlers,print_handlers.
556 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
557 (CGEN_ATTR_BOOL_OFFSET): New macro.
558 (CGEN_ATTR_MASK): Subtract it to compute bit number.
559 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
560 (cgen_opcode_handler): Renamed from cgen_base.
561 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
562 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
563 all uses updated.
564 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
565 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
566 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
567 (CGEN_OPCODE,CGEN_IBASE): New types.
568 (CGEN_INSN): Rewrite.
569 (CGEN_{ASM,DIS}_HASH*): Delete.
570 (init_opcode_table,init_ibld_table): Declare.
571 (CGEN_INSN_ATTR): New type.
572
573Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
574
575 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
576 (x_FP, d_FP, dls_FP, sldx_FP): Define.
577 Change *Suf definitions to include x and d suffixes.
578 (movsx): Use w_Suf and b_Suf.
579 (movzx): Likewise.
580 (movs): Use bwld_Suf.
581 (fld): Change ordering. Use sld_FP.
582 (fild): Add Intel Syntax equivalent of fildq.
583 (fst): Use sld_FP.
584 (fist): Use sld_FP.
585 (fstp): Use sld_FP. Add x_FP version.
586 (fistp): LLongMem version for Intel Syntax.
587 (fcom, fcomp): Use sld_FP.
588 (fadd, fiadd, fsub): Use sld_FP.
589 (fsubr): Use sld_FP.
590 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
591
5921999-01-27 Doug Evans <devans@casey.cygnus.com>
593
594 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
595 CGEN_MODE_UINT.
596
597Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
598
599 * hppa.h (bv): Fix mask.
600
6011999-01-05 Doug Evans <devans@casey.cygnus.com>
602
603 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
604 (CGEN_ATTR): Use it.
605 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
606 (CGEN_ATTR_TABLE): New member dfault.
607
6081998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
609
610 * mips.h (MIPS16_INSN_BRANCH): New.
611
612Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
613
614 The following is part of a change made by Edith Epstein
615 <eepstein@sophia.cygnus.com> as part of a project to merge in
616 changes by HP; HP did not create ChangeLog entries.
617
618 * hppa.h (completer_chars): list of chars to not put a space
619 after.
620
621Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
622
623 * i386.h (i386_optab): Permit w suffix on processor control and
624 status word instructions.
625
6261998-11-30 Doug Evans <devans@casey.cygnus.com>
627
628 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
629 (struct cgen_keyword_entry): Ditto.
630 (struct cgen_operand): Ditto.
631 (CGEN_IFLD): New typedef, with associated access macros.
632 (CGEN_IFMT): New typedef, with associated access macros.
633 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
634 (CGEN_IVALUE): New typedef.
635 (struct cgen_insn): Delete const on syntax,attrs members.
636 `format' now points to format data. Type of `value' is now
637 CGEN_IVALUE.
638 (struct cgen_opcode_table): New member ifld_table.
639
6401998-11-18 Doug Evans <devans@casey.cygnus.com>
641
642 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
643 (CGEN_OPERAND_INSTANCE): New member `attrs'.
644 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
645 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
646 (cgen_opcode_table): Update type of dis_hash fn.
647 (extract_operand): Update type of `insn_value' arg.
648
649Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
650
651 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
652
653Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
654
655 * mips.h (INSN_MULT): Added.
656
657Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
658
659 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
660
661Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
662
663 * cgen.h (CGEN_INSN_INT): New typedef.
664 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
665 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
666 (CGEN_INSN_BYTES_PTR): New typedef.
667 (CGEN_EXTRACT_INFO): New typedef.
668 (cgen_insert_fn,cgen_extract_fn): Update.
669 (cgen_opcode_table): New member `insn_endian'.
670 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
671 (insert_operand,extract_operand): Update.
672 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
673
674Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
675
676 * cgen.h (CGEN_ATTR_BOOLS): New macro.
677 (struct CGEN_HW_ENTRY): New member `attrs'.
678 (CGEN_HW_ATTR): New macro.
679 (struct CGEN_OPERAND_INSTANCE): New member `name'.
680 (CGEN_INSN_INVALID_P): New macro.
681
682Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
683
684 * hppa.h: Add "fid".
685
686Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
687
688 From Robert Andrew Dale <rob@nb.net>
689 * i386.h (i386_optab): Add AMD 3DNow! instructions.
690 (AMD_3DNOW_OPCODE): Define.
691
692Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
693
694 * d30v.h (EITHER_BUT_PREFER_MU): Define.
695
696Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
697
698 * cgen.h (cgen_insn): #if 0 out element `cdx'.
699
700Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
701
702 Move all global state data into opcode table struct, and treat
703 opcode table as something that is "opened/closed".
704 * cgen.h (CGEN_OPCODE_DESC): New type.
705 (all fns): New first arg of opcode table descriptor.
706 (cgen_set_parse_operand_fn): Add prototype.
707 (cgen_current_machine,cgen_current_endian): Delete.
708 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
709 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
710 dis_hash_table,dis_hash_table_entries.
711 (opcode_open,opcode_close): Add prototypes.
712
713 * cgen.h (cgen_insn): New element `cdx'.
714
715Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
716
717 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
718
719Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
720
721 * mn10300.h: Add "no_match_operands" field for instructions.
722 (MN10300_MAX_OPERANDS): Define.
723
724Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
725
726 * cgen.h (cgen_macro_insn_count): Declare.
727
728Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
729
730 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
731 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
732 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
733 set_{int,vma}_operand.
734
735Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
736
737 * mn10300.h: Add "machine" field for instructions.
738 (MN103, AM30): Define machine types.
739
740Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
741
742 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
743
7441998-06-18 Ulrich Drepper <drepper@cygnus.com>
745
746 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
747
748Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
749
750 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
751 and ud2b.
752 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
753 those that happen to be implemented on pentiums.
754
755Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
756
757 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
758 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
759 with Size16|IgnoreSize or Size32|IgnoreSize.
760
761Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
762
763 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
764 (REPE): Rename to REPE_PREFIX_OPCODE.
765 (i386_regtab_end): Remove.
766 (i386_prefixtab, i386_prefixtab_end): Remove.
767 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
768 of md_begin.
769 (MAX_OPCODE_SIZE): Define.
770 (i386_optab_end): Remove.
771 (sl_Suf): Define.
772 (sl_FP): Use sl_Suf.
773
774 * i386.h (i386_optab): Allow 16 bit displacement for `mov
775 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
776 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
777 data32, dword, and adword prefixes.
778 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
779 regs.
780
781Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
782
783 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
784
785 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
786 register operands, because this is a common idiom. Flag them with
787 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
788 fdivrp because gcc erroneously generates them. Also flag with a
789 warning.
790
791 * i386.h: Add suffix modifiers to most insns, and tighter operand
792 checks in some cases. Fix a number of UnixWare compatibility
793 issues with float insns. Merge some floating point opcodes, using
794 new FloatMF modifier.
795 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
796 consistency.
797
798 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
799 IgnoreDataSize where appropriate.
800
801Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
802
803 * i386.h: (one_byte_segment_defaults): Remove.
804 (two_byte_segment_defaults): Remove.
805 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
806
807Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
808
809 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
810 (cgen_hw_lookup_by_num): Declare.
811
812Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
813
814 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
815 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
816
817Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
818
819 * cgen.h (cgen_asm_init_parse): Delete.
820 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
821 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
822
823Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
824
825 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
826 (cgen_asm_finish_insn): Update prototype.
827 (cgen_insn): New members num, data.
828 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
829 dis_hash, dis_hash_table_size moved to ...
830 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
831 All uses updated. New members asm_hash_p, dis_hash_p.
832 (CGEN_MINSN_EXPANSION): New struct.
833 (cgen_expand_macro_insn): Declare.
834 (cgen_macro_insn_count): Declare.
835 (get_insn_operands): Update prototype.
836 (lookup_get_insn_operands): Declare.
837
838Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
839
840 * i386.h (i386_optab): Change iclrKludge and imulKludge to
841 regKludge. Add operands types for string instructions.
842
843Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
844
845 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
846 table.
847
848Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
849
850 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
851 for `gettext'.
852
853Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
854
855 * i386.h: Remove NoModrm flag from all insns: it's never checked.
856 Add IsString flag to string instructions.
857 (IS_STRING): Don't define.
858 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
859 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
860 (SS_PREFIX_OPCODE): Define.
861
862Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
863
864 * i386.h: Revert March 24 patch; no more LinearAddress.
865
866Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
867
868 * i386.h (i386_optab): Remove fwait (9b) from all floating point
869 instructions, and instead add FWait opcode modifier. Add short
870 form of fldenv and fstenv.
871 (FWAIT_OPCODE): Define.
872
873 * i386.h (i386_optab): Change second operand constraint of `mov
874 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
875 allow legal instructions such as `movl %gs,%esi'
876
877Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
878
879 * h8300.h: Various changes to fully bracket initializers.
880
881Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
882
883 * i386.h: Set LinearAddress for lidt and lgdt.
884
885Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
886
887 * cgen.h (CGEN_BOOL_ATTR): New macro.
888
889Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
890
891 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
892
893Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
894
895 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
896 (cgen_insn): Record syntax and format entries here, rather than
897 separately.
898
899Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
900
901 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
902
903Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
904
905 * cgen.h (cgen_insert_fn): Change type of result to const char *.
906 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
907 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
908
909Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
910
911 * cgen.h (lookup_insn): New argument alias_p.
912
913Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
914
915Fix rac to accept only a0:
916 * d10v.h (OPERAND_ACC): Split into:
917 (OPERAND_ACC0, OPERAND_ACC1) .
918 (OPERAND_GPR): Define.
919
920Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
921
922 * cgen.h (CGEN_FIELDS): Define here.
923 (CGEN_HW_ENTRY): New member `type'.
924 (hw_list): Delete decl.
925 (enum cgen_mode): Declare.
926 (CGEN_OPERAND): New member `hw'.
927 (enum cgen_operand_instance_type): Declare.
928 (CGEN_OPERAND_INSTANCE): New type.
929 (CGEN_INSN): New member `operands'.
930 (CGEN_OPCODE_DATA): Make hw_list const.
931 (get_insn_operands,lookup_insn): Add prototypes for.
932
933Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
934
935 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
936 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
937 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
938 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
939
940Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
941
942 * cgen.h: Correct typo in comment end marker.
943
944Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
945
946 * tic30.h: New file.
947
948Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
949
950 * cgen.h: Add prototypes for cgen_save_fixups(),
951 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
952 of cgen_asm_finish_insn() to return a char *.
953
954Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
955
956 * cgen.h: Formatting changes to improve readability.
957
958Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
959
960 * cgen.h (*): Clean up pass over `struct foo' usage.
961 (CGEN_ATTR): Make unsigned char.
962 (CGEN_ATTR_TYPE): Update.
963 (CGEN_ATTR_{ENTRY,TABLE}): New types.
964 (cgen_base): Move member `attrs' to cgen_insn.
965 (CGEN_KEYWORD): New member `null_entry'.
966 (CGEN_{SYNTAX,FORMAT}): New types.
967 (cgen_insn): Format and syntax separated from each other.
968
969Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
970
971 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
972 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
973 flags_{used,set} long.
974 (d30v_operand): Make flags field long.
975
976Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
977
978 * m68k.h: Fix comment describing operand types.
979
980Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
981
982 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
983 everything else after down.
984
985Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
986
987 * d10v.h (OPERAND_FLAG): Split into:
988 (OPERAND_FFLAG, OPERAND_CFLAG) .
989
990Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
991
992 * mips.h (struct mips_opcode): Changed comments to reflect new
993 field usage.
994
995Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
996
997 * mips.h: Added to comments a quick-ref list of all assigned
998 operand type characters.
999 (OP_{MASK,SH}_PERFREG): New macros.
1000
1001Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1002
1003 * sparc.h: Add '_' and '/' for v9a asr's.
1004 Patch from David Miller <davem@vger.rutgers.edu>
1005
1006Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1007
1008 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1009 area are not available in the base model (H8/300).
1010
1011Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1012
1013 * m68k.h: Remove documentation of ` operand specifier.
1014
1015Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1016
1017 * m68k.h: Document q and v operand specifiers.
1018
1019Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1020
1021 * v850.h (struct v850_opcode): Add processors field.
1022 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1023 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1024 (PROCESSOR_V850EA): New bit constants.
1025
1026Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1027
1028 Merge changes from Martin Hunt:
1029
1030 * d30v.h: Allow up to 64 control registers. Add
1031 SHORT_A5S format.
1032
1033 * d30v.h (LONG_Db): New form for delayed branches.
1034
1035 * d30v.h: (LONG_Db): New form for repeati.
1036
1037 * d30v.h (SHORT_D2B): New form.
1038
1039 * d30v.h (SHORT_A2): New form.
1040
1041 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1042 registers are used. Needed for VLIW optimization.
1043
1044Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1045
1046 * cgen.h: Move assembler interface section
1047 up so cgen_parse_operand_result is defined for cgen_parse_address.
1048 (cgen_parse_address): Update prototype.
1049
1050Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1051
1052 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1053
1054Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1055
1056 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1057 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1058 <paubert@iram.es>.
1059
1060 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1061 <paubert@iram.es>.
1062
1063 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1064 <paubert@iram.es>.
1065
1066 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1067 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1068
1069Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1070
1071 * v850.h (V850_NOT_R0): New flag.
1072
1073Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1074
1075 * v850.h (struct v850_opcode): Remove flags field.
1076
1077Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1078
1079 * v850.h (struct v850_opcode): Add flags field.
1080 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1081 fields.
1082 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1083 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1084
1085Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1086
1087 * arc.h: New file.
1088
1089Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1090
1091 * sparc.h (sparc_opcodes): Declare as const.
1092
1093Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1094
1095 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1096 uses single or double precision floating point resources.
1097 (INSN_NO_ISA, INSN_ISA1): Define.
1098 (cpu specific INSN macros): Tweak into bitmasks outside the range
1099 of INSN_ISA field.
1100
1101Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1102
1103 * i386.h: Fix pand opcode.
1104
1105Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1106
1107 * mips.h: Widen INSN_ISA and move it to a more convenient
1108 bit position. Add INSN_3900.
1109
1110Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1111
1112 * mips.h (struct mips_opcode): added new field membership.
1113
1114Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1115
1116 * i386.h (movd): only Reg32 is allowed.
1117
1118 * i386.h: add fcomp and ud2. From Wayne Scott
1119 <wscott@ichips.intel.com>.
1120
1121Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1122
1123 * i386.h: Add MMX instructions.
1124
1125Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1126
1127 * i386.h: Remove W modifier from conditional move instructions.
1128
1129Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1130
1131 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1132 with no arguments to match that generated by the UnixWare
1133 assembler.
1134
1135Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1136
1137 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1138 (cgen_parse_operand_fn): Declare.
1139 (cgen_init_parse_operand): Declare.
1140 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1141 new argument `want'.
1142 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1143 (enum cgen_parse_operand_type): New enum.
1144
1145Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1146
1147 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1148
1149Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1150
1151 * cgen.h: New file.
1152
1153Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1154
1155 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1156 fdivrp.
1157
1158Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1159
1160 * v850.h (extract): Make unsigned.
1161
1162Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1163
1164 * i386.h: Add iclr.
1165
1166Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1167
1168 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1169 take a direction bit.
1170
1171Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1172
1173 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1174
1175Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1176
1177 * sparc.h: Include <ansidecl.h>. Update function declarations to
1178 use prototypes, and to use const when appropriate.
1179
1180Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1181
1182 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1183
1184Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1185
1186 * d10v.h: Change pre_defined_registers to
1187 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1188
1189Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1190
1191 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1192 Change mips_opcodes from const array to a pointer,
1193 and change bfd_mips_num_opcodes from const int to int,
1194 so that we can increase the size of the mips opcodes table
1195 dynamically.
1196
1197Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1198
1199 * d30v.h (FLAG_X): Remove unused flag.
1200
1201Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1202
1203 * d30v.h: New file.
1204
1205Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1206
1207 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1208 (PDS_VALUE): Macro to access value field of predefined symbols.
1209 (tic80_next_predefined_symbol): Add prototype.
1210
1211Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1212
1213 * tic80.h (tic80_symbol_to_value): Change prototype to match
1214 change in function, added class parameter.
1215
1216Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1217
1218 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1219 endmask fields, which are somewhat weird in that 0 and 32 are
1220 treated exactly the same.
1221
1222Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1223
1224 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1225 rather than a constant that is 2**X. Reorder them to put bits for
1226 operands that have symbolic names in the upper bits, so they can
1227 be packed into an int where the lower bits contain the value that
1228 corresponds to that symbolic name.
1229 (predefined_symbo): Add struct.
1230 (tic80_predefined_symbols): Declare array of translations.
1231 (tic80_num_predefined_symbols): Declare size of that array.
1232 (tic80_value_to_symbol): Declare function.
1233 (tic80_symbol_to_value): Declare function.
1234
1235Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1236
1237 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1238
1239Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1240
1241 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1242 be the destination register.
1243
1244Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1245
1246 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1247 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1248 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1249 that the opcode can have two vector instructions in a single
1250 32 bit word and we have to encode/decode both.
1251
1252Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1253
1254 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1255 TIC80_OPERAND_RELATIVE for PC relative.
1256 (TIC80_OPERAND_BASEREL): New flag bit for register
1257 base relative.
1258
1259Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1260
1261 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1262
1263Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1264
1265 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1266 ":s" modifier for scaling.
1267
1268Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1269
1270 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1271 (TIC80_OPERAND_M_LI): Ditto
1272
1273Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1274
1275 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1276 (TIC80_OPERAND_CC): New define for condition code operand.
1277 (TIC80_OPERAND_CR): New define for control register operand.
1278
1279Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1280
1281 * tic80.h (struct tic80_opcode): Name changed.
1282 (struct tic80_opcode): Remove format field.
1283 (struct tic80_operand): Add insertion and extraction functions.
1284 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1285 correct ones.
1286 (FMT_*): Ditto.
1287
1288Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1289
1290 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1291 type IV instruction offsets.
1292
1293Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1294
1295 * tic80.h: New file.
1296
1297Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1298
1299 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1300
1301Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1302
1303 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1304 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1305 * v850.h: Fix comment, v850_operand not powerpc_operand.
1306
1307Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1308
1309 * mn10200.h: Flesh out structures and definitions needed by
1310 the mn10200 assembler & disassembler.
1311
1312Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1313
1314 * mips.h: Add mips16 definitions.
1315
1316Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1317
1318 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1319
1320Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1321
1322 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1323 (MN10300_OPERAND_MEMADDR): Define.
1324
1325Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1326
1327 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1328
1329Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1330
1331 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1332
1333Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1334
1335 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1336
1337Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1338
1339 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1340
1341Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1342
1343 * alpha.h: Don't include "bfd.h"; private relocation types are now
1344 negative to minimize problems with shared libraries. Organize
1345 instruction subsets by AMASK extensions and PALcode
1346 implementation.
1347 (struct alpha_operand): Move flags slot for better packing.
1348
1349Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1350
1351 * v850.h (V850_OPERAND_RELAX): New operand flag.
1352
1353Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1354
1355 * mn10300.h (FMT_*): Move operand format definitions
1356 here.
1357
1358Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1359
1360 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1361
1362Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1363
1364 * mn10300.h (mn10300_opcode): Add "format" field.
1365 (MN10300_OPERAND_*): Define.
1366
1367Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1368
1369 * mn10x00.h: Delete.
1370 * mn10200.h, mn10300.h: New files.
1371
1372Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1373
1374 * mn10x00.h: New file.
1375
1376Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1377
1378 * v850.h: Add new flag to indicate this instruction uses a PC
1379 displacement.
1380
1381Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1382
1383 * h8300.h (stmac): Add missing instruction.
1384
1385Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1386
1387 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1388 field.
1389
1390Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1391
1392 * v850.h (V850_OPERAND_EP): Define.
1393
1394 * v850.h (v850_opcode): Add size field.
1395
1396Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1397
1398 * v850.h (v850_operands): Add insert and extract fields, pointers
1399 to functions used to handle unusual operand encoding.
1400 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1401 V850_OPERAND_SIGNED): Defined.
1402
1403Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1404
1405 * v850.h (v850_operands): Add flags field.
1406 (OPERAND_REG, OPERAND_NUM): Defined.
1407
1408Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1409
1410 * v850.h: New file.
1411
1412Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1413
1414 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1415 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1416 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1417 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1418 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1419 Defined.
1420
1421Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1422
1423 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1424 a 3 bit space id instead of a 2 bit space id.
1425
1426Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1427
1428 * d10v.h: Add some additional defines to support the
1429 assembler in determining which operations can be done in parallel.
1430
1431Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1432
1433 * h8300.h (SN): Define.
1434 (eepmov.b): Renamed from "eepmov"
1435 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1436 with them.
1437
1438Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1439
1440 * d10v.h (OPERAND_SHIFT): New operand flag.
1441
1442Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1443
1444 * d10v.h: Changes for divs, parallel-only instructions, and
1445 signed numbers.
1446
1447Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1448
1449 * d10v.h (pd_reg): Define. Putting the definition here allows
1450 the assembler and disassembler to share the same struct.
1451
1452Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1453
1454 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1455 Williams <steve@icarus.com>.
1456
1457Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1458
1459 * d10v.h: New file.
1460
1461Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1462
1463 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1464
1465Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1466
1467 * m68k.h (mcf5200): New macro.
1468 Document names of coldfire control registers.
1469
1470Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1471
1472 * h8300.h (SRC_IN_DST): Define.
1473
1474 * h8300.h (UNOP3): Mark the register operand in this insn
1475 as a source operand, not a destination operand.
1476 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1477 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1478 register operand with SRC_IN_DST.
1479
1480Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1481
1482 * alpha.h: New file.
1483
1484Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1485
1486 * rs6k.h: Remove obsolete file.
1487
1488Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1489
1490 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1491 fdivp, and fdivrp. Add ffreep.
1492
1493Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1494
1495 * h8300.h: Reorder various #defines for readability.
1496 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1497 (BITOP): Accept additional (unused) argument. All callers changed.
1498 (EBITOP): Likewise.
1499 (O_LAST): Bump.
1500 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1501
1502 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1503 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1504 (BITOP, EBITOP): Handle new H8/S addressing modes for
1505 bit insns.
1506 (UNOP3): Handle new shift/rotate insns on the H8/S.
1507 (insns using exr): New instructions.
1508 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1509
1510Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1511
1512 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1513 was incorrect.
1514
1515Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1516
1517 * h8300.h (START): Remove.
1518 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1519 and mov.l insns that can be relaxed.
1520
1521Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1522
1523 * i386.h: Remove Abs32 from lcall.
1524
1525Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1526
1527 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1528 (SLCPOP): New macro.
1529 Mark X,Y opcode letters as in use.
1530
1531Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1532
1533 * sparc.h (F_FLOAT, F_FBR): Define.
1534
1535Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1536
1537 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1538 from all insns.
1539 (ABS8SRC,ABS8DST): Add ABS8MEM.
1540 (add.l): Fix reg+reg variant.
1541 (eepmov.w): Renamed from eepmovw.
1542 (ldc,stc): Fix many cases.
1543
1544Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1545
1546 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1547
1548Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1549
1550 * sparc.h (O): Mark operand letter as in use.
1551
1552Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1553
1554 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1555 Mark operand letters uU as in use.
1556
1557Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1558
1559 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1560 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1561 (SPARC_OPCODE_SUPPORTED): New macro.
1562 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1563 (F_NOTV9): Delete.
1564
1565Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1566
1567 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1568 declaration consistent with return type in definition.
1569
1570Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1571
1572 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1573
1574Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1575
1576 * i386.h (i386_regtab): Add 80486 test registers.
1577
1578Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1579
1580 * i960.h (I_HX): Define.
1581 (i960_opcodes): Add HX instruction.
1582
1583Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1584
1585 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1586 and fclex.
1587
1588Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1589
1590 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1591 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1592 (bfd_* defines): Delete.
1593 (sparc_opcode_archs): Replaces architecture_pname.
1594 (sparc_opcode_lookup_arch): Declare.
1595 (NUMOPCODES): Delete.
1596
1597Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1598
1599 * sparc.h (enum sparc_architecture): Add v9a.
1600 (ARCHITECTURES_CONFLICT_P): Update.
1601
1602Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1603
1604 * i386.h: Added Pentium Pro instructions.
1605
1606Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1607
1608 * m68k.h: Document new 'W' operand place.
1609
1610Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1611
1612 * hppa.h: Add lci and syncdma instructions.
1613
1614Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1615
1616 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1617 instructions.
1618
1619Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1620
1621 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1622 assembler's -mcom and -many switches.
1623
1624Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1625
1626 * i386.h: Fix cmpxchg8b extension opcode description.
1627
1628Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1629
1630 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1631 and register cr4.
1632
1633Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1634
1635 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1636
1637Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1638
1639 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1640
1641Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1642
1643 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1644
1645Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1646
1647 * m68kmri.h: Remove.
1648
1649 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1650 declarations. Remove F_ALIAS and flag field of struct
1651 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1652 int. Make name and args fields of struct m68k_opcode const.
1653
1654Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1655
1656 * sparc.h (F_NOTV9): Define.
1657
1658Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1659
1660 * mips.h (INSN_4010): Define.
1661
1662Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1663
1664 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1665
1666 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1667 * m68k.h: Fix argument descriptions of coprocessor
1668 instructions to allow only alterable operands where appropriate.
1669 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1670 (m68k_opcode_aliases): Add more aliases.
1671
1672Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1673
1674 * m68k.h: Added explcitly short-sized conditional branches, and a
1675 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1676 svr4-based configurations.
1677
1678Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1679
1680 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1681 * i386.h: added missing Data16/Data32 flags to a few instructions.
1682
1683Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1684
1685 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1686 (OP_MASK_BCC, OP_SH_BCC): Define.
1687 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1688 (OP_MASK_CCC, OP_SH_CCC): Define.
1689 (INSN_READ_FPR_R): Define.
1690 (INSN_RFE): Delete.
1691
1692Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1693
1694 * m68k.h (enum m68k_architecture): Deleted.
1695 (struct m68k_opcode_alias): New type.
1696 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1697 matching constraints, values and flags. As a side effect of this,
1698 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1699 as I know were never used, now may need re-examining.
1700 (numopcodes): Now const.
1701 (m68k_opcode_aliases, numaliases): New variables.
1702 (endop): Deleted.
1703 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1704 m68k_opcode_aliases; update declaration of m68k_opcodes.
1705
1706Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1707
1708 * hppa.h (delay_type): Delete unused enumeration.
1709 (pa_opcode): Replace unused delayed field with an architecture
1710 field.
1711 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1712
1713Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1714
1715 * mips.h (INSN_ISA4): Define.
1716
1717Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1718
1719 * mips.h (M_DLA_AB, M_DLI): Define.
1720
1721Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1722
1723 * hppa.h (fstwx): Fix single-bit error.
1724
1725Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1726
1727 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1728
1729Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1730
1731 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1732 debug registers. From Charles Hannum (mycroft@netbsd.org).
1733
1734Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1735
1736 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1737 i386 support:
1738 * i386.h (MOV_AX_DISP32): New macro.
1739 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1740 of several call/return instructions.
1741 (ADDR_PREFIX_OPCODE): New macro.
1742
1743Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1744
1745 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1746
1747 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1748 it pointer to const char;
1749 (struct vot, field `name'): ditto.
1750
1751Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1752
1753 * vax.h: Supply and properly group all values in end sentinel.
1754
1755Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1756
1757 * mips.h (INSN_ISA, INSN_4650): Define.
1758
1759Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1760
1761 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1762 systems with a separate instruction and data cache, such as the
1763 29040, these instructions take an optional argument.
1764
1765Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1766
1767 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1768 INSN_TRAP.
1769
1770Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1771
1772 * mips.h (INSN_STORE_MEMORY): Define.
1773
1774Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1775
1776 * sparc.h: Document new operand type 'x'.
1777
1778Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1779
1780 * i960.h (I_CX2): New instruction category. It includes
1781 instructions available on Cx and Jx processors.
1782 (I_JX): New instruction category, for JX-only instructions.
1783 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1784 Jx-only instructions, in I_JX category.
1785
1786Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1787
1788 * ns32k.h (endop): Made pointer const too.
1789
1790Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1791
1792 * ns32k.h: Drop Q operand type as there is no correct use
1793 for it. Add I and Z operand types which allow better checking.
1794
1795Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1796
1797 * h8300.h (xor.l) :fix bit pattern.
1798 (L_2): New size of operand.
1799 (trapa): Use it.
1800
1801Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1802
1803 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1804
1805Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1806
1807 * sparc.h: Include v9 definitions.
1808
1809Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1810
1811 * m68k.h (m68060): Defined.
1812 (m68040up, mfloat, mmmu): Include it.
1813 (struct m68k_opcode): Widen `arch' field.
1814 (m68k_opcodes): Updated for M68060. Removed comments that were
1815 instructions commented out by "JF" years ago.
1816
1817Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1818
1819 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1820 add a one-bit `flags' field.
1821 (F_ALIAS): New macro.
1822
1823Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1824
1825 * h8300.h (dec, inc): Get encoding right.
1826
1827Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1828
1829 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1830 a flag instead.
1831 (PPC_OPERAND_SIGNED): Define.
1832 (PPC_OPERAND_SIGNOPT): Define.
1833
1834Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1835
1836 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1837 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1838
1839Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1840
1841 * i386.h: Reverse last change. It'll be handled in gas instead.
1842
1843Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1844
1845 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1846 slower on the 486 and used the implicit shift count despite the
1847 explicit operand. The one-operand form is still available to get
1848 the shorter form with the implicit shift count.
1849
1850Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1851
1852 * hppa.h: Fix typo in fstws arg string.
1853
1854Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1855
1856 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1857
1858Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1859
1860 * ppc.h (PPC_OPCODE_601): Define.
1861
1862Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1863
1864 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1865 (so we can determine valid completers for both addb and addb[tf].)
1866
1867 * hppa.h (xmpyu): No floating point format specifier for the
1868 xmpyu instruction.
1869
1870Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1871
1872 * ppc.h (PPC_OPERAND_NEXT): Define.
1873 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1874 (struct powerpc_macro): Define.
1875 (powerpc_macros, powerpc_num_macros): Declare.
1876
1877Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1878
1879 * ppc.h: New file. Header file for PowerPC opcode table.
1880
1881Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1882
1883 * hppa.h: More minor template fixes for sfu and copr (to allow
1884 for easier disassembly).
1885
1886 * hppa.h: Fix templates for all the sfu and copr instructions.
1887
1888Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1889
1890 * i386.h (push): Permit Imm16 operand too.
1891
1892Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1893
1894 * h8300.h (andc): Exists in base arch.
1895
1896Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1897
1898 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1899 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1900
1901Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1902
1903 * hppa.h: Add FP quadword store instructions.
1904
1905Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1906
1907 * mips.h: (M_J_A): Added.
1908 (M_LA): Removed.
1909
1910Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1911
1912 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1913 <mellon@pepper.ncd.com>.
1914
1915Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1916
1917 * hppa.h: Immediate field in probei instructions is unsigned,
1918 not low-sign extended.
1919
1920Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1921
1922 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1923
1924Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1925
1926 * i386.h: Add "fxch" without operand.
1927
1928Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1929
1930 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1931
1932Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1933
1934 * hppa.h: Add gfw and gfr to the opcode table.
1935
1936Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1937
1938 * m88k.h: extended to handle m88110.
1939
1940Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1941
1942 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1943 addresses.
1944
1945Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1946
1947 * i960.h (i960_opcodes): Properly bracket initializers.
1948
1949Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1950
1951 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1952
1953Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1954
1955 * m68k.h (two): Protect second argument with parentheses.
1956
1957Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1958
1959 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1960 Deleted old in/out instructions in "#if 0" section.
1961
1962Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1963
1964 * i386.h (i386_optab): Properly bracket initializers.
1965
1966Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1967
1968 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1969 Jeff Law, law@cs.utah.edu).
1970
1971Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1972
1973 * i386.h (lcall): Accept Imm32 operand also.
1974
1975Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1976
1977 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1978 (M_DABS): Added.
1979
1980Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1981
1982 * mips.h (INSN_*): Changed values. Removed unused definitions.
1983 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1984 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1985 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1986 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1987 (M_*): Added new values for r6000 and r4000 macros.
1988 (ANY_DELAY): Removed.
1989
1990Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1991
1992 * mips.h: Added M_LI_S and M_LI_SS.
1993
1994Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1995
1996 * h8300.h: Get some rare mov.bs correct.
1997
1998Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1999
2000 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2001 been included.
2002
2003Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2004
2005 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2006 jump instructions, for use in disassemblers.
2007
2008Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2009
2010 * m88k.h: Make bitfields just unsigned, not unsigned long or
2011 unsigned short.
2012
2013Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2014
2015 * hppa.h: New argument type 'y'. Use in various float instructions.
2016
2017Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2018
2019 * hppa.h (break): First immediate field is unsigned.
2020
2021 * hppa.h: Add rfir instruction.
2022
2023Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2024
2025 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2026
2027Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2028
2029 * mips.h: Reworked the hazard information somewhat, and fixed some
2030 bugs in the instruction hazard descriptions.
2031
2032Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2033
2034 * m88k.h: Corrected a couple of opcodes.
2035
2036Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2037
2038 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2039 new version includes instruction hazard information, but is
2040 otherwise reasonably similar.
2041
2042Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2043
2044 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2045
2046Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2047
2048 Patches from Jeff Law, law@cs.utah.edu:
2049 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2050 Make the tables be the same for the following instructions:
2051 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2052 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2053 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2054 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2055 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2056 "fcmp", and "ftest".
2057
2058 * hppa.h: Make new and old tables the same for "break", "mtctl",
2059 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2060 Fix typo in last patch. Collapse several #ifdefs into a
2061 single #ifdef.
2062
2063 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2064 of the comments up-to-date.
2065
2066 * hppa.h: Update "free list" of letters and update
2067 comments describing each letter's function.
2068
2069Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2070
2071 * h8300.h: checkpoint, includes H8/300-H opcodes.
2072
2073Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2074
2075 * Patches from Jeffrey Law <law@cs.utah.edu>.
2076 * hppa.h: Rework single precision FP
2077 instructions so that they correctly disassemble code
2078 PA1.1 code.
2079
2080Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2081
2082 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2083 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2084
2085Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2086
2087 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2088 gdb will define it for now.
2089
2090Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2091
2092 * sparc.h: Don't end enumerator list with comma.
2093
2094Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2095
2096 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2097 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2098 ("bc2t"): Correct typo.
2099 ("[ls]wc[023]"): Use T rather than t.
2100 ("c[0123]"): Define general coprocessor instructions.
2101
2102Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2103
2104 * m68k.h: Move split point for gcc compilation more towards
2105 middle.
2106
2107Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2108
2109 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2110 simply wrong, ics, rfi, & rfsvc were missing).
2111 Add "a" to opr_ext for "bb". Doc fix.
2112
2113Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2114
2115 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2116 * mips.h: Add casts, to suppress warnings about shifting too much.
2117 * m68k.h: Document the placement code '9'.
2118
2119Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2120
2121 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2122 allows callers to break up the large initialized struct full of
2123 opcodes into two half-sized ones. This permits GCC to compile
2124 this module, since it takes exponential space for initializers.
2125 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2126
2127Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2128
2129 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2130 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2131 initialized structs in it.
2132
2133Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2134
2135 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2136 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2137 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2138
2139Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2140
2141 * mips.h: document "i" and "j" operands correctly.
2142
2143Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2144
2145 * mips.h: Removed endianness dependency.
2146
2147Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2148
2149 * h8300.h: include info on number of cycles per instruction.
2150
2151Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2152
2153 * hppa.h: Move handy aliases to the front. Fix masks for extract
2154 and deposit instructions.
2155
2156Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2157
2158 * i386.h: accept shld and shrd both with and without the shift
2159 count argument, which is always %cl.
2160
2161Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2162
2163 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2164 (one_byte_segment_defaults, two_byte_segment_defaults,
2165 i386_prefixtab_end): Ditto.
2166
2167Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2168
2169 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2170 for operand 2; from John Carr, jfc@dsg.dec.com.
2171
2172Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2173
2174 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2175 always use 16-bit offsets. Makes calculated-size jump tables
2176 feasible.
2177
2178Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2179
2180 * i386.h: Fix one-operand forms of in* and out* patterns.
2181
2182Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2183
2184 * m68k.h: Added CPU32 support.
2185
2186Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2187
2188 * mips.h (break): Disassemble the argument. Patch from
2189 jonathan@cs.stanford.edu (Jonathan Stone).
2190
2191Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2192
2193 * m68k.h: merged Motorola and MIT syntax.
2194
2195Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2196
2197 * m68k.h (pmove): make the tests less strict, the 68k book is
2198 wrong.
2199
2200Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2201
2202 * m68k.h (m68ec030): Defined as alias for 68030.
2203 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2204 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2205 them. Tightened description of "fmovex" to distinguish it from
2206 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2207 up descriptions that claimed versions were available for chips not
2208 supporting them. Added "pmovefd".
2209
2210Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2211
2212 * m68k.h: fix where the . goes in divull
2213
2214Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2215
2216 * m68k.h: the cas2 instruction is supposed to be written with
2217 indirection on the last two operands, which can be either data or
2218 address registers. Added a new operand type 'r' which accepts
2219 either register type. Added new cases for cas2l and cas2w which
2220 use them. Corrected masks for cas2 which failed to recognize use
2221 of address register.
2222
2223Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2224
2225 * m68k.h: Merged in patches (mostly m68040-specific) from
2226 Colin Smith <colin@wrs.com>.
2227
2228 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2229 base). Also cleaned up duplicates, re-ordered instructions for
2230 the sake of dis-assembling (so aliases come after standard names).
2231 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2232
2233Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2234
2235 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2236 all missing .s
2237
2238Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2239
2240 * sparc.h: Moved tables to BFD library.
2241
2242 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2243
2244Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2245
2246 * h8300.h: Finish filling in all the holes in the opcode table,
2247 so that the Lucid C compiler can digest this as well...
2248
2249Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2250
2251 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2252 Fix opcodes on various sizes of fild/fist instructions
2253 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2254 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2255
2256Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2257
2258 * h8300.h: Fill in all the holes in the opcode table so that the
2259 losing HPUX C compiler can digest this...
2260
2261Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2262
2263 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2264 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2265
2266Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2267
2268 * sparc.h: Add new architecture variant sparclite; add its scan
2269 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2270
2271Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2272
2273 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2274 fy@lucid.com).
2275
2276Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2277
2278 * rs6k.h: New version from IBM (Metin).
2279
2280Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2281
2282 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2283 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2284
2285Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2286
2287 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2288
2289Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2290
2291 * m68k.h (one, two): Cast macro args to unsigned to suppress
2292 complaints from compiler and lint about integer overflow during
2293 shift.
2294
2295Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2296
2297 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2298
2299Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2300
2301 * mips.h: Make bitfield layout depend on the HOST compiler,
2302 not on the TARGET system.
2303
2304Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2305
2306 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2307 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2308 <TRANLE@INTELLICORP.COM>.
2309
2310Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2311
2312 * h8300.h: turned op_type enum into #define list
2313
2314Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2315
2316 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2317 similar instructions -- they've been renamed to "fitoq", etc.
2318 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2319 number of arguments.
2320 * h8300.h: Remove extra ; which produces compiler warning.
2321
2322Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2323
2324 * sparc.h: fix opcode for tsubcctv.
2325
2326Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2327
2328 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2329
2330Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2331
2332 * sparc.h (nop): Made the 'lose' field be even tighter,
2333 so only a standard 'nop' is disassembled as a nop.
2334
2335Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2336
2337 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2338 disassembled as a nop.
2339
2340Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2341
2342 * sparc.h: fix a typo.
2343
2344Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2345
2346 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2347 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2348 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2349
2350\f
2351Local Variables:
2352version-control: never
2353End:
A mirror of the official binutils-gdb repository