]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - include/opcode/ChangeLog
* ld-sh/sh64/reldl64.rd: Add relocation symbol data in info field.
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
3b16e843
NC
12002-01-31 Ivan Guzvinec <ivang@opencores.org>
2
3 * or32.h: New file.
4
9a2e995d
GH
52002-01-22 Graydon Hoare <graydon@redhat.com>
6
7 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
8 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
9
7b45c6e1
AM
102002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
11
12 * h8300.h: Comment typo fix.
13
a09cf9bd
MG
142002-01-03 matthew green <mrg@redhat.com>
15
16 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
17 (PPC_OPCODE_BOOKE64): Likewise.
18
1befefea
JL
19Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
20
21 * hppa.h (call, ret): Move to end of table.
22 (addb, addib): PA2.0 variants should have been PA2.0W.
23 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
24 happy.
25 (fldw, fldd, fstw, fstd, bb): Likewise.
26 (short loads/stores): Tweak format specifier slightly to keep
27 disassembler happy.
28 (indexed loads/stores): Likewise.
29 (absolute loads/stores): Likewise.
30
124ddbb2
AO
312001-12-04 Alexandre Oliva <aoliva@redhat.com>
32
33 * d10v.h (OPERAND_NOSP): New macro.
34
9b21d49b
AO
352001-11-29 Alexandre Oliva <aoliva@redhat.com>
36
37 * d10v.h (OPERAND_SP): New macro.
38
802a735e
AM
392001-11-15 Alan Modra <amodra@bigpond.net.au>
40
41 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
42
6e917903
TW
432001-11-11 Timothy Wall <twall@alum.mit.edu>
44
45 * tic54x.h: Revise opcode layout; don't really need a separate
46 structure for parallel opcodes.
47
e5470cdc
AM
482001-11-13 Zack Weinberg <zack@codesourcery.com>
49 Alan Modra <amodra@bigpond.net.au>
50
51 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
52 accept WordReg.
53
5d84d93f
CD
542001-11-04 Chris Demetriou <cgd@broadcom.com>
55
56 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
57
3c3bdf30
NC
582001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
59
60 * mmix.h: New file.
61
e4432525
CD
622001-10-18 Chris Demetriou <cgd@broadcom.com>
63
64 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
65 of the expression, to make source code merging easier.
66
8ff529d8
CD
672001-10-17 Chris Demetriou <cgd@broadcom.com>
68
69 * mips.h: Sort coprocessor instruction argument characters
70 in comment, add a few more words of description for "H".
71
2228315b
CD
722001-10-17 Chris Demetriou <cgd@broadcom.com>
73
74 * mips.h (INSN_SB1): New cpu-specific instruction bit.
75 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
76 if cpu is CPU_SB1.
77
f5c120c5
MG
782001-10-17 matthew green <mrg@redhat.com>
79
80 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
81
418c1742
MG
822001-10-12 matthew green <mrg@redhat.com>
83
0716ce0d
MG
84 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
85 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
86 instructions, respectively.
418c1742 87
6ff2f2ba
NC
882001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
89
90 * v850.h: Remove spurious comment.
91
015cf428
NC
922001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
93
94 * h8300.h: Fix compile time warning messages
95
847b8b31
RH
962001-09-04 Richard Henderson <rth@redhat.com>
97
98 * alpha.h (struct alpha_operand): Pack elements into bitfields.
99
a98b9439
EC
1002001-08-31 Eric Christopher <echristo@redhat.com>
101
102 * mips.h: Remove CPU_MIPS32_4K.
103
a6959011
AM
1042001-08-27 Torbjorn Granlund <tege@swox.com>
105
106 * ppc.h (PPC_OPERAND_DS): Define.
107
d83c6548
AJ
1082001-08-25 Andreas Jaeger <aj@suse.de>
109
110 * d30v.h: Fix declaration of reg_name_cnt.
111
112 * d10v.h: Fix declaration of d10v_reg_name_cnt.
113
114 * arc.h: Add prototypes from opcodes/arc-opc.c.
115
99c14723
TS
1162001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
117
118 * mips.h (INSN_10000): Define.
119 (OPCODE_IS_MEMBER): Check for INSN_10000.
120
11b37b7b
AM
1212001-08-10 Alan Modra <amodra@one.net.au>
122
123 * ppc.h: Revert 2001-08-08.
124
3b16e843
NC
1252001-08-10 Richard Sandiford <rsandifo@redhat.com>
126
127 * mips.h (INSN_GP32): Remove.
128 (OPCODE_IS_MEMBER): Remove gp32 parameter.
129 (M_MOVE): New macro identifier.
130
0f1bac05
AM
1312001-08-08 Alan Modra <amodra@one.net.au>
132
133 1999-10-25 Torbjorn Granlund <tege@swox.com>
134 * ppc.h (struct powerpc_operand): New field `reloc'.
135
3b16e843
NC
1362001-08-01 Aldy Hernandez <aldyh@redhat.com>
137
138 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
139
1402001-07-12 Jeff Johnston <jjohnstn@redhat.com>
141
142 * cgen.h (CGEN_INSN): Add regex support.
143 (build_insn_regex): Declare.
144
81f6038f
FCE
1452001-07-11 Frank Ch. Eigler <fche@redhat.com>
146
147 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
148 (cgen_cpu_desc): Ditto.
149
32cfffe3
BE
1502001-07-07 Ben Elliston <bje@redhat.com>
151
152 * m88k.h: Clean up and reformat. Remove unused code.
153
3e890047
GK
1542001-06-14 Geoffrey Keating <geoffk@redhat.com>
155
156 * cgen.h (cgen_keyword): Add nonalpha_chars field.
157
d1cf510e
NC
1582001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
159
160 * mips.h (CPU_R12000): Define.
161
e281c457
JH
1622001-05-23 John Healy <jhealy@redhat.com>
163
164 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 165
aa5f19f2
NC
1662001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
167
168 * mips.h (INSN_ISA_MASK): Define.
169
67d6227d
AM
1702001-05-12 Alan Modra <amodra@one.net.au>
171
172 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
173 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
174 and use InvMem as these insns must have register operands.
175
992aaec9
AM
1762001-05-04 Alan Modra <amodra@one.net.au>
177
178 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
179 and pextrw to swap reg/rm assignments.
180
4ef7f0bf
HPN
1812001-04-05 Hans-Peter Nilsson <hp@axis.com>
182
183 * cris.h (enum cris_insn_version_usage): Correct comment for
184 cris_ver_v3p.
185
0f17484f
AM
1862001-03-24 Alan Modra <alan@linuxcare.com.au>
187
188 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
189 Add InvMem to first operand of "maskmovdqu".
190
7ccb5238
HPN
1912001-03-22 Hans-Peter Nilsson <hp@axis.com>
192
193 * cris.h (ADD_PC_INCR_OPCODE): New macro.
194
361bfa20
KH
1952001-03-21 Kazu Hirata <kazu@hxi.com>
196
197 * h8300.h: Fix formatting.
198
87890af0
AM
1992001-03-22 Alan Modra <alan@linuxcare.com.au>
200
201 * i386.h (i386_optab): Add paddq, psubq.
202
2e98d2de
AM
2032001-03-19 Alan Modra <alan@linuxcare.com.au>
204
205 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
206
80a523c2
NC
2072001-02-28 Igor Shevlyakov <igor@windriver.com>
208
209 * m68k.h: new defines for Coldfire V4. Update mcf to know
210 about mcf5407.
211
e135f41b
NC
2122001-02-18 lars brinkhoff <lars@nocrew.org>
213
214 * pdp11.h: New file.
215
2162001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
217
218 * i386.h (i386_optab): SSE integer converison instructions have
219 64bit versions on x86-64.
220
8eaec934
NC
2212001-02-10 Nick Clifton <nickc@redhat.com>
222
223 * mips.h: Remove extraneous whitespace. Formating change to allow
224 for future contribution.
225
a85d7ed0
NC
2262001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
227
228 * s390.h: New file.
229
0715dc88
PM
2302001-02-02 Patrick Macdonald <patrickm@redhat.com>
231
232 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
233 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
234 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
235
296bc568
AM
2362001-01-24 Karsten Keil <kkeil@suse.de>
237
238 * i386.h (i386_optab): Fix swapgs
239
1328dc98
AM
2402001-01-14 Alan Modra <alan@linuxcare.com.au>
241
242 * hppa.h: Describe new '<' and '>' operand types, and tidy
243 existing comments.
244 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
245 Remove duplicate "ldw j(s,b),x". Sort some entries.
246
e135f41b 2472001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
248
249 * i386.h (i386_optab): Fix pusha and ret templates.
250
0d2bcfaf
NC
2512001-01-11 Peter Targett <peter.targett@arccores.com>
252
253 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
254 definitions for masking cpu type.
255 (arc_ext_operand_value) New structure for storing extended
256 operands.
257 (ARC_OPERAND_*) Flags for operand values.
258
2592001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
260
261 * i386.h (pinsrw): Add.
262 (pshufw): Remove.
263 (cvttpd2dq): Fix operands.
264 (cvttps2dq): Likewise.
265 (movq2q): Rename to movdq2q.
266
079966a8
AM
2672001-01-10 Richard Schaal <richard.schaal@intel.com>
268
269 * i386.h: Correct movnti instruction.
270
8c1f9e76
JJ
2712001-01-09 Jeff Johnston <jjohnstn@redhat.com>
272
273 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
274 of operands (unsigned char or unsigned short).
275 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
276 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
277
0d2bcfaf 2782001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
279
280 * i386.h (i386_optab): Make [sml]fence template to use immext field.
281
0d2bcfaf 2822001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
283
284 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
285 introduced by Pentium4
286
0d2bcfaf 2872000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
288
289 * i386.h (i386_optab): Add "rex*" instructions;
290 add swapgs; disable jmp/call far direct instructions for
291 64bit mode; add syscall and sysret; disable registers for 0xc6
292 template. Add 'q' suffixes to extendable instructions, disable
079966a8 293 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
294 (i386_regtab): Add extended registers.
295 (*Suf): Add No_qSuf.
296 (q_Suf, wlq_Suf, bwlq_Suf): New.
297
0d2bcfaf 2982000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
299
300 * i386.h (i386_optab): Replace "Imm" with "EncImm".
301 (i386_regtab): Add flags field.
d83c6548 302
bf40d919
NC
3032000-12-12 Nick Clifton <nickc@redhat.com>
304
305 * mips.h: Fix formatting.
306
4372b673
NC
3072000-12-01 Chris Demetriou <cgd@sibyte.com>
308
309 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
310 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
311 OP_*_SYSCALL definitions.
312 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
313 19 bit wait codes.
314 (MIPS operand specifier comments): Remove 'm', add 'U' and
315 'J', and update the meaning of 'B' so that it's more general.
316
e7af610e
NC
317 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
318 INSN_ISA5): Renumber, redefine to mean the ISA at which the
319 instruction was added.
320 (INSN_ISA32): New constant.
321 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
322 Renumber to avoid new and/or renumbered INSN_* constants.
323 (INSN_MIPS32): Delete.
324 (ISA_UNKNOWN): New constant to indicate unknown ISA.
325 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
326 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 327 constants available at that ISA level.
e7af610e
NC
328 (CPU_UNKNOWN): New constant to indicate unknown CPU.
329 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
330 define it with a unique value.
331 (OPCODE_IS_MEMBER): Update for new ISA membership-related
332 constant meanings.
333
84ea6cf2 334 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 335 definitions.
84ea6cf2 336
c6c98b38
NC
337 * mips.h (CPU_SB1): New constant.
338
19f7b010
JJ
3392000-10-20 Jakub Jelinek <jakub@redhat.com>
340
341 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
342 Note that '3' is used for siam operand.
343
139368c9
JW
3442000-09-22 Jim Wilson <wilson@cygnus.com>
345
346 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
347
156c2f8b 3482000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 349
156c2f8b
NC
350 * mips.h: Use defines instead of hard-coded processor numbers.
351 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 352 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
353 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
354 CPU_4KC, CPU_4KM, CPU_4KP): Define..
355 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 356 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 357 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
358 Add 'P' to used characters.
359 Use 'H' for coprocessor select field.
156c2f8b 360 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
361 Document new arg characters and add to used characters.
362 (INSN_MIPS32): New define for MIPS32 extensions.
363 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 364
3c5ce02e
AM
3652000-09-05 Alan Modra <alan@linuxcare.com.au>
366
367 * hppa.h: Mention cz completer.
368
50b81f19
JW
3692000-08-16 Jim Wilson <wilson@cygnus.com>
370
371 * ia64.h (IA64_OPCODE_POSTINC): New.
372
fc29466d
L
3732000-08-15 H.J. Lu <hjl@gnu.org>
374
375 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
376 IgnoreSize change.
377
4f1d9bd8
NC
3782000-08-08 Jason Eckhardt <jle@cygnus.com>
379
380 * i860.h: Small formatting adjustments.
381
45ee1401
DC
3822000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
383
384 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
385 Move related opcodes closer to each other.
386 Minor changes in comments, list undefined opcodes.
387
9d551405
DB
3882000-07-26 Dave Brolley <brolley@redhat.com>
389
390 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
391
4f1d9bd8
NC
3922000-07-22 Jason Eckhardt <jle@cygnus.com>
393
394 * i860.h (btne, bte, bla): Changed these opcodes
395 to use sbroff ('r') instead of split16 ('s').
396 (J, K, L, M): New operand types for 16-bit aligned fields.
397 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
398 use I, J, K, L, M instead of just I.
399 (T, U): New operand types for split 16-bit aligned fields.
400 (st.x): Changed these opcodes to use S, T, U instead of just S.
401 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
402 exist on the i860.
403 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
404 (pfeq.ss, pfeq.dd): New opcodes.
405 (st.s): Fixed incorrect mask bits.
406 (fmlow): Fixed incorrect mask bits.
407 (fzchkl, pfzchkl): Fixed incorrect mask bits.
408 (faddz, pfaddz): Fixed incorrect mask bits.
409 (form, pform): Fixed incorrect mask bits.
410 (pfld.l): Fixed incorrect mask bits.
411 (fst.q): Fixed incorrect mask bits.
412 (all floating point opcodes): Fixed incorrect mask bits for
413 handling of dual bit.
414
c8488617
HPN
4152000-07-20 Hans-Peter Nilsson <hp@axis.com>
416
417 cris.h: New file.
418
65aa24b6
NC
4192000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
420
421 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
422 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
423 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
424 (AVR_ISA_M83): Define for ATmega83, ATmega85.
425 (espm): Remove, because ESPM removed in databook update.
426 (eicall, eijmp): Move to the end of opcode table.
427
60bcf0fa
NC
4282000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
429
430 * m68hc11.h: New file for support of Motorola 68hc11.
431
60a2978a
DC
432Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
433
434 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
435
68ab2dd9
DC
436Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
437
438 * avr.h: New file with AVR opcodes.
439
f0662e27
DL
440Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
441
442 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
443
b722f2be
AM
4442000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
445
446 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
447
f9e0cf0b
AM
4482000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
449
450 * i386.h: Use sl_FP, not sl_Suf for fild.
451
f660ee8b
FCE
4522000-05-16 Frank Ch. Eigler <fche@redhat.com>
453
454 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
455 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
456 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
457 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
458
558b0a60
AM
4592000-05-13 Alan Modra <alan@linuxcare.com.au>,
460
461 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
462
e413e4e9
AM
4632000-05-13 Alan Modra <alan@linuxcare.com.au>,
464 Alexander Sokolov <robocop@netlink.ru>
465
466 * i386.h (i386_optab): Add cpu_flags for all instructions.
467
4682000-05-13 Alan Modra <alan@linuxcare.com.au>
469
470 From Gavin Romig-Koch <gavin@cygnus.com>
471 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
472
5c84d377
TW
4732000-05-04 Timothy Wall <twall@cygnus.com>
474
475 * tic54x.h: New.
476
966f959b
C
4772000-05-03 J.T. Conklin <jtc@redback.com>
478
479 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
480 (PPC_OPERAND_VR): New operand flag for vector registers.
481
c5d05dbb
JL
4822000-05-01 Kazu Hirata <kazu@hxi.com>
483
484 * h8300.h (EOP): Add missing initializer.
485
a7fba0e0
JL
486Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
487
488 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
489 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
490 New operand types l,y,&,fe,fE,fx added to support above forms.
491 (pa_opcodes): Replaced usage of 'x' as source/target for
492 floating point double-word loads/stores with 'fx'.
493
800eeca4
JW
494Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
495 David Mosberger <davidm@hpl.hp.com>
496 Timothy Wall <twall@cygnus.com>
497 Jim Wilson <wilson@cygnus.com>
498
499 * ia64.h: New file.
500
ba23e138
NC
5012000-03-27 Nick Clifton <nickc@cygnus.com>
502
503 * d30v.h (SHORT_A1): Fix value.
504 (SHORT_AR): Renumber so that it is at the end of the list of short
505 instructions, not the end of the list of long instructions.
506
d0b47220
AM
5072000-03-26 Alan Modra <alan@linuxcare.com>
508
509 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
510 problem isn't really specific to Unixware.
511 (OLDGCC_COMPAT): Define.
512 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
513 destination %st(0).
514 Fix lots of comments.
515
866afedc
NC
5162000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
517
518 * d30v.h:
519 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
520 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
521 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
522 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
523 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
524 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
525 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
526
cc5ca5ce
AM
5272000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
528
529 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
530 fistpd without suffix.
531
68e324a2
NC
5322000-02-24 Nick Clifton <nickc@cygnus.com>
533
534 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
535 'signed_overflow_ok_p'.
536 Delete prototypes for cgen_set_flags() and cgen_get_flags().
537
60f036a2
AH
5382000-02-24 Andrew Haley <aph@cygnus.com>
539
540 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
541 (CGEN_CPU_TABLE): flags: new field.
542 Add prototypes for new functions.
d83c6548 543
9b9b5cd4
AM
5442000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
545
546 * i386.h: Add some more UNIXWARE_COMPAT comments.
547
5b93d8bb
AM
5482000-02-23 Linas Vepstas <linas@linas.org>
549
550 * i370.h: New file.
551
4f1d9bd8
NC
5522000-02-22 Chandra Chavva <cchavva@cygnus.com>
553
554 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
555 cannot be combined in parallel with ADD/SUBppp.
556
87f398dd
AH
5572000-02-22 Andrew Haley <aph@cygnus.com>
558
559 * mips.h: (OPCODE_IS_MEMBER): Add comment.
560
367c01af
AH
5611999-12-30 Andrew Haley <aph@cygnus.com>
562
9a1e79ca
AH
563 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
564 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
565 insns.
367c01af 566
add0c677
AM
5672000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
568
569 * i386.h: Qualify intel mode far call and jmp with x_Suf.
570
3138f287
AM
5711999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
572
573 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
574 indirect jumps and calls. Add FF/3 call for intel mode.
575
ccecd07b
JL
576Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
577
578 * mn10300.h: Add new operand types. Add new instruction formats.
579
b37e19e9
JL
580Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
581
582 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
583 instruction.
584
5fce5ddf
GRK
5851999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
586
587 * mips.h (INSN_ISA5): New.
588
2bd7f1f3
GRK
5891999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
590
591 * mips.h (OPCODE_IS_MEMBER): New.
592
4df2b5c5
NC
5931999-10-29 Nick Clifton <nickc@cygnus.com>
594
595 * d30v.h (SHORT_AR): Define.
596
446a06c9
MM
5971999-10-18 Michael Meissner <meissner@cygnus.com>
598
599 * alpha.h (alpha_num_opcodes): Convert to unsigned.
600 (alpha_num_operands): Ditto.
601
eca04c6a
JL
602Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
603
604 * hppa.h (pa_opcodes): Add load and store cache control to
605 instructions. Add ordered access load and store.
606
607 * hppa.h (pa_opcode): Add new entries for addb and addib.
608
609 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
610
611 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
612
c43185de
DN
613Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
614
615 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
616
ec3533da
JL
617Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
618
390f858d
JL
619 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
620 and "be" using completer prefixes.
621
8c47ebd9
JL
622 * hppa.h (pa_opcodes): Add initializers to silence compiler.
623
ec3533da
JL
624 * hppa.h: Update comments about character usage.
625
18369bea
JL
626Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
627
628 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
629 up the new fstw & bve instructions.
630
c36efdd2
JL
631Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
632
d3ffb032
JL
633 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
634 instructions.
635
c49ec3da
JL
636 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
637
5d2e7ecc
JL
638 * hppa.h (pa_opcodes): Add long offset double word load/store
639 instructions.
640
6397d1a2
JL
641 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
642 stores.
643
142f0fe0
JL
644 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
645
f5a68b45
JL
646 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
647
8235801e
JL
648 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
649
35184366
JL
650 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
651
f0bfde5e
JL
652 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
653
27bbbb58
JL
654 * hppa.h (pa_opcodes): Add support for "b,l".
655
c36efdd2
JL
656 * hppa.h (pa_opcodes): Add support for "b,gate".
657
f2727d04
JL
658Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
659
9392fb11 660 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 661 in xmpyu.
9392fb11 662
e0c52e99
JL
663 * hppa.h (pa_opcodes): Fix mask for probe and probei.
664
f2727d04
JL
665 * hppa.h (pa_opcodes): Fix mask for depwi.
666
52d836e2
JL
667Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
668
669 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
670 an explicit output argument.
671
90765e3a
JL
672Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
673
674 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
675 Add a few PA2.0 loads and store variants.
676
8340b17f
ILT
6771999-09-04 Steve Chamberlain <sac@pobox.com>
678
679 * pj.h: New file.
680
5f47d35b
AM
6811999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
682
683 * i386.h (i386_regtab): Move %st to top of table, and split off
684 other fp reg entries.
685 (i386_float_regtab): To here.
686
1c143202
JL
687Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
688
7d8fdb64
JL
689 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
690 by 'f'.
691
90927b9c
JL
692 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
693 Add supporting args.
694
1d16bf9c
JL
695 * hppa.h: Document new completers and args.
696 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
697 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
698 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
699 pmenb and pmdis.
700
96226a68
JL
701 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
702 hshr, hsub, mixh, mixw, permh.
703
5d4ba527
JL
704 * hppa.h (pa_opcodes): Change completers in instructions to
705 use 'c' prefix.
706
e9fc28c6
JL
707 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
708 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
709
1c143202
JL
710 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
711 fnegabs to use 'I' instead of 'F'.
712
9e525108
AM
7131999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
714
715 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
716 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
717 Alphabetically sort PIII insns.
718
e8da1bf1
DE
719Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
720
721 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
722
7d627258
JL
723Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
724
5696871a
JL
725 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
726 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
727
7d627258
JL
728 * hppa.h: Document 64 bit condition completers.
729
c5e52916
JL
730Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
731
732 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
733
eecb386c
AM
7341999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
735
736 * i386.h (i386_optab): Add DefaultSize modifier to all insns
737 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
738 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
739
88a380f3
JL
740Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
741 Jeff Law <law@cygnus.com>
742
743 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
744
745 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 746
d83c6548 747 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
748 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
749
145cf1f0
AM
7501999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
751
752 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
753
73826640
JL
754Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
755
756 * hppa.h (struct pa_opcode): Add new field "flags".
757 (FLAGS_STRICT): Define.
758
b65db252
JL
759Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
760 Jeff Law <law@cygnus.com>
761
f7fc668b
JL
762 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
763
764 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 765
10084519
AM
7661999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
767
768 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
769 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
770 flag to fcomi and friends.
771
cd8a80ba
JL
772Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
773
774 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 775 integer logical instructions.
cd8a80ba 776
1fca749b
ILT
7771999-05-28 Linus Nordberg <linus.nordberg@canit.se>
778
779 * m68k.h: Document new formats `E', `G', `H' and new places `N',
780 `n', `o'.
781
782 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
783 and new places `m', `M', `h'.
784
aa008907
JL
785Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
786
787 * hppa.h (pa_opcodes): Add several processor specific system
788 instructions.
789
e26b85f0
JL
790Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
791
d83c6548 792 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
793 "addb", and "addib" to be used by the disassembler.
794
c608c12e
AM
7951999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
796
797 * i386.h (ReverseModrm): Remove all occurences.
798 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
799 movmskps, pextrw, pmovmskb, maskmovq.
800 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
801 ignore the data size prefix.
802
803 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
804 Mostly stolen from Doug Ledford <dledford@redhat.com>
805
45c18104
RH
806Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
807
808 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
809
252b5132
RH
8101999-04-14 Doug Evans <devans@casey.cygnus.com>
811
812 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
813 (CGEN_ATTR_TYPE): Update.
814 (CGEN_ATTR_MASK): Number booleans starting at 0.
815 (CGEN_ATTR_VALUE): Update.
816 (CGEN_INSN_ATTR): Update.
817
818Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
819
820 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
821 instructions.
822
823Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
824
825 * hppa.h (bb, bvb): Tweak opcode/mask.
826
827
8281999-03-22 Doug Evans <devans@casey.cygnus.com>
829
830 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
831 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
832 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
833 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
834 Delete member max_insn_size.
835 (enum cgen_cpu_open_arg): New enum.
836 (cpu_open): Update prototype.
837 (cpu_open_1): Declare.
838 (cgen_set_cpu): Delete.
839
8401999-03-11 Doug Evans <devans@casey.cygnus.com>
841
842 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
843 (CGEN_OPERAND_NIL): New macro.
844 (CGEN_OPERAND): New member `type'.
845 (@arch@_cgen_operand_table): Delete decl.
846 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
847 (CGEN_OPERAND_TABLE): New struct.
848 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
849 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
850 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
851 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
852 {get,set}_{int,vma}_operand.
853 (@arch@_cgen_cpu_open): New arg `isa'.
854 (cgen_set_cpu): Ditto.
855
856Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
857
858 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
859
8601999-02-25 Doug Evans <devans@casey.cygnus.com>
861
862 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
863 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
864 enum cgen_hw_type.
865 (CGEN_HW_TABLE): New struct.
866 (hw_table): Delete declaration.
867 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
868 to table entry to enum.
869 (CGEN_OPINST): Ditto.
870 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
871
872Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
873
874 * alpha.h (AXP_OPCODE_EV6): New.
875 (AXP_OPCODE_NOPAL): Include it.
876
8771999-02-09 Doug Evans <devans@casey.cygnus.com>
878
879 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
880 All uses updated. New members int_insn_p, max_insn_size,
881 parse_operand,insert_operand,extract_operand,print_operand,
882 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
883 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
884 extract_handlers,print_handlers.
885 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
886 (CGEN_ATTR_BOOL_OFFSET): New macro.
887 (CGEN_ATTR_MASK): Subtract it to compute bit number.
888 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
889 (cgen_opcode_handler): Renamed from cgen_base.
890 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
891 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
892 all uses updated.
893 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
894 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
895 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
896 (CGEN_OPCODE,CGEN_IBASE): New types.
897 (CGEN_INSN): Rewrite.
898 (CGEN_{ASM,DIS}_HASH*): Delete.
899 (init_opcode_table,init_ibld_table): Declare.
900 (CGEN_INSN_ATTR): New type.
901
902Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 903
252b5132
RH
904 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
905 (x_FP, d_FP, dls_FP, sldx_FP): Define.
906 Change *Suf definitions to include x and d suffixes.
907 (movsx): Use w_Suf and b_Suf.
908 (movzx): Likewise.
909 (movs): Use bwld_Suf.
910 (fld): Change ordering. Use sld_FP.
911 (fild): Add Intel Syntax equivalent of fildq.
912 (fst): Use sld_FP.
913 (fist): Use sld_FP.
914 (fstp): Use sld_FP. Add x_FP version.
915 (fistp): LLongMem version for Intel Syntax.
916 (fcom, fcomp): Use sld_FP.
917 (fadd, fiadd, fsub): Use sld_FP.
918 (fsubr): Use sld_FP.
919 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
920
9211999-01-27 Doug Evans <devans@casey.cygnus.com>
922
923 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
924 CGEN_MODE_UINT.
925
e135f41b 9261999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
927
928 * hppa.h (bv): Fix mask.
929
9301999-01-05 Doug Evans <devans@casey.cygnus.com>
931
932 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
933 (CGEN_ATTR): Use it.
934 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
935 (CGEN_ATTR_TABLE): New member dfault.
936
9371998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
938
939 * mips.h (MIPS16_INSN_BRANCH): New.
940
941Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
942
943 The following is part of a change made by Edith Epstein
d83c6548
AJ
944 <eepstein@sophia.cygnus.com> as part of a project to merge in
945 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
946
947 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 948 after.
252b5132
RH
949
950Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
951
952 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 953 status word instructions.
252b5132
RH
954
9551998-11-30 Doug Evans <devans@casey.cygnus.com>
956
957 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
958 (struct cgen_keyword_entry): Ditto.
959 (struct cgen_operand): Ditto.
960 (CGEN_IFLD): New typedef, with associated access macros.
961 (CGEN_IFMT): New typedef, with associated access macros.
962 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
963 (CGEN_IVALUE): New typedef.
964 (struct cgen_insn): Delete const on syntax,attrs members.
965 `format' now points to format data. Type of `value' is now
966 CGEN_IVALUE.
967 (struct cgen_opcode_table): New member ifld_table.
968
9691998-11-18 Doug Evans <devans@casey.cygnus.com>
970
971 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
972 (CGEN_OPERAND_INSTANCE): New member `attrs'.
973 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
974 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
975 (cgen_opcode_table): Update type of dis_hash fn.
976 (extract_operand): Update type of `insn_value' arg.
977
978Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
979
980 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
981
982Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
983
984 * mips.h (INSN_MULT): Added.
985
986Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
987
988 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
989
990Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
991
992 * cgen.h (CGEN_INSN_INT): New typedef.
993 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
994 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
995 (CGEN_INSN_BYTES_PTR): New typedef.
996 (CGEN_EXTRACT_INFO): New typedef.
997 (cgen_insert_fn,cgen_extract_fn): Update.
998 (cgen_opcode_table): New member `insn_endian'.
999 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1000 (insert_operand,extract_operand): Update.
1001 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1002
1003Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1004
1005 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1006 (struct CGEN_HW_ENTRY): New member `attrs'.
1007 (CGEN_HW_ATTR): New macro.
1008 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1009 (CGEN_INSN_INVALID_P): New macro.
1010
1011Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1012
1013 * hppa.h: Add "fid".
d83c6548 1014
252b5132
RH
1015Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1016
1017 From Robert Andrew Dale <rob@nb.net>
1018 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1019 (AMD_3DNOW_OPCODE): Define.
1020
1021Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1022
1023 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1024
1025Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1026
1027 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1028
1029Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1030
1031 Move all global state data into opcode table struct, and treat
1032 opcode table as something that is "opened/closed".
1033 * cgen.h (CGEN_OPCODE_DESC): New type.
1034 (all fns): New first arg of opcode table descriptor.
1035 (cgen_set_parse_operand_fn): Add prototype.
1036 (cgen_current_machine,cgen_current_endian): Delete.
1037 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1038 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1039 dis_hash_table,dis_hash_table_entries.
1040 (opcode_open,opcode_close): Add prototypes.
1041
1042 * cgen.h (cgen_insn): New element `cdx'.
1043
1044Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1045
1046 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1047
1048Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1049
1050 * mn10300.h: Add "no_match_operands" field for instructions.
1051 (MN10300_MAX_OPERANDS): Define.
1052
1053Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1054
1055 * cgen.h (cgen_macro_insn_count): Declare.
1056
1057Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1058
1059 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1060 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1061 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1062 set_{int,vma}_operand.
1063
1064Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1065
1066 * mn10300.h: Add "machine" field for instructions.
1067 (MN103, AM30): Define machine types.
d83c6548 1068
252b5132
RH
1069Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1070
1071 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1072
10731998-06-18 Ulrich Drepper <drepper@cygnus.com>
1074
1075 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1076
1077Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1078
1079 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1080 and ud2b.
1081 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1082 those that happen to be implemented on pentiums.
1083
1084Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1085
1086 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1087 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1088 with Size16|IgnoreSize or Size32|IgnoreSize.
1089
1090Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1091
1092 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1093 (REPE): Rename to REPE_PREFIX_OPCODE.
1094 (i386_regtab_end): Remove.
1095 (i386_prefixtab, i386_prefixtab_end): Remove.
1096 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1097 of md_begin.
1098 (MAX_OPCODE_SIZE): Define.
1099 (i386_optab_end): Remove.
1100 (sl_Suf): Define.
1101 (sl_FP): Use sl_Suf.
1102
1103 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1104 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1105 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1106 data32, dword, and adword prefixes.
1107 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1108 regs.
1109
1110Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1111
1112 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1113
1114 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1115 register operands, because this is a common idiom. Flag them with
1116 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1117 fdivrp because gcc erroneously generates them. Also flag with a
1118 warning.
1119
1120 * i386.h: Add suffix modifiers to most insns, and tighter operand
1121 checks in some cases. Fix a number of UnixWare compatibility
1122 issues with float insns. Merge some floating point opcodes, using
1123 new FloatMF modifier.
1124 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1125 consistency.
1126
1127 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1128 IgnoreDataSize where appropriate.
1129
1130Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1131
1132 * i386.h: (one_byte_segment_defaults): Remove.
1133 (two_byte_segment_defaults): Remove.
1134 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1135
1136Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1137
1138 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1139 (cgen_hw_lookup_by_num): Declare.
1140
1141Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1142
1143 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1144 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1145
1146Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1147
1148 * cgen.h (cgen_asm_init_parse): Delete.
1149 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1150 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1151
1152Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1153
1154 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1155 (cgen_asm_finish_insn): Update prototype.
1156 (cgen_insn): New members num, data.
1157 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1158 dis_hash, dis_hash_table_size moved to ...
1159 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1160 All uses updated. New members asm_hash_p, dis_hash_p.
1161 (CGEN_MINSN_EXPANSION): New struct.
1162 (cgen_expand_macro_insn): Declare.
1163 (cgen_macro_insn_count): Declare.
1164 (get_insn_operands): Update prototype.
1165 (lookup_get_insn_operands): Declare.
1166
1167Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1168
1169 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1170 regKludge. Add operands types for string instructions.
1171
1172Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1173
1174 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1175 table.
1176
1177Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1178
1179 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1180 for `gettext'.
1181
1182Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1183
1184 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1185 Add IsString flag to string instructions.
1186 (IS_STRING): Don't define.
1187 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1188 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1189 (SS_PREFIX_OPCODE): Define.
1190
1191Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1192
1193 * i386.h: Revert March 24 patch; no more LinearAddress.
1194
1195Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1196
1197 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1198 instructions, and instead add FWait opcode modifier. Add short
1199 form of fldenv and fstenv.
1200 (FWAIT_OPCODE): Define.
1201
1202 * i386.h (i386_optab): Change second operand constraint of `mov
1203 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1204 allow legal instructions such as `movl %gs,%esi'
1205
1206Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1207
1208 * h8300.h: Various changes to fully bracket initializers.
1209
1210Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1211
1212 * i386.h: Set LinearAddress for lidt and lgdt.
1213
1214Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1215
1216 * cgen.h (CGEN_BOOL_ATTR): New macro.
1217
1218Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1219
1220 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1221
1222Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1223
1224 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1225 (cgen_insn): Record syntax and format entries here, rather than
1226 separately.
1227
1228Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1229
1230 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1231
1232Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1233
1234 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1235 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1236 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1237
1238Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1239
1240 * cgen.h (lookup_insn): New argument alias_p.
1241
1242Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1243
1244Fix rac to accept only a0:
1245 * d10v.h (OPERAND_ACC): Split into:
1246 (OPERAND_ACC0, OPERAND_ACC1) .
1247 (OPERAND_GPR): Define.
1248
1249Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1250
1251 * cgen.h (CGEN_FIELDS): Define here.
1252 (CGEN_HW_ENTRY): New member `type'.
1253 (hw_list): Delete decl.
1254 (enum cgen_mode): Declare.
1255 (CGEN_OPERAND): New member `hw'.
1256 (enum cgen_operand_instance_type): Declare.
1257 (CGEN_OPERAND_INSTANCE): New type.
1258 (CGEN_INSN): New member `operands'.
1259 (CGEN_OPCODE_DATA): Make hw_list const.
1260 (get_insn_operands,lookup_insn): Add prototypes for.
1261
1262Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1263
1264 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1265 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1266 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1267 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1268
1269Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1270
1271 * cgen.h: Correct typo in comment end marker.
1272
1273Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1274
1275 * tic30.h: New file.
1276
5a109b67 1277Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1278
1279 * cgen.h: Add prototypes for cgen_save_fixups(),
1280 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1281 of cgen_asm_finish_insn() to return a char *.
1282
1283Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1284
1285 * cgen.h: Formatting changes to improve readability.
1286
1287Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1288
1289 * cgen.h (*): Clean up pass over `struct foo' usage.
1290 (CGEN_ATTR): Make unsigned char.
1291 (CGEN_ATTR_TYPE): Update.
1292 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1293 (cgen_base): Move member `attrs' to cgen_insn.
1294 (CGEN_KEYWORD): New member `null_entry'.
1295 (CGEN_{SYNTAX,FORMAT}): New types.
1296 (cgen_insn): Format and syntax separated from each other.
1297
1298Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1299
1300 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1301 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1302 flags_{used,set} long.
1303 (d30v_operand): Make flags field long.
1304
1305Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1306
1307 * m68k.h: Fix comment describing operand types.
1308
1309Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1310
1311 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1312 everything else after down.
1313
1314Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1315
1316 * d10v.h (OPERAND_FLAG): Split into:
1317 (OPERAND_FFLAG, OPERAND_CFLAG) .
1318
1319Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1320
1321 * mips.h (struct mips_opcode): Changed comments to reflect new
1322 field usage.
1323
1324Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1325
1326 * mips.h: Added to comments a quick-ref list of all assigned
1327 operand type characters.
1328 (OP_{MASK,SH}_PERFREG): New macros.
1329
1330Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1331
1332 * sparc.h: Add '_' and '/' for v9a asr's.
1333 Patch from David Miller <davem@vger.rutgers.edu>
1334
1335Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1336
1337 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1338 area are not available in the base model (H8/300).
1339
1340Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1341
1342 * m68k.h: Remove documentation of ` operand specifier.
1343
1344Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1345
1346 * m68k.h: Document q and v operand specifiers.
1347
1348Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1349
1350 * v850.h (struct v850_opcode): Add processors field.
1351 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1352 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1353 (PROCESSOR_V850EA): New bit constants.
1354
1355Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1356
1357 Merge changes from Martin Hunt:
1358
1359 * d30v.h: Allow up to 64 control registers. Add
1360 SHORT_A5S format.
1361
1362 * d30v.h (LONG_Db): New form for delayed branches.
1363
1364 * d30v.h: (LONG_Db): New form for repeati.
1365
1366 * d30v.h (SHORT_D2B): New form.
1367
1368 * d30v.h (SHORT_A2): New form.
1369
1370 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1371 registers are used. Needed for VLIW optimization.
1372
1373Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1374
1375 * cgen.h: Move assembler interface section
1376 up so cgen_parse_operand_result is defined for cgen_parse_address.
1377 (cgen_parse_address): Update prototype.
1378
1379Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1380
1381 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1382
1383Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1384
1385 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1386 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1387 <paubert@iram.es>.
1388
1389 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1390 <paubert@iram.es>.
1391
1392 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1393 <paubert@iram.es>.
1394
1395 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1396 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1397
1398Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1399
1400 * v850.h (V850_NOT_R0): New flag.
1401
1402Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1403
1404 * v850.h (struct v850_opcode): Remove flags field.
1405
1406Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1407
1408 * v850.h (struct v850_opcode): Add flags field.
1409 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1410 fields.
1411 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1412 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1413
1414Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1415
1416 * arc.h: New file.
1417
1418Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1419
1420 * sparc.h (sparc_opcodes): Declare as const.
1421
1422Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1423
1424 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1425 uses single or double precision floating point resources.
1426 (INSN_NO_ISA, INSN_ISA1): Define.
1427 (cpu specific INSN macros): Tweak into bitmasks outside the range
1428 of INSN_ISA field.
1429
1430Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1431
1432 * i386.h: Fix pand opcode.
1433
1434Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1435
1436 * mips.h: Widen INSN_ISA and move it to a more convenient
1437 bit position. Add INSN_3900.
1438
1439Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1440
1441 * mips.h (struct mips_opcode): added new field membership.
1442
1443Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1444
1445 * i386.h (movd): only Reg32 is allowed.
1446
1447 * i386.h: add fcomp and ud2. From Wayne Scott
1448 <wscott@ichips.intel.com>.
1449
1450Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1451
1452 * i386.h: Add MMX instructions.
1453
1454Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1455
1456 * i386.h: Remove W modifier from conditional move instructions.
1457
1458Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1459
1460 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1461 with no arguments to match that generated by the UnixWare
1462 assembler.
1463
1464Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1465
1466 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1467 (cgen_parse_operand_fn): Declare.
1468 (cgen_init_parse_operand): Declare.
1469 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1470 new argument `want'.
1471 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1472 (enum cgen_parse_operand_type): New enum.
1473
1474Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1475
1476 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1477
1478Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1479
1480 * cgen.h: New file.
1481
1482Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1483
1484 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1485 fdivrp.
1486
1487Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1488
1489 * v850.h (extract): Make unsigned.
1490
1491Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1492
1493 * i386.h: Add iclr.
1494
1495Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1496
1497 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1498 take a direction bit.
1499
1500Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1501
1502 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1503
1504Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1505
1506 * sparc.h: Include <ansidecl.h>. Update function declarations to
1507 use prototypes, and to use const when appropriate.
1508
1509Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1510
1511 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1512
1513Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1514
1515 * d10v.h: Change pre_defined_registers to
1516 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1517
1518Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1519
1520 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1521 Change mips_opcodes from const array to a pointer,
1522 and change bfd_mips_num_opcodes from const int to int,
1523 so that we can increase the size of the mips opcodes table
1524 dynamically.
1525
1526Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1527
1528 * d30v.h (FLAG_X): Remove unused flag.
1529
1530Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1531
1532 * d30v.h: New file.
1533
1534Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1535
1536 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1537 (PDS_VALUE): Macro to access value field of predefined symbols.
1538 (tic80_next_predefined_symbol): Add prototype.
1539
1540Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1541
1542 * tic80.h (tic80_symbol_to_value): Change prototype to match
1543 change in function, added class parameter.
1544
1545Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1546
1547 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1548 endmask fields, which are somewhat weird in that 0 and 32 are
1549 treated exactly the same.
1550
1551Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1552
1553 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1554 rather than a constant that is 2**X. Reorder them to put bits for
1555 operands that have symbolic names in the upper bits, so they can
1556 be packed into an int where the lower bits contain the value that
1557 corresponds to that symbolic name.
1558 (predefined_symbo): Add struct.
1559 (tic80_predefined_symbols): Declare array of translations.
1560 (tic80_num_predefined_symbols): Declare size of that array.
1561 (tic80_value_to_symbol): Declare function.
1562 (tic80_symbol_to_value): Declare function.
1563
1564Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1565
1566 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1567
1568Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1569
1570 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1571 be the destination register.
1572
1573Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1574
1575 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1576 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1577 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1578 that the opcode can have two vector instructions in a single
1579 32 bit word and we have to encode/decode both.
1580
1581Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1582
1583 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1584 TIC80_OPERAND_RELATIVE for PC relative.
1585 (TIC80_OPERAND_BASEREL): New flag bit for register
1586 base relative.
1587
1588Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1589
1590 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1591
1592Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1593
1594 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1595 ":s" modifier for scaling.
1596
1597Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1598
1599 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1600 (TIC80_OPERAND_M_LI): Ditto
1601
1602Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1603
1604 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1605 (TIC80_OPERAND_CC): New define for condition code operand.
1606 (TIC80_OPERAND_CR): New define for control register operand.
1607
1608Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1609
1610 * tic80.h (struct tic80_opcode): Name changed.
1611 (struct tic80_opcode): Remove format field.
1612 (struct tic80_operand): Add insertion and extraction functions.
1613 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1614 correct ones.
1615 (FMT_*): Ditto.
1616
1617Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1618
1619 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1620 type IV instruction offsets.
1621
1622Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1623
1624 * tic80.h: New file.
1625
1626Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1627
1628 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1629
1630Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1631
1632 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1633 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1634 * v850.h: Fix comment, v850_operand not powerpc_operand.
1635
1636Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1637
1638 * mn10200.h: Flesh out structures and definitions needed by
1639 the mn10200 assembler & disassembler.
1640
1641Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1642
1643 * mips.h: Add mips16 definitions.
1644
1645Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1646
1647 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1648
1649Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1650
1651 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1652 (MN10300_OPERAND_MEMADDR): Define.
1653
1654Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1655
1656 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1657
1658Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1659
1660 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1661
1662Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1663
1664 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1665
1666Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1667
1668 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1669
1670Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1671
1672 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1673 negative to minimize problems with shared libraries. Organize
1674 instruction subsets by AMASK extensions and PALcode
1675 implementation.
252b5132
RH
1676 (struct alpha_operand): Move flags slot for better packing.
1677
1678Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1679
1680 * v850.h (V850_OPERAND_RELAX): New operand flag.
1681
1682Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1683
1684 * mn10300.h (FMT_*): Move operand format definitions
1685 here.
1686
1687Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1688
1689 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1690
1691Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1692
1693 * mn10300.h (mn10300_opcode): Add "format" field.
1694 (MN10300_OPERAND_*): Define.
1695
1696Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1697
1698 * mn10x00.h: Delete.
1699 * mn10200.h, mn10300.h: New files.
1700
1701Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1702
1703 * mn10x00.h: New file.
1704
1705Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1706
1707 * v850.h: Add new flag to indicate this instruction uses a PC
1708 displacement.
1709
1710Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1711
1712 * h8300.h (stmac): Add missing instruction.
1713
1714Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1715
1716 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1717 field.
1718
1719Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1720
1721 * v850.h (V850_OPERAND_EP): Define.
1722
1723 * v850.h (v850_opcode): Add size field.
1724
1725Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1726
1727 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1728 to functions used to handle unusual operand encoding.
252b5132 1729 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1730 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1731
1732Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1733
1734 * v850.h (v850_operands): Add flags field.
1735 (OPERAND_REG, OPERAND_NUM): Defined.
1736
1737Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1738
1739 * v850.h: New file.
1740
1741Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1742
1743 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1744 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1745 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1746 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1747 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1748 Defined.
252b5132
RH
1749
1750Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1751
1752 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1753 a 3 bit space id instead of a 2 bit space id.
1754
1755Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1756
1757 * d10v.h: Add some additional defines to support the
d83c6548 1758 assembler in determining which operations can be done in parallel.
252b5132
RH
1759
1760Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1761
1762 * h8300.h (SN): Define.
1763 (eepmov.b): Renamed from "eepmov"
1764 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1765 with them.
1766
1767Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1768
1769 * d10v.h (OPERAND_SHIFT): New operand flag.
1770
1771Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1772
1773 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1774 signed numbers.
252b5132
RH
1775
1776Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1777
1778 * d10v.h (pd_reg): Define. Putting the definition here allows
1779 the assembler and disassembler to share the same struct.
1780
1781Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1782
1783 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1784 Williams <steve@icarus.com>.
1785
1786Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1787
1788 * d10v.h: New file.
1789
1790Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1791
1792 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1793
1794Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1795
d83c6548 1796 * m68k.h (mcf5200): New macro.
252b5132
RH
1797 Document names of coldfire control registers.
1798
1799Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1800
1801 * h8300.h (SRC_IN_DST): Define.
1802
1803 * h8300.h (UNOP3): Mark the register operand in this insn
1804 as a source operand, not a destination operand.
1805 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1806 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1807 register operand with SRC_IN_DST.
1808
1809Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1810
1811 * alpha.h: New file.
1812
1813Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1814
1815 * rs6k.h: Remove obsolete file.
1816
1817Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1818
1819 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1820 fdivp, and fdivrp. Add ffreep.
1821
1822Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1823
1824 * h8300.h: Reorder various #defines for readability.
1825 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1826 (BITOP): Accept additional (unused) argument. All callers changed.
1827 (EBITOP): Likewise.
1828 (O_LAST): Bump.
1829 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1830
1831 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1832 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1833 (BITOP, EBITOP): Handle new H8/S addressing modes for
1834 bit insns.
1835 (UNOP3): Handle new shift/rotate insns on the H8/S.
1836 (insns using exr): New instructions.
1837 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1838
1839Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1840
1841 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1842 was incorrect.
1843
1844Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1845
1846 * h8300.h (START): Remove.
1847 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1848 and mov.l insns that can be relaxed.
1849
1850Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1851
1852 * i386.h: Remove Abs32 from lcall.
1853
1854Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1855
1856 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1857 (SLCPOP): New macro.
1858 Mark X,Y opcode letters as in use.
1859
1860Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1861
1862 * sparc.h (F_FLOAT, F_FBR): Define.
1863
1864Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1865
1866 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1867 from all insns.
1868 (ABS8SRC,ABS8DST): Add ABS8MEM.
1869 (add.l): Fix reg+reg variant.
1870 (eepmov.w): Renamed from eepmovw.
1871 (ldc,stc): Fix many cases.
1872
1873Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1874
1875 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1876
1877Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1878
1879 * sparc.h (O): Mark operand letter as in use.
1880
1881Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1882
1883 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1884 Mark operand letters uU as in use.
1885
1886Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1887
1888 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1889 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1890 (SPARC_OPCODE_SUPPORTED): New macro.
1891 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1892 (F_NOTV9): Delete.
1893
1894Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1895
1896 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1897 declaration consistent with return type in definition.
1898
1899Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1900
1901 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1902
1903Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1904
1905 * i386.h (i386_regtab): Add 80486 test registers.
1906
1907Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1908
1909 * i960.h (I_HX): Define.
1910 (i960_opcodes): Add HX instruction.
1911
1912Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1913
1914 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1915 and fclex.
1916
1917Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1918
1919 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1920 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1921 (bfd_* defines): Delete.
1922 (sparc_opcode_archs): Replaces architecture_pname.
1923 (sparc_opcode_lookup_arch): Declare.
1924 (NUMOPCODES): Delete.
1925
1926Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1927
1928 * sparc.h (enum sparc_architecture): Add v9a.
1929 (ARCHITECTURES_CONFLICT_P): Update.
1930
1931Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1932
1933 * i386.h: Added Pentium Pro instructions.
1934
1935Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1936
1937 * m68k.h: Document new 'W' operand place.
1938
1939Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1940
1941 * hppa.h: Add lci and syncdma instructions.
1942
1943Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1944
1945 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1946 instructions.
252b5132
RH
1947
1948Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1949
1950 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1951 assembler's -mcom and -many switches.
1952
1953Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1954
1955 * i386.h: Fix cmpxchg8b extension opcode description.
1956
1957Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1958
1959 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1960 and register cr4.
1961
1962Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1963
1964 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1965
1966Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1967
1968 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1969
1970Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1971
1972 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1973
1974Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1975
1976 * m68kmri.h: Remove.
1977
1978 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1979 declarations. Remove F_ALIAS and flag field of struct
1980 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1981 int. Make name and args fields of struct m68k_opcode const.
1982
1983Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1984
1985 * sparc.h (F_NOTV9): Define.
1986
1987Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1988
1989 * mips.h (INSN_4010): Define.
1990
1991Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1992
1993 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1994
1995 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1996 * m68k.h: Fix argument descriptions of coprocessor
1997 instructions to allow only alterable operands where appropriate.
1998 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1999 (m68k_opcode_aliases): Add more aliases.
2000
2001Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2002
2003 * m68k.h: Added explcitly short-sized conditional branches, and a
2004 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2005 svr4-based configurations.
2006
2007Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2008
2009 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2010 * i386.h: added missing Data16/Data32 flags to a few instructions.
2011
2012Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2013
2014 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2015 (OP_MASK_BCC, OP_SH_BCC): Define.
2016 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2017 (OP_MASK_CCC, OP_SH_CCC): Define.
2018 (INSN_READ_FPR_R): Define.
2019 (INSN_RFE): Delete.
2020
2021Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2022
2023 * m68k.h (enum m68k_architecture): Deleted.
2024 (struct m68k_opcode_alias): New type.
2025 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2026 matching constraints, values and flags. As a side effect of this,
2027 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2028 as I know were never used, now may need re-examining.
2029 (numopcodes): Now const.
2030 (m68k_opcode_aliases, numaliases): New variables.
2031 (endop): Deleted.
2032 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2033 m68k_opcode_aliases; update declaration of m68k_opcodes.
2034
2035Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2036
2037 * hppa.h (delay_type): Delete unused enumeration.
2038 (pa_opcode): Replace unused delayed field with an architecture
2039 field.
2040 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2041
2042Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2043
2044 * mips.h (INSN_ISA4): Define.
2045
2046Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2047
2048 * mips.h (M_DLA_AB, M_DLI): Define.
2049
2050Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2051
2052 * hppa.h (fstwx): Fix single-bit error.
2053
2054Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2055
2056 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2057
2058Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2059
2060 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2061 debug registers. From Charles Hannum (mycroft@netbsd.org).
2062
2063Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2064
2065 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2066 i386 support:
2067 * i386.h (MOV_AX_DISP32): New macro.
2068 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2069 of several call/return instructions.
2070 (ADDR_PREFIX_OPCODE): New macro.
2071
2072Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2073
2074 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2075
4f1d9bd8
NC
2076 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2077 char.
252b5132
RH
2078 (struct vot, field `name'): ditto.
2079
2080Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2081
2082 * vax.h: Supply and properly group all values in end sentinel.
2083
2084Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2085
2086 * mips.h (INSN_ISA, INSN_4650): Define.
2087
2088Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2089
2090 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2091 systems with a separate instruction and data cache, such as the
2092 29040, these instructions take an optional argument.
2093
2094Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2095
2096 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2097 INSN_TRAP.
2098
2099Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2100
2101 * mips.h (INSN_STORE_MEMORY): Define.
2102
2103Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2104
2105 * sparc.h: Document new operand type 'x'.
2106
2107Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2108
2109 * i960.h (I_CX2): New instruction category. It includes
2110 instructions available on Cx and Jx processors.
2111 (I_JX): New instruction category, for JX-only instructions.
2112 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2113 Jx-only instructions, in I_JX category.
2114
2115Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2116
2117 * ns32k.h (endop): Made pointer const too.
2118
2119Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2120
2121 * ns32k.h: Drop Q operand type as there is no correct use
2122 for it. Add I and Z operand types which allow better checking.
2123
2124Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2125
2126 * h8300.h (xor.l) :fix bit pattern.
2127 (L_2): New size of operand.
2128 (trapa): Use it.
2129
2130Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2131
2132 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2133
2134Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2135
2136 * sparc.h: Include v9 definitions.
2137
2138Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2139
2140 * m68k.h (m68060): Defined.
2141 (m68040up, mfloat, mmmu): Include it.
2142 (struct m68k_opcode): Widen `arch' field.
2143 (m68k_opcodes): Updated for M68060. Removed comments that were
2144 instructions commented out by "JF" years ago.
2145
2146Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2147
2148 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2149 add a one-bit `flags' field.
2150 (F_ALIAS): New macro.
2151
2152Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2153
2154 * h8300.h (dec, inc): Get encoding right.
2155
2156Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2157
2158 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2159 a flag instead.
2160 (PPC_OPERAND_SIGNED): Define.
2161 (PPC_OPERAND_SIGNOPT): Define.
2162
2163Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2164
2165 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2166 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2167
2168Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2169
2170 * i386.h: Reverse last change. It'll be handled in gas instead.
2171
2172Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2173
2174 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2175 slower on the 486 and used the implicit shift count despite the
2176 explicit operand. The one-operand form is still available to get
2177 the shorter form with the implicit shift count.
2178
2179Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2180
2181 * hppa.h: Fix typo in fstws arg string.
2182
2183Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2184
2185 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2186
2187Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2188
2189 * ppc.h (PPC_OPCODE_601): Define.
2190
2191Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2192
2193 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2194 (so we can determine valid completers for both addb and addb[tf].)
2195
2196 * hppa.h (xmpyu): No floating point format specifier for the
2197 xmpyu instruction.
2198
2199Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2200
2201 * ppc.h (PPC_OPERAND_NEXT): Define.
2202 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2203 (struct powerpc_macro): Define.
2204 (powerpc_macros, powerpc_num_macros): Declare.
2205
2206Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2207
2208 * ppc.h: New file. Header file for PowerPC opcode table.
2209
2210Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2211
2212 * hppa.h: More minor template fixes for sfu and copr (to allow
2213 for easier disassembly).
2214
2215 * hppa.h: Fix templates for all the sfu and copr instructions.
2216
2217Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2218
2219 * i386.h (push): Permit Imm16 operand too.
2220
2221Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2222
2223 * h8300.h (andc): Exists in base arch.
2224
2225Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2226
2227 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2228 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2229
2230Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2231
2232 * hppa.h: Add FP quadword store instructions.
2233
2234Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2235
2236 * mips.h: (M_J_A): Added.
2237 (M_LA): Removed.
2238
2239Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2240
2241 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2242 <mellon@pepper.ncd.com>.
2243
2244Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2245
2246 * hppa.h: Immediate field in probei instructions is unsigned,
2247 not low-sign extended.
2248
2249Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2250
2251 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2252
2253Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2254
2255 * i386.h: Add "fxch" without operand.
2256
2257Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2258
2259 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2260
2261Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2262
2263 * hppa.h: Add gfw and gfr to the opcode table.
2264
2265Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2266
2267 * m88k.h: extended to handle m88110.
2268
2269Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2270
2271 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2272 addresses.
2273
2274Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2275
2276 * i960.h (i960_opcodes): Properly bracket initializers.
2277
2278Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2279
2280 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2281
2282Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2283
2284 * m68k.h (two): Protect second argument with parentheses.
2285
2286Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2287
2288 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2289 Deleted old in/out instructions in "#if 0" section.
2290
2291Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2292
2293 * i386.h (i386_optab): Properly bracket initializers.
2294
2295Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2296
2297 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2298 Jeff Law, law@cs.utah.edu).
2299
2300Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2301
2302 * i386.h (lcall): Accept Imm32 operand also.
2303
2304Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2305
2306 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2307 (M_DABS): Added.
2308
2309Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2310
2311 * mips.h (INSN_*): Changed values. Removed unused definitions.
2312 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2313 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2314 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2315 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2316 (M_*): Added new values for r6000 and r4000 macros.
2317 (ANY_DELAY): Removed.
2318
2319Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2320
2321 * mips.h: Added M_LI_S and M_LI_SS.
2322
2323Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2324
2325 * h8300.h: Get some rare mov.bs correct.
2326
2327Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2328
2329 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2330 been included.
2331
2332Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2333
2334 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2335 jump instructions, for use in disassemblers.
2336
2337Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2338
2339 * m88k.h: Make bitfields just unsigned, not unsigned long or
2340 unsigned short.
2341
2342Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2343
2344 * hppa.h: New argument type 'y'. Use in various float instructions.
2345
2346Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2347
2348 * hppa.h (break): First immediate field is unsigned.
2349
2350 * hppa.h: Add rfir instruction.
2351
2352Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2353
2354 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2355
2356Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2357
2358 * mips.h: Reworked the hazard information somewhat, and fixed some
2359 bugs in the instruction hazard descriptions.
2360
2361Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2362
2363 * m88k.h: Corrected a couple of opcodes.
2364
2365Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2366
2367 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2368 new version includes instruction hazard information, but is
2369 otherwise reasonably similar.
2370
2371Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2372
2373 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2374
2375Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2376
2377 Patches from Jeff Law, law@cs.utah.edu:
2378 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2379 Make the tables be the same for the following instructions:
2380 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2381 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2382 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2383 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2384 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2385 "fcmp", and "ftest".
2386
2387 * hppa.h: Make new and old tables the same for "break", "mtctl",
2388 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2389 Fix typo in last patch. Collapse several #ifdefs into a
2390 single #ifdef.
2391
2392 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2393 of the comments up-to-date.
2394
2395 * hppa.h: Update "free list" of letters and update
2396 comments describing each letter's function.
2397
4f1d9bd8
NC
2398Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2399
2400 * h8300.h: Lots of little fixes for the h8/300h.
2401
2402Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2403
2404 Support for H8/300-H
2405 * h8300.h: Lots of new opcodes.
2406
252b5132
RH
2407Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2408
2409 * h8300.h: checkpoint, includes H8/300-H opcodes.
2410
2411Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2412
2413 * Patches from Jeffrey Law <law@cs.utah.edu>.
2414 * hppa.h: Rework single precision FP
2415 instructions so that they correctly disassemble code
2416 PA1.1 code.
2417
2418Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2419
2420 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2421 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2422
2423Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2424
2425 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2426 gdb will define it for now.
2427
2428Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2429
2430 * sparc.h: Don't end enumerator list with comma.
2431
2432Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2433
2434 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2435 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2436 ("bc2t"): Correct typo.
2437 ("[ls]wc[023]"): Use T rather than t.
2438 ("c[0123]"): Define general coprocessor instructions.
2439
2440Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2441
2442 * m68k.h: Move split point for gcc compilation more towards
2443 middle.
2444
2445Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2446
2447 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2448 simply wrong, ics, rfi, & rfsvc were missing).
2449 Add "a" to opr_ext for "bb". Doc fix.
2450
2451Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2452
2453 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2454 * mips.h: Add casts, to suppress warnings about shifting too much.
2455 * m68k.h: Document the placement code '9'.
2456
2457Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2458
2459 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2460 allows callers to break up the large initialized struct full of
2461 opcodes into two half-sized ones. This permits GCC to compile
2462 this module, since it takes exponential space for initializers.
2463 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2464
2465Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2466
2467 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2468 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2469 initialized structs in it.
2470
2471Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2472
2473 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2474 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2475 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2476
2477Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2478
2479 * mips.h: document "i" and "j" operands correctly.
2480
2481Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2482
2483 * mips.h: Removed endianness dependency.
2484
2485Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2486
2487 * h8300.h: include info on number of cycles per instruction.
2488
2489Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2490
2491 * hppa.h: Move handy aliases to the front. Fix masks for extract
2492 and deposit instructions.
2493
2494Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2495
2496 * i386.h: accept shld and shrd both with and without the shift
2497 count argument, which is always %cl.
2498
2499Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2500
2501 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2502 (one_byte_segment_defaults, two_byte_segment_defaults,
2503 i386_prefixtab_end): Ditto.
2504
2505Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2506
2507 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2508 for operand 2; from John Carr, jfc@dsg.dec.com.
2509
2510Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2511
2512 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2513 always use 16-bit offsets. Makes calculated-size jump tables
2514 feasible.
2515
2516Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2517
2518 * i386.h: Fix one-operand forms of in* and out* patterns.
2519
2520Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2521
2522 * m68k.h: Added CPU32 support.
2523
2524Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2525
2526 * mips.h (break): Disassemble the argument. Patch from
2527 jonathan@cs.stanford.edu (Jonathan Stone).
2528
2529Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2530
2531 * m68k.h: merged Motorola and MIT syntax.
2532
2533Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2534
2535 * m68k.h (pmove): make the tests less strict, the 68k book is
2536 wrong.
2537
2538Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2539
2540 * m68k.h (m68ec030): Defined as alias for 68030.
2541 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2542 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2543 them. Tightened description of "fmovex" to distinguish it from
2544 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2545 up descriptions that claimed versions were available for chips not
2546 supporting them. Added "pmovefd".
2547
2548Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2549
2550 * m68k.h: fix where the . goes in divull
2551
2552Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2553
2554 * m68k.h: the cas2 instruction is supposed to be written with
2555 indirection on the last two operands, which can be either data or
2556 address registers. Added a new operand type 'r' which accepts
2557 either register type. Added new cases for cas2l and cas2w which
2558 use them. Corrected masks for cas2 which failed to recognize use
2559 of address register.
2560
2561Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2562
2563 * m68k.h: Merged in patches (mostly m68040-specific) from
2564 Colin Smith <colin@wrs.com>.
2565
2566 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2567 base). Also cleaned up duplicates, re-ordered instructions for
2568 the sake of dis-assembling (so aliases come after standard names).
2569 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2570
2571Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2572
2573 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2574 all missing .s
2575
2576Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2577
2578 * sparc.h: Moved tables to BFD library.
2579
2580 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2581
2582Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2583
2584 * h8300.h: Finish filling in all the holes in the opcode table,
2585 so that the Lucid C compiler can digest this as well...
2586
2587Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2588
2589 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2590 Fix opcodes on various sizes of fild/fist instructions
2591 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2592 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2593
2594Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2595
2596 * h8300.h: Fill in all the holes in the opcode table so that the
2597 losing HPUX C compiler can digest this...
2598
2599Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2600
2601 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2602 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2603
2604Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2605
2606 * sparc.h: Add new architecture variant sparclite; add its scan
2607 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2608
2609Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2610
2611 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2612 fy@lucid.com).
2613
2614Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2615
2616 * rs6k.h: New version from IBM (Metin).
2617
2618Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2619
2620 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2621 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2622
2623Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2624
2625 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2626
2627Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2628
2629 * m68k.h (one, two): Cast macro args to unsigned to suppress
2630 complaints from compiler and lint about integer overflow during
2631 shift.
2632
2633Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2634
2635 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2636
2637Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2638
2639 * mips.h: Make bitfield layout depend on the HOST compiler,
2640 not on the TARGET system.
2641
2642Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2643
2644 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2645 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2646 <TRANLE@INTELLICORP.COM>.
2647
2648Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2649
2650 * h8300.h: turned op_type enum into #define list
2651
2652Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2653
2654 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2655 similar instructions -- they've been renamed to "fitoq", etc.
2656 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2657 number of arguments.
2658 * h8300.h: Remove extra ; which produces compiler warning.
2659
2660Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2661
2662 * sparc.h: fix opcode for tsubcctv.
2663
2664Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2665
2666 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2667
2668Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2669
2670 * sparc.h (nop): Made the 'lose' field be even tighter,
2671 so only a standard 'nop' is disassembled as a nop.
2672
2673Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2674
2675 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2676 disassembled as a nop.
2677
4f1d9bd8
NC
2678Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2679
2680 * m68k.h, sparc.h: ANSIfy enums.
2681
252b5132
RH
2682Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2683
2684 * sparc.h: fix a typo.
2685
2686Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2687
2688 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2689 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2690 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2691
2692\f
2693Local Variables:
2694version-control: never
2695End: