]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - include/opcode/ChangeLog
2002-12-03 Andrew Cagney <cagney@redhat.com>
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
4fdf0a75
AM
12002-12-03 Alan Modra <amodra@bigpond.net.au>
2
3 * cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
4 Constify "leaf" and "multi".
5
53cc2791
KD
62002-11-19 Klee Dienes <kdienes@apple.com>
7
8 * h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
9 fields.
10 (h8_opcodes). Modify initializer and initializer macros to no
11 longer initialize the removed fields.
12
5dec9182
SS
132002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
14
15 * tic4x.h (c4x_insts): Fixed LDHI constraint
16
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KD
172002-11-18 Klee Dienes <kdienes@apple.com>
18
19 * h8300.h (h8_opcode): Remove 'length' field.
20 (h8_opcodes): Mark as 'const' (both the declaration and
21 definition). Modify initializer and initializer macros to no
22 longer initialize the length field.
23
84037f8c
KD
242002-11-18 Klee Dienes <kdienes@apple.com>
25
26 * arc.h (arc_ext_opcodes): Declare as extern.
27 (arc_ext_operands): Declare as extern.
28 * i860.h (i860_opcodes): Declare as const.
29
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302002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
31
32 * tic4x.h: File reordering. Added enhanced opcodes.
33
342002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
35
36 * tic4x.h: Major rewrite of entire file. Define instruction
37 classes, and put each instruction into a class.
38
392002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
40
41 * tic4x.h: Added new opcodes and corrected some bugs. Add support
42 for new DSP types.
43
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AM
442002-10-14 Alan Modra <amodra@bigpond.net.au>
45
46 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
47
701b80cd 482002-09-30 Gavin Romig-Koch <gavin@redhat.com>
9752cf1b
RS
49 Ken Raeburn <raeburn@cygnus.com>
50 Aldy Hernandez <aldyh@redhat.com>
51 Eric Christopher <echristo@redhat.com>
52 Richard Sandiford <rsandifo@redhat.com>
53
54 * mips.h: Update comment for new opcodes.
55 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
56 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
57 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
58 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
59 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
60 Don't match CPU_R4111 with INSN_4100.
61
0449635d
EZ
622002-08-19 Elena Zannoni <ezannoni@redhat.com>
63
64 From matthew green <mrg@redhat.com>
65
66 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
67 instructions.
68 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
69 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
70 e500x2 Integer select, branch locking, performance monitor,
71 cache locking and machine check APUs, respectively.
72 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
73 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
74
030ad53b
SC
752002-08-13 Stephane Carrez <stcarrez@nerim.fr>
76
77 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
78 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
79 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
80 memory banks.
81 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
82
aec421e0
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832002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
84
85 * mips.h (INSN_MIPS16): New define.
86
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872002-07-08 Alan Modra <amodra@bigpond.net.au>
88
89 * i386.h: Remove IgnoreSize from movsx and movzx.
90
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912002-06-08 Alan Modra <amodra@bigpond.net.au>
92
93 * a29k.h: Replace CONST with const.
94 (CONST): Don't define.
95 * convex.h: Replace CONST with const.
96 (CONST): Don't define.
97 * dlx.h: Replace CONST with const.
98 * or32.h (CONST): Don't define.
99
deec1734
CD
1002002-05-30 Chris G. Demetriou <cgd@broadcom.com>
101
102 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
103 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
104 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
105 (INSN_MDMX): New constants, for MDMX support.
106 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
107
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1082002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
109
110 * dlx.h: New file.
111
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1122002-05-25 Alan Modra <amodra@bigpond.net.au>
113
114 * ia64.h: Use #include "" instead of <> for local header files.
115 * sparc.h: Likewise.
116
771c7ce4
TS
1172002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
118
119 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
120
b9c9142c
AV
1212002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
122
123 * h8300.h: Corrected defs of all control regs
124 and eepmov instr.
125
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1262002-04-11 Alan Modra <amodra@bigpond.net.au>
127
128 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 129 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 130
1f25f5d3
CD
1312002-03-15 Chris G. Demetriou <cgd@broadcom.com>
132
133 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
134 instructions.
135 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
136 may be passed along with the ISA bitmask.
137
e4b29ec6
AM
1382002-03-05 Paul Koning <pkoning@equallogic.com>
139
140 * pdp11.h: Add format codes for float instruction formats.
141
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1422002-02-25 Alan Modra <amodra@bigpond.net.au>
143
144 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
145
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146Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
147
148 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
149
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JH
150Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
151
152 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
153 (xchg): Fix.
154 (in, out): Disable 64bit operands.
155 (call, jmp): Avoid REX prefixes.
156 (jcxz): Prohibit in 64bit mode
157 (jrcxz, loop): Add 64bit variants.
158 (movq): Fix patterns.
159 (movmskps, pextrw, pinstrw): Add 64bit variants.
160
3b16e843
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1612002-01-31 Ivan Guzvinec <ivang@opencores.org>
162
163 * or32.h: New file.
164
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GH
1652002-01-22 Graydon Hoare <graydon@redhat.com>
166
167 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
168 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
169
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1702002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
171
172 * h8300.h: Comment typo fix.
173
a09cf9bd
MG
1742002-01-03 matthew green <mrg@redhat.com>
175
176 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
177 (PPC_OPCODE_BOOKE64): Likewise.
178
1befefea
JL
179Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
180
181 * hppa.h (call, ret): Move to end of table.
182 (addb, addib): PA2.0 variants should have been PA2.0W.
183 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
184 happy.
185 (fldw, fldd, fstw, fstd, bb): Likewise.
186 (short loads/stores): Tweak format specifier slightly to keep
187 disassembler happy.
188 (indexed loads/stores): Likewise.
189 (absolute loads/stores): Likewise.
190
124ddbb2
AO
1912001-12-04 Alexandre Oliva <aoliva@redhat.com>
192
193 * d10v.h (OPERAND_NOSP): New macro.
194
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1952001-11-29 Alexandre Oliva <aoliva@redhat.com>
196
197 * d10v.h (OPERAND_SP): New macro.
198
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1992001-11-15 Alan Modra <amodra@bigpond.net.au>
200
201 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
202
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TW
2032001-11-11 Timothy Wall <twall@alum.mit.edu>
204
205 * tic54x.h: Revise opcode layout; don't really need a separate
206 structure for parallel opcodes.
207
e5470cdc
AM
2082001-11-13 Zack Weinberg <zack@codesourcery.com>
209 Alan Modra <amodra@bigpond.net.au>
210
211 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
212 accept WordReg.
213
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CD
2142001-11-04 Chris Demetriou <cgd@broadcom.com>
215
216 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
217
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2182001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
219
220 * mmix.h: New file.
221
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CD
2222001-10-18 Chris Demetriou <cgd@broadcom.com>
223
224 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
225 of the expression, to make source code merging easier.
226
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CD
2272001-10-17 Chris Demetriou <cgd@broadcom.com>
228
229 * mips.h: Sort coprocessor instruction argument characters
230 in comment, add a few more words of description for "H".
231
2228315b
CD
2322001-10-17 Chris Demetriou <cgd@broadcom.com>
233
234 * mips.h (INSN_SB1): New cpu-specific instruction bit.
235 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
236 if cpu is CPU_SB1.
237
f5c120c5
MG
2382001-10-17 matthew green <mrg@redhat.com>
239
240 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
241
418c1742
MG
2422001-10-12 matthew green <mrg@redhat.com>
243
0716ce0d
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244 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
245 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
246 instructions, respectively.
418c1742 247
6ff2f2ba
NC
2482001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
249
250 * v850.h: Remove spurious comment.
251
015cf428
NC
2522001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
253
254 * h8300.h: Fix compile time warning messages
255
847b8b31
RH
2562001-09-04 Richard Henderson <rth@redhat.com>
257
258 * alpha.h (struct alpha_operand): Pack elements into bitfields.
259
a98b9439
EC
2602001-08-31 Eric Christopher <echristo@redhat.com>
261
262 * mips.h: Remove CPU_MIPS32_4K.
263
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AM
2642001-08-27 Torbjorn Granlund <tege@swox.com>
265
266 * ppc.h (PPC_OPERAND_DS): Define.
267
d83c6548
AJ
2682001-08-25 Andreas Jaeger <aj@suse.de>
269
270 * d30v.h: Fix declaration of reg_name_cnt.
271
272 * d10v.h: Fix declaration of d10v_reg_name_cnt.
273
274 * arc.h: Add prototypes from opcodes/arc-opc.c.
275
99c14723
TS
2762001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
277
278 * mips.h (INSN_10000): Define.
279 (OPCODE_IS_MEMBER): Check for INSN_10000.
280
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2812001-08-10 Alan Modra <amodra@one.net.au>
282
283 * ppc.h: Revert 2001-08-08.
284
3b16e843
NC
2852001-08-10 Richard Sandiford <rsandifo@redhat.com>
286
287 * mips.h (INSN_GP32): Remove.
288 (OPCODE_IS_MEMBER): Remove gp32 parameter.
289 (M_MOVE): New macro identifier.
290
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AM
2912001-08-08 Alan Modra <amodra@one.net.au>
292
293 1999-10-25 Torbjorn Granlund <tege@swox.com>
294 * ppc.h (struct powerpc_operand): New field `reloc'.
295
3b16e843
NC
2962001-08-01 Aldy Hernandez <aldyh@redhat.com>
297
298 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
299
3002001-07-12 Jeff Johnston <jjohnstn@redhat.com>
301
302 * cgen.h (CGEN_INSN): Add regex support.
303 (build_insn_regex): Declare.
304
81f6038f
FCE
3052001-07-11 Frank Ch. Eigler <fche@redhat.com>
306
307 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
308 (cgen_cpu_desc): Ditto.
309
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BE
3102001-07-07 Ben Elliston <bje@redhat.com>
311
312 * m88k.h: Clean up and reformat. Remove unused code.
313
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GK
3142001-06-14 Geoffrey Keating <geoffk@redhat.com>
315
316 * cgen.h (cgen_keyword): Add nonalpha_chars field.
317
d1cf510e
NC
3182001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
319
320 * mips.h (CPU_R12000): Define.
321
e281c457
JH
3222001-05-23 John Healy <jhealy@redhat.com>
323
324 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 325
aa5f19f2
NC
3262001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
327
328 * mips.h (INSN_ISA_MASK): Define.
329
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AM
3302001-05-12 Alan Modra <amodra@one.net.au>
331
332 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
333 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
334 and use InvMem as these insns must have register operands.
335
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AM
3362001-05-04 Alan Modra <amodra@one.net.au>
337
338 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
339 and pextrw to swap reg/rm assignments.
340
4ef7f0bf
HPN
3412001-04-05 Hans-Peter Nilsson <hp@axis.com>
342
343 * cris.h (enum cris_insn_version_usage): Correct comment for
344 cris_ver_v3p.
345
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AM
3462001-03-24 Alan Modra <alan@linuxcare.com.au>
347
348 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
349 Add InvMem to first operand of "maskmovdqu".
350
7ccb5238
HPN
3512001-03-22 Hans-Peter Nilsson <hp@axis.com>
352
353 * cris.h (ADD_PC_INCR_OPCODE): New macro.
354
361bfa20
KH
3552001-03-21 Kazu Hirata <kazu@hxi.com>
356
357 * h8300.h: Fix formatting.
358
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3592001-03-22 Alan Modra <alan@linuxcare.com.au>
360
361 * i386.h (i386_optab): Add paddq, psubq.
362
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3632001-03-19 Alan Modra <alan@linuxcare.com.au>
364
365 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
366
80a523c2
NC
3672001-02-28 Igor Shevlyakov <igor@windriver.com>
368
369 * m68k.h: new defines for Coldfire V4. Update mcf to know
370 about mcf5407.
371
e135f41b
NC
3722001-02-18 lars brinkhoff <lars@nocrew.org>
373
374 * pdp11.h: New file.
375
3762001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
377
378 * i386.h (i386_optab): SSE integer converison instructions have
379 64bit versions on x86-64.
380
8eaec934
NC
3812001-02-10 Nick Clifton <nickc@redhat.com>
382
383 * mips.h: Remove extraneous whitespace. Formating change to allow
384 for future contribution.
385
a85d7ed0
NC
3862001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
387
388 * s390.h: New file.
389
0715dc88
PM
3902001-02-02 Patrick Macdonald <patrickm@redhat.com>
391
392 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
393 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
394 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
395
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AM
3962001-01-24 Karsten Keil <kkeil@suse.de>
397
398 * i386.h (i386_optab): Fix swapgs
399
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AM
4002001-01-14 Alan Modra <alan@linuxcare.com.au>
401
402 * hppa.h: Describe new '<' and '>' operand types, and tidy
403 existing comments.
404 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
405 Remove duplicate "ldw j(s,b),x". Sort some entries.
406
e135f41b 4072001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
408
409 * i386.h (i386_optab): Fix pusha and ret templates.
410
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NC
4112001-01-11 Peter Targett <peter.targett@arccores.com>
412
413 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
414 definitions for masking cpu type.
415 (arc_ext_operand_value) New structure for storing extended
416 operands.
417 (ARC_OPERAND_*) Flags for operand values.
418
4192001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
420
421 * i386.h (pinsrw): Add.
422 (pshufw): Remove.
423 (cvttpd2dq): Fix operands.
424 (cvttps2dq): Likewise.
425 (movq2q): Rename to movdq2q.
426
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AM
4272001-01-10 Richard Schaal <richard.schaal@intel.com>
428
429 * i386.h: Correct movnti instruction.
430
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JJ
4312001-01-09 Jeff Johnston <jjohnstn@redhat.com>
432
433 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
434 of operands (unsigned char or unsigned short).
435 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
436 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
437
0d2bcfaf 4382001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
439
440 * i386.h (i386_optab): Make [sml]fence template to use immext field.
441
0d2bcfaf 4422001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
443
444 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
445 introduced by Pentium4
446
0d2bcfaf 4472000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
448
449 * i386.h (i386_optab): Add "rex*" instructions;
450 add swapgs; disable jmp/call far direct instructions for
451 64bit mode; add syscall and sysret; disable registers for 0xc6
452 template. Add 'q' suffixes to extendable instructions, disable
079966a8 453 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
454 (i386_regtab): Add extended registers.
455 (*Suf): Add No_qSuf.
456 (q_Suf, wlq_Suf, bwlq_Suf): New.
457
0d2bcfaf 4582000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
459
460 * i386.h (i386_optab): Replace "Imm" with "EncImm".
461 (i386_regtab): Add flags field.
d83c6548 462
bf40d919
NC
4632000-12-12 Nick Clifton <nickc@redhat.com>
464
465 * mips.h: Fix formatting.
466
4372b673
NC
4672000-12-01 Chris Demetriou <cgd@sibyte.com>
468
469 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
470 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
471 OP_*_SYSCALL definitions.
472 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
473 19 bit wait codes.
474 (MIPS operand specifier comments): Remove 'm', add 'U' and
475 'J', and update the meaning of 'B' so that it's more general.
476
e7af610e
NC
477 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
478 INSN_ISA5): Renumber, redefine to mean the ISA at which the
479 instruction was added.
480 (INSN_ISA32): New constant.
481 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
482 Renumber to avoid new and/or renumbered INSN_* constants.
483 (INSN_MIPS32): Delete.
484 (ISA_UNKNOWN): New constant to indicate unknown ISA.
485 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
486 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 487 constants available at that ISA level.
e7af610e
NC
488 (CPU_UNKNOWN): New constant to indicate unknown CPU.
489 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
490 define it with a unique value.
491 (OPCODE_IS_MEMBER): Update for new ISA membership-related
492 constant meanings.
493
84ea6cf2 494 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 495 definitions.
84ea6cf2 496
c6c98b38
NC
497 * mips.h (CPU_SB1): New constant.
498
19f7b010
JJ
4992000-10-20 Jakub Jelinek <jakub@redhat.com>
500
501 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
502 Note that '3' is used for siam operand.
503
139368c9
JW
5042000-09-22 Jim Wilson <wilson@cygnus.com>
505
506 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
507
156c2f8b 5082000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 509
156c2f8b
NC
510 * mips.h: Use defines instead of hard-coded processor numbers.
511 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 512 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
513 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
514 CPU_4KC, CPU_4KM, CPU_4KP): Define..
515 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 516 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 517 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
518 Add 'P' to used characters.
519 Use 'H' for coprocessor select field.
156c2f8b 520 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
521 Document new arg characters and add to used characters.
522 (INSN_MIPS32): New define for MIPS32 extensions.
523 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 524
3c5ce02e
AM
5252000-09-05 Alan Modra <alan@linuxcare.com.au>
526
527 * hppa.h: Mention cz completer.
528
50b81f19
JW
5292000-08-16 Jim Wilson <wilson@cygnus.com>
530
531 * ia64.h (IA64_OPCODE_POSTINC): New.
532
fc29466d
L
5332000-08-15 H.J. Lu <hjl@gnu.org>
534
535 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
536 IgnoreSize change.
537
4f1d9bd8
NC
5382000-08-08 Jason Eckhardt <jle@cygnus.com>
539
540 * i860.h: Small formatting adjustments.
541
45ee1401
DC
5422000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
543
544 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
545 Move related opcodes closer to each other.
546 Minor changes in comments, list undefined opcodes.
547
9d551405
DB
5482000-07-26 Dave Brolley <brolley@redhat.com>
549
550 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
551
4f1d9bd8
NC
5522000-07-22 Jason Eckhardt <jle@cygnus.com>
553
554 * i860.h (btne, bte, bla): Changed these opcodes
555 to use sbroff ('r') instead of split16 ('s').
556 (J, K, L, M): New operand types for 16-bit aligned fields.
557 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
558 use I, J, K, L, M instead of just I.
559 (T, U): New operand types for split 16-bit aligned fields.
560 (st.x): Changed these opcodes to use S, T, U instead of just S.
561 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
562 exist on the i860.
563 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
564 (pfeq.ss, pfeq.dd): New opcodes.
565 (st.s): Fixed incorrect mask bits.
566 (fmlow): Fixed incorrect mask bits.
567 (fzchkl, pfzchkl): Fixed incorrect mask bits.
568 (faddz, pfaddz): Fixed incorrect mask bits.
569 (form, pform): Fixed incorrect mask bits.
570 (pfld.l): Fixed incorrect mask bits.
571 (fst.q): Fixed incorrect mask bits.
572 (all floating point opcodes): Fixed incorrect mask bits for
573 handling of dual bit.
574
c8488617
HPN
5752000-07-20 Hans-Peter Nilsson <hp@axis.com>
576
577 cris.h: New file.
578
65aa24b6
NC
5792000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
580
581 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
582 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
583 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
584 (AVR_ISA_M83): Define for ATmega83, ATmega85.
585 (espm): Remove, because ESPM removed in databook update.
586 (eicall, eijmp): Move to the end of opcode table.
587
60bcf0fa
NC
5882000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
589
590 * m68hc11.h: New file for support of Motorola 68hc11.
591
60a2978a
DC
592Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
593
594 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
595
68ab2dd9
DC
596Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
597
598 * avr.h: New file with AVR opcodes.
599
f0662e27
DL
600Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
601
602 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
603
b722f2be
AM
6042000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
605
606 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
607
f9e0cf0b
AM
6082000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
609
610 * i386.h: Use sl_FP, not sl_Suf for fild.
611
f660ee8b
FCE
6122000-05-16 Frank Ch. Eigler <fche@redhat.com>
613
614 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
615 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
616 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
617 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
618
558b0a60
AM
6192000-05-13 Alan Modra <alan@linuxcare.com.au>,
620
621 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
622
e413e4e9
AM
6232000-05-13 Alan Modra <alan@linuxcare.com.au>,
624 Alexander Sokolov <robocop@netlink.ru>
625
626 * i386.h (i386_optab): Add cpu_flags for all instructions.
627
6282000-05-13 Alan Modra <alan@linuxcare.com.au>
629
630 From Gavin Romig-Koch <gavin@cygnus.com>
631 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
632
5c84d377
TW
6332000-05-04 Timothy Wall <twall@cygnus.com>
634
635 * tic54x.h: New.
636
966f959b
C
6372000-05-03 J.T. Conklin <jtc@redback.com>
638
639 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
640 (PPC_OPERAND_VR): New operand flag for vector registers.
641
c5d05dbb
JL
6422000-05-01 Kazu Hirata <kazu@hxi.com>
643
644 * h8300.h (EOP): Add missing initializer.
645
a7fba0e0
JL
646Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
647
648 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
649 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
650 New operand types l,y,&,fe,fE,fx added to support above forms.
651 (pa_opcodes): Replaced usage of 'x' as source/target for
652 floating point double-word loads/stores with 'fx'.
653
800eeca4
JW
654Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
655 David Mosberger <davidm@hpl.hp.com>
656 Timothy Wall <twall@cygnus.com>
657 Jim Wilson <wilson@cygnus.com>
658
659 * ia64.h: New file.
660
ba23e138
NC
6612000-03-27 Nick Clifton <nickc@cygnus.com>
662
663 * d30v.h (SHORT_A1): Fix value.
664 (SHORT_AR): Renumber so that it is at the end of the list of short
665 instructions, not the end of the list of long instructions.
666
d0b47220
AM
6672000-03-26 Alan Modra <alan@linuxcare.com>
668
669 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
670 problem isn't really specific to Unixware.
671 (OLDGCC_COMPAT): Define.
672 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
673 destination %st(0).
674 Fix lots of comments.
675
866afedc
NC
6762000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
677
678 * d30v.h:
679 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
680 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
681 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
682 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
683 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
684 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
685 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
686
cc5ca5ce
AM
6872000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
688
689 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
690 fistpd without suffix.
691
68e324a2
NC
6922000-02-24 Nick Clifton <nickc@cygnus.com>
693
694 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
695 'signed_overflow_ok_p'.
696 Delete prototypes for cgen_set_flags() and cgen_get_flags().
697
60f036a2
AH
6982000-02-24 Andrew Haley <aph@cygnus.com>
699
700 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
701 (CGEN_CPU_TABLE): flags: new field.
702 Add prototypes for new functions.
d83c6548 703
9b9b5cd4
AM
7042000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
705
706 * i386.h: Add some more UNIXWARE_COMPAT comments.
707
5b93d8bb
AM
7082000-02-23 Linas Vepstas <linas@linas.org>
709
710 * i370.h: New file.
711
4f1d9bd8
NC
7122000-02-22 Chandra Chavva <cchavva@cygnus.com>
713
714 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
715 cannot be combined in parallel with ADD/SUBppp.
716
87f398dd
AH
7172000-02-22 Andrew Haley <aph@cygnus.com>
718
719 * mips.h: (OPCODE_IS_MEMBER): Add comment.
720
367c01af
AH
7211999-12-30 Andrew Haley <aph@cygnus.com>
722
9a1e79ca
AH
723 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
724 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
725 insns.
367c01af 726
add0c677
AM
7272000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
728
729 * i386.h: Qualify intel mode far call and jmp with x_Suf.
730
3138f287
AM
7311999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
732
733 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
734 indirect jumps and calls. Add FF/3 call for intel mode.
735
ccecd07b
JL
736Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
737
738 * mn10300.h: Add new operand types. Add new instruction formats.
739
b37e19e9
JL
740Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
741
742 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
743 instruction.
744
5fce5ddf
GRK
7451999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
746
747 * mips.h (INSN_ISA5): New.
748
2bd7f1f3
GRK
7491999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
750
751 * mips.h (OPCODE_IS_MEMBER): New.
752
4df2b5c5
NC
7531999-10-29 Nick Clifton <nickc@cygnus.com>
754
755 * d30v.h (SHORT_AR): Define.
756
446a06c9
MM
7571999-10-18 Michael Meissner <meissner@cygnus.com>
758
759 * alpha.h (alpha_num_opcodes): Convert to unsigned.
760 (alpha_num_operands): Ditto.
761
eca04c6a
JL
762Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
763
764 * hppa.h (pa_opcodes): Add load and store cache control to
765 instructions. Add ordered access load and store.
766
767 * hppa.h (pa_opcode): Add new entries for addb and addib.
768
769 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
770
771 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
772
c43185de
DN
773Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
774
775 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
776
ec3533da
JL
777Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
778
390f858d
JL
779 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
780 and "be" using completer prefixes.
781
8c47ebd9
JL
782 * hppa.h (pa_opcodes): Add initializers to silence compiler.
783
ec3533da
JL
784 * hppa.h: Update comments about character usage.
785
18369bea
JL
786Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
787
788 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
789 up the new fstw & bve instructions.
790
c36efdd2
JL
791Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
792
d3ffb032
JL
793 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
794 instructions.
795
c49ec3da
JL
796 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
797
5d2e7ecc
JL
798 * hppa.h (pa_opcodes): Add long offset double word load/store
799 instructions.
800
6397d1a2
JL
801 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
802 stores.
803
142f0fe0
JL
804 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
805
f5a68b45
JL
806 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
807
8235801e
JL
808 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
809
35184366
JL
810 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
811
f0bfde5e
JL
812 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
813
27bbbb58
JL
814 * hppa.h (pa_opcodes): Add support for "b,l".
815
c36efdd2
JL
816 * hppa.h (pa_opcodes): Add support for "b,gate".
817
f2727d04
JL
818Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
819
9392fb11 820 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 821 in xmpyu.
9392fb11 822
e0c52e99
JL
823 * hppa.h (pa_opcodes): Fix mask for probe and probei.
824
f2727d04
JL
825 * hppa.h (pa_opcodes): Fix mask for depwi.
826
52d836e2
JL
827Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
828
829 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
830 an explicit output argument.
831
90765e3a
JL
832Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
833
834 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
835 Add a few PA2.0 loads and store variants.
836
8340b17f
ILT
8371999-09-04 Steve Chamberlain <sac@pobox.com>
838
839 * pj.h: New file.
840
5f47d35b
AM
8411999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
842
843 * i386.h (i386_regtab): Move %st to top of table, and split off
844 other fp reg entries.
845 (i386_float_regtab): To here.
846
1c143202
JL
847Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
848
7d8fdb64
JL
849 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
850 by 'f'.
851
90927b9c
JL
852 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
853 Add supporting args.
854
1d16bf9c
JL
855 * hppa.h: Document new completers and args.
856 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
857 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
858 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
859 pmenb and pmdis.
860
96226a68
JL
861 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
862 hshr, hsub, mixh, mixw, permh.
863
5d4ba527
JL
864 * hppa.h (pa_opcodes): Change completers in instructions to
865 use 'c' prefix.
866
e9fc28c6
JL
867 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
868 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
869
1c143202
JL
870 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
871 fnegabs to use 'I' instead of 'F'.
872
9e525108
AM
8731999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
874
875 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
876 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
877 Alphabetically sort PIII insns.
878
e8da1bf1
DE
879Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
880
881 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
882
7d627258
JL
883Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
884
5696871a
JL
885 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
886 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
887
7d627258
JL
888 * hppa.h: Document 64 bit condition completers.
889
c5e52916
JL
890Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
891
892 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
893
eecb386c
AM
8941999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
895
896 * i386.h (i386_optab): Add DefaultSize modifier to all insns
897 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
898 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
899
88a380f3
JL
900Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
901 Jeff Law <law@cygnus.com>
902
903 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
904
905 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 906
d83c6548 907 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
908 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
909
145cf1f0
AM
9101999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
911
912 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
913
73826640
JL
914Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
915
916 * hppa.h (struct pa_opcode): Add new field "flags".
917 (FLAGS_STRICT): Define.
918
b65db252
JL
919Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
920 Jeff Law <law@cygnus.com>
921
f7fc668b
JL
922 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
923
924 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 925
10084519
AM
9261999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
927
928 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
929 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
930 flag to fcomi and friends.
931
cd8a80ba
JL
932Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
933
934 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 935 integer logical instructions.
cd8a80ba 936
1fca749b
ILT
9371999-05-28 Linus Nordberg <linus.nordberg@canit.se>
938
939 * m68k.h: Document new formats `E', `G', `H' and new places `N',
940 `n', `o'.
941
942 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
943 and new places `m', `M', `h'.
944
aa008907
JL
945Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
946
947 * hppa.h (pa_opcodes): Add several processor specific system
948 instructions.
949
e26b85f0
JL
950Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
951
d83c6548 952 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
953 "addb", and "addib" to be used by the disassembler.
954
c608c12e
AM
9551999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
956
957 * i386.h (ReverseModrm): Remove all occurences.
958 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
959 movmskps, pextrw, pmovmskb, maskmovq.
960 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
961 ignore the data size prefix.
962
963 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
964 Mostly stolen from Doug Ledford <dledford@redhat.com>
965
45c18104
RH
966Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
967
968 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
969
252b5132
RH
9701999-04-14 Doug Evans <devans@casey.cygnus.com>
971
972 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
973 (CGEN_ATTR_TYPE): Update.
974 (CGEN_ATTR_MASK): Number booleans starting at 0.
975 (CGEN_ATTR_VALUE): Update.
976 (CGEN_INSN_ATTR): Update.
977
978Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
979
980 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
981 instructions.
982
983Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
984
985 * hppa.h (bb, bvb): Tweak opcode/mask.
986
987
9881999-03-22 Doug Evans <devans@casey.cygnus.com>
989
990 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
991 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
992 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
993 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
994 Delete member max_insn_size.
995 (enum cgen_cpu_open_arg): New enum.
996 (cpu_open): Update prototype.
997 (cpu_open_1): Declare.
998 (cgen_set_cpu): Delete.
999
10001999-03-11 Doug Evans <devans@casey.cygnus.com>
1001
1002 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
1003 (CGEN_OPERAND_NIL): New macro.
1004 (CGEN_OPERAND): New member `type'.
1005 (@arch@_cgen_operand_table): Delete decl.
1006 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
1007 (CGEN_OPERAND_TABLE): New struct.
1008 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
1009 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
1010 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
1011 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
1012 {get,set}_{int,vma}_operand.
1013 (@arch@_cgen_cpu_open): New arg `isa'.
1014 (cgen_set_cpu): Ditto.
1015
1016Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
1017
1018 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
1019
10201999-02-25 Doug Evans <devans@casey.cygnus.com>
1021
1022 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
1023 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
1024 enum cgen_hw_type.
1025 (CGEN_HW_TABLE): New struct.
1026 (hw_table): Delete declaration.
1027 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
1028 to table entry to enum.
1029 (CGEN_OPINST): Ditto.
1030 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1031
1032Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1033
1034 * alpha.h (AXP_OPCODE_EV6): New.
1035 (AXP_OPCODE_NOPAL): Include it.
1036
10371999-02-09 Doug Evans <devans@casey.cygnus.com>
1038
1039 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1040 All uses updated. New members int_insn_p, max_insn_size,
1041 parse_operand,insert_operand,extract_operand,print_operand,
1042 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1043 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1044 extract_handlers,print_handlers.
1045 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1046 (CGEN_ATTR_BOOL_OFFSET): New macro.
1047 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1048 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1049 (cgen_opcode_handler): Renamed from cgen_base.
1050 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1051 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1052 all uses updated.
1053 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1054 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1055 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1056 (CGEN_OPCODE,CGEN_IBASE): New types.
1057 (CGEN_INSN): Rewrite.
1058 (CGEN_{ASM,DIS}_HASH*): Delete.
1059 (init_opcode_table,init_ibld_table): Declare.
1060 (CGEN_INSN_ATTR): New type.
1061
1062Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1063
252b5132
RH
1064 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1065 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1066 Change *Suf definitions to include x and d suffixes.
1067 (movsx): Use w_Suf and b_Suf.
1068 (movzx): Likewise.
1069 (movs): Use bwld_Suf.
1070 (fld): Change ordering. Use sld_FP.
1071 (fild): Add Intel Syntax equivalent of fildq.
1072 (fst): Use sld_FP.
1073 (fist): Use sld_FP.
1074 (fstp): Use sld_FP. Add x_FP version.
1075 (fistp): LLongMem version for Intel Syntax.
1076 (fcom, fcomp): Use sld_FP.
1077 (fadd, fiadd, fsub): Use sld_FP.
1078 (fsubr): Use sld_FP.
1079 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1080
10811999-01-27 Doug Evans <devans@casey.cygnus.com>
1082
1083 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1084 CGEN_MODE_UINT.
1085
e135f41b 10861999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1087
1088 * hppa.h (bv): Fix mask.
1089
10901999-01-05 Doug Evans <devans@casey.cygnus.com>
1091
1092 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1093 (CGEN_ATTR): Use it.
1094 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1095 (CGEN_ATTR_TABLE): New member dfault.
1096
10971998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1098
1099 * mips.h (MIPS16_INSN_BRANCH): New.
1100
1101Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1102
1103 The following is part of a change made by Edith Epstein
d83c6548
AJ
1104 <eepstein@sophia.cygnus.com> as part of a project to merge in
1105 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1106
1107 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1108 after.
252b5132
RH
1109
1110Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1111
1112 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1113 status word instructions.
252b5132
RH
1114
11151998-11-30 Doug Evans <devans@casey.cygnus.com>
1116
1117 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1118 (struct cgen_keyword_entry): Ditto.
1119 (struct cgen_operand): Ditto.
1120 (CGEN_IFLD): New typedef, with associated access macros.
1121 (CGEN_IFMT): New typedef, with associated access macros.
1122 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1123 (CGEN_IVALUE): New typedef.
1124 (struct cgen_insn): Delete const on syntax,attrs members.
1125 `format' now points to format data. Type of `value' is now
1126 CGEN_IVALUE.
1127 (struct cgen_opcode_table): New member ifld_table.
1128
11291998-11-18 Doug Evans <devans@casey.cygnus.com>
1130
1131 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1132 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1133 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1134 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1135 (cgen_opcode_table): Update type of dis_hash fn.
1136 (extract_operand): Update type of `insn_value' arg.
1137
1138Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1139
1140 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1141
1142Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1143
1144 * mips.h (INSN_MULT): Added.
1145
1146Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1147
1148 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1149
1150Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1151
1152 * cgen.h (CGEN_INSN_INT): New typedef.
1153 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1154 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1155 (CGEN_INSN_BYTES_PTR): New typedef.
1156 (CGEN_EXTRACT_INFO): New typedef.
1157 (cgen_insert_fn,cgen_extract_fn): Update.
1158 (cgen_opcode_table): New member `insn_endian'.
1159 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1160 (insert_operand,extract_operand): Update.
1161 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1162
1163Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1164
1165 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1166 (struct CGEN_HW_ENTRY): New member `attrs'.
1167 (CGEN_HW_ATTR): New macro.
1168 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1169 (CGEN_INSN_INVALID_P): New macro.
1170
1171Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1172
1173 * hppa.h: Add "fid".
d83c6548 1174
252b5132
RH
1175Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1176
1177 From Robert Andrew Dale <rob@nb.net>
1178 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1179 (AMD_3DNOW_OPCODE): Define.
1180
1181Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1182
1183 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1184
1185Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1186
1187 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1188
1189Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1190
1191 Move all global state data into opcode table struct, and treat
1192 opcode table as something that is "opened/closed".
1193 * cgen.h (CGEN_OPCODE_DESC): New type.
1194 (all fns): New first arg of opcode table descriptor.
1195 (cgen_set_parse_operand_fn): Add prototype.
1196 (cgen_current_machine,cgen_current_endian): Delete.
1197 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1198 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1199 dis_hash_table,dis_hash_table_entries.
1200 (opcode_open,opcode_close): Add prototypes.
1201
1202 * cgen.h (cgen_insn): New element `cdx'.
1203
1204Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1205
1206 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1207
1208Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1209
1210 * mn10300.h: Add "no_match_operands" field for instructions.
1211 (MN10300_MAX_OPERANDS): Define.
1212
1213Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1214
1215 * cgen.h (cgen_macro_insn_count): Declare.
1216
1217Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1218
1219 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1220 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1221 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1222 set_{int,vma}_operand.
1223
1224Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1225
1226 * mn10300.h: Add "machine" field for instructions.
1227 (MN103, AM30): Define machine types.
d83c6548 1228
252b5132
RH
1229Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1230
1231 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1232
12331998-06-18 Ulrich Drepper <drepper@cygnus.com>
1234
1235 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1236
1237Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1238
1239 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1240 and ud2b.
1241 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1242 those that happen to be implemented on pentiums.
1243
1244Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1245
1246 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1247 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1248 with Size16|IgnoreSize or Size32|IgnoreSize.
1249
1250Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1251
1252 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1253 (REPE): Rename to REPE_PREFIX_OPCODE.
1254 (i386_regtab_end): Remove.
1255 (i386_prefixtab, i386_prefixtab_end): Remove.
1256 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1257 of md_begin.
1258 (MAX_OPCODE_SIZE): Define.
1259 (i386_optab_end): Remove.
1260 (sl_Suf): Define.
1261 (sl_FP): Use sl_Suf.
1262
1263 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1264 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1265 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1266 data32, dword, and adword prefixes.
1267 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1268 regs.
1269
1270Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1271
1272 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1273
1274 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1275 register operands, because this is a common idiom. Flag them with
1276 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1277 fdivrp because gcc erroneously generates them. Also flag with a
1278 warning.
1279
1280 * i386.h: Add suffix modifiers to most insns, and tighter operand
1281 checks in some cases. Fix a number of UnixWare compatibility
1282 issues with float insns. Merge some floating point opcodes, using
1283 new FloatMF modifier.
1284 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1285 consistency.
1286
1287 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1288 IgnoreDataSize where appropriate.
1289
1290Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1291
1292 * i386.h: (one_byte_segment_defaults): Remove.
1293 (two_byte_segment_defaults): Remove.
1294 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1295
1296Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1297
1298 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1299 (cgen_hw_lookup_by_num): Declare.
1300
1301Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1302
1303 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1304 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1305
1306Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1307
1308 * cgen.h (cgen_asm_init_parse): Delete.
1309 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1310 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1311
1312Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1313
1314 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1315 (cgen_asm_finish_insn): Update prototype.
1316 (cgen_insn): New members num, data.
1317 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1318 dis_hash, dis_hash_table_size moved to ...
1319 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1320 All uses updated. New members asm_hash_p, dis_hash_p.
1321 (CGEN_MINSN_EXPANSION): New struct.
1322 (cgen_expand_macro_insn): Declare.
1323 (cgen_macro_insn_count): Declare.
1324 (get_insn_operands): Update prototype.
1325 (lookup_get_insn_operands): Declare.
1326
1327Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1328
1329 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1330 regKludge. Add operands types for string instructions.
1331
1332Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1333
1334 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1335 table.
1336
1337Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1338
1339 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1340 for `gettext'.
1341
1342Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1343
1344 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1345 Add IsString flag to string instructions.
1346 (IS_STRING): Don't define.
1347 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1348 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1349 (SS_PREFIX_OPCODE): Define.
1350
1351Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1352
1353 * i386.h: Revert March 24 patch; no more LinearAddress.
1354
1355Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1356
1357 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1358 instructions, and instead add FWait opcode modifier. Add short
1359 form of fldenv and fstenv.
1360 (FWAIT_OPCODE): Define.
1361
1362 * i386.h (i386_optab): Change second operand constraint of `mov
1363 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1364 allow legal instructions such as `movl %gs,%esi'
1365
1366Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1367
1368 * h8300.h: Various changes to fully bracket initializers.
1369
1370Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1371
1372 * i386.h: Set LinearAddress for lidt and lgdt.
1373
1374Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1375
1376 * cgen.h (CGEN_BOOL_ATTR): New macro.
1377
1378Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1379
1380 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1381
1382Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1383
1384 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1385 (cgen_insn): Record syntax and format entries here, rather than
1386 separately.
1387
1388Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1389
1390 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1391
1392Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1393
1394 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1395 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1396 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1397
1398Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1399
1400 * cgen.h (lookup_insn): New argument alias_p.
1401
1402Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1403
1404Fix rac to accept only a0:
1405 * d10v.h (OPERAND_ACC): Split into:
1406 (OPERAND_ACC0, OPERAND_ACC1) .
1407 (OPERAND_GPR): Define.
1408
1409Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1410
1411 * cgen.h (CGEN_FIELDS): Define here.
1412 (CGEN_HW_ENTRY): New member `type'.
1413 (hw_list): Delete decl.
1414 (enum cgen_mode): Declare.
1415 (CGEN_OPERAND): New member `hw'.
1416 (enum cgen_operand_instance_type): Declare.
1417 (CGEN_OPERAND_INSTANCE): New type.
1418 (CGEN_INSN): New member `operands'.
1419 (CGEN_OPCODE_DATA): Make hw_list const.
1420 (get_insn_operands,lookup_insn): Add prototypes for.
1421
1422Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1423
1424 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1425 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1426 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1427 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1428
1429Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1430
1431 * cgen.h: Correct typo in comment end marker.
1432
1433Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1434
1435 * tic30.h: New file.
1436
5a109b67 1437Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1438
1439 * cgen.h: Add prototypes for cgen_save_fixups(),
1440 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1441 of cgen_asm_finish_insn() to return a char *.
1442
1443Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1444
1445 * cgen.h: Formatting changes to improve readability.
1446
1447Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1448
1449 * cgen.h (*): Clean up pass over `struct foo' usage.
1450 (CGEN_ATTR): Make unsigned char.
1451 (CGEN_ATTR_TYPE): Update.
1452 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1453 (cgen_base): Move member `attrs' to cgen_insn.
1454 (CGEN_KEYWORD): New member `null_entry'.
1455 (CGEN_{SYNTAX,FORMAT}): New types.
1456 (cgen_insn): Format and syntax separated from each other.
1457
1458Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1459
1460 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1461 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1462 flags_{used,set} long.
1463 (d30v_operand): Make flags field long.
1464
1465Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1466
1467 * m68k.h: Fix comment describing operand types.
1468
1469Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1470
1471 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1472 everything else after down.
1473
1474Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1475
1476 * d10v.h (OPERAND_FLAG): Split into:
1477 (OPERAND_FFLAG, OPERAND_CFLAG) .
1478
1479Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1480
1481 * mips.h (struct mips_opcode): Changed comments to reflect new
1482 field usage.
1483
1484Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1485
1486 * mips.h: Added to comments a quick-ref list of all assigned
1487 operand type characters.
1488 (OP_{MASK,SH}_PERFREG): New macros.
1489
1490Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1491
1492 * sparc.h: Add '_' and '/' for v9a asr's.
1493 Patch from David Miller <davem@vger.rutgers.edu>
1494
1495Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1496
1497 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1498 area are not available in the base model (H8/300).
1499
1500Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1501
1502 * m68k.h: Remove documentation of ` operand specifier.
1503
1504Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1505
1506 * m68k.h: Document q and v operand specifiers.
1507
1508Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1509
1510 * v850.h (struct v850_opcode): Add processors field.
1511 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1512 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1513 (PROCESSOR_V850EA): New bit constants.
1514
1515Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1516
1517 Merge changes from Martin Hunt:
1518
1519 * d30v.h: Allow up to 64 control registers. Add
1520 SHORT_A5S format.
1521
1522 * d30v.h (LONG_Db): New form for delayed branches.
1523
1524 * d30v.h: (LONG_Db): New form for repeati.
1525
1526 * d30v.h (SHORT_D2B): New form.
1527
1528 * d30v.h (SHORT_A2): New form.
1529
1530 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1531 registers are used. Needed for VLIW optimization.
1532
1533Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1534
1535 * cgen.h: Move assembler interface section
1536 up so cgen_parse_operand_result is defined for cgen_parse_address.
1537 (cgen_parse_address): Update prototype.
1538
1539Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1540
1541 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1542
1543Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1544
1545 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1546 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1547 <paubert@iram.es>.
1548
1549 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1550 <paubert@iram.es>.
1551
1552 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1553 <paubert@iram.es>.
1554
1555 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1556 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1557
1558Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1559
1560 * v850.h (V850_NOT_R0): New flag.
1561
1562Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1563
1564 * v850.h (struct v850_opcode): Remove flags field.
1565
1566Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1567
1568 * v850.h (struct v850_opcode): Add flags field.
1569 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1570 fields.
1571 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1572 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1573
1574Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1575
1576 * arc.h: New file.
1577
1578Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1579
1580 * sparc.h (sparc_opcodes): Declare as const.
1581
1582Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1583
1584 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1585 uses single or double precision floating point resources.
1586 (INSN_NO_ISA, INSN_ISA1): Define.
1587 (cpu specific INSN macros): Tweak into bitmasks outside the range
1588 of INSN_ISA field.
1589
1590Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1591
1592 * i386.h: Fix pand opcode.
1593
1594Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1595
1596 * mips.h: Widen INSN_ISA and move it to a more convenient
1597 bit position. Add INSN_3900.
1598
1599Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1600
1601 * mips.h (struct mips_opcode): added new field membership.
1602
1603Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1604
1605 * i386.h (movd): only Reg32 is allowed.
1606
1607 * i386.h: add fcomp and ud2. From Wayne Scott
1608 <wscott@ichips.intel.com>.
1609
1610Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1611
1612 * i386.h: Add MMX instructions.
1613
1614Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1615
1616 * i386.h: Remove W modifier from conditional move instructions.
1617
1618Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1619
1620 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1621 with no arguments to match that generated by the UnixWare
1622 assembler.
1623
1624Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1625
1626 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1627 (cgen_parse_operand_fn): Declare.
1628 (cgen_init_parse_operand): Declare.
1629 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1630 new argument `want'.
1631 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1632 (enum cgen_parse_operand_type): New enum.
1633
1634Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1635
1636 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1637
1638Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1639
1640 * cgen.h: New file.
1641
1642Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1643
1644 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1645 fdivrp.
1646
1647Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1648
1649 * v850.h (extract): Make unsigned.
1650
1651Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1652
1653 * i386.h: Add iclr.
1654
1655Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1656
1657 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1658 take a direction bit.
1659
1660Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1661
1662 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1663
1664Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1665
1666 * sparc.h: Include <ansidecl.h>. Update function declarations to
1667 use prototypes, and to use const when appropriate.
1668
1669Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1670
1671 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1672
1673Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1674
1675 * d10v.h: Change pre_defined_registers to
1676 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1677
1678Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1679
1680 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1681 Change mips_opcodes from const array to a pointer,
1682 and change bfd_mips_num_opcodes from const int to int,
1683 so that we can increase the size of the mips opcodes table
1684 dynamically.
1685
1686Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1687
1688 * d30v.h (FLAG_X): Remove unused flag.
1689
1690Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1691
1692 * d30v.h: New file.
1693
1694Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1695
1696 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1697 (PDS_VALUE): Macro to access value field of predefined symbols.
1698 (tic80_next_predefined_symbol): Add prototype.
1699
1700Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1701
1702 * tic80.h (tic80_symbol_to_value): Change prototype to match
1703 change in function, added class parameter.
1704
1705Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1706
1707 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1708 endmask fields, which are somewhat weird in that 0 and 32 are
1709 treated exactly the same.
1710
1711Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1712
1713 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1714 rather than a constant that is 2**X. Reorder them to put bits for
1715 operands that have symbolic names in the upper bits, so they can
1716 be packed into an int where the lower bits contain the value that
1717 corresponds to that symbolic name.
1718 (predefined_symbo): Add struct.
1719 (tic80_predefined_symbols): Declare array of translations.
1720 (tic80_num_predefined_symbols): Declare size of that array.
1721 (tic80_value_to_symbol): Declare function.
1722 (tic80_symbol_to_value): Declare function.
1723
1724Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1725
1726 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1727
1728Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1729
1730 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1731 be the destination register.
1732
1733Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1734
1735 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1736 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1737 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1738 that the opcode can have two vector instructions in a single
1739 32 bit word and we have to encode/decode both.
1740
1741Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1742
1743 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1744 TIC80_OPERAND_RELATIVE for PC relative.
1745 (TIC80_OPERAND_BASEREL): New flag bit for register
1746 base relative.
1747
1748Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1749
1750 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1751
1752Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1753
1754 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1755 ":s" modifier for scaling.
1756
1757Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1758
1759 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1760 (TIC80_OPERAND_M_LI): Ditto
1761
1762Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1763
1764 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1765 (TIC80_OPERAND_CC): New define for condition code operand.
1766 (TIC80_OPERAND_CR): New define for control register operand.
1767
1768Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1769
1770 * tic80.h (struct tic80_opcode): Name changed.
1771 (struct tic80_opcode): Remove format field.
1772 (struct tic80_operand): Add insertion and extraction functions.
1773 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1774 correct ones.
1775 (FMT_*): Ditto.
1776
1777Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1778
1779 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1780 type IV instruction offsets.
1781
1782Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1783
1784 * tic80.h: New file.
1785
1786Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1787
1788 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1789
1790Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1791
1792 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1793 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1794 * v850.h: Fix comment, v850_operand not powerpc_operand.
1795
1796Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1797
1798 * mn10200.h: Flesh out structures and definitions needed by
1799 the mn10200 assembler & disassembler.
1800
1801Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1802
1803 * mips.h: Add mips16 definitions.
1804
1805Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1806
1807 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1808
1809Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1810
1811 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1812 (MN10300_OPERAND_MEMADDR): Define.
1813
1814Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1815
1816 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1817
1818Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1819
1820 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1821
1822Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1823
1824 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1825
1826Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1827
1828 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1829
1830Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1831
1832 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1833 negative to minimize problems with shared libraries. Organize
1834 instruction subsets by AMASK extensions and PALcode
1835 implementation.
252b5132
RH
1836 (struct alpha_operand): Move flags slot for better packing.
1837
1838Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1839
1840 * v850.h (V850_OPERAND_RELAX): New operand flag.
1841
1842Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1843
1844 * mn10300.h (FMT_*): Move operand format definitions
1845 here.
1846
1847Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1848
1849 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1850
1851Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1852
1853 * mn10300.h (mn10300_opcode): Add "format" field.
1854 (MN10300_OPERAND_*): Define.
1855
1856Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1857
1858 * mn10x00.h: Delete.
1859 * mn10200.h, mn10300.h: New files.
1860
1861Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1862
1863 * mn10x00.h: New file.
1864
1865Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1866
1867 * v850.h: Add new flag to indicate this instruction uses a PC
1868 displacement.
1869
1870Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1871
1872 * h8300.h (stmac): Add missing instruction.
1873
1874Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1875
1876 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1877 field.
1878
1879Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1880
1881 * v850.h (V850_OPERAND_EP): Define.
1882
1883 * v850.h (v850_opcode): Add size field.
1884
1885Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1886
1887 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1888 to functions used to handle unusual operand encoding.
252b5132 1889 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1890 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1891
1892Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1893
1894 * v850.h (v850_operands): Add flags field.
1895 (OPERAND_REG, OPERAND_NUM): Defined.
1896
1897Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1898
1899 * v850.h: New file.
1900
1901Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1902
1903 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1904 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1905 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1906 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1907 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1908 Defined.
252b5132
RH
1909
1910Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1911
1912 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1913 a 3 bit space id instead of a 2 bit space id.
1914
1915Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1916
1917 * d10v.h: Add some additional defines to support the
d83c6548 1918 assembler in determining which operations can be done in parallel.
252b5132
RH
1919
1920Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1921
1922 * h8300.h (SN): Define.
1923 (eepmov.b): Renamed from "eepmov"
1924 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1925 with them.
1926
1927Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1928
1929 * d10v.h (OPERAND_SHIFT): New operand flag.
1930
1931Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1932
1933 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1934 signed numbers.
252b5132
RH
1935
1936Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1937
1938 * d10v.h (pd_reg): Define. Putting the definition here allows
1939 the assembler and disassembler to share the same struct.
1940
1941Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1942
1943 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1944 Williams <steve@icarus.com>.
1945
1946Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1947
1948 * d10v.h: New file.
1949
1950Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1951
1952 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1953
1954Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1955
d83c6548 1956 * m68k.h (mcf5200): New macro.
252b5132
RH
1957 Document names of coldfire control registers.
1958
1959Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1960
1961 * h8300.h (SRC_IN_DST): Define.
1962
1963 * h8300.h (UNOP3): Mark the register operand in this insn
1964 as a source operand, not a destination operand.
1965 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1966 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1967 register operand with SRC_IN_DST.
1968
1969Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1970
1971 * alpha.h: New file.
1972
1973Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1974
1975 * rs6k.h: Remove obsolete file.
1976
1977Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1978
1979 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1980 fdivp, and fdivrp. Add ffreep.
1981
1982Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1983
1984 * h8300.h: Reorder various #defines for readability.
1985 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1986 (BITOP): Accept additional (unused) argument. All callers changed.
1987 (EBITOP): Likewise.
1988 (O_LAST): Bump.
1989 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1990
1991 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1992 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1993 (BITOP, EBITOP): Handle new H8/S addressing modes for
1994 bit insns.
1995 (UNOP3): Handle new shift/rotate insns on the H8/S.
1996 (insns using exr): New instructions.
1997 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1998
1999Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
2000
2001 * h8300.h (add.l): Undo Apr 5th change. The manual I had
2002 was incorrect.
2003
2004Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
2005
2006 * h8300.h (START): Remove.
2007 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
2008 and mov.l insns that can be relaxed.
2009
2010Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
2011
2012 * i386.h: Remove Abs32 from lcall.
2013
2014Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
2015
2016 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
2017 (SLCPOP): New macro.
2018 Mark X,Y opcode letters as in use.
2019
2020Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
2021
2022 * sparc.h (F_FLOAT, F_FBR): Define.
2023
2024Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
2025
2026 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
2027 from all insns.
2028 (ABS8SRC,ABS8DST): Add ABS8MEM.
2029 (add.l): Fix reg+reg variant.
2030 (eepmov.w): Renamed from eepmovw.
2031 (ldc,stc): Fix many cases.
2032
2033Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2034
2035 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2036
2037Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2038
2039 * sparc.h (O): Mark operand letter as in use.
2040
2041Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2042
2043 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2044 Mark operand letters uU as in use.
2045
2046Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2047
2048 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2049 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2050 (SPARC_OPCODE_SUPPORTED): New macro.
2051 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2052 (F_NOTV9): Delete.
2053
2054Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2055
2056 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2057 declaration consistent with return type in definition.
2058
2059Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2060
2061 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2062
2063Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2064
2065 * i386.h (i386_regtab): Add 80486 test registers.
2066
2067Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2068
2069 * i960.h (I_HX): Define.
2070 (i960_opcodes): Add HX instruction.
2071
2072Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2073
2074 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2075 and fclex.
2076
2077Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2078
2079 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2080 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2081 (bfd_* defines): Delete.
2082 (sparc_opcode_archs): Replaces architecture_pname.
2083 (sparc_opcode_lookup_arch): Declare.
2084 (NUMOPCODES): Delete.
2085
2086Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2087
2088 * sparc.h (enum sparc_architecture): Add v9a.
2089 (ARCHITECTURES_CONFLICT_P): Update.
2090
2091Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2092
2093 * i386.h: Added Pentium Pro instructions.
2094
2095Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2096
2097 * m68k.h: Document new 'W' operand place.
2098
2099Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2100
2101 * hppa.h: Add lci and syncdma instructions.
2102
2103Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2104
2105 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2106 instructions.
252b5132
RH
2107
2108Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2109
2110 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2111 assembler's -mcom and -many switches.
2112
2113Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2114
2115 * i386.h: Fix cmpxchg8b extension opcode description.
2116
2117Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2118
2119 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2120 and register cr4.
2121
2122Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2123
2124 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2125
2126Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2127
2128 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2129
2130Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2131
2132 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2133
2134Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2135
2136 * m68kmri.h: Remove.
2137
2138 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2139 declarations. Remove F_ALIAS and flag field of struct
2140 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2141 int. Make name and args fields of struct m68k_opcode const.
2142
2143Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2144
2145 * sparc.h (F_NOTV9): Define.
2146
2147Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2148
2149 * mips.h (INSN_4010): Define.
2150
2151Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2152
2153 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2154
2155 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2156 * m68k.h: Fix argument descriptions of coprocessor
2157 instructions to allow only alterable operands where appropriate.
2158 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2159 (m68k_opcode_aliases): Add more aliases.
2160
2161Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2162
2163 * m68k.h: Added explcitly short-sized conditional branches, and a
2164 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2165 svr4-based configurations.
2166
2167Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2168
2169 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2170 * i386.h: added missing Data16/Data32 flags to a few instructions.
2171
2172Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2173
2174 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2175 (OP_MASK_BCC, OP_SH_BCC): Define.
2176 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2177 (OP_MASK_CCC, OP_SH_CCC): Define.
2178 (INSN_READ_FPR_R): Define.
2179 (INSN_RFE): Delete.
2180
2181Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2182
2183 * m68k.h (enum m68k_architecture): Deleted.
2184 (struct m68k_opcode_alias): New type.
2185 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2186 matching constraints, values and flags. As a side effect of this,
2187 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2188 as I know were never used, now may need re-examining.
2189 (numopcodes): Now const.
2190 (m68k_opcode_aliases, numaliases): New variables.
2191 (endop): Deleted.
2192 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2193 m68k_opcode_aliases; update declaration of m68k_opcodes.
2194
2195Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2196
2197 * hppa.h (delay_type): Delete unused enumeration.
2198 (pa_opcode): Replace unused delayed field with an architecture
2199 field.
2200 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2201
2202Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2203
2204 * mips.h (INSN_ISA4): Define.
2205
2206Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2207
2208 * mips.h (M_DLA_AB, M_DLI): Define.
2209
2210Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2211
2212 * hppa.h (fstwx): Fix single-bit error.
2213
2214Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2215
2216 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2217
2218Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2219
2220 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2221 debug registers. From Charles Hannum (mycroft@netbsd.org).
2222
2223Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2224
2225 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2226 i386 support:
2227 * i386.h (MOV_AX_DISP32): New macro.
2228 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2229 of several call/return instructions.
2230 (ADDR_PREFIX_OPCODE): New macro.
2231
2232Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2233
2234 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2235
4f1d9bd8
NC
2236 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2237 char.
252b5132
RH
2238 (struct vot, field `name'): ditto.
2239
2240Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2241
2242 * vax.h: Supply and properly group all values in end sentinel.
2243
2244Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2245
2246 * mips.h (INSN_ISA, INSN_4650): Define.
2247
2248Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2249
2250 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2251 systems with a separate instruction and data cache, such as the
2252 29040, these instructions take an optional argument.
2253
2254Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2255
2256 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2257 INSN_TRAP.
2258
2259Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2260
2261 * mips.h (INSN_STORE_MEMORY): Define.
2262
2263Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2264
2265 * sparc.h: Document new operand type 'x'.
2266
2267Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2268
2269 * i960.h (I_CX2): New instruction category. It includes
2270 instructions available on Cx and Jx processors.
2271 (I_JX): New instruction category, for JX-only instructions.
2272 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2273 Jx-only instructions, in I_JX category.
2274
2275Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2276
2277 * ns32k.h (endop): Made pointer const too.
2278
2279Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2280
2281 * ns32k.h: Drop Q operand type as there is no correct use
2282 for it. Add I and Z operand types which allow better checking.
2283
2284Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2285
2286 * h8300.h (xor.l) :fix bit pattern.
2287 (L_2): New size of operand.
2288 (trapa): Use it.
2289
2290Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2291
2292 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2293
2294Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2295
2296 * sparc.h: Include v9 definitions.
2297
2298Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2299
2300 * m68k.h (m68060): Defined.
2301 (m68040up, mfloat, mmmu): Include it.
2302 (struct m68k_opcode): Widen `arch' field.
2303 (m68k_opcodes): Updated for M68060. Removed comments that were
2304 instructions commented out by "JF" years ago.
2305
2306Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2307
2308 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2309 add a one-bit `flags' field.
2310 (F_ALIAS): New macro.
2311
2312Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2313
2314 * h8300.h (dec, inc): Get encoding right.
2315
2316Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2317
2318 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2319 a flag instead.
2320 (PPC_OPERAND_SIGNED): Define.
2321 (PPC_OPERAND_SIGNOPT): Define.
2322
2323Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2324
2325 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2326 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2327
2328Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2329
2330 * i386.h: Reverse last change. It'll be handled in gas instead.
2331
2332Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2333
2334 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2335 slower on the 486 and used the implicit shift count despite the
2336 explicit operand. The one-operand form is still available to get
2337 the shorter form with the implicit shift count.
2338
2339Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2340
2341 * hppa.h: Fix typo in fstws arg string.
2342
2343Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2344
2345 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2346
2347Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2348
2349 * ppc.h (PPC_OPCODE_601): Define.
2350
2351Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2352
2353 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2354 (so we can determine valid completers for both addb and addb[tf].)
2355
2356 * hppa.h (xmpyu): No floating point format specifier for the
2357 xmpyu instruction.
2358
2359Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2360
2361 * ppc.h (PPC_OPERAND_NEXT): Define.
2362 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2363 (struct powerpc_macro): Define.
2364 (powerpc_macros, powerpc_num_macros): Declare.
2365
2366Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2367
2368 * ppc.h: New file. Header file for PowerPC opcode table.
2369
2370Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2371
2372 * hppa.h: More minor template fixes for sfu and copr (to allow
2373 for easier disassembly).
2374
2375 * hppa.h: Fix templates for all the sfu and copr instructions.
2376
2377Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2378
2379 * i386.h (push): Permit Imm16 operand too.
2380
2381Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2382
2383 * h8300.h (andc): Exists in base arch.
2384
2385Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2386
2387 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2388 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2389
2390Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2391
2392 * hppa.h: Add FP quadword store instructions.
2393
2394Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2395
2396 * mips.h: (M_J_A): Added.
2397 (M_LA): Removed.
2398
2399Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2400
2401 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2402 <mellon@pepper.ncd.com>.
2403
2404Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2405
2406 * hppa.h: Immediate field in probei instructions is unsigned,
2407 not low-sign extended.
2408
2409Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2410
2411 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2412
2413Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2414
2415 * i386.h: Add "fxch" without operand.
2416
2417Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2418
2419 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2420
2421Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2422
2423 * hppa.h: Add gfw and gfr to the opcode table.
2424
2425Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2426
2427 * m88k.h: extended to handle m88110.
2428
2429Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2430
2431 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2432 addresses.
2433
2434Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2435
2436 * i960.h (i960_opcodes): Properly bracket initializers.
2437
2438Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2439
2440 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2441
2442Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2443
2444 * m68k.h (two): Protect second argument with parentheses.
2445
2446Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2447
2448 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2449 Deleted old in/out instructions in "#if 0" section.
2450
2451Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2452
2453 * i386.h (i386_optab): Properly bracket initializers.
2454
2455Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2456
2457 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2458 Jeff Law, law@cs.utah.edu).
2459
2460Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2461
2462 * i386.h (lcall): Accept Imm32 operand also.
2463
2464Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2465
2466 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2467 (M_DABS): Added.
2468
2469Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2470
2471 * mips.h (INSN_*): Changed values. Removed unused definitions.
2472 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2473 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2474 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2475 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2476 (M_*): Added new values for r6000 and r4000 macros.
2477 (ANY_DELAY): Removed.
2478
2479Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2480
2481 * mips.h: Added M_LI_S and M_LI_SS.
2482
2483Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2484
2485 * h8300.h: Get some rare mov.bs correct.
2486
2487Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2488
2489 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2490 been included.
2491
2492Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2493
2494 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2495 jump instructions, for use in disassemblers.
2496
2497Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2498
2499 * m88k.h: Make bitfields just unsigned, not unsigned long or
2500 unsigned short.
2501
2502Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2503
2504 * hppa.h: New argument type 'y'. Use in various float instructions.
2505
2506Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2507
2508 * hppa.h (break): First immediate field is unsigned.
2509
2510 * hppa.h: Add rfir instruction.
2511
2512Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2513
2514 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2515
2516Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2517
2518 * mips.h: Reworked the hazard information somewhat, and fixed some
2519 bugs in the instruction hazard descriptions.
2520
2521Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2522
2523 * m88k.h: Corrected a couple of opcodes.
2524
2525Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2526
2527 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2528 new version includes instruction hazard information, but is
2529 otherwise reasonably similar.
2530
2531Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2532
2533 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2534
2535Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2536
2537 Patches from Jeff Law, law@cs.utah.edu:
2538 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2539 Make the tables be the same for the following instructions:
2540 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2541 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2542 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2543 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2544 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2545 "fcmp", and "ftest".
2546
2547 * hppa.h: Make new and old tables the same for "break", "mtctl",
2548 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2549 Fix typo in last patch. Collapse several #ifdefs into a
2550 single #ifdef.
2551
2552 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2553 of the comments up-to-date.
2554
2555 * hppa.h: Update "free list" of letters and update
2556 comments describing each letter's function.
2557
4f1d9bd8
NC
2558Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2559
2560 * h8300.h: Lots of little fixes for the h8/300h.
2561
2562Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2563
2564 Support for H8/300-H
2565 * h8300.h: Lots of new opcodes.
2566
252b5132
RH
2567Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2568
2569 * h8300.h: checkpoint, includes H8/300-H opcodes.
2570
2571Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2572
2573 * Patches from Jeffrey Law <law@cs.utah.edu>.
2574 * hppa.h: Rework single precision FP
2575 instructions so that they correctly disassemble code
2576 PA1.1 code.
2577
2578Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2579
2580 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2581 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2582
2583Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2584
2585 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2586 gdb will define it for now.
2587
2588Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2589
2590 * sparc.h: Don't end enumerator list with comma.
2591
2592Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2593
2594 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2595 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2596 ("bc2t"): Correct typo.
2597 ("[ls]wc[023]"): Use T rather than t.
2598 ("c[0123]"): Define general coprocessor instructions.
2599
2600Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2601
2602 * m68k.h: Move split point for gcc compilation more towards
2603 middle.
2604
2605Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2606
2607 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2608 simply wrong, ics, rfi, & rfsvc were missing).
2609 Add "a" to opr_ext for "bb". Doc fix.
2610
2611Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2612
2613 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2614 * mips.h: Add casts, to suppress warnings about shifting too much.
2615 * m68k.h: Document the placement code '9'.
2616
2617Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2618
2619 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2620 allows callers to break up the large initialized struct full of
2621 opcodes into two half-sized ones. This permits GCC to compile
2622 this module, since it takes exponential space for initializers.
2623 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2624
2625Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2626
2627 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2628 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2629 initialized structs in it.
2630
2631Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2632
2633 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2634 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2635 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2636
2637Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2638
2639 * mips.h: document "i" and "j" operands correctly.
2640
2641Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2642
2643 * mips.h: Removed endianness dependency.
2644
2645Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2646
2647 * h8300.h: include info on number of cycles per instruction.
2648
2649Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2650
2651 * hppa.h: Move handy aliases to the front. Fix masks for extract
2652 and deposit instructions.
2653
2654Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2655
2656 * i386.h: accept shld and shrd both with and without the shift
2657 count argument, which is always %cl.
2658
2659Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2660
2661 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2662 (one_byte_segment_defaults, two_byte_segment_defaults,
2663 i386_prefixtab_end): Ditto.
2664
2665Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2666
2667 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2668 for operand 2; from John Carr, jfc@dsg.dec.com.
2669
2670Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2671
2672 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2673 always use 16-bit offsets. Makes calculated-size jump tables
2674 feasible.
2675
2676Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2677
2678 * i386.h: Fix one-operand forms of in* and out* patterns.
2679
2680Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2681
2682 * m68k.h: Added CPU32 support.
2683
2684Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2685
2686 * mips.h (break): Disassemble the argument. Patch from
2687 jonathan@cs.stanford.edu (Jonathan Stone).
2688
2689Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2690
2691 * m68k.h: merged Motorola and MIT syntax.
2692
2693Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2694
2695 * m68k.h (pmove): make the tests less strict, the 68k book is
2696 wrong.
2697
2698Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2699
2700 * m68k.h (m68ec030): Defined as alias for 68030.
2701 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2702 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2703 them. Tightened description of "fmovex" to distinguish it from
2704 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2705 up descriptions that claimed versions were available for chips not
2706 supporting them. Added "pmovefd".
2707
2708Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2709
2710 * m68k.h: fix where the . goes in divull
2711
2712Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2713
2714 * m68k.h: the cas2 instruction is supposed to be written with
2715 indirection on the last two operands, which can be either data or
2716 address registers. Added a new operand type 'r' which accepts
2717 either register type. Added new cases for cas2l and cas2w which
2718 use them. Corrected masks for cas2 which failed to recognize use
2719 of address register.
2720
2721Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2722
2723 * m68k.h: Merged in patches (mostly m68040-specific) from
2724 Colin Smith <colin@wrs.com>.
2725
2726 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2727 base). Also cleaned up duplicates, re-ordered instructions for
2728 the sake of dis-assembling (so aliases come after standard names).
2729 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2730
2731Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2732
2733 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2734 all missing .s
2735
2736Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2737
2738 * sparc.h: Moved tables to BFD library.
2739
2740 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2741
2742Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2743
2744 * h8300.h: Finish filling in all the holes in the opcode table,
2745 so that the Lucid C compiler can digest this as well...
2746
2747Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2748
2749 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2750 Fix opcodes on various sizes of fild/fist instructions
2751 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2752 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2753
2754Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2755
2756 * h8300.h: Fill in all the holes in the opcode table so that the
2757 losing HPUX C compiler can digest this...
2758
2759Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2760
2761 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2762 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2763
2764Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2765
2766 * sparc.h: Add new architecture variant sparclite; add its scan
2767 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2768
2769Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2770
2771 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2772 fy@lucid.com).
2773
2774Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2775
2776 * rs6k.h: New version from IBM (Metin).
2777
2778Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2779
2780 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2781 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2782
2783Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2784
2785 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2786
2787Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2788
2789 * m68k.h (one, two): Cast macro args to unsigned to suppress
2790 complaints from compiler and lint about integer overflow during
2791 shift.
2792
2793Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2794
2795 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2796
2797Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2798
2799 * mips.h: Make bitfield layout depend on the HOST compiler,
2800 not on the TARGET system.
2801
2802Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2803
2804 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2805 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2806 <TRANLE@INTELLICORP.COM>.
2807
2808Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2809
2810 * h8300.h: turned op_type enum into #define list
2811
2812Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2813
2814 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2815 similar instructions -- they've been renamed to "fitoq", etc.
2816 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2817 number of arguments.
2818 * h8300.h: Remove extra ; which produces compiler warning.
2819
2820Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2821
2822 * sparc.h: fix opcode for tsubcctv.
2823
2824Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2825
2826 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2827
2828Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2829
2830 * sparc.h (nop): Made the 'lose' field be even tighter,
2831 so only a standard 'nop' is disassembled as a nop.
2832
2833Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2834
2835 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2836 disassembled as a nop.
2837
4f1d9bd8
NC
2838Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2839
2840 * m68k.h, sparc.h: ANSIfy enums.
2841
252b5132
RH
2842Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2843
2844 * sparc.h: fix a typo.
2845
2846Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2847
2848 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2849 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2850 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2851
2852\f
2853Local Variables:
2854version-control: never
2855End: