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[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
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2228315b
CD		 12001-10-17 Chris Demetriou <cgd@broadcom.com>
2
3 * mips.h (INSN_SB1): New cpu-specific instruction bit.
4 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
5 if cpu is CPU_SB1.
6
f5c120c5
MG		 72001-10-17 matthew green <mrg@redhat.com>
8
9 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
10
418c1742
MG		 112001-10-12 matthew green <mrg@redhat.com>
12
0716ce0d
MG		 13 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
14 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
15 instructions, respectively.
418c1742 16
6ff2f2ba
NC		 172001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
18
19 * v850.h: Remove spurious comment.
20
015cf428
NC		 212001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
22
23 * h8300.h: Fix compile time warning messages
24
847b8b31
RH		 252001-09-04 Richard Henderson <rth@redhat.com>
26
27 * alpha.h (struct alpha_operand): Pack elements into bitfields.
28
a98b9439
EC		 292001-08-31 Eric Christopher <echristo@redhat.com>
30
31 * mips.h: Remove CPU_MIPS32_4K.
32
a6959011
AM		 332001-08-27 Torbjorn Granlund <tege@swox.com>
34
35 * ppc.h (PPC_OPERAND_DS): Define.
36
d83c6548
AJ		 372001-08-25 Andreas Jaeger <aj@suse.de>
38
39 * d30v.h: Fix declaration of reg_name_cnt.
40
41 * d10v.h: Fix declaration of d10v_reg_name_cnt.
42
43 * arc.h: Add prototypes from opcodes/arc-opc.c.
44
99c14723
TS		 452001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
46
47 * mips.h (INSN_10000): Define.
48 (OPCODE_IS_MEMBER): Check for INSN_10000.
49
11b37b7b
AM		 502001-08-10 Alan Modra <amodra@one.net.au>
51
52 * ppc.h: Revert 2001-08-08.
53
0f1bac05
AM		 542001-08-08 Alan Modra <amodra@one.net.au>
55
56 1999-10-25 Torbjorn Granlund <tege@swox.com>
57 * ppc.h (struct powerpc_operand): New field `reloc'.
58
81f6038f
FCE		 592001-07-11 Frank Ch. Eigler <fche@redhat.com>
60
61 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
62 (cgen_cpu_desc): Ditto.
63
32cfffe3
BE		 642001-07-07 Ben Elliston <bje@redhat.com>
65
66 * m88k.h: Clean up and reformat. Remove unused code.
67
3e890047
GK		 682001-06-14 Geoffrey Keating <geoffk@redhat.com>
69
70 * cgen.h (cgen_keyword): Add nonalpha_chars field.
71
d1cf510e
NC		 722001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
73
74 * mips.h (CPU_R12000): Define.
75
e281c457
JH		 762001-05-23 John Healy <jhealy@redhat.com>
77
78 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 79
aa5f19f2
NC		 802001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
81
82 * mips.h (INSN_ISA_MASK): Define.
83
67d6227d
AM		 842001-05-12 Alan Modra <amodra@one.net.au>
85
86 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
87 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
88 and use InvMem as these insns must have register operands.
89
992aaec9
AM		 902001-05-04 Alan Modra <amodra@one.net.au>
91
92 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
93 and pextrw to swap reg/rm assignments.
94
4ef7f0bf
HPN		 952001-04-05 Hans-Peter Nilsson <hp@axis.com>
96
97 * cris.h (enum cris_insn_version_usage): Correct comment for
98 cris_ver_v3p.
99
0f17484f
AM		 1002001-03-24 Alan Modra <alan@linuxcare.com.au>
101
102 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
103 Add InvMem to first operand of "maskmovdqu".
104
7ccb5238
HPN		 1052001-03-22 Hans-Peter Nilsson <hp@axis.com>
106
107 * cris.h (ADD_PC_INCR_OPCODE): New macro.
108
361bfa20
KH		 1092001-03-21 Kazu Hirata <kazu@hxi.com>
110
111 * h8300.h: Fix formatting.
112
87890af0
AM		 1132001-03-22 Alan Modra <alan@linuxcare.com.au>
114
115 * i386.h (i386_optab): Add paddq, psubq.
116
2e98d2de
AM		 1172001-03-19 Alan Modra <alan@linuxcare.com.au>
118
119 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
120
80a523c2
NC		 1212001-02-28 Igor Shevlyakov <igor@windriver.com>
122
123 * m68k.h: new defines for Coldfire V4. Update mcf to know
124 about mcf5407.
125
e135f41b
NC		 1262001-02-18 lars brinkhoff <lars@nocrew.org>
127
128 * pdp11.h: New file.
129
1302001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH		 131
132 * i386.h (i386_optab): SSE integer converison instructions have
133 64bit versions on x86-64.
134
8eaec934
NC		 1352001-02-10 Nick Clifton <nickc@redhat.com>
136
137 * mips.h: Remove extraneous whitespace. Formating change to allow
138 for future contribution.
139
a85d7ed0
NC		 1402001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
141
142 * s390.h: New file.
143
0715dc88
PM		 1442001-02-02 Patrick Macdonald <patrickm@redhat.com>
145
146 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
147 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
148 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
149
296bc568
AM		 1502001-01-24 Karsten Keil <kkeil@suse.de>
151
152 * i386.h (i386_optab): Fix swapgs
153
1328dc98
AM		 1542001-01-14 Alan Modra <alan@linuxcare.com.au>
155
156 * hppa.h: Describe new '<' and '>' operand types, and tidy
157 existing comments.
158 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
159 Remove duplicate "ldw j(s,b),x". Sort some entries.
160
e135f41b 1612001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH		 162
163 * i386.h (i386_optab): Fix pusha and ret templates.
164
0d2bcfaf
NC		 1652001-01-11 Peter Targett <peter.targett@arccores.com>
166
167 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
168 definitions for masking cpu type.
169 (arc_ext_operand_value) New structure for storing extended
170 operands.
171 (ARC_OPERAND_*) Flags for operand values.
172
1732001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH		 174
175 * i386.h (pinsrw): Add.
176 (pshufw): Remove.
177 (cvttpd2dq): Fix operands.
178 (cvttps2dq): Likewise.
179 (movq2q): Rename to movdq2q.
180
079966a8
AM		 1812001-01-10 Richard Schaal <richard.schaal@intel.com>
182
183 * i386.h: Correct movnti instruction.
184
8c1f9e76
JJ		 1852001-01-09 Jeff Johnston <jjohnstn@redhat.com>
186
187 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
188 of operands (unsigned char or unsigned short).
189 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
190 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
191
0d2bcfaf 1922001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH		 193
194 * i386.h (i386_optab): Make [sml]fence template to use immext field.
195
0d2bcfaf 1962001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH		 197
198 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
199 introduced by Pentium4
200
0d2bcfaf 2012000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH		 202
203 * i386.h (i386_optab): Add "rex*" instructions;
204 add swapgs; disable jmp/call far direct instructions for
205 64bit mode; add syscall and sysret; disable registers for 0xc6
206 template. Add 'q' suffixes to extendable instructions, disable
079966a8 207 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH		 208 (i386_regtab): Add extended registers.
209 (*Suf): Add No_qSuf.
210 (q_Suf, wlq_Suf, bwlq_Suf): New.
211
0d2bcfaf 2122000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH		 213
214 * i386.h (i386_optab): Replace "Imm" with "EncImm".
215 (i386_regtab): Add flags field.
d83c6548 216
bf40d919
NC		 2172000-12-12 Nick Clifton <nickc@redhat.com>
218
219 * mips.h: Fix formatting.
220
4372b673
NC		 2212000-12-01 Chris Demetriou <cgd@sibyte.com>
222
223 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
224 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
225 OP_*_SYSCALL definitions.
226 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
227 19 bit wait codes.
228 (MIPS operand specifier comments): Remove 'm', add 'U' and
229 'J', and update the meaning of 'B' so that it's more general.
230
e7af610e
NC		 231 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
232 INSN_ISA5): Renumber, redefine to mean the ISA at which the
233 instruction was added.
234 (INSN_ISA32): New constant.
235 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
236 Renumber to avoid new and/or renumbered INSN_* constants.
237 (INSN_MIPS32): Delete.
238 (ISA_UNKNOWN): New constant to indicate unknown ISA.
239 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
240 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 241 constants available at that ISA level.
e7af610e
NC		 242 (CPU_UNKNOWN): New constant to indicate unknown CPU.
243 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
244 define it with a unique value.
245 (OPCODE_IS_MEMBER): Update for new ISA membership-related
246 constant meanings.
247
84ea6cf2 248 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 249 definitions.
84ea6cf2 250
c6c98b38
NC		 251 * mips.h (CPU_SB1): New constant.
252
19f7b010
JJ		 2532000-10-20 Jakub Jelinek <jakub@redhat.com>
254
255 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
256 Note that '3' is used for siam operand.
257
139368c9
JW		 2582000-09-22 Jim Wilson <wilson@cygnus.com>
259
260 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
261
156c2f8b 2622000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 263
156c2f8b
NC		 264 * mips.h: Use defines instead of hard-coded processor numbers.
265 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 266 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC		 267 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
268 CPU_4KC, CPU_4KM, CPU_4KP): Define..
269 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 270 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 271 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ		 272 Add 'P' to used characters.
273 Use 'H' for coprocessor select field.
156c2f8b 274 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ		 275 Document new arg characters and add to used characters.
276 (INSN_MIPS32): New define for MIPS32 extensions.
277 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 278
3c5ce02e
AM		 2792000-09-05 Alan Modra <alan@linuxcare.com.au>
280
281 * hppa.h: Mention cz completer.
282
50b81f19
JW		 2832000-08-16 Jim Wilson <wilson@cygnus.com>
284
285 * ia64.h (IA64_OPCODE_POSTINC): New.
286
fc29466d
L		 2872000-08-15 H.J. Lu <hjl@gnu.org>
288
289 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
290 IgnoreSize change.
291
4f1d9bd8
NC		 2922000-08-08 Jason Eckhardt <jle@cygnus.com>
293
294 * i860.h: Small formatting adjustments.
295
45ee1401
DC		 2962000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
297
298 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
299 Move related opcodes closer to each other.
300 Minor changes in comments, list undefined opcodes.
301
9d551405
DB		 3022000-07-26 Dave Brolley <brolley@redhat.com>
303
304 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
305
4f1d9bd8
NC		 3062000-07-22 Jason Eckhardt <jle@cygnus.com>
307
308 * i860.h (btne, bte, bla): Changed these opcodes
309 to use sbroff ('r') instead of split16 ('s').
310 (J, K, L, M): New operand types for 16-bit aligned fields.
311 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
312 use I, J, K, L, M instead of just I.
313 (T, U): New operand types for split 16-bit aligned fields.
314 (st.x): Changed these opcodes to use S, T, U instead of just S.
315 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
316 exist on the i860.
317 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
318 (pfeq.ss, pfeq.dd): New opcodes.
319 (st.s): Fixed incorrect mask bits.
320 (fmlow): Fixed incorrect mask bits.
321 (fzchkl, pfzchkl): Fixed incorrect mask bits.
322 (faddz, pfaddz): Fixed incorrect mask bits.
323 (form, pform): Fixed incorrect mask bits.
324 (pfld.l): Fixed incorrect mask bits.
325 (fst.q): Fixed incorrect mask bits.
326 (all floating point opcodes): Fixed incorrect mask bits for
327 handling of dual bit.
328
c8488617
HPN		 3292000-07-20 Hans-Peter Nilsson <hp@axis.com>
330
331 cris.h: New file.
332
65aa24b6
NC		 3332000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
334
335 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
336 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
337 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
338 (AVR_ISA_M83): Define for ATmega83, ATmega85.
339 (espm): Remove, because ESPM removed in databook update.
340 (eicall, eijmp): Move to the end of opcode table.
341
60bcf0fa
NC		 3422000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
343
344 * m68hc11.h: New file for support of Motorola 68hc11.
345
60a2978a
DC		 346Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
347
348 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
349
68ab2dd9
DC		 350Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
351
352 * avr.h: New file with AVR opcodes.
353
f0662e27
DL		 354Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
355
356 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
357
b722f2be
AM		 3582000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
359
360 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
361
f9e0cf0b
AM		 3622000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
363
364 * i386.h: Use sl_FP, not sl_Suf for fild.
365
f660ee8b
FCE		 3662000-05-16 Frank Ch. Eigler <fche@redhat.com>
367
368 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
369 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
370 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
371 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
372
558b0a60
AM		 3732000-05-13 Alan Modra <alan@linuxcare.com.au>,
374
375 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
376
e413e4e9
AM		 3772000-05-13 Alan Modra <alan@linuxcare.com.au>,
378 Alexander Sokolov <robocop@netlink.ru>
379
380 * i386.h (i386_optab): Add cpu_flags for all instructions.
381
3822000-05-13 Alan Modra <alan@linuxcare.com.au>
383
384 From Gavin Romig-Koch <gavin@cygnus.com>
385 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
386
5c84d377
TW		 3872000-05-04 Timothy Wall <twall@cygnus.com>
388
389 * tic54x.h: New.
390
966f959b
C		 3912000-05-03 J.T. Conklin <jtc@redback.com>
392
393 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
394 (PPC_OPERAND_VR): New operand flag for vector registers.
395
c5d05dbb
JL		 3962000-05-01 Kazu Hirata <kazu@hxi.com>
397
398 * h8300.h (EOP): Add missing initializer.
399
a7fba0e0
JL		 400Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
401
402 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
403 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
404 New operand types l,y,&,fe,fE,fx added to support above forms.
405 (pa_opcodes): Replaced usage of 'x' as source/target for
406 floating point double-word loads/stores with 'fx'.
407
800eeca4
JW		 408Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
409 David Mosberger <davidm@hpl.hp.com>
410 Timothy Wall <twall@cygnus.com>
411 Jim Wilson <wilson@cygnus.com>
412
413 * ia64.h: New file.
414
ba23e138
NC		 4152000-03-27 Nick Clifton <nickc@cygnus.com>
416
417 * d30v.h (SHORT_A1): Fix value.
418 (SHORT_AR): Renumber so that it is at the end of the list of short
419 instructions, not the end of the list of long instructions.
420
d0b47220
AM		 4212000-03-26 Alan Modra <alan@linuxcare.com>
422
423 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
424 problem isn't really specific to Unixware.
425 (OLDGCC_COMPAT): Define.
426 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
427 destination %st(0).
428 Fix lots of comments.
429
866afedc
NC		 4302000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
431
432 * d30v.h:
433 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
434 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
435 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
436 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
437 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
438 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
439 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
440
cc5ca5ce
AM		 4412000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
442
443 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
444 fistpd without suffix.
445
68e324a2
NC		 4462000-02-24 Nick Clifton <nickc@cygnus.com>
447
448 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
449 'signed_overflow_ok_p'.
450 Delete prototypes for cgen_set_flags() and cgen_get_flags().
451
60f036a2
AH		 4522000-02-24 Andrew Haley <aph@cygnus.com>
453
454 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
455 (CGEN_CPU_TABLE): flags: new field.
456 Add prototypes for new functions.
d83c6548 457
9b9b5cd4
AM		 4582000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
459
460 * i386.h: Add some more UNIXWARE_COMPAT comments.
461
5b93d8bb
AM		 4622000-02-23 Linas Vepstas <linas@linas.org>
463
464 * i370.h: New file.
465
4f1d9bd8
NC		 4662000-02-22 Chandra Chavva <cchavva@cygnus.com>
467
468 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
469 cannot be combined in parallel with ADD/SUBppp.
470
87f398dd
AH		 4712000-02-22 Andrew Haley <aph@cygnus.com>
472
473 * mips.h: (OPCODE_IS_MEMBER): Add comment.
474
367c01af
AH		 4751999-12-30 Andrew Haley <aph@cygnus.com>
476
9a1e79ca
AH		 477 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
478 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
479 insns.
367c01af 480
add0c677
AM		 4812000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
482
483 * i386.h: Qualify intel mode far call and jmp with x_Suf.
484
3138f287
AM		 4851999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
486
487 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
488 indirect jumps and calls. Add FF/3 call for intel mode.
489
ccecd07b
JL		 490Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
491
492 * mn10300.h: Add new operand types. Add new instruction formats.
493
b37e19e9
JL		 494Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
495
496 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
497 instruction.
498
5fce5ddf
GRK		 4991999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
500
501 * mips.h (INSN_ISA5): New.
502
2bd7f1f3
GRK		 5031999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
504
505 * mips.h (OPCODE_IS_MEMBER): New.
506
4df2b5c5
NC		 5071999-10-29 Nick Clifton <nickc@cygnus.com>
508
509 * d30v.h (SHORT_AR): Define.
510
446a06c9
MM		 5111999-10-18 Michael Meissner <meissner@cygnus.com>
512
513 * alpha.h (alpha_num_opcodes): Convert to unsigned.
514 (alpha_num_operands): Ditto.
515
eca04c6a
JL		 516Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
517
518 * hppa.h (pa_opcodes): Add load and store cache control to
519 instructions. Add ordered access load and store.
520
521 * hppa.h (pa_opcode): Add new entries for addb and addib.
522
523 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
524
525 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
526
c43185de
DN		 527Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
528
529 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
530
ec3533da
JL		 531Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
532
390f858d
JL		 533 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
534 and "be" using completer prefixes.
535
8c47ebd9
JL		 536 * hppa.h (pa_opcodes): Add initializers to silence compiler.
537
ec3533da
JL		 538 * hppa.h: Update comments about character usage.
539
18369bea
JL		 540Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
541
542 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
543 up the new fstw & bve instructions.
544
c36efdd2
JL		 545Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
546
d3ffb032
JL		 547 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
548 instructions.
549
c49ec3da
JL		 550 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
551
5d2e7ecc
JL		 552 * hppa.h (pa_opcodes): Add long offset double word load/store
553 instructions.
554
6397d1a2
JL		 555 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
556 stores.
557
142f0fe0
JL		 558 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
559
f5a68b45
JL		 560 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
561
8235801e
JL		 562 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
563
35184366
JL		 564 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
565
f0bfde5e
JL		 566 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
567
27bbbb58
JL		 568 * hppa.h (pa_opcodes): Add support for "b,l".
569
c36efdd2
JL		 570 * hppa.h (pa_opcodes): Add support for "b,gate".
571
f2727d04
JL		 572Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
573
9392fb11 574 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 575 in xmpyu.
9392fb11 576
e0c52e99
JL		 577 * hppa.h (pa_opcodes): Fix mask for probe and probei.
578
f2727d04
JL		 579 * hppa.h (pa_opcodes): Fix mask for depwi.
580
52d836e2
JL		 581Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
582
583 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
584 an explicit output argument.
585
90765e3a
JL		 586Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
587
588 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
589 Add a few PA2.0 loads and store variants.
590
8340b17f
ILT		 5911999-09-04 Steve Chamberlain <sac@pobox.com>
592
593 * pj.h: New file.
594
5f47d35b
AM		 5951999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
596
597 * i386.h (i386_regtab): Move %st to top of table, and split off
598 other fp reg entries.
599 (i386_float_regtab): To here.
600
1c143202
JL		 601Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
602
7d8fdb64
JL		 603 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
604 by 'f'.
605
90927b9c
JL		 606 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
607 Add supporting args.
608
1d16bf9c
JL		 609 * hppa.h: Document new completers and args.
610 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
611 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
612 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
613 pmenb and pmdis.
614
96226a68
JL		 615 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
616 hshr, hsub, mixh, mixw, permh.
617
5d4ba527
JL		 618 * hppa.h (pa_opcodes): Change completers in instructions to
619 use 'c' prefix.
620
e9fc28c6
JL		 621 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
622 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
623
1c143202
JL		 624 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
625 fnegabs to use 'I' instead of 'F'.
626
9e525108
AM		 6271999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
628
629 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
630 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
631 Alphabetically sort PIII insns.
632
e8da1bf1
DE		 633Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
634
635 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
636
7d627258
JL		 637Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
638
5696871a
JL		 639 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
640 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
641
7d627258
JL		 642 * hppa.h: Document 64 bit condition completers.
643
c5e52916
JL		 644Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
645
646 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
647
eecb386c
AM		 6481999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
649
650 * i386.h (i386_optab): Add DefaultSize modifier to all insns
651 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
652 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
653
88a380f3
JL		 654Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
655 Jeff Law <law@cygnus.com>
656
657 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
658
659 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 660
d83c6548 661 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL		 662 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
663
145cf1f0
AM		 6641999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
665
666 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
667
73826640
JL		 668Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
669
670 * hppa.h (struct pa_opcode): Add new field "flags".
671 (FLAGS_STRICT): Define.
672
b65db252
JL		 673Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
674 Jeff Law <law@cygnus.com>
675
f7fc668b
JL		 676 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
677
678 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 679
10084519
AM		 6801999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
681
682 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
683 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
684 flag to fcomi and friends.
685
cd8a80ba
JL		 686Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
687
688 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 689 integer logical instructions.
cd8a80ba 690
1fca749b
ILT		 6911999-05-28 Linus Nordberg <linus.nordberg@canit.se>
692
693 * m68k.h: Document new formats `E', `G', `H' and new places `N',
694 `n', `o'.
695
696 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
697 and new places `m', `M', `h'.
698
aa008907
JL		 699Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
700
701 * hppa.h (pa_opcodes): Add several processor specific system
702 instructions.
703
e26b85f0
JL		 704Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
705
d83c6548 706 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL		 707 "addb", and "addib" to be used by the disassembler.
708
c608c12e
AM		 7091999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
710
711 * i386.h (ReverseModrm): Remove all occurences.
712 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
713 movmskps, pextrw, pmovmskb, maskmovq.
714 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
715 ignore the data size prefix.
716
717 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
718 Mostly stolen from Doug Ledford <dledford@redhat.com>
719
45c18104
RH		 720Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
721
722 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
723
252b5132
RH		 7241999-04-14 Doug Evans <devans@casey.cygnus.com>
725
726 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
727 (CGEN_ATTR_TYPE): Update.
728 (CGEN_ATTR_MASK): Number booleans starting at 0.
729 (CGEN_ATTR_VALUE): Update.
730 (CGEN_INSN_ATTR): Update.
731
732Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
733
734 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
735 instructions.
736
737Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
738
739 * hppa.h (bb, bvb): Tweak opcode/mask.
740
741
7421999-03-22 Doug Evans <devans@casey.cygnus.com>
743
744 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
745 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
746 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
747 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
748 Delete member max_insn_size.
749 (enum cgen_cpu_open_arg): New enum.
750 (cpu_open): Update prototype.
751 (cpu_open_1): Declare.
752 (cgen_set_cpu): Delete.
753
7541999-03-11 Doug Evans <devans@casey.cygnus.com>
755
756 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
757 (CGEN_OPERAND_NIL): New macro.
758 (CGEN_OPERAND): New member `type'.
759 (@arch@_cgen_operand_table): Delete decl.
760 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
761 (CGEN_OPERAND_TABLE): New struct.
762 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
763 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
764 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
765 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
766 {get,set}_{int,vma}_operand.
767 (@arch@_cgen_cpu_open): New arg `isa'.
768 (cgen_set_cpu): Ditto.
769
770Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
771
772 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
773
7741999-02-25 Doug Evans <devans@casey.cygnus.com>
775
776 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
777 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
778 enum cgen_hw_type.
779 (CGEN_HW_TABLE): New struct.
780 (hw_table): Delete declaration.
781 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
782 to table entry to enum.
783 (CGEN_OPINST): Ditto.
784 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
785
786Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
787
788 * alpha.h (AXP_OPCODE_EV6): New.
789 (AXP_OPCODE_NOPAL): Include it.
790
7911999-02-09 Doug Evans <devans@casey.cygnus.com>
792
793 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
794 All uses updated. New members int_insn_p, max_insn_size,
795 parse_operand,insert_operand,extract_operand,print_operand,
796 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
797 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
798 extract_handlers,print_handlers.
799 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
800 (CGEN_ATTR_BOOL_OFFSET): New macro.
801 (CGEN_ATTR_MASK): Subtract it to compute bit number.
802 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
803 (cgen_opcode_handler): Renamed from cgen_base.
804 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
805 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
806 all uses updated.
807 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
808 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
809 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
810 (CGEN_OPCODE,CGEN_IBASE): New types.
811 (CGEN_INSN): Rewrite.
812 (CGEN_{ASM,DIS}_HASH*): Delete.
813 (init_opcode_table,init_ibld_table): Declare.
814 (CGEN_INSN_ATTR): New type.
815
816Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 817
252b5132
RH		 818 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
819 (x_FP, d_FP, dls_FP, sldx_FP): Define.
820 Change *Suf definitions to include x and d suffixes.
821 (movsx): Use w_Suf and b_Suf.
822 (movzx): Likewise.
823 (movs): Use bwld_Suf.
824 (fld): Change ordering. Use sld_FP.
825 (fild): Add Intel Syntax equivalent of fildq.
826 (fst): Use sld_FP.
827 (fist): Use sld_FP.
828 (fstp): Use sld_FP. Add x_FP version.
829 (fistp): LLongMem version for Intel Syntax.
830 (fcom, fcomp): Use sld_FP.
831 (fadd, fiadd, fsub): Use sld_FP.
832 (fsubr): Use sld_FP.
833 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
834
8351999-01-27 Doug Evans <devans@casey.cygnus.com>
836
837 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
838 CGEN_MODE_UINT.
839
e135f41b 8401999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH		 841
842 * hppa.h (bv): Fix mask.
843
8441999-01-05 Doug Evans <devans@casey.cygnus.com>
845
846 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
847 (CGEN_ATTR): Use it.
848 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
849 (CGEN_ATTR_TABLE): New member dfault.
850
8511998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
852
853 * mips.h (MIPS16_INSN_BRANCH): New.
854
855Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
856
857 The following is part of a change made by Edith Epstein
d83c6548
AJ		 858 <eepstein@sophia.cygnus.com> as part of a project to merge in
859 changes by HP; HP did not create ChangeLog entries.
252b5132
RH		 860
861 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 862 after.
252b5132
RH		 863
864Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
865
866 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 867 status word instructions.
252b5132
RH		 868
8691998-11-30 Doug Evans <devans@casey.cygnus.com>
870
871 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
872 (struct cgen_keyword_entry): Ditto.
873 (struct cgen_operand): Ditto.
874 (CGEN_IFLD): New typedef, with associated access macros.
875 (CGEN_IFMT): New typedef, with associated access macros.
876 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
877 (CGEN_IVALUE): New typedef.
878 (struct cgen_insn): Delete const on syntax,attrs members.
879 `format' now points to format data. Type of `value' is now
880 CGEN_IVALUE.
881 (struct cgen_opcode_table): New member ifld_table.
882
8831998-11-18 Doug Evans <devans@casey.cygnus.com>
884
885 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
886 (CGEN_OPERAND_INSTANCE): New member `attrs'.
887 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
888 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
889 (cgen_opcode_table): Update type of dis_hash fn.
890 (extract_operand): Update type of `insn_value' arg.
891
892Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
893
894 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
895
896Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
897
898 * mips.h (INSN_MULT): Added.
899
900Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
901
902 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
903
904Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
905
906 * cgen.h (CGEN_INSN_INT): New typedef.
907 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
908 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
909 (CGEN_INSN_BYTES_PTR): New typedef.
910 (CGEN_EXTRACT_INFO): New typedef.
911 (cgen_insert_fn,cgen_extract_fn): Update.
912 (cgen_opcode_table): New member `insn_endian'.
913 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
914 (insert_operand,extract_operand): Update.
915 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
916
917Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
918
919 * cgen.h (CGEN_ATTR_BOOLS): New macro.
920 (struct CGEN_HW_ENTRY): New member `attrs'.
921 (CGEN_HW_ATTR): New macro.
922 (struct CGEN_OPERAND_INSTANCE): New member `name'.
923 (CGEN_INSN_INVALID_P): New macro.
924
925Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
926
927 * hppa.h: Add "fid".
d83c6548 928
252b5132
RH		 929Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
930
931 From Robert Andrew Dale <rob@nb.net>
932 * i386.h (i386_optab): Add AMD 3DNow! instructions.
933 (AMD_3DNOW_OPCODE): Define.
934
935Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
936
937 * d30v.h (EITHER_BUT_PREFER_MU): Define.
938
939Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
940
941 * cgen.h (cgen_insn): #if 0 out element `cdx'.
942
943Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
944
945 Move all global state data into opcode table struct, and treat
946 opcode table as something that is "opened/closed".
947 * cgen.h (CGEN_OPCODE_DESC): New type.
948 (all fns): New first arg of opcode table descriptor.
949 (cgen_set_parse_operand_fn): Add prototype.
950 (cgen_current_machine,cgen_current_endian): Delete.
951 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
952 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
953 dis_hash_table,dis_hash_table_entries.
954 (opcode_open,opcode_close): Add prototypes.
955
956 * cgen.h (cgen_insn): New element `cdx'.
957
958Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
959
960 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
961
962Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
963
964 * mn10300.h: Add "no_match_operands" field for instructions.
965 (MN10300_MAX_OPERANDS): Define.
966
967Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
968
969 * cgen.h (cgen_macro_insn_count): Declare.
970
971Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
972
973 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
974 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
975 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
976 set_{int,vma}_operand.
977
978Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
979
980 * mn10300.h: Add "machine" field for instructions.
981 (MN103, AM30): Define machine types.
d83c6548 982
252b5132
RH		 983Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
984
985 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
986
9871998-06-18 Ulrich Drepper <drepper@cygnus.com>
988
989 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
990
991Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
992
993 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
994 and ud2b.
995 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
996 those that happen to be implemented on pentiums.
997
998Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
999
1000 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1001 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1002 with Size16|IgnoreSize or Size32|IgnoreSize.
1003
1004Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1005
1006 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1007 (REPE): Rename to REPE_PREFIX_OPCODE.
1008 (i386_regtab_end): Remove.
1009 (i386_prefixtab, i386_prefixtab_end): Remove.
1010 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1011 of md_begin.
1012 (MAX_OPCODE_SIZE): Define.
1013 (i386_optab_end): Remove.
1014 (sl_Suf): Define.
1015 (sl_FP): Use sl_Suf.
1016
1017 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1018 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1019 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1020 data32, dword, and adword prefixes.
1021 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1022 regs.
1023
1024Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1025
1026 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1027
1028 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1029 register operands, because this is a common idiom. Flag them with
1030 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1031 fdivrp because gcc erroneously generates them. Also flag with a
1032 warning.
1033
1034 * i386.h: Add suffix modifiers to most insns, and tighter operand
1035 checks in some cases. Fix a number of UnixWare compatibility
1036 issues with float insns. Merge some floating point opcodes, using
1037 new FloatMF modifier.
1038 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1039 consistency.
1040
1041 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1042 IgnoreDataSize where appropriate.
1043
1044Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1045
1046 * i386.h: (one_byte_segment_defaults): Remove.
1047 (two_byte_segment_defaults): Remove.
1048 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1049
1050Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1051
1052 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1053 (cgen_hw_lookup_by_num): Declare.
1054
1055Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1056
1057 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1058 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1059
1060Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1061
1062 * cgen.h (cgen_asm_init_parse): Delete.
1063 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1064 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1065
1066Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1067
1068 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1069 (cgen_asm_finish_insn): Update prototype.
1070 (cgen_insn): New members num, data.
1071 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1072 dis_hash, dis_hash_table_size moved to ...
1073 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1074 All uses updated. New members asm_hash_p, dis_hash_p.
1075 (CGEN_MINSN_EXPANSION): New struct.
1076 (cgen_expand_macro_insn): Declare.
1077 (cgen_macro_insn_count): Declare.
1078 (get_insn_operands): Update prototype.
1079 (lookup_get_insn_operands): Declare.
1080
1081Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1082
1083 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1084 regKludge. Add operands types for string instructions.
1085
1086Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1087
1088 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1089 table.
1090
1091Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1092
1093 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1094 for `gettext'.
1095
1096Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1097
1098 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1099 Add IsString flag to string instructions.
1100 (IS_STRING): Don't define.
1101 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1102 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1103 (SS_PREFIX_OPCODE): Define.
1104
1105Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1106
1107 * i386.h: Revert March 24 patch; no more LinearAddress.
1108
1109Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1110
1111 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1112 instructions, and instead add FWait opcode modifier. Add short
1113 form of fldenv and fstenv.
1114 (FWAIT_OPCODE): Define.
1115
1116 * i386.h (i386_optab): Change second operand constraint of `mov
1117 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1118 allow legal instructions such as `movl %gs,%esi'
1119
1120Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1121
1122 * h8300.h: Various changes to fully bracket initializers.
1123
1124Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1125
1126 * i386.h: Set LinearAddress for lidt and lgdt.
1127
1128Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1129
1130 * cgen.h (CGEN_BOOL_ATTR): New macro.
1131
1132Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1133
1134 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1135
1136Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1137
1138 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1139 (cgen_insn): Record syntax and format entries here, rather than
1140 separately.
1141
1142Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1143
1144 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1145
1146Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1147
1148 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1149 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1150 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1151
1152Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1153
1154 * cgen.h (lookup_insn): New argument alias_p.
1155
1156Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1157
1158Fix rac to accept only a0:
1159 * d10v.h (OPERAND_ACC): Split into:
1160 (OPERAND_ACC0, OPERAND_ACC1) .
1161 (OPERAND_GPR): Define.
1162
1163Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1164
1165 * cgen.h (CGEN_FIELDS): Define here.
1166 (CGEN_HW_ENTRY): New member `type'.
1167 (hw_list): Delete decl.
1168 (enum cgen_mode): Declare.
1169 (CGEN_OPERAND): New member `hw'.
1170 (enum cgen_operand_instance_type): Declare.
1171 (CGEN_OPERAND_INSTANCE): New type.
1172 (CGEN_INSN): New member `operands'.
1173 (CGEN_OPCODE_DATA): Make hw_list const.
1174 (get_insn_operands,lookup_insn): Add prototypes for.
1175
1176Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1177
1178 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1179 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1180 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1181 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1182
1183Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1184
1185 * cgen.h: Correct typo in comment end marker.
1186
1187Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1188
1189 * tic30.h: New file.
1190
5a109b67 1191Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH		 1192
1193 * cgen.h: Add prototypes for cgen_save_fixups(),
1194 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1195 of cgen_asm_finish_insn() to return a char *.
1196
1197Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1198
1199 * cgen.h: Formatting changes to improve readability.
1200
1201Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1202
1203 * cgen.h (*): Clean up pass over `struct foo' usage.
1204 (CGEN_ATTR): Make unsigned char.
1205 (CGEN_ATTR_TYPE): Update.
1206 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1207 (cgen_base): Move member `attrs' to cgen_insn.
1208 (CGEN_KEYWORD): New member `null_entry'.
1209 (CGEN_{SYNTAX,FORMAT}): New types.
1210 (cgen_insn): Format and syntax separated from each other.
1211
1212Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1213
1214 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1215 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1216 flags_{used,set} long.
1217 (d30v_operand): Make flags field long.
1218
1219Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1220
1221 * m68k.h: Fix comment describing operand types.
1222
1223Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1224
1225 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1226 everything else after down.
1227
1228Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1229
1230 * d10v.h (OPERAND_FLAG): Split into:
1231 (OPERAND_FFLAG, OPERAND_CFLAG) .
1232
1233Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1234
1235 * mips.h (struct mips_opcode): Changed comments to reflect new
1236 field usage.
1237
1238Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1239
1240 * mips.h: Added to comments a quick-ref list of all assigned
1241 operand type characters.
1242 (OP_{MASK,SH}_PERFREG): New macros.
1243
1244Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1245
1246 * sparc.h: Add '_' and '/' for v9a asr's.
1247 Patch from David Miller <davem@vger.rutgers.edu>
1248
1249Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1250
1251 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1252 area are not available in the base model (H8/300).
1253
1254Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1255
1256 * m68k.h: Remove documentation of ` operand specifier.
1257
1258Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1259
1260 * m68k.h: Document q and v operand specifiers.
1261
1262Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1263
1264 * v850.h (struct v850_opcode): Add processors field.
1265 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1266 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1267 (PROCESSOR_V850EA): New bit constants.
1268
1269Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1270
1271 Merge changes from Martin Hunt:
1272
1273 * d30v.h: Allow up to 64 control registers. Add
1274 SHORT_A5S format.
1275
1276 * d30v.h (LONG_Db): New form for delayed branches.
1277
1278 * d30v.h: (LONG_Db): New form for repeati.
1279
1280 * d30v.h (SHORT_D2B): New form.
1281
1282 * d30v.h (SHORT_A2): New form.
1283
1284 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1285 registers are used. Needed for VLIW optimization.
1286
1287Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1288
1289 * cgen.h: Move assembler interface section
1290 up so cgen_parse_operand_result is defined for cgen_parse_address.
1291 (cgen_parse_address): Update prototype.
1292
1293Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1294
1295 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1296
1297Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1298
1299 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1300 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1301 <paubert@iram.es>.
1302
1303 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1304 <paubert@iram.es>.
1305
1306 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1307 <paubert@iram.es>.
1308
1309 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1310 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1311
1312Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1313
1314 * v850.h (V850_NOT_R0): New flag.
1315
1316Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1317
1318 * v850.h (struct v850_opcode): Remove flags field.
1319
1320Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1321
1322 * v850.h (struct v850_opcode): Add flags field.
1323 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1324 fields.
1325 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1326 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1327
1328Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1329
1330 * arc.h: New file.
1331
1332Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1333
1334 * sparc.h (sparc_opcodes): Declare as const.
1335
1336Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1337
1338 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1339 uses single or double precision floating point resources.
1340 (INSN_NO_ISA, INSN_ISA1): Define.
1341 (cpu specific INSN macros): Tweak into bitmasks outside the range
1342 of INSN_ISA field.
1343
1344Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1345
1346 * i386.h: Fix pand opcode.
1347
1348Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1349
1350 * mips.h: Widen INSN_ISA and move it to a more convenient
1351 bit position. Add INSN_3900.
1352
1353Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1354
1355 * mips.h (struct mips_opcode): added new field membership.
1356
1357Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1358
1359 * i386.h (movd): only Reg32 is allowed.
1360
1361 * i386.h: add fcomp and ud2. From Wayne Scott
1362 <wscott@ichips.intel.com>.
1363
1364Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1365
1366 * i386.h: Add MMX instructions.
1367
1368Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1369
1370 * i386.h: Remove W modifier from conditional move instructions.
1371
1372Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1373
1374 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1375 with no arguments to match that generated by the UnixWare
1376 assembler.
1377
1378Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1379
1380 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1381 (cgen_parse_operand_fn): Declare.
1382 (cgen_init_parse_operand): Declare.
1383 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1384 new argument `want'.
1385 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1386 (enum cgen_parse_operand_type): New enum.
1387
1388Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1389
1390 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1391
1392Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1393
1394 * cgen.h: New file.
1395
1396Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1397
1398 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1399 fdivrp.
1400
1401Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1402
1403 * v850.h (extract): Make unsigned.
1404
1405Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1406
1407 * i386.h: Add iclr.
1408
1409Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1410
1411 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1412 take a direction bit.
1413
1414Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1415
1416 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1417
1418Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1419
1420 * sparc.h: Include <ansidecl.h>. Update function declarations to
1421 use prototypes, and to use const when appropriate.
1422
1423Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1424
1425 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1426
1427Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1428
1429 * d10v.h: Change pre_defined_registers to
1430 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1431
1432Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1433
1434 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1435 Change mips_opcodes from const array to a pointer,
1436 and change bfd_mips_num_opcodes from const int to int,
1437 so that we can increase the size of the mips opcodes table
1438 dynamically.
1439
1440Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1441
1442 * d30v.h (FLAG_X): Remove unused flag.
1443
1444Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1445
1446 * d30v.h: New file.
1447
1448Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1449
1450 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1451 (PDS_VALUE): Macro to access value field of predefined symbols.
1452 (tic80_next_predefined_symbol): Add prototype.
1453
1454Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1455
1456 * tic80.h (tic80_symbol_to_value): Change prototype to match
1457 change in function, added class parameter.
1458
1459Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1460
1461 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1462 endmask fields, which are somewhat weird in that 0 and 32 are
1463 treated exactly the same.
1464
1465Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1466
1467 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1468 rather than a constant that is 2**X. Reorder them to put bits for
1469 operands that have symbolic names in the upper bits, so they can
1470 be packed into an int where the lower bits contain the value that
1471 corresponds to that symbolic name.
1472 (predefined_symbo): Add struct.
1473 (tic80_predefined_symbols): Declare array of translations.
1474 (tic80_num_predefined_symbols): Declare size of that array.
1475 (tic80_value_to_symbol): Declare function.
1476 (tic80_symbol_to_value): Declare function.
1477
1478Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1479
1480 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1481
1482Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1483
1484 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1485 be the destination register.
1486
1487Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1488
1489 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1490 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1491 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1492 that the opcode can have two vector instructions in a single
1493 32 bit word and we have to encode/decode both.
1494
1495Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1496
1497 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1498 TIC80_OPERAND_RELATIVE for PC relative.
1499 (TIC80_OPERAND_BASEREL): New flag bit for register
1500 base relative.
1501
1502Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1503
1504 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1505
1506Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1507
1508 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1509 ":s" modifier for scaling.
1510
1511Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1512
1513 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1514 (TIC80_OPERAND_M_LI): Ditto
1515
1516Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1517
1518 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1519 (TIC80_OPERAND_CC): New define for condition code operand.
1520 (TIC80_OPERAND_CR): New define for control register operand.
1521
1522Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1523
1524 * tic80.h (struct tic80_opcode): Name changed.
1525 (struct tic80_opcode): Remove format field.
1526 (struct tic80_operand): Add insertion and extraction functions.
1527 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1528 correct ones.
1529 (FMT_*): Ditto.
1530
1531Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1532
1533 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1534 type IV instruction offsets.
1535
1536Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1537
1538 * tic80.h: New file.
1539
1540Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1541
1542 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1543
1544Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1545
1546 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1547 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1548 * v850.h: Fix comment, v850_operand not powerpc_operand.
1549
1550Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1551
1552 * mn10200.h: Flesh out structures and definitions needed by
1553 the mn10200 assembler & disassembler.
1554
1555Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1556
1557 * mips.h: Add mips16 definitions.
1558
1559Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1560
1561 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1562
1563Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1564
1565 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1566 (MN10300_OPERAND_MEMADDR): Define.
1567
1568Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1569
1570 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1571
1572Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1573
1574 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1575
1576Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1577
1578 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1579
1580Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1581
1582 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1583
1584Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1585
1586 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ		 1587 negative to minimize problems with shared libraries. Organize
1588 instruction subsets by AMASK extensions and PALcode
1589 implementation.
252b5132
RH		 1590 (struct alpha_operand): Move flags slot for better packing.
1591
1592Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1593
1594 * v850.h (V850_OPERAND_RELAX): New operand flag.
1595
1596Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1597
1598 * mn10300.h (FMT_*): Move operand format definitions
1599 here.
1600
1601Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1602
1603 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1604
1605Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1606
1607 * mn10300.h (mn10300_opcode): Add "format" field.
1608 (MN10300_OPERAND_*): Define.
1609
1610Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1611
1612 * mn10x00.h: Delete.
1613 * mn10200.h, mn10300.h: New files.
1614
1615Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1616
1617 * mn10x00.h: New file.
1618
1619Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1620
1621 * v850.h: Add new flag to indicate this instruction uses a PC
1622 displacement.
1623
1624Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1625
1626 * h8300.h (stmac): Add missing instruction.
1627
1628Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1629
1630 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1631 field.
1632
1633Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1634
1635 * v850.h (V850_OPERAND_EP): Define.
1636
1637 * v850.h (v850_opcode): Add size field.
1638
1639Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1640
1641 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1642 to functions used to handle unusual operand encoding.
252b5132 1643 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1644 V850_OPERAND_SIGNED): Defined.
252b5132
RH		 1645
1646Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1647
1648 * v850.h (v850_operands): Add flags field.
1649 (OPERAND_REG, OPERAND_NUM): Defined.
1650
1651Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1652
1653 * v850.h: New file.
1654
1655Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1656
1657 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ		 1658 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1659 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1660 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1661 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1662 Defined.
252b5132
RH		 1663
1664Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1665
1666 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1667 a 3 bit space id instead of a 2 bit space id.
1668
1669Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1670
1671 * d10v.h: Add some additional defines to support the
d83c6548 1672 assembler in determining which operations can be done in parallel.
252b5132
RH		 1673
1674Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1675
1676 * h8300.h (SN): Define.
1677 (eepmov.b): Renamed from "eepmov"
1678 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1679 with them.
1680
1681Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1682
1683 * d10v.h (OPERAND_SHIFT): New operand flag.
1684
1685Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1686
1687 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1688 signed numbers.
252b5132
RH		 1689
1690Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1691
1692 * d10v.h (pd_reg): Define. Putting the definition here allows
1693 the assembler and disassembler to share the same struct.
1694
1695Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1696
1697 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1698 Williams <steve@icarus.com>.
1699
1700Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1701
1702 * d10v.h: New file.
1703
1704Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1705
1706 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1707
1708Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1709
d83c6548 1710 * m68k.h (mcf5200): New macro.
252b5132
RH		 1711 Document names of coldfire control registers.
1712
1713Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1714
1715 * h8300.h (SRC_IN_DST): Define.
1716
1717 * h8300.h (UNOP3): Mark the register operand in this insn
1718 as a source operand, not a destination operand.
1719 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1720 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1721 register operand with SRC_IN_DST.
1722
1723Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1724
1725 * alpha.h: New file.
1726
1727Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1728
1729 * rs6k.h: Remove obsolete file.
1730
1731Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1732
1733 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1734 fdivp, and fdivrp. Add ffreep.
1735
1736Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1737
1738 * h8300.h: Reorder various #defines for readability.
1739 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1740 (BITOP): Accept additional (unused) argument. All callers changed.
1741 (EBITOP): Likewise.
1742 (O_LAST): Bump.
1743 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1744
1745 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1746 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1747 (BITOP, EBITOP): Handle new H8/S addressing modes for
1748 bit insns.
1749 (UNOP3): Handle new shift/rotate insns on the H8/S.
1750 (insns using exr): New instructions.
1751 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1752
1753Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1754
1755 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1756 was incorrect.
1757
1758Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1759
1760 * h8300.h (START): Remove.
1761 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1762 and mov.l insns that can be relaxed.
1763
1764Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1765
1766 * i386.h: Remove Abs32 from lcall.
1767
1768Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1769
1770 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1771 (SLCPOP): New macro.
1772 Mark X,Y opcode letters as in use.
1773
1774Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1775
1776 * sparc.h (F_FLOAT, F_FBR): Define.
1777
1778Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1779
1780 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1781 from all insns.
1782 (ABS8SRC,ABS8DST): Add ABS8MEM.
1783 (add.l): Fix reg+reg variant.
1784 (eepmov.w): Renamed from eepmovw.
1785 (ldc,stc): Fix many cases.
1786
1787Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1788
1789 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1790
1791Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1792
1793 * sparc.h (O): Mark operand letter as in use.
1794
1795Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1796
1797 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1798 Mark operand letters uU as in use.
1799
1800Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1801
1802 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1803 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1804 (SPARC_OPCODE_SUPPORTED): New macro.
1805 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1806 (F_NOTV9): Delete.
1807
1808Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1809
1810 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1811 declaration consistent with return type in definition.
1812
1813Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1814
1815 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1816
1817Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1818
1819 * i386.h (i386_regtab): Add 80486 test registers.
1820
1821Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1822
1823 * i960.h (I_HX): Define.
1824 (i960_opcodes): Add HX instruction.
1825
1826Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1827
1828 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1829 and fclex.
1830
1831Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1832
1833 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1834 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1835 (bfd_* defines): Delete.
1836 (sparc_opcode_archs): Replaces architecture_pname.
1837 (sparc_opcode_lookup_arch): Declare.
1838 (NUMOPCODES): Delete.
1839
1840Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1841
1842 * sparc.h (enum sparc_architecture): Add v9a.
1843 (ARCHITECTURES_CONFLICT_P): Update.
1844
1845Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1846
1847 * i386.h: Added Pentium Pro instructions.
1848
1849Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1850
1851 * m68k.h: Document new 'W' operand place.
1852
1853Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1854
1855 * hppa.h: Add lci and syncdma instructions.
1856
1857Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1858
1859 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1860 instructions.
252b5132
RH		 1861
1862Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1863
1864 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1865 assembler's -mcom and -many switches.
1866
1867Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1868
1869 * i386.h: Fix cmpxchg8b extension opcode description.
1870
1871Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1872
1873 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1874 and register cr4.
1875
1876Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1877
1878 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1879
1880Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1881
1882 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1883
1884Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1885
1886 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1887
1888Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1889
1890 * m68kmri.h: Remove.
1891
1892 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1893 declarations. Remove F_ALIAS and flag field of struct
1894 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1895 int. Make name and args fields of struct m68k_opcode const.
1896
1897Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1898
1899 * sparc.h (F_NOTV9): Define.
1900
1901Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1902
1903 * mips.h (INSN_4010): Define.
1904
1905Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1906
1907 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1908
1909 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1910 * m68k.h: Fix argument descriptions of coprocessor
1911 instructions to allow only alterable operands where appropriate.
1912 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1913 (m68k_opcode_aliases): Add more aliases.
1914
1915Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1916
1917 * m68k.h: Added explcitly short-sized conditional branches, and a
1918 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1919 svr4-based configurations.
1920
1921Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1922
1923 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1924 * i386.h: added missing Data16/Data32 flags to a few instructions.
1925
1926Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1927
1928 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1929 (OP_MASK_BCC, OP_SH_BCC): Define.
1930 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1931 (OP_MASK_CCC, OP_SH_CCC): Define.
1932 (INSN_READ_FPR_R): Define.
1933 (INSN_RFE): Delete.
1934
1935Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1936
1937 * m68k.h (enum m68k_architecture): Deleted.
1938 (struct m68k_opcode_alias): New type.
1939 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1940 matching constraints, values and flags. As a side effect of this,
1941 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1942 as I know were never used, now may need re-examining.
1943 (numopcodes): Now const.
1944 (m68k_opcode_aliases, numaliases): New variables.
1945 (endop): Deleted.
1946 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1947 m68k_opcode_aliases; update declaration of m68k_opcodes.
1948
1949Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1950
1951 * hppa.h (delay_type): Delete unused enumeration.
1952 (pa_opcode): Replace unused delayed field with an architecture
1953 field.
1954 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1955
1956Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1957
1958 * mips.h (INSN_ISA4): Define.
1959
1960Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1961
1962 * mips.h (M_DLA_AB, M_DLI): Define.
1963
1964Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1965
1966 * hppa.h (fstwx): Fix single-bit error.
1967
1968Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1969
1970 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1971
1972Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1973
1974 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1975 debug registers. From Charles Hannum (mycroft@netbsd.org).
1976
1977Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1978
1979 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1980 i386 support:
1981 * i386.h (MOV_AX_DISP32): New macro.
1982 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1983 of several call/return instructions.
1984 (ADDR_PREFIX_OPCODE): New macro.
1985
1986Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1987
1988 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1989
4f1d9bd8
NC		 1990 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1991 char.
252b5132
RH		 1992 (struct vot, field `name'): ditto.
1993
1994Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1995
1996 * vax.h: Supply and properly group all values in end sentinel.
1997
1998Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1999
2000 * mips.h (INSN_ISA, INSN_4650): Define.
2001
2002Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2003
2004 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2005 systems with a separate instruction and data cache, such as the
2006 29040, these instructions take an optional argument.
2007
2008Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2009
2010 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2011 INSN_TRAP.
2012
2013Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2014
2015 * mips.h (INSN_STORE_MEMORY): Define.
2016
2017Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2018
2019 * sparc.h: Document new operand type 'x'.
2020
2021Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2022
2023 * i960.h (I_CX2): New instruction category. It includes
2024 instructions available on Cx and Jx processors.
2025 (I_JX): New instruction category, for JX-only instructions.
2026 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2027 Jx-only instructions, in I_JX category.
2028
2029Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2030
2031 * ns32k.h (endop): Made pointer const too.
2032
2033Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2034
2035 * ns32k.h: Drop Q operand type as there is no correct use
2036 for it. Add I and Z operand types which allow better checking.
2037
2038Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2039
2040 * h8300.h (xor.l) :fix bit pattern.
2041 (L_2): New size of operand.
2042 (trapa): Use it.
2043
2044Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2045
2046 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2047
2048Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2049
2050 * sparc.h: Include v9 definitions.
2051
2052Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2053
2054 * m68k.h (m68060): Defined.
2055 (m68040up, mfloat, mmmu): Include it.
2056 (struct m68k_opcode): Widen `arch' field.
2057 (m68k_opcodes): Updated for M68060. Removed comments that were
2058 instructions commented out by "JF" years ago.
2059
2060Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2061
2062 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2063 add a one-bit `flags' field.
2064 (F_ALIAS): New macro.
2065
2066Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2067
2068 * h8300.h (dec, inc): Get encoding right.
2069
2070Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2071
2072 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2073 a flag instead.
2074 (PPC_OPERAND_SIGNED): Define.
2075 (PPC_OPERAND_SIGNOPT): Define.
2076
2077Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2078
2079 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2080 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2081
2082Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2083
2084 * i386.h: Reverse last change. It'll be handled in gas instead.
2085
2086Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2087
2088 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2089 slower on the 486 and used the implicit shift count despite the
2090 explicit operand. The one-operand form is still available to get
2091 the shorter form with the implicit shift count.
2092
2093Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2094
2095 * hppa.h: Fix typo in fstws arg string.
2096
2097Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2098
2099 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2100
2101Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2102
2103 * ppc.h (PPC_OPCODE_601): Define.
2104
2105Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2106
2107 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2108 (so we can determine valid completers for both addb and addb[tf].)
2109
2110 * hppa.h (xmpyu): No floating point format specifier for the
2111 xmpyu instruction.
2112
2113Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2114
2115 * ppc.h (PPC_OPERAND_NEXT): Define.
2116 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2117 (struct powerpc_macro): Define.
2118 (powerpc_macros, powerpc_num_macros): Declare.
2119
2120Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2121
2122 * ppc.h: New file. Header file for PowerPC opcode table.
2123
2124Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2125
2126 * hppa.h: More minor template fixes for sfu and copr (to allow
2127 for easier disassembly).
2128
2129 * hppa.h: Fix templates for all the sfu and copr instructions.
2130
2131Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2132
2133 * i386.h (push): Permit Imm16 operand too.
2134
2135Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2136
2137 * h8300.h (andc): Exists in base arch.
2138
2139Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2140
2141 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2142 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2143
2144Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2145
2146 * hppa.h: Add FP quadword store instructions.
2147
2148Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2149
2150 * mips.h: (M_J_A): Added.
2151 (M_LA): Removed.
2152
2153Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2154
2155 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2156 <mellon@pepper.ncd.com>.
2157
2158Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2159
2160 * hppa.h: Immediate field in probei instructions is unsigned,
2161 not low-sign extended.
2162
2163Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2164
2165 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2166
2167Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2168
2169 * i386.h: Add "fxch" without operand.
2170
2171Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2172
2173 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2174
2175Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2176
2177 * hppa.h: Add gfw and gfr to the opcode table.
2178
2179Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2180
2181 * m88k.h: extended to handle m88110.
2182
2183Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2184
2185 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2186 addresses.
2187
2188Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2189
2190 * i960.h (i960_opcodes): Properly bracket initializers.
2191
2192Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2193
2194 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2195
2196Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2197
2198 * m68k.h (two): Protect second argument with parentheses.
2199
2200Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2201
2202 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2203 Deleted old in/out instructions in "#if 0" section.
2204
2205Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2206
2207 * i386.h (i386_optab): Properly bracket initializers.
2208
2209Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2210
2211 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2212 Jeff Law, law@cs.utah.edu).
2213
2214Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2215
2216 * i386.h (lcall): Accept Imm32 operand also.
2217
2218Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2219
2220 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2221 (M_DABS): Added.
2222
2223Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2224
2225 * mips.h (INSN_*): Changed values. Removed unused definitions.
2226 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2227 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2228 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2229 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2230 (M_*): Added new values for r6000 and r4000 macros.
2231 (ANY_DELAY): Removed.
2232
2233Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2234
2235 * mips.h: Added M_LI_S and M_LI_SS.
2236
2237Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2238
2239 * h8300.h: Get some rare mov.bs correct.
2240
2241Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2242
2243 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2244 been included.
2245
2246Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2247
2248 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2249 jump instructions, for use in disassemblers.
2250
2251Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2252
2253 * m88k.h: Make bitfields just unsigned, not unsigned long or
2254 unsigned short.
2255
2256Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2257
2258 * hppa.h: New argument type 'y'. Use in various float instructions.
2259
2260Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2261
2262 * hppa.h (break): First immediate field is unsigned.
2263
2264 * hppa.h: Add rfir instruction.
2265
2266Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2267
2268 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2269
2270Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2271
2272 * mips.h: Reworked the hazard information somewhat, and fixed some
2273 bugs in the instruction hazard descriptions.
2274
2275Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2276
2277 * m88k.h: Corrected a couple of opcodes.
2278
2279Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2280
2281 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2282 new version includes instruction hazard information, but is
2283 otherwise reasonably similar.
2284
2285Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2286
2287 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2288
2289Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2290
2291 Patches from Jeff Law, law@cs.utah.edu:
2292 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2293 Make the tables be the same for the following instructions:
2294 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2295 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2296 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2297 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2298 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2299 "fcmp", and "ftest".
2300
2301 * hppa.h: Make new and old tables the same for "break", "mtctl",
2302 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2303 Fix typo in last patch. Collapse several #ifdefs into a
2304 single #ifdef.
2305
2306 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2307 of the comments up-to-date.
2308
2309 * hppa.h: Update "free list" of letters and update
2310 comments describing each letter's function.
2311
4f1d9bd8
NC		 2312Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2313
2314 * h8300.h: Lots of little fixes for the h8/300h.
2315
2316Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2317
2318 Support for H8/300-H
2319 * h8300.h: Lots of new opcodes.
2320
252b5132
RH		 2321Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2322
2323 * h8300.h: checkpoint, includes H8/300-H opcodes.
2324
2325Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2326
2327 * Patches from Jeffrey Law <law@cs.utah.edu>.
2328 * hppa.h: Rework single precision FP
2329 instructions so that they correctly disassemble code
2330 PA1.1 code.
2331
2332Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2333
2334 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2335 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2336
2337Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2338
2339 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2340 gdb will define it for now.
2341
2342Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2343
2344 * sparc.h: Don't end enumerator list with comma.
2345
2346Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2347
2348 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2349 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2350 ("bc2t"): Correct typo.
2351 ("[ls]wc[023]"): Use T rather than t.
2352 ("c[0123]"): Define general coprocessor instructions.
2353
2354Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2355
2356 * m68k.h: Move split point for gcc compilation more towards
2357 middle.
2358
2359Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2360
2361 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2362 simply wrong, ics, rfi, & rfsvc were missing).
2363 Add "a" to opr_ext for "bb". Doc fix.
2364
2365Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2366
2367 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2368 * mips.h: Add casts, to suppress warnings about shifting too much.
2369 * m68k.h: Document the placement code '9'.
2370
2371Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2372
2373 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2374 allows callers to break up the large initialized struct full of
2375 opcodes into two half-sized ones. This permits GCC to compile
2376 this module, since it takes exponential space for initializers.
2377 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2378
2379Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2380
2381 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2382 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2383 initialized structs in it.
2384
2385Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2386
2387 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2388 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2389 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2390
2391Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2392
2393 * mips.h: document "i" and "j" operands correctly.
2394
2395Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2396
2397 * mips.h: Removed endianness dependency.
2398
2399Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2400
2401 * h8300.h: include info on number of cycles per instruction.
2402
2403Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2404
2405 * hppa.h: Move handy aliases to the front. Fix masks for extract
2406 and deposit instructions.
2407
2408Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2409
2410 * i386.h: accept shld and shrd both with and without the shift
2411 count argument, which is always %cl.
2412
2413Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2414
2415 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2416 (one_byte_segment_defaults, two_byte_segment_defaults,
2417 i386_prefixtab_end): Ditto.
2418
2419Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2420
2421 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2422 for operand 2; from John Carr, jfc@dsg.dec.com.
2423
2424Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2425
2426 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2427 always use 16-bit offsets. Makes calculated-size jump tables
2428 feasible.
2429
2430Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2431
2432 * i386.h: Fix one-operand forms of in* and out* patterns.
2433
2434Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2435
2436 * m68k.h: Added CPU32 support.
2437
2438Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2439
2440 * mips.h (break): Disassemble the argument. Patch from
2441 jonathan@cs.stanford.edu (Jonathan Stone).
2442
2443Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2444
2445 * m68k.h: merged Motorola and MIT syntax.
2446
2447Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2448
2449 * m68k.h (pmove): make the tests less strict, the 68k book is
2450 wrong.
2451
2452Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2453
2454 * m68k.h (m68ec030): Defined as alias for 68030.
2455 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2456 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2457 them. Tightened description of "fmovex" to distinguish it from
2458 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2459 up descriptions that claimed versions were available for chips not
2460 supporting them. Added "pmovefd".
2461
2462Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2463
2464 * m68k.h: fix where the . goes in divull
2465
2466Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2467
2468 * m68k.h: the cas2 instruction is supposed to be written with
2469 indirection on the last two operands, which can be either data or
2470 address registers. Added a new operand type 'r' which accepts
2471 either register type. Added new cases for cas2l and cas2w which
2472 use them. Corrected masks for cas2 which failed to recognize use
2473 of address register.
2474
2475Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2476
2477 * m68k.h: Merged in patches (mostly m68040-specific) from
2478 Colin Smith <colin@wrs.com>.
2479
2480 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2481 base). Also cleaned up duplicates, re-ordered instructions for
2482 the sake of dis-assembling (so aliases come after standard names).
2483 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2484
2485Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2486
2487 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2488 all missing .s
2489
2490Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2491
2492 * sparc.h: Moved tables to BFD library.
2493
2494 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2495
2496Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2497
2498 * h8300.h: Finish filling in all the holes in the opcode table,
2499 so that the Lucid C compiler can digest this as well...
2500
2501Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2502
2503 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2504 Fix opcodes on various sizes of fild/fist instructions
2505 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2506 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2507
2508Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2509
2510 * h8300.h: Fill in all the holes in the opcode table so that the
2511 losing HPUX C compiler can digest this...
2512
2513Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2514
2515 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2516 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2517
2518Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2519
2520 * sparc.h: Add new architecture variant sparclite; add its scan
2521 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2522
2523Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2524
2525 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2526 fy@lucid.com).
2527
2528Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2529
2530 * rs6k.h: New version from IBM (Metin).
2531
2532Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2533
2534 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2535 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2536
2537Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2538
2539 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2540
2541Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2542
2543 * m68k.h (one, two): Cast macro args to unsigned to suppress
2544 complaints from compiler and lint about integer overflow during
2545 shift.
2546
2547Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2548
2549 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2550
2551Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2552
2553 * mips.h: Make bitfield layout depend on the HOST compiler,
2554 not on the TARGET system.
2555
2556Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2557
2558 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2559 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2560 <TRANLE@INTELLICORP.COM>.
2561
2562Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2563
2564 * h8300.h: turned op_type enum into #define list
2565
2566Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2567
2568 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2569 similar instructions -- they've been renamed to "fitoq", etc.
2570 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2571 number of arguments.
2572 * h8300.h: Remove extra ; which produces compiler warning.
2573
2574Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2575
2576 * sparc.h: fix opcode for tsubcctv.
2577
2578Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2579
2580 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2581
2582Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2583
2584 * sparc.h (nop): Made the 'lose' field be even tighter,
2585 so only a standard 'nop' is disassembled as a nop.
2586
2587Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2588
2589 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2590 disassembled as a nop.
2591
4f1d9bd8
NC		 2592Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2593
2594 * m68k.h, sparc.h: ANSIfy enums.
2595
252b5132
RH		 2596Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2597
2598 * sparc.h: fix a typo.
2599
2600Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2601
2602 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2603 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2604 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH		 2605
2606\f
2607Local Variables:
2608version-control: never
2609End:
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