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* doc/c-ppc.texi (PowerPC-Opts): Add -mpower4 and -maltivec.
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
5a8b245c
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1Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
2
3 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
4
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5Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
6
7 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
8 (xchg): Fix.
9 (in, out): Disable 64bit operands.
10 (call, jmp): Avoid REX prefixes.
11 (jcxz): Prohibit in 64bit mode
12 (jrcxz, loop): Add 64bit variants.
13 (movq): Fix patterns.
14 (movmskps, pextrw, pinstrw): Add 64bit variants.
15
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162002-01-31 Ivan Guzvinec <ivang@opencores.org>
17
18 * or32.h: New file.
19
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202002-01-22 Graydon Hoare <graydon@redhat.com>
21
22 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
23 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
24
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252002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
26
27 * h8300.h: Comment typo fix.
28
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292002-01-03 matthew green <mrg@redhat.com>
30
31 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
32 (PPC_OPCODE_BOOKE64): Likewise.
33
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34Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
35
36 * hppa.h (call, ret): Move to end of table.
37 (addb, addib): PA2.0 variants should have been PA2.0W.
38 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
39 happy.
40 (fldw, fldd, fstw, fstd, bb): Likewise.
41 (short loads/stores): Tweak format specifier slightly to keep
42 disassembler happy.
43 (indexed loads/stores): Likewise.
44 (absolute loads/stores): Likewise.
45
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462001-12-04 Alexandre Oliva <aoliva@redhat.com>
47
48 * d10v.h (OPERAND_NOSP): New macro.
49
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502001-11-29 Alexandre Oliva <aoliva@redhat.com>
51
52 * d10v.h (OPERAND_SP): New macro.
53
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542001-11-15 Alan Modra <amodra@bigpond.net.au>
55
56 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
57
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TW
582001-11-11 Timothy Wall <twall@alum.mit.edu>
59
60 * tic54x.h: Revise opcode layout; don't really need a separate
61 structure for parallel opcodes.
62
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632001-11-13 Zack Weinberg <zack@codesourcery.com>
64 Alan Modra <amodra@bigpond.net.au>
65
66 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
67 accept WordReg.
68
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692001-11-04 Chris Demetriou <cgd@broadcom.com>
70
71 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
72
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732001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
74
75 * mmix.h: New file.
76
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772001-10-18 Chris Demetriou <cgd@broadcom.com>
78
79 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
80 of the expression, to make source code merging easier.
81
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CD
822001-10-17 Chris Demetriou <cgd@broadcom.com>
83
84 * mips.h: Sort coprocessor instruction argument characters
85 in comment, add a few more words of description for "H".
86
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CD
872001-10-17 Chris Demetriou <cgd@broadcom.com>
88
89 * mips.h (INSN_SB1): New cpu-specific instruction bit.
90 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
91 if cpu is CPU_SB1.
92
f5c120c5
MG
932001-10-17 matthew green <mrg@redhat.com>
94
95 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
96
418c1742
MG
972001-10-12 matthew green <mrg@redhat.com>
98
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99 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
100 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
101 instructions, respectively.
418c1742 102
6ff2f2ba
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1032001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
104
105 * v850.h: Remove spurious comment.
106
015cf428
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1072001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
108
109 * h8300.h: Fix compile time warning messages
110
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1112001-09-04 Richard Henderson <rth@redhat.com>
112
113 * alpha.h (struct alpha_operand): Pack elements into bitfields.
114
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1152001-08-31 Eric Christopher <echristo@redhat.com>
116
117 * mips.h: Remove CPU_MIPS32_4K.
118
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1192001-08-27 Torbjorn Granlund <tege@swox.com>
120
121 * ppc.h (PPC_OPERAND_DS): Define.
122
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1232001-08-25 Andreas Jaeger <aj@suse.de>
124
125 * d30v.h: Fix declaration of reg_name_cnt.
126
127 * d10v.h: Fix declaration of d10v_reg_name_cnt.
128
129 * arc.h: Add prototypes from opcodes/arc-opc.c.
130
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1312001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
132
133 * mips.h (INSN_10000): Define.
134 (OPCODE_IS_MEMBER): Check for INSN_10000.
135
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1362001-08-10 Alan Modra <amodra@one.net.au>
137
138 * ppc.h: Revert 2001-08-08.
139
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1402001-08-10 Richard Sandiford <rsandifo@redhat.com>
141
142 * mips.h (INSN_GP32): Remove.
143 (OPCODE_IS_MEMBER): Remove gp32 parameter.
144 (M_MOVE): New macro identifier.
145
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1462001-08-08 Alan Modra <amodra@one.net.au>
147
148 1999-10-25 Torbjorn Granlund <tege@swox.com>
149 * ppc.h (struct powerpc_operand): New field `reloc'.
150
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1512001-08-01 Aldy Hernandez <aldyh@redhat.com>
152
153 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
154
1552001-07-12 Jeff Johnston <jjohnstn@redhat.com>
156
157 * cgen.h (CGEN_INSN): Add regex support.
158 (build_insn_regex): Declare.
159
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FCE
1602001-07-11 Frank Ch. Eigler <fche@redhat.com>
161
162 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
163 (cgen_cpu_desc): Ditto.
164
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1652001-07-07 Ben Elliston <bje@redhat.com>
166
167 * m88k.h: Clean up and reformat. Remove unused code.
168
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1692001-06-14 Geoffrey Keating <geoffk@redhat.com>
170
171 * cgen.h (cgen_keyword): Add nonalpha_chars field.
172
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1732001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
174
175 * mips.h (CPU_R12000): Define.
176
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1772001-05-23 John Healy <jhealy@redhat.com>
178
179 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 180
aa5f19f2
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1812001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
182
183 * mips.h (INSN_ISA_MASK): Define.
184
67d6227d
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1852001-05-12 Alan Modra <amodra@one.net.au>
186
187 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
188 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
189 and use InvMem as these insns must have register operands.
190
992aaec9
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1912001-05-04 Alan Modra <amodra@one.net.au>
192
193 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
194 and pextrw to swap reg/rm assignments.
195
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HPN
1962001-04-05 Hans-Peter Nilsson <hp@axis.com>
197
198 * cris.h (enum cris_insn_version_usage): Correct comment for
199 cris_ver_v3p.
200
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2012001-03-24 Alan Modra <alan@linuxcare.com.au>
202
203 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
204 Add InvMem to first operand of "maskmovdqu".
205
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HPN
2062001-03-22 Hans-Peter Nilsson <hp@axis.com>
207
208 * cris.h (ADD_PC_INCR_OPCODE): New macro.
209
361bfa20
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2102001-03-21 Kazu Hirata <kazu@hxi.com>
211
212 * h8300.h: Fix formatting.
213
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2142001-03-22 Alan Modra <alan@linuxcare.com.au>
215
216 * i386.h (i386_optab): Add paddq, psubq.
217
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2182001-03-19 Alan Modra <alan@linuxcare.com.au>
219
220 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
221
80a523c2
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2222001-02-28 Igor Shevlyakov <igor@windriver.com>
223
224 * m68k.h: new defines for Coldfire V4. Update mcf to know
225 about mcf5407.
226
e135f41b
NC
2272001-02-18 lars brinkhoff <lars@nocrew.org>
228
229 * pdp11.h: New file.
230
2312001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
232
233 * i386.h (i386_optab): SSE integer converison instructions have
234 64bit versions on x86-64.
235
8eaec934
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2362001-02-10 Nick Clifton <nickc@redhat.com>
237
238 * mips.h: Remove extraneous whitespace. Formating change to allow
239 for future contribution.
240
a85d7ed0
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2412001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
242
243 * s390.h: New file.
244
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2452001-02-02 Patrick Macdonald <patrickm@redhat.com>
246
247 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
248 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
249 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
250
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2512001-01-24 Karsten Keil <kkeil@suse.de>
252
253 * i386.h (i386_optab): Fix swapgs
254
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2552001-01-14 Alan Modra <alan@linuxcare.com.au>
256
257 * hppa.h: Describe new '<' and '>' operand types, and tidy
258 existing comments.
259 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
260 Remove duplicate "ldw j(s,b),x". Sort some entries.
261
e135f41b 2622001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
263
264 * i386.h (i386_optab): Fix pusha and ret templates.
265
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2662001-01-11 Peter Targett <peter.targett@arccores.com>
267
268 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
269 definitions for masking cpu type.
270 (arc_ext_operand_value) New structure for storing extended
271 operands.
272 (ARC_OPERAND_*) Flags for operand values.
273
2742001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
275
276 * i386.h (pinsrw): Add.
277 (pshufw): Remove.
278 (cvttpd2dq): Fix operands.
279 (cvttps2dq): Likewise.
280 (movq2q): Rename to movdq2q.
281
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2822001-01-10 Richard Schaal <richard.schaal@intel.com>
283
284 * i386.h: Correct movnti instruction.
285
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2862001-01-09 Jeff Johnston <jjohnstn@redhat.com>
287
288 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
289 of operands (unsigned char or unsigned short).
290 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
291 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
292
0d2bcfaf 2932001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
294
295 * i386.h (i386_optab): Make [sml]fence template to use immext field.
296
0d2bcfaf 2972001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
298
299 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
300 introduced by Pentium4
301
0d2bcfaf 3022000-12-30 Jan Hubicka <jh@suse.cz>
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JH
303
304 * i386.h (i386_optab): Add "rex*" instructions;
305 add swapgs; disable jmp/call far direct instructions for
306 64bit mode; add syscall and sysret; disable registers for 0xc6
307 template. Add 'q' suffixes to extendable instructions, disable
079966a8 308 obsolete instructions, add new sign/zero extension ones.
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309 (i386_regtab): Add extended registers.
310 (*Suf): Add No_qSuf.
311 (q_Suf, wlq_Suf, bwlq_Suf): New.
312
0d2bcfaf 3132000-12-20 Jan Hubicka <jh@suse.cz>
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314
315 * i386.h (i386_optab): Replace "Imm" with "EncImm".
316 (i386_regtab): Add flags field.
d83c6548 317
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3182000-12-12 Nick Clifton <nickc@redhat.com>
319
320 * mips.h: Fix formatting.
321
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3222000-12-01 Chris Demetriou <cgd@sibyte.com>
323
324 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
325 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
326 OP_*_SYSCALL definitions.
327 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
328 19 bit wait codes.
329 (MIPS operand specifier comments): Remove 'm', add 'U' and
330 'J', and update the meaning of 'B' so that it's more general.
331
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332 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
333 INSN_ISA5): Renumber, redefine to mean the ISA at which the
334 instruction was added.
335 (INSN_ISA32): New constant.
336 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
337 Renumber to avoid new and/or renumbered INSN_* constants.
338 (INSN_MIPS32): Delete.
339 (ISA_UNKNOWN): New constant to indicate unknown ISA.
340 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
341 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 342 constants available at that ISA level.
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343 (CPU_UNKNOWN): New constant to indicate unknown CPU.
344 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
345 define it with a unique value.
346 (OPCODE_IS_MEMBER): Update for new ISA membership-related
347 constant meanings.
348
84ea6cf2 349 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 350 definitions.
84ea6cf2 351
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352 * mips.h (CPU_SB1): New constant.
353
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3542000-10-20 Jakub Jelinek <jakub@redhat.com>
355
356 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
357 Note that '3' is used for siam operand.
358
139368c9
JW
3592000-09-22 Jim Wilson <wilson@cygnus.com>
360
361 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
362
156c2f8b 3632000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 364
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NC
365 * mips.h: Use defines instead of hard-coded processor numbers.
366 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 367 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
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NC
368 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
369 CPU_4KC, CPU_4KM, CPU_4KP): Define..
370 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 371 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 372 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
373 Add 'P' to used characters.
374 Use 'H' for coprocessor select field.
156c2f8b 375 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
376 Document new arg characters and add to used characters.
377 (INSN_MIPS32): New define for MIPS32 extensions.
378 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 379
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3802000-09-05 Alan Modra <alan@linuxcare.com.au>
381
382 * hppa.h: Mention cz completer.
383
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3842000-08-16 Jim Wilson <wilson@cygnus.com>
385
386 * ia64.h (IA64_OPCODE_POSTINC): New.
387
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3882000-08-15 H.J. Lu <hjl@gnu.org>
389
390 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
391 IgnoreSize change.
392
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NC
3932000-08-08 Jason Eckhardt <jle@cygnus.com>
394
395 * i860.h: Small formatting adjustments.
396
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DC
3972000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
398
399 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
400 Move related opcodes closer to each other.
401 Minor changes in comments, list undefined opcodes.
402
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DB
4032000-07-26 Dave Brolley <brolley@redhat.com>
404
405 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
406
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4072000-07-22 Jason Eckhardt <jle@cygnus.com>
408
409 * i860.h (btne, bte, bla): Changed these opcodes
410 to use sbroff ('r') instead of split16 ('s').
411 (J, K, L, M): New operand types for 16-bit aligned fields.
412 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
413 use I, J, K, L, M instead of just I.
414 (T, U): New operand types for split 16-bit aligned fields.
415 (st.x): Changed these opcodes to use S, T, U instead of just S.
416 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
417 exist on the i860.
418 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
419 (pfeq.ss, pfeq.dd): New opcodes.
420 (st.s): Fixed incorrect mask bits.
421 (fmlow): Fixed incorrect mask bits.
422 (fzchkl, pfzchkl): Fixed incorrect mask bits.
423 (faddz, pfaddz): Fixed incorrect mask bits.
424 (form, pform): Fixed incorrect mask bits.
425 (pfld.l): Fixed incorrect mask bits.
426 (fst.q): Fixed incorrect mask bits.
427 (all floating point opcodes): Fixed incorrect mask bits for
428 handling of dual bit.
429
c8488617
HPN
4302000-07-20 Hans-Peter Nilsson <hp@axis.com>
431
432 cris.h: New file.
433
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4342000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
435
436 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
437 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
438 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
439 (AVR_ISA_M83): Define for ATmega83, ATmega85.
440 (espm): Remove, because ESPM removed in databook update.
441 (eicall, eijmp): Move to the end of opcode table.
442
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4432000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
444
445 * m68hc11.h: New file for support of Motorola 68hc11.
446
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447Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
448
449 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
450
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451Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
452
453 * avr.h: New file with AVR opcodes.
454
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455Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
456
457 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
458
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4592000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
460
461 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
462
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4632000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
464
465 * i386.h: Use sl_FP, not sl_Suf for fild.
466
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4672000-05-16 Frank Ch. Eigler <fche@redhat.com>
468
469 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
470 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
471 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
472 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
473
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4742000-05-13 Alan Modra <alan@linuxcare.com.au>,
475
476 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
477
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4782000-05-13 Alan Modra <alan@linuxcare.com.au>,
479 Alexander Sokolov <robocop@netlink.ru>
480
481 * i386.h (i386_optab): Add cpu_flags for all instructions.
482
4832000-05-13 Alan Modra <alan@linuxcare.com.au>
484
485 From Gavin Romig-Koch <gavin@cygnus.com>
486 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
487
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TW
4882000-05-04 Timothy Wall <twall@cygnus.com>
489
490 * tic54x.h: New.
491
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4922000-05-03 J.T. Conklin <jtc@redback.com>
493
494 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
495 (PPC_OPERAND_VR): New operand flag for vector registers.
496
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4972000-05-01 Kazu Hirata <kazu@hxi.com>
498
499 * h8300.h (EOP): Add missing initializer.
500
a7fba0e0
JL
501Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
502
503 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
504 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
505 New operand types l,y,&,fe,fE,fx added to support above forms.
506 (pa_opcodes): Replaced usage of 'x' as source/target for
507 floating point double-word loads/stores with 'fx'.
508
800eeca4
JW
509Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
510 David Mosberger <davidm@hpl.hp.com>
511 Timothy Wall <twall@cygnus.com>
512 Jim Wilson <wilson@cygnus.com>
513
514 * ia64.h: New file.
515
ba23e138
NC
5162000-03-27 Nick Clifton <nickc@cygnus.com>
517
518 * d30v.h (SHORT_A1): Fix value.
519 (SHORT_AR): Renumber so that it is at the end of the list of short
520 instructions, not the end of the list of long instructions.
521
d0b47220
AM
5222000-03-26 Alan Modra <alan@linuxcare.com>
523
524 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
525 problem isn't really specific to Unixware.
526 (OLDGCC_COMPAT): Define.
527 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
528 destination %st(0).
529 Fix lots of comments.
530
866afedc
NC
5312000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
532
533 * d30v.h:
534 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
535 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
536 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
537 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
538 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
539 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
540 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
541
cc5ca5ce
AM
5422000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
543
544 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
545 fistpd without suffix.
546
68e324a2
NC
5472000-02-24 Nick Clifton <nickc@cygnus.com>
548
549 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
550 'signed_overflow_ok_p'.
551 Delete prototypes for cgen_set_flags() and cgen_get_flags().
552
60f036a2
AH
5532000-02-24 Andrew Haley <aph@cygnus.com>
554
555 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
556 (CGEN_CPU_TABLE): flags: new field.
557 Add prototypes for new functions.
d83c6548 558
9b9b5cd4
AM
5592000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
560
561 * i386.h: Add some more UNIXWARE_COMPAT comments.
562
5b93d8bb
AM
5632000-02-23 Linas Vepstas <linas@linas.org>
564
565 * i370.h: New file.
566
4f1d9bd8
NC
5672000-02-22 Chandra Chavva <cchavva@cygnus.com>
568
569 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
570 cannot be combined in parallel with ADD/SUBppp.
571
87f398dd
AH
5722000-02-22 Andrew Haley <aph@cygnus.com>
573
574 * mips.h: (OPCODE_IS_MEMBER): Add comment.
575
367c01af
AH
5761999-12-30 Andrew Haley <aph@cygnus.com>
577
9a1e79ca
AH
578 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
579 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
580 insns.
367c01af 581
add0c677
AM
5822000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
583
584 * i386.h: Qualify intel mode far call and jmp with x_Suf.
585
3138f287
AM
5861999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
587
588 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
589 indirect jumps and calls. Add FF/3 call for intel mode.
590
ccecd07b
JL
591Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
592
593 * mn10300.h: Add new operand types. Add new instruction formats.
594
b37e19e9
JL
595Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
596
597 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
598 instruction.
599
5fce5ddf
GRK
6001999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
601
602 * mips.h (INSN_ISA5): New.
603
2bd7f1f3
GRK
6041999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
605
606 * mips.h (OPCODE_IS_MEMBER): New.
607
4df2b5c5
NC
6081999-10-29 Nick Clifton <nickc@cygnus.com>
609
610 * d30v.h (SHORT_AR): Define.
611
446a06c9
MM
6121999-10-18 Michael Meissner <meissner@cygnus.com>
613
614 * alpha.h (alpha_num_opcodes): Convert to unsigned.
615 (alpha_num_operands): Ditto.
616
eca04c6a
JL
617Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
618
619 * hppa.h (pa_opcodes): Add load and store cache control to
620 instructions. Add ordered access load and store.
621
622 * hppa.h (pa_opcode): Add new entries for addb and addib.
623
624 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
625
626 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
627
c43185de
DN
628Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
629
630 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
631
ec3533da
JL
632Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
633
390f858d
JL
634 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
635 and "be" using completer prefixes.
636
8c47ebd9
JL
637 * hppa.h (pa_opcodes): Add initializers to silence compiler.
638
ec3533da
JL
639 * hppa.h: Update comments about character usage.
640
18369bea
JL
641Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
642
643 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
644 up the new fstw & bve instructions.
645
c36efdd2
JL
646Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
647
d3ffb032
JL
648 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
649 instructions.
650
c49ec3da
JL
651 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
652
5d2e7ecc
JL
653 * hppa.h (pa_opcodes): Add long offset double word load/store
654 instructions.
655
6397d1a2
JL
656 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
657 stores.
658
142f0fe0
JL
659 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
660
f5a68b45
JL
661 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
662
8235801e
JL
663 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
664
35184366
JL
665 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
666
f0bfde5e
JL
667 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
668
27bbbb58
JL
669 * hppa.h (pa_opcodes): Add support for "b,l".
670
c36efdd2
JL
671 * hppa.h (pa_opcodes): Add support for "b,gate".
672
f2727d04
JL
673Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
674
9392fb11 675 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 676 in xmpyu.
9392fb11 677
e0c52e99
JL
678 * hppa.h (pa_opcodes): Fix mask for probe and probei.
679
f2727d04
JL
680 * hppa.h (pa_opcodes): Fix mask for depwi.
681
52d836e2
JL
682Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
683
684 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
685 an explicit output argument.
686
90765e3a
JL
687Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
688
689 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
690 Add a few PA2.0 loads and store variants.
691
8340b17f
ILT
6921999-09-04 Steve Chamberlain <sac@pobox.com>
693
694 * pj.h: New file.
695
5f47d35b
AM
6961999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
697
698 * i386.h (i386_regtab): Move %st to top of table, and split off
699 other fp reg entries.
700 (i386_float_regtab): To here.
701
1c143202
JL
702Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
703
7d8fdb64
JL
704 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
705 by 'f'.
706
90927b9c
JL
707 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
708 Add supporting args.
709
1d16bf9c
JL
710 * hppa.h: Document new completers and args.
711 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
712 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
713 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
714 pmenb and pmdis.
715
96226a68
JL
716 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
717 hshr, hsub, mixh, mixw, permh.
718
5d4ba527
JL
719 * hppa.h (pa_opcodes): Change completers in instructions to
720 use 'c' prefix.
721
e9fc28c6
JL
722 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
723 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
724
1c143202
JL
725 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
726 fnegabs to use 'I' instead of 'F'.
727
9e525108
AM
7281999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
729
730 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
731 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
732 Alphabetically sort PIII insns.
733
e8da1bf1
DE
734Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
735
736 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
737
7d627258
JL
738Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
739
5696871a
JL
740 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
741 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
742
7d627258
JL
743 * hppa.h: Document 64 bit condition completers.
744
c5e52916
JL
745Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
746
747 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
748
eecb386c
AM
7491999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
750
751 * i386.h (i386_optab): Add DefaultSize modifier to all insns
752 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
753 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
754
88a380f3
JL
755Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
756 Jeff Law <law@cygnus.com>
757
758 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
759
760 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 761
d83c6548 762 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
763 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
764
145cf1f0
AM
7651999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
766
767 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
768
73826640
JL
769Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
770
771 * hppa.h (struct pa_opcode): Add new field "flags".
772 (FLAGS_STRICT): Define.
773
b65db252
JL
774Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
775 Jeff Law <law@cygnus.com>
776
f7fc668b
JL
777 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
778
779 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 780
10084519
AM
7811999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
782
783 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
784 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
785 flag to fcomi and friends.
786
cd8a80ba
JL
787Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
788
789 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 790 integer logical instructions.
cd8a80ba 791
1fca749b
ILT
7921999-05-28 Linus Nordberg <linus.nordberg@canit.se>
793
794 * m68k.h: Document new formats `E', `G', `H' and new places `N',
795 `n', `o'.
796
797 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
798 and new places `m', `M', `h'.
799
aa008907
JL
800Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
801
802 * hppa.h (pa_opcodes): Add several processor specific system
803 instructions.
804
e26b85f0
JL
805Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
806
d83c6548 807 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
808 "addb", and "addib" to be used by the disassembler.
809
c608c12e
AM
8101999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
811
812 * i386.h (ReverseModrm): Remove all occurences.
813 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
814 movmskps, pextrw, pmovmskb, maskmovq.
815 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
816 ignore the data size prefix.
817
818 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
819 Mostly stolen from Doug Ledford <dledford@redhat.com>
820
45c18104
RH
821Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
822
823 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
824
252b5132
RH
8251999-04-14 Doug Evans <devans@casey.cygnus.com>
826
827 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
828 (CGEN_ATTR_TYPE): Update.
829 (CGEN_ATTR_MASK): Number booleans starting at 0.
830 (CGEN_ATTR_VALUE): Update.
831 (CGEN_INSN_ATTR): Update.
832
833Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
834
835 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
836 instructions.
837
838Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
839
840 * hppa.h (bb, bvb): Tweak opcode/mask.
841
842
8431999-03-22 Doug Evans <devans@casey.cygnus.com>
844
845 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
846 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
847 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
848 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
849 Delete member max_insn_size.
850 (enum cgen_cpu_open_arg): New enum.
851 (cpu_open): Update prototype.
852 (cpu_open_1): Declare.
853 (cgen_set_cpu): Delete.
854
8551999-03-11 Doug Evans <devans@casey.cygnus.com>
856
857 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
858 (CGEN_OPERAND_NIL): New macro.
859 (CGEN_OPERAND): New member `type'.
860 (@arch@_cgen_operand_table): Delete decl.
861 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
862 (CGEN_OPERAND_TABLE): New struct.
863 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
864 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
865 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
866 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
867 {get,set}_{int,vma}_operand.
868 (@arch@_cgen_cpu_open): New arg `isa'.
869 (cgen_set_cpu): Ditto.
870
871Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
872
873 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
874
8751999-02-25 Doug Evans <devans@casey.cygnus.com>
876
877 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
878 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
879 enum cgen_hw_type.
880 (CGEN_HW_TABLE): New struct.
881 (hw_table): Delete declaration.
882 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
883 to table entry to enum.
884 (CGEN_OPINST): Ditto.
885 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
886
887Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
888
889 * alpha.h (AXP_OPCODE_EV6): New.
890 (AXP_OPCODE_NOPAL): Include it.
891
8921999-02-09 Doug Evans <devans@casey.cygnus.com>
893
894 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
895 All uses updated. New members int_insn_p, max_insn_size,
896 parse_operand,insert_operand,extract_operand,print_operand,
897 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
898 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
899 extract_handlers,print_handlers.
900 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
901 (CGEN_ATTR_BOOL_OFFSET): New macro.
902 (CGEN_ATTR_MASK): Subtract it to compute bit number.
903 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
904 (cgen_opcode_handler): Renamed from cgen_base.
905 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
906 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
907 all uses updated.
908 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
909 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
910 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
911 (CGEN_OPCODE,CGEN_IBASE): New types.
912 (CGEN_INSN): Rewrite.
913 (CGEN_{ASM,DIS}_HASH*): Delete.
914 (init_opcode_table,init_ibld_table): Declare.
915 (CGEN_INSN_ATTR): New type.
916
917Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 918
252b5132
RH
919 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
920 (x_FP, d_FP, dls_FP, sldx_FP): Define.
921 Change *Suf definitions to include x and d suffixes.
922 (movsx): Use w_Suf and b_Suf.
923 (movzx): Likewise.
924 (movs): Use bwld_Suf.
925 (fld): Change ordering. Use sld_FP.
926 (fild): Add Intel Syntax equivalent of fildq.
927 (fst): Use sld_FP.
928 (fist): Use sld_FP.
929 (fstp): Use sld_FP. Add x_FP version.
930 (fistp): LLongMem version for Intel Syntax.
931 (fcom, fcomp): Use sld_FP.
932 (fadd, fiadd, fsub): Use sld_FP.
933 (fsubr): Use sld_FP.
934 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
935
9361999-01-27 Doug Evans <devans@casey.cygnus.com>
937
938 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
939 CGEN_MODE_UINT.
940
e135f41b 9411999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
942
943 * hppa.h (bv): Fix mask.
944
9451999-01-05 Doug Evans <devans@casey.cygnus.com>
946
947 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
948 (CGEN_ATTR): Use it.
949 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
950 (CGEN_ATTR_TABLE): New member dfault.
951
9521998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
953
954 * mips.h (MIPS16_INSN_BRANCH): New.
955
956Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
957
958 The following is part of a change made by Edith Epstein
d83c6548
AJ
959 <eepstein@sophia.cygnus.com> as part of a project to merge in
960 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
961
962 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 963 after.
252b5132
RH
964
965Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
966
967 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 968 status word instructions.
252b5132
RH
969
9701998-11-30 Doug Evans <devans@casey.cygnus.com>
971
972 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
973 (struct cgen_keyword_entry): Ditto.
974 (struct cgen_operand): Ditto.
975 (CGEN_IFLD): New typedef, with associated access macros.
976 (CGEN_IFMT): New typedef, with associated access macros.
977 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
978 (CGEN_IVALUE): New typedef.
979 (struct cgen_insn): Delete const on syntax,attrs members.
980 `format' now points to format data. Type of `value' is now
981 CGEN_IVALUE.
982 (struct cgen_opcode_table): New member ifld_table.
983
9841998-11-18 Doug Evans <devans@casey.cygnus.com>
985
986 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
987 (CGEN_OPERAND_INSTANCE): New member `attrs'.
988 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
989 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
990 (cgen_opcode_table): Update type of dis_hash fn.
991 (extract_operand): Update type of `insn_value' arg.
992
993Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
994
995 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
996
997Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
998
999 * mips.h (INSN_MULT): Added.
1000
1001Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1002
1003 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1004
1005Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1006
1007 * cgen.h (CGEN_INSN_INT): New typedef.
1008 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1009 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1010 (CGEN_INSN_BYTES_PTR): New typedef.
1011 (CGEN_EXTRACT_INFO): New typedef.
1012 (cgen_insert_fn,cgen_extract_fn): Update.
1013 (cgen_opcode_table): New member `insn_endian'.
1014 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1015 (insert_operand,extract_operand): Update.
1016 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1017
1018Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1019
1020 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1021 (struct CGEN_HW_ENTRY): New member `attrs'.
1022 (CGEN_HW_ATTR): New macro.
1023 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1024 (CGEN_INSN_INVALID_P): New macro.
1025
1026Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1027
1028 * hppa.h: Add "fid".
d83c6548 1029
252b5132
RH
1030Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1031
1032 From Robert Andrew Dale <rob@nb.net>
1033 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1034 (AMD_3DNOW_OPCODE): Define.
1035
1036Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1037
1038 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1039
1040Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1041
1042 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1043
1044Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1045
1046 Move all global state data into opcode table struct, and treat
1047 opcode table as something that is "opened/closed".
1048 * cgen.h (CGEN_OPCODE_DESC): New type.
1049 (all fns): New first arg of opcode table descriptor.
1050 (cgen_set_parse_operand_fn): Add prototype.
1051 (cgen_current_machine,cgen_current_endian): Delete.
1052 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1053 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1054 dis_hash_table,dis_hash_table_entries.
1055 (opcode_open,opcode_close): Add prototypes.
1056
1057 * cgen.h (cgen_insn): New element `cdx'.
1058
1059Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1060
1061 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1062
1063Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1064
1065 * mn10300.h: Add "no_match_operands" field for instructions.
1066 (MN10300_MAX_OPERANDS): Define.
1067
1068Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1069
1070 * cgen.h (cgen_macro_insn_count): Declare.
1071
1072Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1073
1074 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1075 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1076 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1077 set_{int,vma}_operand.
1078
1079Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1080
1081 * mn10300.h: Add "machine" field for instructions.
1082 (MN103, AM30): Define machine types.
d83c6548 1083
252b5132
RH
1084Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1085
1086 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1087
10881998-06-18 Ulrich Drepper <drepper@cygnus.com>
1089
1090 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1091
1092Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1093
1094 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1095 and ud2b.
1096 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1097 those that happen to be implemented on pentiums.
1098
1099Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1100
1101 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1102 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1103 with Size16|IgnoreSize or Size32|IgnoreSize.
1104
1105Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1106
1107 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1108 (REPE): Rename to REPE_PREFIX_OPCODE.
1109 (i386_regtab_end): Remove.
1110 (i386_prefixtab, i386_prefixtab_end): Remove.
1111 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1112 of md_begin.
1113 (MAX_OPCODE_SIZE): Define.
1114 (i386_optab_end): Remove.
1115 (sl_Suf): Define.
1116 (sl_FP): Use sl_Suf.
1117
1118 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1119 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1120 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1121 data32, dword, and adword prefixes.
1122 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1123 regs.
1124
1125Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1126
1127 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1128
1129 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1130 register operands, because this is a common idiom. Flag them with
1131 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1132 fdivrp because gcc erroneously generates them. Also flag with a
1133 warning.
1134
1135 * i386.h: Add suffix modifiers to most insns, and tighter operand
1136 checks in some cases. Fix a number of UnixWare compatibility
1137 issues with float insns. Merge some floating point opcodes, using
1138 new FloatMF modifier.
1139 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1140 consistency.
1141
1142 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1143 IgnoreDataSize where appropriate.
1144
1145Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1146
1147 * i386.h: (one_byte_segment_defaults): Remove.
1148 (two_byte_segment_defaults): Remove.
1149 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1150
1151Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1152
1153 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1154 (cgen_hw_lookup_by_num): Declare.
1155
1156Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1157
1158 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1159 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1160
1161Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1162
1163 * cgen.h (cgen_asm_init_parse): Delete.
1164 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1165 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1166
1167Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1168
1169 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1170 (cgen_asm_finish_insn): Update prototype.
1171 (cgen_insn): New members num, data.
1172 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1173 dis_hash, dis_hash_table_size moved to ...
1174 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1175 All uses updated. New members asm_hash_p, dis_hash_p.
1176 (CGEN_MINSN_EXPANSION): New struct.
1177 (cgen_expand_macro_insn): Declare.
1178 (cgen_macro_insn_count): Declare.
1179 (get_insn_operands): Update prototype.
1180 (lookup_get_insn_operands): Declare.
1181
1182Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1183
1184 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1185 regKludge. Add operands types for string instructions.
1186
1187Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1188
1189 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1190 table.
1191
1192Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1193
1194 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1195 for `gettext'.
1196
1197Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1198
1199 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1200 Add IsString flag to string instructions.
1201 (IS_STRING): Don't define.
1202 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1203 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1204 (SS_PREFIX_OPCODE): Define.
1205
1206Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1207
1208 * i386.h: Revert March 24 patch; no more LinearAddress.
1209
1210Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1211
1212 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1213 instructions, and instead add FWait opcode modifier. Add short
1214 form of fldenv and fstenv.
1215 (FWAIT_OPCODE): Define.
1216
1217 * i386.h (i386_optab): Change second operand constraint of `mov
1218 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1219 allow legal instructions such as `movl %gs,%esi'
1220
1221Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1222
1223 * h8300.h: Various changes to fully bracket initializers.
1224
1225Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1226
1227 * i386.h: Set LinearAddress for lidt and lgdt.
1228
1229Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1230
1231 * cgen.h (CGEN_BOOL_ATTR): New macro.
1232
1233Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1234
1235 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1236
1237Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1238
1239 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1240 (cgen_insn): Record syntax and format entries here, rather than
1241 separately.
1242
1243Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1244
1245 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1246
1247Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1248
1249 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1250 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1251 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1252
1253Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1254
1255 * cgen.h (lookup_insn): New argument alias_p.
1256
1257Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1258
1259Fix rac to accept only a0:
1260 * d10v.h (OPERAND_ACC): Split into:
1261 (OPERAND_ACC0, OPERAND_ACC1) .
1262 (OPERAND_GPR): Define.
1263
1264Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1265
1266 * cgen.h (CGEN_FIELDS): Define here.
1267 (CGEN_HW_ENTRY): New member `type'.
1268 (hw_list): Delete decl.
1269 (enum cgen_mode): Declare.
1270 (CGEN_OPERAND): New member `hw'.
1271 (enum cgen_operand_instance_type): Declare.
1272 (CGEN_OPERAND_INSTANCE): New type.
1273 (CGEN_INSN): New member `operands'.
1274 (CGEN_OPCODE_DATA): Make hw_list const.
1275 (get_insn_operands,lookup_insn): Add prototypes for.
1276
1277Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1278
1279 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1280 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1281 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1282 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1283
1284Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1285
1286 * cgen.h: Correct typo in comment end marker.
1287
1288Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1289
1290 * tic30.h: New file.
1291
5a109b67 1292Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1293
1294 * cgen.h: Add prototypes for cgen_save_fixups(),
1295 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1296 of cgen_asm_finish_insn() to return a char *.
1297
1298Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1299
1300 * cgen.h: Formatting changes to improve readability.
1301
1302Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1303
1304 * cgen.h (*): Clean up pass over `struct foo' usage.
1305 (CGEN_ATTR): Make unsigned char.
1306 (CGEN_ATTR_TYPE): Update.
1307 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1308 (cgen_base): Move member `attrs' to cgen_insn.
1309 (CGEN_KEYWORD): New member `null_entry'.
1310 (CGEN_{SYNTAX,FORMAT}): New types.
1311 (cgen_insn): Format and syntax separated from each other.
1312
1313Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1314
1315 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1316 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1317 flags_{used,set} long.
1318 (d30v_operand): Make flags field long.
1319
1320Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1321
1322 * m68k.h: Fix comment describing operand types.
1323
1324Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1325
1326 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1327 everything else after down.
1328
1329Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1330
1331 * d10v.h (OPERAND_FLAG): Split into:
1332 (OPERAND_FFLAG, OPERAND_CFLAG) .
1333
1334Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1335
1336 * mips.h (struct mips_opcode): Changed comments to reflect new
1337 field usage.
1338
1339Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1340
1341 * mips.h: Added to comments a quick-ref list of all assigned
1342 operand type characters.
1343 (OP_{MASK,SH}_PERFREG): New macros.
1344
1345Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1346
1347 * sparc.h: Add '_' and '/' for v9a asr's.
1348 Patch from David Miller <davem@vger.rutgers.edu>
1349
1350Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1351
1352 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1353 area are not available in the base model (H8/300).
1354
1355Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1356
1357 * m68k.h: Remove documentation of ` operand specifier.
1358
1359Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1360
1361 * m68k.h: Document q and v operand specifiers.
1362
1363Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1364
1365 * v850.h (struct v850_opcode): Add processors field.
1366 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1367 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1368 (PROCESSOR_V850EA): New bit constants.
1369
1370Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1371
1372 Merge changes from Martin Hunt:
1373
1374 * d30v.h: Allow up to 64 control registers. Add
1375 SHORT_A5S format.
1376
1377 * d30v.h (LONG_Db): New form for delayed branches.
1378
1379 * d30v.h: (LONG_Db): New form for repeati.
1380
1381 * d30v.h (SHORT_D2B): New form.
1382
1383 * d30v.h (SHORT_A2): New form.
1384
1385 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1386 registers are used. Needed for VLIW optimization.
1387
1388Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1389
1390 * cgen.h: Move assembler interface section
1391 up so cgen_parse_operand_result is defined for cgen_parse_address.
1392 (cgen_parse_address): Update prototype.
1393
1394Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1395
1396 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1397
1398Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1399
1400 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1401 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1402 <paubert@iram.es>.
1403
1404 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1405 <paubert@iram.es>.
1406
1407 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1408 <paubert@iram.es>.
1409
1410 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1411 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1412
1413Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1414
1415 * v850.h (V850_NOT_R0): New flag.
1416
1417Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1418
1419 * v850.h (struct v850_opcode): Remove flags field.
1420
1421Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1422
1423 * v850.h (struct v850_opcode): Add flags field.
1424 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1425 fields.
1426 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1427 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1428
1429Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1430
1431 * arc.h: New file.
1432
1433Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1434
1435 * sparc.h (sparc_opcodes): Declare as const.
1436
1437Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1438
1439 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1440 uses single or double precision floating point resources.
1441 (INSN_NO_ISA, INSN_ISA1): Define.
1442 (cpu specific INSN macros): Tweak into bitmasks outside the range
1443 of INSN_ISA field.
1444
1445Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1446
1447 * i386.h: Fix pand opcode.
1448
1449Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1450
1451 * mips.h: Widen INSN_ISA and move it to a more convenient
1452 bit position. Add INSN_3900.
1453
1454Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1455
1456 * mips.h (struct mips_opcode): added new field membership.
1457
1458Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1459
1460 * i386.h (movd): only Reg32 is allowed.
1461
1462 * i386.h: add fcomp and ud2. From Wayne Scott
1463 <wscott@ichips.intel.com>.
1464
1465Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1466
1467 * i386.h: Add MMX instructions.
1468
1469Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1470
1471 * i386.h: Remove W modifier from conditional move instructions.
1472
1473Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1474
1475 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1476 with no arguments to match that generated by the UnixWare
1477 assembler.
1478
1479Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1480
1481 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1482 (cgen_parse_operand_fn): Declare.
1483 (cgen_init_parse_operand): Declare.
1484 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1485 new argument `want'.
1486 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1487 (enum cgen_parse_operand_type): New enum.
1488
1489Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1490
1491 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1492
1493Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1494
1495 * cgen.h: New file.
1496
1497Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1498
1499 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1500 fdivrp.
1501
1502Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1503
1504 * v850.h (extract): Make unsigned.
1505
1506Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1507
1508 * i386.h: Add iclr.
1509
1510Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1511
1512 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1513 take a direction bit.
1514
1515Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1516
1517 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1518
1519Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1520
1521 * sparc.h: Include <ansidecl.h>. Update function declarations to
1522 use prototypes, and to use const when appropriate.
1523
1524Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1525
1526 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1527
1528Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1529
1530 * d10v.h: Change pre_defined_registers to
1531 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1532
1533Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1534
1535 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1536 Change mips_opcodes from const array to a pointer,
1537 and change bfd_mips_num_opcodes from const int to int,
1538 so that we can increase the size of the mips opcodes table
1539 dynamically.
1540
1541Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1542
1543 * d30v.h (FLAG_X): Remove unused flag.
1544
1545Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1546
1547 * d30v.h: New file.
1548
1549Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1550
1551 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1552 (PDS_VALUE): Macro to access value field of predefined symbols.
1553 (tic80_next_predefined_symbol): Add prototype.
1554
1555Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1556
1557 * tic80.h (tic80_symbol_to_value): Change prototype to match
1558 change in function, added class parameter.
1559
1560Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1561
1562 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1563 endmask fields, which are somewhat weird in that 0 and 32 are
1564 treated exactly the same.
1565
1566Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1567
1568 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1569 rather than a constant that is 2**X. Reorder them to put bits for
1570 operands that have symbolic names in the upper bits, so they can
1571 be packed into an int where the lower bits contain the value that
1572 corresponds to that symbolic name.
1573 (predefined_symbo): Add struct.
1574 (tic80_predefined_symbols): Declare array of translations.
1575 (tic80_num_predefined_symbols): Declare size of that array.
1576 (tic80_value_to_symbol): Declare function.
1577 (tic80_symbol_to_value): Declare function.
1578
1579Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1580
1581 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1582
1583Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1584
1585 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1586 be the destination register.
1587
1588Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1589
1590 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1591 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1592 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1593 that the opcode can have two vector instructions in a single
1594 32 bit word and we have to encode/decode both.
1595
1596Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1597
1598 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1599 TIC80_OPERAND_RELATIVE for PC relative.
1600 (TIC80_OPERAND_BASEREL): New flag bit for register
1601 base relative.
1602
1603Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1604
1605 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1606
1607Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1608
1609 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1610 ":s" modifier for scaling.
1611
1612Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1613
1614 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1615 (TIC80_OPERAND_M_LI): Ditto
1616
1617Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1618
1619 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1620 (TIC80_OPERAND_CC): New define for condition code operand.
1621 (TIC80_OPERAND_CR): New define for control register operand.
1622
1623Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1624
1625 * tic80.h (struct tic80_opcode): Name changed.
1626 (struct tic80_opcode): Remove format field.
1627 (struct tic80_operand): Add insertion and extraction functions.
1628 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1629 correct ones.
1630 (FMT_*): Ditto.
1631
1632Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1633
1634 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1635 type IV instruction offsets.
1636
1637Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1638
1639 * tic80.h: New file.
1640
1641Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1642
1643 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1644
1645Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1646
1647 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1648 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1649 * v850.h: Fix comment, v850_operand not powerpc_operand.
1650
1651Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1652
1653 * mn10200.h: Flesh out structures and definitions needed by
1654 the mn10200 assembler & disassembler.
1655
1656Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1657
1658 * mips.h: Add mips16 definitions.
1659
1660Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1661
1662 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1663
1664Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1665
1666 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1667 (MN10300_OPERAND_MEMADDR): Define.
1668
1669Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1670
1671 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1672
1673Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1674
1675 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1676
1677Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1678
1679 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1680
1681Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1682
1683 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1684
1685Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1686
1687 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1688 negative to minimize problems with shared libraries. Organize
1689 instruction subsets by AMASK extensions and PALcode
1690 implementation.
252b5132
RH
1691 (struct alpha_operand): Move flags slot for better packing.
1692
1693Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1694
1695 * v850.h (V850_OPERAND_RELAX): New operand flag.
1696
1697Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1698
1699 * mn10300.h (FMT_*): Move operand format definitions
1700 here.
1701
1702Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1703
1704 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1705
1706Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1707
1708 * mn10300.h (mn10300_opcode): Add "format" field.
1709 (MN10300_OPERAND_*): Define.
1710
1711Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1712
1713 * mn10x00.h: Delete.
1714 * mn10200.h, mn10300.h: New files.
1715
1716Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1717
1718 * mn10x00.h: New file.
1719
1720Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1721
1722 * v850.h: Add new flag to indicate this instruction uses a PC
1723 displacement.
1724
1725Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1726
1727 * h8300.h (stmac): Add missing instruction.
1728
1729Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1730
1731 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1732 field.
1733
1734Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1735
1736 * v850.h (V850_OPERAND_EP): Define.
1737
1738 * v850.h (v850_opcode): Add size field.
1739
1740Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1741
1742 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1743 to functions used to handle unusual operand encoding.
252b5132 1744 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1745 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1746
1747Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1748
1749 * v850.h (v850_operands): Add flags field.
1750 (OPERAND_REG, OPERAND_NUM): Defined.
1751
1752Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1753
1754 * v850.h: New file.
1755
1756Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1757
1758 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1759 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1760 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1761 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1762 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1763 Defined.
252b5132
RH
1764
1765Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1766
1767 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1768 a 3 bit space id instead of a 2 bit space id.
1769
1770Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1771
1772 * d10v.h: Add some additional defines to support the
d83c6548 1773 assembler in determining which operations can be done in parallel.
252b5132
RH
1774
1775Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1776
1777 * h8300.h (SN): Define.
1778 (eepmov.b): Renamed from "eepmov"
1779 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1780 with them.
1781
1782Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1783
1784 * d10v.h (OPERAND_SHIFT): New operand flag.
1785
1786Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1787
1788 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1789 signed numbers.
252b5132
RH
1790
1791Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1792
1793 * d10v.h (pd_reg): Define. Putting the definition here allows
1794 the assembler and disassembler to share the same struct.
1795
1796Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1797
1798 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1799 Williams <steve@icarus.com>.
1800
1801Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1802
1803 * d10v.h: New file.
1804
1805Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1806
1807 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1808
1809Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1810
d83c6548 1811 * m68k.h (mcf5200): New macro.
252b5132
RH
1812 Document names of coldfire control registers.
1813
1814Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1815
1816 * h8300.h (SRC_IN_DST): Define.
1817
1818 * h8300.h (UNOP3): Mark the register operand in this insn
1819 as a source operand, not a destination operand.
1820 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1821 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1822 register operand with SRC_IN_DST.
1823
1824Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1825
1826 * alpha.h: New file.
1827
1828Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1829
1830 * rs6k.h: Remove obsolete file.
1831
1832Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1833
1834 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1835 fdivp, and fdivrp. Add ffreep.
1836
1837Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1838
1839 * h8300.h: Reorder various #defines for readability.
1840 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1841 (BITOP): Accept additional (unused) argument. All callers changed.
1842 (EBITOP): Likewise.
1843 (O_LAST): Bump.
1844 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1845
1846 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1847 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1848 (BITOP, EBITOP): Handle new H8/S addressing modes for
1849 bit insns.
1850 (UNOP3): Handle new shift/rotate insns on the H8/S.
1851 (insns using exr): New instructions.
1852 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1853
1854Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1855
1856 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1857 was incorrect.
1858
1859Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1860
1861 * h8300.h (START): Remove.
1862 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1863 and mov.l insns that can be relaxed.
1864
1865Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1866
1867 * i386.h: Remove Abs32 from lcall.
1868
1869Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1870
1871 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1872 (SLCPOP): New macro.
1873 Mark X,Y opcode letters as in use.
1874
1875Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1876
1877 * sparc.h (F_FLOAT, F_FBR): Define.
1878
1879Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1880
1881 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1882 from all insns.
1883 (ABS8SRC,ABS8DST): Add ABS8MEM.
1884 (add.l): Fix reg+reg variant.
1885 (eepmov.w): Renamed from eepmovw.
1886 (ldc,stc): Fix many cases.
1887
1888Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1889
1890 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1891
1892Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1893
1894 * sparc.h (O): Mark operand letter as in use.
1895
1896Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1897
1898 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1899 Mark operand letters uU as in use.
1900
1901Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1902
1903 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1904 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1905 (SPARC_OPCODE_SUPPORTED): New macro.
1906 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1907 (F_NOTV9): Delete.
1908
1909Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1910
1911 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1912 declaration consistent with return type in definition.
1913
1914Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1915
1916 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1917
1918Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1919
1920 * i386.h (i386_regtab): Add 80486 test registers.
1921
1922Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1923
1924 * i960.h (I_HX): Define.
1925 (i960_opcodes): Add HX instruction.
1926
1927Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1928
1929 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1930 and fclex.
1931
1932Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1933
1934 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1935 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1936 (bfd_* defines): Delete.
1937 (sparc_opcode_archs): Replaces architecture_pname.
1938 (sparc_opcode_lookup_arch): Declare.
1939 (NUMOPCODES): Delete.
1940
1941Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1942
1943 * sparc.h (enum sparc_architecture): Add v9a.
1944 (ARCHITECTURES_CONFLICT_P): Update.
1945
1946Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1947
1948 * i386.h: Added Pentium Pro instructions.
1949
1950Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1951
1952 * m68k.h: Document new 'W' operand place.
1953
1954Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1955
1956 * hppa.h: Add lci and syncdma instructions.
1957
1958Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1959
1960 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1961 instructions.
252b5132
RH
1962
1963Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1964
1965 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1966 assembler's -mcom and -many switches.
1967
1968Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1969
1970 * i386.h: Fix cmpxchg8b extension opcode description.
1971
1972Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1973
1974 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1975 and register cr4.
1976
1977Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1978
1979 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1980
1981Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1982
1983 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1984
1985Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1986
1987 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1988
1989Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1990
1991 * m68kmri.h: Remove.
1992
1993 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1994 declarations. Remove F_ALIAS and flag field of struct
1995 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1996 int. Make name and args fields of struct m68k_opcode const.
1997
1998Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1999
2000 * sparc.h (F_NOTV9): Define.
2001
2002Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2003
2004 * mips.h (INSN_4010): Define.
2005
2006Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2007
2008 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2009
2010 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2011 * m68k.h: Fix argument descriptions of coprocessor
2012 instructions to allow only alterable operands where appropriate.
2013 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2014 (m68k_opcode_aliases): Add more aliases.
2015
2016Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2017
2018 * m68k.h: Added explcitly short-sized conditional branches, and a
2019 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2020 svr4-based configurations.
2021
2022Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2023
2024 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2025 * i386.h: added missing Data16/Data32 flags to a few instructions.
2026
2027Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2028
2029 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2030 (OP_MASK_BCC, OP_SH_BCC): Define.
2031 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2032 (OP_MASK_CCC, OP_SH_CCC): Define.
2033 (INSN_READ_FPR_R): Define.
2034 (INSN_RFE): Delete.
2035
2036Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2037
2038 * m68k.h (enum m68k_architecture): Deleted.
2039 (struct m68k_opcode_alias): New type.
2040 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2041 matching constraints, values and flags. As a side effect of this,
2042 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2043 as I know were never used, now may need re-examining.
2044 (numopcodes): Now const.
2045 (m68k_opcode_aliases, numaliases): New variables.
2046 (endop): Deleted.
2047 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2048 m68k_opcode_aliases; update declaration of m68k_opcodes.
2049
2050Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2051
2052 * hppa.h (delay_type): Delete unused enumeration.
2053 (pa_opcode): Replace unused delayed field with an architecture
2054 field.
2055 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2056
2057Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2058
2059 * mips.h (INSN_ISA4): Define.
2060
2061Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2062
2063 * mips.h (M_DLA_AB, M_DLI): Define.
2064
2065Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2066
2067 * hppa.h (fstwx): Fix single-bit error.
2068
2069Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2070
2071 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2072
2073Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2074
2075 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2076 debug registers. From Charles Hannum (mycroft@netbsd.org).
2077
2078Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2079
2080 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2081 i386 support:
2082 * i386.h (MOV_AX_DISP32): New macro.
2083 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2084 of several call/return instructions.
2085 (ADDR_PREFIX_OPCODE): New macro.
2086
2087Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2088
2089 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2090
4f1d9bd8
NC
2091 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2092 char.
252b5132
RH
2093 (struct vot, field `name'): ditto.
2094
2095Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2096
2097 * vax.h: Supply and properly group all values in end sentinel.
2098
2099Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2100
2101 * mips.h (INSN_ISA, INSN_4650): Define.
2102
2103Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2104
2105 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2106 systems with a separate instruction and data cache, such as the
2107 29040, these instructions take an optional argument.
2108
2109Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2110
2111 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2112 INSN_TRAP.
2113
2114Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2115
2116 * mips.h (INSN_STORE_MEMORY): Define.
2117
2118Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2119
2120 * sparc.h: Document new operand type 'x'.
2121
2122Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2123
2124 * i960.h (I_CX2): New instruction category. It includes
2125 instructions available on Cx and Jx processors.
2126 (I_JX): New instruction category, for JX-only instructions.
2127 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2128 Jx-only instructions, in I_JX category.
2129
2130Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2131
2132 * ns32k.h (endop): Made pointer const too.
2133
2134Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2135
2136 * ns32k.h: Drop Q operand type as there is no correct use
2137 for it. Add I and Z operand types which allow better checking.
2138
2139Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2140
2141 * h8300.h (xor.l) :fix bit pattern.
2142 (L_2): New size of operand.
2143 (trapa): Use it.
2144
2145Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2146
2147 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2148
2149Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2150
2151 * sparc.h: Include v9 definitions.
2152
2153Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2154
2155 * m68k.h (m68060): Defined.
2156 (m68040up, mfloat, mmmu): Include it.
2157 (struct m68k_opcode): Widen `arch' field.
2158 (m68k_opcodes): Updated for M68060. Removed comments that were
2159 instructions commented out by "JF" years ago.
2160
2161Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2162
2163 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2164 add a one-bit `flags' field.
2165 (F_ALIAS): New macro.
2166
2167Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2168
2169 * h8300.h (dec, inc): Get encoding right.
2170
2171Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2172
2173 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2174 a flag instead.
2175 (PPC_OPERAND_SIGNED): Define.
2176 (PPC_OPERAND_SIGNOPT): Define.
2177
2178Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2179
2180 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2181 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2182
2183Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2184
2185 * i386.h: Reverse last change. It'll be handled in gas instead.
2186
2187Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2188
2189 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2190 slower on the 486 and used the implicit shift count despite the
2191 explicit operand. The one-operand form is still available to get
2192 the shorter form with the implicit shift count.
2193
2194Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2195
2196 * hppa.h: Fix typo in fstws arg string.
2197
2198Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2199
2200 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2201
2202Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2203
2204 * ppc.h (PPC_OPCODE_601): Define.
2205
2206Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2207
2208 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2209 (so we can determine valid completers for both addb and addb[tf].)
2210
2211 * hppa.h (xmpyu): No floating point format specifier for the
2212 xmpyu instruction.
2213
2214Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2215
2216 * ppc.h (PPC_OPERAND_NEXT): Define.
2217 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2218 (struct powerpc_macro): Define.
2219 (powerpc_macros, powerpc_num_macros): Declare.
2220
2221Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2222
2223 * ppc.h: New file. Header file for PowerPC opcode table.
2224
2225Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2226
2227 * hppa.h: More minor template fixes for sfu and copr (to allow
2228 for easier disassembly).
2229
2230 * hppa.h: Fix templates for all the sfu and copr instructions.
2231
2232Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2233
2234 * i386.h (push): Permit Imm16 operand too.
2235
2236Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2237
2238 * h8300.h (andc): Exists in base arch.
2239
2240Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2241
2242 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2243 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2244
2245Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2246
2247 * hppa.h: Add FP quadword store instructions.
2248
2249Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2250
2251 * mips.h: (M_J_A): Added.
2252 (M_LA): Removed.
2253
2254Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2255
2256 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2257 <mellon@pepper.ncd.com>.
2258
2259Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2260
2261 * hppa.h: Immediate field in probei instructions is unsigned,
2262 not low-sign extended.
2263
2264Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2265
2266 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2267
2268Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2269
2270 * i386.h: Add "fxch" without operand.
2271
2272Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2273
2274 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2275
2276Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2277
2278 * hppa.h: Add gfw and gfr to the opcode table.
2279
2280Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2281
2282 * m88k.h: extended to handle m88110.
2283
2284Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2285
2286 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2287 addresses.
2288
2289Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2290
2291 * i960.h (i960_opcodes): Properly bracket initializers.
2292
2293Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2294
2295 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2296
2297Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2298
2299 * m68k.h (two): Protect second argument with parentheses.
2300
2301Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2302
2303 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2304 Deleted old in/out instructions in "#if 0" section.
2305
2306Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2307
2308 * i386.h (i386_optab): Properly bracket initializers.
2309
2310Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2311
2312 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2313 Jeff Law, law@cs.utah.edu).
2314
2315Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2316
2317 * i386.h (lcall): Accept Imm32 operand also.
2318
2319Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2320
2321 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2322 (M_DABS): Added.
2323
2324Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2325
2326 * mips.h (INSN_*): Changed values. Removed unused definitions.
2327 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2328 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2329 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2330 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2331 (M_*): Added new values for r6000 and r4000 macros.
2332 (ANY_DELAY): Removed.
2333
2334Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2335
2336 * mips.h: Added M_LI_S and M_LI_SS.
2337
2338Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2339
2340 * h8300.h: Get some rare mov.bs correct.
2341
2342Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2343
2344 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2345 been included.
2346
2347Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2348
2349 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2350 jump instructions, for use in disassemblers.
2351
2352Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2353
2354 * m88k.h: Make bitfields just unsigned, not unsigned long or
2355 unsigned short.
2356
2357Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2358
2359 * hppa.h: New argument type 'y'. Use in various float instructions.
2360
2361Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2362
2363 * hppa.h (break): First immediate field is unsigned.
2364
2365 * hppa.h: Add rfir instruction.
2366
2367Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2368
2369 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2370
2371Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2372
2373 * mips.h: Reworked the hazard information somewhat, and fixed some
2374 bugs in the instruction hazard descriptions.
2375
2376Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2377
2378 * m88k.h: Corrected a couple of opcodes.
2379
2380Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2381
2382 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2383 new version includes instruction hazard information, but is
2384 otherwise reasonably similar.
2385
2386Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2387
2388 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2389
2390Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2391
2392 Patches from Jeff Law, law@cs.utah.edu:
2393 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2394 Make the tables be the same for the following instructions:
2395 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2396 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2397 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2398 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2399 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2400 "fcmp", and "ftest".
2401
2402 * hppa.h: Make new and old tables the same for "break", "mtctl",
2403 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2404 Fix typo in last patch. Collapse several #ifdefs into a
2405 single #ifdef.
2406
2407 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2408 of the comments up-to-date.
2409
2410 * hppa.h: Update "free list" of letters and update
2411 comments describing each letter's function.
2412
4f1d9bd8
NC
2413Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2414
2415 * h8300.h: Lots of little fixes for the h8/300h.
2416
2417Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2418
2419 Support for H8/300-H
2420 * h8300.h: Lots of new opcodes.
2421
252b5132
RH
2422Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2423
2424 * h8300.h: checkpoint, includes H8/300-H opcodes.
2425
2426Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2427
2428 * Patches from Jeffrey Law <law@cs.utah.edu>.
2429 * hppa.h: Rework single precision FP
2430 instructions so that they correctly disassemble code
2431 PA1.1 code.
2432
2433Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2434
2435 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2436 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2437
2438Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2439
2440 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2441 gdb will define it for now.
2442
2443Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2444
2445 * sparc.h: Don't end enumerator list with comma.
2446
2447Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2448
2449 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2450 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2451 ("bc2t"): Correct typo.
2452 ("[ls]wc[023]"): Use T rather than t.
2453 ("c[0123]"): Define general coprocessor instructions.
2454
2455Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2456
2457 * m68k.h: Move split point for gcc compilation more towards
2458 middle.
2459
2460Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2461
2462 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2463 simply wrong, ics, rfi, & rfsvc were missing).
2464 Add "a" to opr_ext for "bb". Doc fix.
2465
2466Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2467
2468 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2469 * mips.h: Add casts, to suppress warnings about shifting too much.
2470 * m68k.h: Document the placement code '9'.
2471
2472Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2473
2474 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2475 allows callers to break up the large initialized struct full of
2476 opcodes into two half-sized ones. This permits GCC to compile
2477 this module, since it takes exponential space for initializers.
2478 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2479
2480Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2481
2482 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2483 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2484 initialized structs in it.
2485
2486Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2487
2488 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2489 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2490 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2491
2492Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2493
2494 * mips.h: document "i" and "j" operands correctly.
2495
2496Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2497
2498 * mips.h: Removed endianness dependency.
2499
2500Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2501
2502 * h8300.h: include info on number of cycles per instruction.
2503
2504Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2505
2506 * hppa.h: Move handy aliases to the front. Fix masks for extract
2507 and deposit instructions.
2508
2509Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2510
2511 * i386.h: accept shld and shrd both with and without the shift
2512 count argument, which is always %cl.
2513
2514Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2515
2516 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2517 (one_byte_segment_defaults, two_byte_segment_defaults,
2518 i386_prefixtab_end): Ditto.
2519
2520Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2521
2522 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2523 for operand 2; from John Carr, jfc@dsg.dec.com.
2524
2525Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2526
2527 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2528 always use 16-bit offsets. Makes calculated-size jump tables
2529 feasible.
2530
2531Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2532
2533 * i386.h: Fix one-operand forms of in* and out* patterns.
2534
2535Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2536
2537 * m68k.h: Added CPU32 support.
2538
2539Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2540
2541 * mips.h (break): Disassemble the argument. Patch from
2542 jonathan@cs.stanford.edu (Jonathan Stone).
2543
2544Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2545
2546 * m68k.h: merged Motorola and MIT syntax.
2547
2548Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2549
2550 * m68k.h (pmove): make the tests less strict, the 68k book is
2551 wrong.
2552
2553Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2554
2555 * m68k.h (m68ec030): Defined as alias for 68030.
2556 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2557 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2558 them. Tightened description of "fmovex" to distinguish it from
2559 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2560 up descriptions that claimed versions were available for chips not
2561 supporting them. Added "pmovefd".
2562
2563Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2564
2565 * m68k.h: fix where the . goes in divull
2566
2567Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2568
2569 * m68k.h: the cas2 instruction is supposed to be written with
2570 indirection on the last two operands, which can be either data or
2571 address registers. Added a new operand type 'r' which accepts
2572 either register type. Added new cases for cas2l and cas2w which
2573 use them. Corrected masks for cas2 which failed to recognize use
2574 of address register.
2575
2576Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2577
2578 * m68k.h: Merged in patches (mostly m68040-specific) from
2579 Colin Smith <colin@wrs.com>.
2580
2581 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2582 base). Also cleaned up duplicates, re-ordered instructions for
2583 the sake of dis-assembling (so aliases come after standard names).
2584 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2585
2586Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2587
2588 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2589 all missing .s
2590
2591Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2592
2593 * sparc.h: Moved tables to BFD library.
2594
2595 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2596
2597Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2598
2599 * h8300.h: Finish filling in all the holes in the opcode table,
2600 so that the Lucid C compiler can digest this as well...
2601
2602Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2603
2604 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2605 Fix opcodes on various sizes of fild/fist instructions
2606 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2607 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2608
2609Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2610
2611 * h8300.h: Fill in all the holes in the opcode table so that the
2612 losing HPUX C compiler can digest this...
2613
2614Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2615
2616 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2617 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2618
2619Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2620
2621 * sparc.h: Add new architecture variant sparclite; add its scan
2622 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2623
2624Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2625
2626 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2627 fy@lucid.com).
2628
2629Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2630
2631 * rs6k.h: New version from IBM (Metin).
2632
2633Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2634
2635 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2636 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2637
2638Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2639
2640 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2641
2642Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2643
2644 * m68k.h (one, two): Cast macro args to unsigned to suppress
2645 complaints from compiler and lint about integer overflow during
2646 shift.
2647
2648Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2649
2650 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2651
2652Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2653
2654 * mips.h: Make bitfield layout depend on the HOST compiler,
2655 not on the TARGET system.
2656
2657Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2658
2659 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2660 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2661 <TRANLE@INTELLICORP.COM>.
2662
2663Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2664
2665 * h8300.h: turned op_type enum into #define list
2666
2667Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2668
2669 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2670 similar instructions -- they've been renamed to "fitoq", etc.
2671 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2672 number of arguments.
2673 * h8300.h: Remove extra ; which produces compiler warning.
2674
2675Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2676
2677 * sparc.h: fix opcode for tsubcctv.
2678
2679Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2680
2681 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2682
2683Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2684
2685 * sparc.h (nop): Made the 'lose' field be even tighter,
2686 so only a standard 'nop' is disassembled as a nop.
2687
2688Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2689
2690 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2691 disassembled as a nop.
2692
4f1d9bd8
NC
2693Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2694
2695 * m68k.h, sparc.h: ANSIfy enums.
2696
252b5132
RH
2697Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2698
2699 * sparc.h: fix a typo.
2700
2701Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2702
2703 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2704 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2705 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2706
2707\f
2708Local Variables:
2709version-control: never
2710End: