]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - include/opcode/ChangeLog
* Makefile.in (ALLDEPFILES): Add mipsnbsd-nat.c and
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
b9c9142c
AV
12002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
2
3 * h8300.h: Corrected defs of all control regs
4 and eepmov instr.
5
cd47f4f1
AM
62002-04-11 Alan Modra <amodra@bigpond.net.au>
7
8 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 9 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 10
1f25f5d3
CD
112002-03-15 Chris G. Demetriou <cgd@broadcom.com>
12
13 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
14 instructions.
15 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
16 may be passed along with the ISA bitmask.
17
e4b29ec6
AM
182002-03-05 Paul Koning <pkoning@equallogic.com>
19
20 * pdp11.h: Add format codes for float instruction formats.
21
eea5c83f
AM
222002-02-25 Alan Modra <amodra@bigpond.net.au>
23
24 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
25
5a8b245c
JH
26Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
27
28 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
29
85a33fe2
JH
30Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
31
32 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
33 (xchg): Fix.
34 (in, out): Disable 64bit operands.
35 (call, jmp): Avoid REX prefixes.
36 (jcxz): Prohibit in 64bit mode
37 (jrcxz, loop): Add 64bit variants.
38 (movq): Fix patterns.
39 (movmskps, pextrw, pinstrw): Add 64bit variants.
40
3b16e843
NC
412002-01-31 Ivan Guzvinec <ivang@opencores.org>
42
43 * or32.h: New file.
44
9a2e995d
GH
452002-01-22 Graydon Hoare <graydon@redhat.com>
46
47 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
48 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
49
7b45c6e1
AM
502002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
51
52 * h8300.h: Comment typo fix.
53
a09cf9bd
MG
542002-01-03 matthew green <mrg@redhat.com>
55
56 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
57 (PPC_OPCODE_BOOKE64): Likewise.
58
1befefea
JL
59Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
60
61 * hppa.h (call, ret): Move to end of table.
62 (addb, addib): PA2.0 variants should have been PA2.0W.
63 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
64 happy.
65 (fldw, fldd, fstw, fstd, bb): Likewise.
66 (short loads/stores): Tweak format specifier slightly to keep
67 disassembler happy.
68 (indexed loads/stores): Likewise.
69 (absolute loads/stores): Likewise.
70
124ddbb2
AO
712001-12-04 Alexandre Oliva <aoliva@redhat.com>
72
73 * d10v.h (OPERAND_NOSP): New macro.
74
9b21d49b
AO
752001-11-29 Alexandre Oliva <aoliva@redhat.com>
76
77 * d10v.h (OPERAND_SP): New macro.
78
802a735e
AM
792001-11-15 Alan Modra <amodra@bigpond.net.au>
80
81 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
82
6e917903
TW
832001-11-11 Timothy Wall <twall@alum.mit.edu>
84
85 * tic54x.h: Revise opcode layout; don't really need a separate
86 structure for parallel opcodes.
87
e5470cdc
AM
882001-11-13 Zack Weinberg <zack@codesourcery.com>
89 Alan Modra <amodra@bigpond.net.au>
90
91 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
92 accept WordReg.
93
5d84d93f
CD
942001-11-04 Chris Demetriou <cgd@broadcom.com>
95
96 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
97
3c3bdf30
NC
982001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
99
100 * mmix.h: New file.
101
e4432525
CD
1022001-10-18 Chris Demetriou <cgd@broadcom.com>
103
104 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
105 of the expression, to make source code merging easier.
106
8ff529d8
CD
1072001-10-17 Chris Demetriou <cgd@broadcom.com>
108
109 * mips.h: Sort coprocessor instruction argument characters
110 in comment, add a few more words of description for "H".
111
2228315b
CD
1122001-10-17 Chris Demetriou <cgd@broadcom.com>
113
114 * mips.h (INSN_SB1): New cpu-specific instruction bit.
115 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
116 if cpu is CPU_SB1.
117
f5c120c5
MG
1182001-10-17 matthew green <mrg@redhat.com>
119
120 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
121
418c1742
MG
1222001-10-12 matthew green <mrg@redhat.com>
123
0716ce0d
MG
124 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
125 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
126 instructions, respectively.
418c1742 127
6ff2f2ba
NC
1282001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
129
130 * v850.h: Remove spurious comment.
131
015cf428
NC
1322001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
133
134 * h8300.h: Fix compile time warning messages
135
847b8b31
RH
1362001-09-04 Richard Henderson <rth@redhat.com>
137
138 * alpha.h (struct alpha_operand): Pack elements into bitfields.
139
a98b9439
EC
1402001-08-31 Eric Christopher <echristo@redhat.com>
141
142 * mips.h: Remove CPU_MIPS32_4K.
143
a6959011
AM
1442001-08-27 Torbjorn Granlund <tege@swox.com>
145
146 * ppc.h (PPC_OPERAND_DS): Define.
147
d83c6548
AJ
1482001-08-25 Andreas Jaeger <aj@suse.de>
149
150 * d30v.h: Fix declaration of reg_name_cnt.
151
152 * d10v.h: Fix declaration of d10v_reg_name_cnt.
153
154 * arc.h: Add prototypes from opcodes/arc-opc.c.
155
99c14723
TS
1562001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
157
158 * mips.h (INSN_10000): Define.
159 (OPCODE_IS_MEMBER): Check for INSN_10000.
160
11b37b7b
AM
1612001-08-10 Alan Modra <amodra@one.net.au>
162
163 * ppc.h: Revert 2001-08-08.
164
3b16e843
NC
1652001-08-10 Richard Sandiford <rsandifo@redhat.com>
166
167 * mips.h (INSN_GP32): Remove.
168 (OPCODE_IS_MEMBER): Remove gp32 parameter.
169 (M_MOVE): New macro identifier.
170
0f1bac05
AM
1712001-08-08 Alan Modra <amodra@one.net.au>
172
173 1999-10-25 Torbjorn Granlund <tege@swox.com>
174 * ppc.h (struct powerpc_operand): New field `reloc'.
175
3b16e843
NC
1762001-08-01 Aldy Hernandez <aldyh@redhat.com>
177
178 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
179
1802001-07-12 Jeff Johnston <jjohnstn@redhat.com>
181
182 * cgen.h (CGEN_INSN): Add regex support.
183 (build_insn_regex): Declare.
184
81f6038f
FCE
1852001-07-11 Frank Ch. Eigler <fche@redhat.com>
186
187 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
188 (cgen_cpu_desc): Ditto.
189
32cfffe3
BE
1902001-07-07 Ben Elliston <bje@redhat.com>
191
192 * m88k.h: Clean up and reformat. Remove unused code.
193
3e890047
GK
1942001-06-14 Geoffrey Keating <geoffk@redhat.com>
195
196 * cgen.h (cgen_keyword): Add nonalpha_chars field.
197
d1cf510e
NC
1982001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
199
200 * mips.h (CPU_R12000): Define.
201
e281c457
JH
2022001-05-23 John Healy <jhealy@redhat.com>
203
204 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 205
aa5f19f2
NC
2062001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
207
208 * mips.h (INSN_ISA_MASK): Define.
209
67d6227d
AM
2102001-05-12 Alan Modra <amodra@one.net.au>
211
212 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
213 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
214 and use InvMem as these insns must have register operands.
215
992aaec9
AM
2162001-05-04 Alan Modra <amodra@one.net.au>
217
218 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
219 and pextrw to swap reg/rm assignments.
220
4ef7f0bf
HPN
2212001-04-05 Hans-Peter Nilsson <hp@axis.com>
222
223 * cris.h (enum cris_insn_version_usage): Correct comment for
224 cris_ver_v3p.
225
0f17484f
AM
2262001-03-24 Alan Modra <alan@linuxcare.com.au>
227
228 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
229 Add InvMem to first operand of "maskmovdqu".
230
7ccb5238
HPN
2312001-03-22 Hans-Peter Nilsson <hp@axis.com>
232
233 * cris.h (ADD_PC_INCR_OPCODE): New macro.
234
361bfa20
KH
2352001-03-21 Kazu Hirata <kazu@hxi.com>
236
237 * h8300.h: Fix formatting.
238
87890af0
AM
2392001-03-22 Alan Modra <alan@linuxcare.com.au>
240
241 * i386.h (i386_optab): Add paddq, psubq.
242
2e98d2de
AM
2432001-03-19 Alan Modra <alan@linuxcare.com.au>
244
245 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
246
80a523c2
NC
2472001-02-28 Igor Shevlyakov <igor@windriver.com>
248
249 * m68k.h: new defines for Coldfire V4. Update mcf to know
250 about mcf5407.
251
e135f41b
NC
2522001-02-18 lars brinkhoff <lars@nocrew.org>
253
254 * pdp11.h: New file.
255
2562001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
257
258 * i386.h (i386_optab): SSE integer converison instructions have
259 64bit versions on x86-64.
260
8eaec934
NC
2612001-02-10 Nick Clifton <nickc@redhat.com>
262
263 * mips.h: Remove extraneous whitespace. Formating change to allow
264 for future contribution.
265
a85d7ed0
NC
2662001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
267
268 * s390.h: New file.
269
0715dc88
PM
2702001-02-02 Patrick Macdonald <patrickm@redhat.com>
271
272 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
273 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
274 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
275
296bc568
AM
2762001-01-24 Karsten Keil <kkeil@suse.de>
277
278 * i386.h (i386_optab): Fix swapgs
279
1328dc98
AM
2802001-01-14 Alan Modra <alan@linuxcare.com.au>
281
282 * hppa.h: Describe new '<' and '>' operand types, and tidy
283 existing comments.
284 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
285 Remove duplicate "ldw j(s,b),x". Sort some entries.
286
e135f41b 2872001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
288
289 * i386.h (i386_optab): Fix pusha and ret templates.
290
0d2bcfaf
NC
2912001-01-11 Peter Targett <peter.targett@arccores.com>
292
293 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
294 definitions for masking cpu type.
295 (arc_ext_operand_value) New structure for storing extended
296 operands.
297 (ARC_OPERAND_*) Flags for operand values.
298
2992001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
300
301 * i386.h (pinsrw): Add.
302 (pshufw): Remove.
303 (cvttpd2dq): Fix operands.
304 (cvttps2dq): Likewise.
305 (movq2q): Rename to movdq2q.
306
079966a8
AM
3072001-01-10 Richard Schaal <richard.schaal@intel.com>
308
309 * i386.h: Correct movnti instruction.
310
8c1f9e76
JJ
3112001-01-09 Jeff Johnston <jjohnstn@redhat.com>
312
313 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
314 of operands (unsigned char or unsigned short).
315 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
316 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
317
0d2bcfaf 3182001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
319
320 * i386.h (i386_optab): Make [sml]fence template to use immext field.
321
0d2bcfaf 3222001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
323
324 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
325 introduced by Pentium4
326
0d2bcfaf 3272000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
328
329 * i386.h (i386_optab): Add "rex*" instructions;
330 add swapgs; disable jmp/call far direct instructions for
331 64bit mode; add syscall and sysret; disable registers for 0xc6
332 template. Add 'q' suffixes to extendable instructions, disable
079966a8 333 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
334 (i386_regtab): Add extended registers.
335 (*Suf): Add No_qSuf.
336 (q_Suf, wlq_Suf, bwlq_Suf): New.
337
0d2bcfaf 3382000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
339
340 * i386.h (i386_optab): Replace "Imm" with "EncImm".
341 (i386_regtab): Add flags field.
d83c6548 342
bf40d919
NC
3432000-12-12 Nick Clifton <nickc@redhat.com>
344
345 * mips.h: Fix formatting.
346
4372b673
NC
3472000-12-01 Chris Demetriou <cgd@sibyte.com>
348
349 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
350 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
351 OP_*_SYSCALL definitions.
352 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
353 19 bit wait codes.
354 (MIPS operand specifier comments): Remove 'm', add 'U' and
355 'J', and update the meaning of 'B' so that it's more general.
356
e7af610e
NC
357 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
358 INSN_ISA5): Renumber, redefine to mean the ISA at which the
359 instruction was added.
360 (INSN_ISA32): New constant.
361 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
362 Renumber to avoid new and/or renumbered INSN_* constants.
363 (INSN_MIPS32): Delete.
364 (ISA_UNKNOWN): New constant to indicate unknown ISA.
365 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
366 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 367 constants available at that ISA level.
e7af610e
NC
368 (CPU_UNKNOWN): New constant to indicate unknown CPU.
369 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
370 define it with a unique value.
371 (OPCODE_IS_MEMBER): Update for new ISA membership-related
372 constant meanings.
373
84ea6cf2 374 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 375 definitions.
84ea6cf2 376
c6c98b38
NC
377 * mips.h (CPU_SB1): New constant.
378
19f7b010
JJ
3792000-10-20 Jakub Jelinek <jakub@redhat.com>
380
381 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
382 Note that '3' is used for siam operand.
383
139368c9
JW
3842000-09-22 Jim Wilson <wilson@cygnus.com>
385
386 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
387
156c2f8b 3882000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 389
156c2f8b
NC
390 * mips.h: Use defines instead of hard-coded processor numbers.
391 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 392 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
393 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
394 CPU_4KC, CPU_4KM, CPU_4KP): Define..
395 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 396 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 397 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
398 Add 'P' to used characters.
399 Use 'H' for coprocessor select field.
156c2f8b 400 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
401 Document new arg characters and add to used characters.
402 (INSN_MIPS32): New define for MIPS32 extensions.
403 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 404
3c5ce02e
AM
4052000-09-05 Alan Modra <alan@linuxcare.com.au>
406
407 * hppa.h: Mention cz completer.
408
50b81f19
JW
4092000-08-16 Jim Wilson <wilson@cygnus.com>
410
411 * ia64.h (IA64_OPCODE_POSTINC): New.
412
fc29466d
L
4132000-08-15 H.J. Lu <hjl@gnu.org>
414
415 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
416 IgnoreSize change.
417
4f1d9bd8
NC
4182000-08-08 Jason Eckhardt <jle@cygnus.com>
419
420 * i860.h: Small formatting adjustments.
421
45ee1401
DC
4222000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
423
424 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
425 Move related opcodes closer to each other.
426 Minor changes in comments, list undefined opcodes.
427
9d551405
DB
4282000-07-26 Dave Brolley <brolley@redhat.com>
429
430 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
431
4f1d9bd8
NC
4322000-07-22 Jason Eckhardt <jle@cygnus.com>
433
434 * i860.h (btne, bte, bla): Changed these opcodes
435 to use sbroff ('r') instead of split16 ('s').
436 (J, K, L, M): New operand types for 16-bit aligned fields.
437 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
438 use I, J, K, L, M instead of just I.
439 (T, U): New operand types for split 16-bit aligned fields.
440 (st.x): Changed these opcodes to use S, T, U instead of just S.
441 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
442 exist on the i860.
443 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
444 (pfeq.ss, pfeq.dd): New opcodes.
445 (st.s): Fixed incorrect mask bits.
446 (fmlow): Fixed incorrect mask bits.
447 (fzchkl, pfzchkl): Fixed incorrect mask bits.
448 (faddz, pfaddz): Fixed incorrect mask bits.
449 (form, pform): Fixed incorrect mask bits.
450 (pfld.l): Fixed incorrect mask bits.
451 (fst.q): Fixed incorrect mask bits.
452 (all floating point opcodes): Fixed incorrect mask bits for
453 handling of dual bit.
454
c8488617
HPN
4552000-07-20 Hans-Peter Nilsson <hp@axis.com>
456
457 cris.h: New file.
458
65aa24b6
NC
4592000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
460
461 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
462 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
463 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
464 (AVR_ISA_M83): Define for ATmega83, ATmega85.
465 (espm): Remove, because ESPM removed in databook update.
466 (eicall, eijmp): Move to the end of opcode table.
467
60bcf0fa
NC
4682000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
469
470 * m68hc11.h: New file for support of Motorola 68hc11.
471
60a2978a
DC
472Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
473
474 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
475
68ab2dd9
DC
476Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
477
478 * avr.h: New file with AVR opcodes.
479
f0662e27
DL
480Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
481
482 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
483
b722f2be
AM
4842000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
485
486 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
487
f9e0cf0b
AM
4882000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
489
490 * i386.h: Use sl_FP, not sl_Suf for fild.
491
f660ee8b
FCE
4922000-05-16 Frank Ch. Eigler <fche@redhat.com>
493
494 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
495 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
496 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
497 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
498
558b0a60
AM
4992000-05-13 Alan Modra <alan@linuxcare.com.au>,
500
501 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
502
e413e4e9
AM
5032000-05-13 Alan Modra <alan@linuxcare.com.au>,
504 Alexander Sokolov <robocop@netlink.ru>
505
506 * i386.h (i386_optab): Add cpu_flags for all instructions.
507
5082000-05-13 Alan Modra <alan@linuxcare.com.au>
509
510 From Gavin Romig-Koch <gavin@cygnus.com>
511 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
512
5c84d377
TW
5132000-05-04 Timothy Wall <twall@cygnus.com>
514
515 * tic54x.h: New.
516
966f959b
C
5172000-05-03 J.T. Conklin <jtc@redback.com>
518
519 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
520 (PPC_OPERAND_VR): New operand flag for vector registers.
521
c5d05dbb
JL
5222000-05-01 Kazu Hirata <kazu@hxi.com>
523
524 * h8300.h (EOP): Add missing initializer.
525
a7fba0e0
JL
526Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
527
528 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
529 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
530 New operand types l,y,&,fe,fE,fx added to support above forms.
531 (pa_opcodes): Replaced usage of 'x' as source/target for
532 floating point double-word loads/stores with 'fx'.
533
800eeca4
JW
534Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
535 David Mosberger <davidm@hpl.hp.com>
536 Timothy Wall <twall@cygnus.com>
537 Jim Wilson <wilson@cygnus.com>
538
539 * ia64.h: New file.
540
ba23e138
NC
5412000-03-27 Nick Clifton <nickc@cygnus.com>
542
543 * d30v.h (SHORT_A1): Fix value.
544 (SHORT_AR): Renumber so that it is at the end of the list of short
545 instructions, not the end of the list of long instructions.
546
d0b47220
AM
5472000-03-26 Alan Modra <alan@linuxcare.com>
548
549 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
550 problem isn't really specific to Unixware.
551 (OLDGCC_COMPAT): Define.
552 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
553 destination %st(0).
554 Fix lots of comments.
555
866afedc
NC
5562000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
557
558 * d30v.h:
559 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
560 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
561 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
562 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
563 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
564 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
565 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
566
cc5ca5ce
AM
5672000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
568
569 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
570 fistpd without suffix.
571
68e324a2
NC
5722000-02-24 Nick Clifton <nickc@cygnus.com>
573
574 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
575 'signed_overflow_ok_p'.
576 Delete prototypes for cgen_set_flags() and cgen_get_flags().
577
60f036a2
AH
5782000-02-24 Andrew Haley <aph@cygnus.com>
579
580 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
581 (CGEN_CPU_TABLE): flags: new field.
582 Add prototypes for new functions.
d83c6548 583
9b9b5cd4
AM
5842000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
585
586 * i386.h: Add some more UNIXWARE_COMPAT comments.
587
5b93d8bb
AM
5882000-02-23 Linas Vepstas <linas@linas.org>
589
590 * i370.h: New file.
591
4f1d9bd8
NC
5922000-02-22 Chandra Chavva <cchavva@cygnus.com>
593
594 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
595 cannot be combined in parallel with ADD/SUBppp.
596
87f398dd
AH
5972000-02-22 Andrew Haley <aph@cygnus.com>
598
599 * mips.h: (OPCODE_IS_MEMBER): Add comment.
600
367c01af
AH
6011999-12-30 Andrew Haley <aph@cygnus.com>
602
9a1e79ca
AH
603 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
604 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
605 insns.
367c01af 606
add0c677
AM
6072000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
608
609 * i386.h: Qualify intel mode far call and jmp with x_Suf.
610
3138f287
AM
6111999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
612
613 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
614 indirect jumps and calls. Add FF/3 call for intel mode.
615
ccecd07b
JL
616Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
617
618 * mn10300.h: Add new operand types. Add new instruction formats.
619
b37e19e9
JL
620Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
621
622 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
623 instruction.
624
5fce5ddf
GRK
6251999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
626
627 * mips.h (INSN_ISA5): New.
628
2bd7f1f3
GRK
6291999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
630
631 * mips.h (OPCODE_IS_MEMBER): New.
632
4df2b5c5
NC
6331999-10-29 Nick Clifton <nickc@cygnus.com>
634
635 * d30v.h (SHORT_AR): Define.
636
446a06c9
MM
6371999-10-18 Michael Meissner <meissner@cygnus.com>
638
639 * alpha.h (alpha_num_opcodes): Convert to unsigned.
640 (alpha_num_operands): Ditto.
641
eca04c6a
JL
642Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
643
644 * hppa.h (pa_opcodes): Add load and store cache control to
645 instructions. Add ordered access load and store.
646
647 * hppa.h (pa_opcode): Add new entries for addb and addib.
648
649 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
650
651 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
652
c43185de
DN
653Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
654
655 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
656
ec3533da
JL
657Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
658
390f858d
JL
659 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
660 and "be" using completer prefixes.
661
8c47ebd9
JL
662 * hppa.h (pa_opcodes): Add initializers to silence compiler.
663
ec3533da
JL
664 * hppa.h: Update comments about character usage.
665
18369bea
JL
666Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
667
668 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
669 up the new fstw & bve instructions.
670
c36efdd2
JL
671Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
672
d3ffb032
JL
673 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
674 instructions.
675
c49ec3da
JL
676 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
677
5d2e7ecc
JL
678 * hppa.h (pa_opcodes): Add long offset double word load/store
679 instructions.
680
6397d1a2
JL
681 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
682 stores.
683
142f0fe0
JL
684 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
685
f5a68b45
JL
686 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
687
8235801e
JL
688 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
689
35184366
JL
690 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
691
f0bfde5e
JL
692 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
693
27bbbb58
JL
694 * hppa.h (pa_opcodes): Add support for "b,l".
695
c36efdd2
JL
696 * hppa.h (pa_opcodes): Add support for "b,gate".
697
f2727d04
JL
698Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
699
9392fb11 700 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 701 in xmpyu.
9392fb11 702
e0c52e99
JL
703 * hppa.h (pa_opcodes): Fix mask for probe and probei.
704
f2727d04
JL
705 * hppa.h (pa_opcodes): Fix mask for depwi.
706
52d836e2
JL
707Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
708
709 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
710 an explicit output argument.
711
90765e3a
JL
712Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
713
714 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
715 Add a few PA2.0 loads and store variants.
716
8340b17f
ILT
7171999-09-04 Steve Chamberlain <sac@pobox.com>
718
719 * pj.h: New file.
720
5f47d35b
AM
7211999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
722
723 * i386.h (i386_regtab): Move %st to top of table, and split off
724 other fp reg entries.
725 (i386_float_regtab): To here.
726
1c143202
JL
727Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
728
7d8fdb64
JL
729 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
730 by 'f'.
731
90927b9c
JL
732 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
733 Add supporting args.
734
1d16bf9c
JL
735 * hppa.h: Document new completers and args.
736 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
737 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
738 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
739 pmenb and pmdis.
740
96226a68
JL
741 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
742 hshr, hsub, mixh, mixw, permh.
743
5d4ba527
JL
744 * hppa.h (pa_opcodes): Change completers in instructions to
745 use 'c' prefix.
746
e9fc28c6
JL
747 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
748 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
749
1c143202
JL
750 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
751 fnegabs to use 'I' instead of 'F'.
752
9e525108
AM
7531999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
754
755 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
756 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
757 Alphabetically sort PIII insns.
758
e8da1bf1
DE
759Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
760
761 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
762
7d627258
JL
763Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
764
5696871a
JL
765 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
766 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
767
7d627258
JL
768 * hppa.h: Document 64 bit condition completers.
769
c5e52916
JL
770Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
771
772 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
773
eecb386c
AM
7741999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
775
776 * i386.h (i386_optab): Add DefaultSize modifier to all insns
777 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
778 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
779
88a380f3
JL
780Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
781 Jeff Law <law@cygnus.com>
782
783 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
784
785 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 786
d83c6548 787 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
788 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
789
145cf1f0
AM
7901999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
791
792 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
793
73826640
JL
794Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
795
796 * hppa.h (struct pa_opcode): Add new field "flags".
797 (FLAGS_STRICT): Define.
798
b65db252
JL
799Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
800 Jeff Law <law@cygnus.com>
801
f7fc668b
JL
802 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
803
804 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 805
10084519
AM
8061999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
807
808 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
809 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
810 flag to fcomi and friends.
811
cd8a80ba
JL
812Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
813
814 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 815 integer logical instructions.
cd8a80ba 816
1fca749b
ILT
8171999-05-28 Linus Nordberg <linus.nordberg@canit.se>
818
819 * m68k.h: Document new formats `E', `G', `H' and new places `N',
820 `n', `o'.
821
822 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
823 and new places `m', `M', `h'.
824
aa008907
JL
825Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
826
827 * hppa.h (pa_opcodes): Add several processor specific system
828 instructions.
829
e26b85f0
JL
830Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
831
d83c6548 832 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
833 "addb", and "addib" to be used by the disassembler.
834
c608c12e
AM
8351999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
836
837 * i386.h (ReverseModrm): Remove all occurences.
838 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
839 movmskps, pextrw, pmovmskb, maskmovq.
840 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
841 ignore the data size prefix.
842
843 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
844 Mostly stolen from Doug Ledford <dledford@redhat.com>
845
45c18104
RH
846Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
847
848 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
849
252b5132
RH
8501999-04-14 Doug Evans <devans@casey.cygnus.com>
851
852 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
853 (CGEN_ATTR_TYPE): Update.
854 (CGEN_ATTR_MASK): Number booleans starting at 0.
855 (CGEN_ATTR_VALUE): Update.
856 (CGEN_INSN_ATTR): Update.
857
858Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
859
860 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
861 instructions.
862
863Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
864
865 * hppa.h (bb, bvb): Tweak opcode/mask.
866
867
8681999-03-22 Doug Evans <devans@casey.cygnus.com>
869
870 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
871 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
872 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
873 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
874 Delete member max_insn_size.
875 (enum cgen_cpu_open_arg): New enum.
876 (cpu_open): Update prototype.
877 (cpu_open_1): Declare.
878 (cgen_set_cpu): Delete.
879
8801999-03-11 Doug Evans <devans@casey.cygnus.com>
881
882 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
883 (CGEN_OPERAND_NIL): New macro.
884 (CGEN_OPERAND): New member `type'.
885 (@arch@_cgen_operand_table): Delete decl.
886 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
887 (CGEN_OPERAND_TABLE): New struct.
888 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
889 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
890 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
891 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
892 {get,set}_{int,vma}_operand.
893 (@arch@_cgen_cpu_open): New arg `isa'.
894 (cgen_set_cpu): Ditto.
895
896Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
897
898 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
899
9001999-02-25 Doug Evans <devans@casey.cygnus.com>
901
902 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
903 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
904 enum cgen_hw_type.
905 (CGEN_HW_TABLE): New struct.
906 (hw_table): Delete declaration.
907 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
908 to table entry to enum.
909 (CGEN_OPINST): Ditto.
910 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
911
912Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
913
914 * alpha.h (AXP_OPCODE_EV6): New.
915 (AXP_OPCODE_NOPAL): Include it.
916
9171999-02-09 Doug Evans <devans@casey.cygnus.com>
918
919 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
920 All uses updated. New members int_insn_p, max_insn_size,
921 parse_operand,insert_operand,extract_operand,print_operand,
922 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
923 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
924 extract_handlers,print_handlers.
925 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
926 (CGEN_ATTR_BOOL_OFFSET): New macro.
927 (CGEN_ATTR_MASK): Subtract it to compute bit number.
928 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
929 (cgen_opcode_handler): Renamed from cgen_base.
930 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
931 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
932 all uses updated.
933 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
934 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
935 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
936 (CGEN_OPCODE,CGEN_IBASE): New types.
937 (CGEN_INSN): Rewrite.
938 (CGEN_{ASM,DIS}_HASH*): Delete.
939 (init_opcode_table,init_ibld_table): Declare.
940 (CGEN_INSN_ATTR): New type.
941
942Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 943
252b5132
RH
944 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
945 (x_FP, d_FP, dls_FP, sldx_FP): Define.
946 Change *Suf definitions to include x and d suffixes.
947 (movsx): Use w_Suf and b_Suf.
948 (movzx): Likewise.
949 (movs): Use bwld_Suf.
950 (fld): Change ordering. Use sld_FP.
951 (fild): Add Intel Syntax equivalent of fildq.
952 (fst): Use sld_FP.
953 (fist): Use sld_FP.
954 (fstp): Use sld_FP. Add x_FP version.
955 (fistp): LLongMem version for Intel Syntax.
956 (fcom, fcomp): Use sld_FP.
957 (fadd, fiadd, fsub): Use sld_FP.
958 (fsubr): Use sld_FP.
959 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
960
9611999-01-27 Doug Evans <devans@casey.cygnus.com>
962
963 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
964 CGEN_MODE_UINT.
965
e135f41b 9661999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
967
968 * hppa.h (bv): Fix mask.
969
9701999-01-05 Doug Evans <devans@casey.cygnus.com>
971
972 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
973 (CGEN_ATTR): Use it.
974 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
975 (CGEN_ATTR_TABLE): New member dfault.
976
9771998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
978
979 * mips.h (MIPS16_INSN_BRANCH): New.
980
981Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
982
983 The following is part of a change made by Edith Epstein
d83c6548
AJ
984 <eepstein@sophia.cygnus.com> as part of a project to merge in
985 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
986
987 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 988 after.
252b5132
RH
989
990Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
991
992 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 993 status word instructions.
252b5132
RH
994
9951998-11-30 Doug Evans <devans@casey.cygnus.com>
996
997 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
998 (struct cgen_keyword_entry): Ditto.
999 (struct cgen_operand): Ditto.
1000 (CGEN_IFLD): New typedef, with associated access macros.
1001 (CGEN_IFMT): New typedef, with associated access macros.
1002 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1003 (CGEN_IVALUE): New typedef.
1004 (struct cgen_insn): Delete const on syntax,attrs members.
1005 `format' now points to format data. Type of `value' is now
1006 CGEN_IVALUE.
1007 (struct cgen_opcode_table): New member ifld_table.
1008
10091998-11-18 Doug Evans <devans@casey.cygnus.com>
1010
1011 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1012 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1013 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1014 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1015 (cgen_opcode_table): Update type of dis_hash fn.
1016 (extract_operand): Update type of `insn_value' arg.
1017
1018Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1019
1020 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1021
1022Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1023
1024 * mips.h (INSN_MULT): Added.
1025
1026Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1027
1028 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1029
1030Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1031
1032 * cgen.h (CGEN_INSN_INT): New typedef.
1033 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1034 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1035 (CGEN_INSN_BYTES_PTR): New typedef.
1036 (CGEN_EXTRACT_INFO): New typedef.
1037 (cgen_insert_fn,cgen_extract_fn): Update.
1038 (cgen_opcode_table): New member `insn_endian'.
1039 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1040 (insert_operand,extract_operand): Update.
1041 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1042
1043Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1044
1045 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1046 (struct CGEN_HW_ENTRY): New member `attrs'.
1047 (CGEN_HW_ATTR): New macro.
1048 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1049 (CGEN_INSN_INVALID_P): New macro.
1050
1051Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1052
1053 * hppa.h: Add "fid".
d83c6548 1054
252b5132
RH
1055Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1056
1057 From Robert Andrew Dale <rob@nb.net>
1058 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1059 (AMD_3DNOW_OPCODE): Define.
1060
1061Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1062
1063 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1064
1065Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1066
1067 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1068
1069Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1070
1071 Move all global state data into opcode table struct, and treat
1072 opcode table as something that is "opened/closed".
1073 * cgen.h (CGEN_OPCODE_DESC): New type.
1074 (all fns): New first arg of opcode table descriptor.
1075 (cgen_set_parse_operand_fn): Add prototype.
1076 (cgen_current_machine,cgen_current_endian): Delete.
1077 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1078 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1079 dis_hash_table,dis_hash_table_entries.
1080 (opcode_open,opcode_close): Add prototypes.
1081
1082 * cgen.h (cgen_insn): New element `cdx'.
1083
1084Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1085
1086 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1087
1088Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1089
1090 * mn10300.h: Add "no_match_operands" field for instructions.
1091 (MN10300_MAX_OPERANDS): Define.
1092
1093Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1094
1095 * cgen.h (cgen_macro_insn_count): Declare.
1096
1097Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1098
1099 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1100 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1101 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1102 set_{int,vma}_operand.
1103
1104Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1105
1106 * mn10300.h: Add "machine" field for instructions.
1107 (MN103, AM30): Define machine types.
d83c6548 1108
252b5132
RH
1109Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1110
1111 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1112
11131998-06-18 Ulrich Drepper <drepper@cygnus.com>
1114
1115 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1116
1117Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1118
1119 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1120 and ud2b.
1121 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1122 those that happen to be implemented on pentiums.
1123
1124Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1125
1126 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1127 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1128 with Size16|IgnoreSize or Size32|IgnoreSize.
1129
1130Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1131
1132 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1133 (REPE): Rename to REPE_PREFIX_OPCODE.
1134 (i386_regtab_end): Remove.
1135 (i386_prefixtab, i386_prefixtab_end): Remove.
1136 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1137 of md_begin.
1138 (MAX_OPCODE_SIZE): Define.
1139 (i386_optab_end): Remove.
1140 (sl_Suf): Define.
1141 (sl_FP): Use sl_Suf.
1142
1143 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1144 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1145 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1146 data32, dword, and adword prefixes.
1147 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1148 regs.
1149
1150Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1151
1152 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1153
1154 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1155 register operands, because this is a common idiom. Flag them with
1156 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1157 fdivrp because gcc erroneously generates them. Also flag with a
1158 warning.
1159
1160 * i386.h: Add suffix modifiers to most insns, and tighter operand
1161 checks in some cases. Fix a number of UnixWare compatibility
1162 issues with float insns. Merge some floating point opcodes, using
1163 new FloatMF modifier.
1164 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1165 consistency.
1166
1167 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1168 IgnoreDataSize where appropriate.
1169
1170Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1171
1172 * i386.h: (one_byte_segment_defaults): Remove.
1173 (two_byte_segment_defaults): Remove.
1174 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1175
1176Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1177
1178 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1179 (cgen_hw_lookup_by_num): Declare.
1180
1181Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1182
1183 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1184 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1185
1186Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1187
1188 * cgen.h (cgen_asm_init_parse): Delete.
1189 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1190 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1191
1192Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1193
1194 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1195 (cgen_asm_finish_insn): Update prototype.
1196 (cgen_insn): New members num, data.
1197 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1198 dis_hash, dis_hash_table_size moved to ...
1199 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1200 All uses updated. New members asm_hash_p, dis_hash_p.
1201 (CGEN_MINSN_EXPANSION): New struct.
1202 (cgen_expand_macro_insn): Declare.
1203 (cgen_macro_insn_count): Declare.
1204 (get_insn_operands): Update prototype.
1205 (lookup_get_insn_operands): Declare.
1206
1207Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1208
1209 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1210 regKludge. Add operands types for string instructions.
1211
1212Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1213
1214 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1215 table.
1216
1217Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1218
1219 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1220 for `gettext'.
1221
1222Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1223
1224 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1225 Add IsString flag to string instructions.
1226 (IS_STRING): Don't define.
1227 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1228 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1229 (SS_PREFIX_OPCODE): Define.
1230
1231Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1232
1233 * i386.h: Revert March 24 patch; no more LinearAddress.
1234
1235Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1236
1237 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1238 instructions, and instead add FWait opcode modifier. Add short
1239 form of fldenv and fstenv.
1240 (FWAIT_OPCODE): Define.
1241
1242 * i386.h (i386_optab): Change second operand constraint of `mov
1243 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1244 allow legal instructions such as `movl %gs,%esi'
1245
1246Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1247
1248 * h8300.h: Various changes to fully bracket initializers.
1249
1250Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1251
1252 * i386.h: Set LinearAddress for lidt and lgdt.
1253
1254Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1255
1256 * cgen.h (CGEN_BOOL_ATTR): New macro.
1257
1258Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1259
1260 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1261
1262Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1263
1264 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1265 (cgen_insn): Record syntax and format entries here, rather than
1266 separately.
1267
1268Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1269
1270 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1271
1272Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1273
1274 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1275 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1276 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1277
1278Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1279
1280 * cgen.h (lookup_insn): New argument alias_p.
1281
1282Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1283
1284Fix rac to accept only a0:
1285 * d10v.h (OPERAND_ACC): Split into:
1286 (OPERAND_ACC0, OPERAND_ACC1) .
1287 (OPERAND_GPR): Define.
1288
1289Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1290
1291 * cgen.h (CGEN_FIELDS): Define here.
1292 (CGEN_HW_ENTRY): New member `type'.
1293 (hw_list): Delete decl.
1294 (enum cgen_mode): Declare.
1295 (CGEN_OPERAND): New member `hw'.
1296 (enum cgen_operand_instance_type): Declare.
1297 (CGEN_OPERAND_INSTANCE): New type.
1298 (CGEN_INSN): New member `operands'.
1299 (CGEN_OPCODE_DATA): Make hw_list const.
1300 (get_insn_operands,lookup_insn): Add prototypes for.
1301
1302Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1303
1304 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1305 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1306 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1307 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1308
1309Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1310
1311 * cgen.h: Correct typo in comment end marker.
1312
1313Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1314
1315 * tic30.h: New file.
1316
5a109b67 1317Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1318
1319 * cgen.h: Add prototypes for cgen_save_fixups(),
1320 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1321 of cgen_asm_finish_insn() to return a char *.
1322
1323Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1324
1325 * cgen.h: Formatting changes to improve readability.
1326
1327Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1328
1329 * cgen.h (*): Clean up pass over `struct foo' usage.
1330 (CGEN_ATTR): Make unsigned char.
1331 (CGEN_ATTR_TYPE): Update.
1332 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1333 (cgen_base): Move member `attrs' to cgen_insn.
1334 (CGEN_KEYWORD): New member `null_entry'.
1335 (CGEN_{SYNTAX,FORMAT}): New types.
1336 (cgen_insn): Format and syntax separated from each other.
1337
1338Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1339
1340 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1341 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1342 flags_{used,set} long.
1343 (d30v_operand): Make flags field long.
1344
1345Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1346
1347 * m68k.h: Fix comment describing operand types.
1348
1349Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1350
1351 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1352 everything else after down.
1353
1354Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1355
1356 * d10v.h (OPERAND_FLAG): Split into:
1357 (OPERAND_FFLAG, OPERAND_CFLAG) .
1358
1359Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1360
1361 * mips.h (struct mips_opcode): Changed comments to reflect new
1362 field usage.
1363
1364Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1365
1366 * mips.h: Added to comments a quick-ref list of all assigned
1367 operand type characters.
1368 (OP_{MASK,SH}_PERFREG): New macros.
1369
1370Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1371
1372 * sparc.h: Add '_' and '/' for v9a asr's.
1373 Patch from David Miller <davem@vger.rutgers.edu>
1374
1375Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1376
1377 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1378 area are not available in the base model (H8/300).
1379
1380Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1381
1382 * m68k.h: Remove documentation of ` operand specifier.
1383
1384Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1385
1386 * m68k.h: Document q and v operand specifiers.
1387
1388Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1389
1390 * v850.h (struct v850_opcode): Add processors field.
1391 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1392 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1393 (PROCESSOR_V850EA): New bit constants.
1394
1395Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1396
1397 Merge changes from Martin Hunt:
1398
1399 * d30v.h: Allow up to 64 control registers. Add
1400 SHORT_A5S format.
1401
1402 * d30v.h (LONG_Db): New form for delayed branches.
1403
1404 * d30v.h: (LONG_Db): New form for repeati.
1405
1406 * d30v.h (SHORT_D2B): New form.
1407
1408 * d30v.h (SHORT_A2): New form.
1409
1410 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1411 registers are used. Needed for VLIW optimization.
1412
1413Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1414
1415 * cgen.h: Move assembler interface section
1416 up so cgen_parse_operand_result is defined for cgen_parse_address.
1417 (cgen_parse_address): Update prototype.
1418
1419Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1420
1421 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1422
1423Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1424
1425 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1426 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1427 <paubert@iram.es>.
1428
1429 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1430 <paubert@iram.es>.
1431
1432 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1433 <paubert@iram.es>.
1434
1435 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1436 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1437
1438Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1439
1440 * v850.h (V850_NOT_R0): New flag.
1441
1442Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1443
1444 * v850.h (struct v850_opcode): Remove flags field.
1445
1446Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1447
1448 * v850.h (struct v850_opcode): Add flags field.
1449 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1450 fields.
1451 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1452 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1453
1454Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1455
1456 * arc.h: New file.
1457
1458Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1459
1460 * sparc.h (sparc_opcodes): Declare as const.
1461
1462Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1463
1464 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1465 uses single or double precision floating point resources.
1466 (INSN_NO_ISA, INSN_ISA1): Define.
1467 (cpu specific INSN macros): Tweak into bitmasks outside the range
1468 of INSN_ISA field.
1469
1470Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1471
1472 * i386.h: Fix pand opcode.
1473
1474Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1475
1476 * mips.h: Widen INSN_ISA and move it to a more convenient
1477 bit position. Add INSN_3900.
1478
1479Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1480
1481 * mips.h (struct mips_opcode): added new field membership.
1482
1483Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1484
1485 * i386.h (movd): only Reg32 is allowed.
1486
1487 * i386.h: add fcomp and ud2. From Wayne Scott
1488 <wscott@ichips.intel.com>.
1489
1490Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1491
1492 * i386.h: Add MMX instructions.
1493
1494Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1495
1496 * i386.h: Remove W modifier from conditional move instructions.
1497
1498Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1499
1500 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1501 with no arguments to match that generated by the UnixWare
1502 assembler.
1503
1504Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1505
1506 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1507 (cgen_parse_operand_fn): Declare.
1508 (cgen_init_parse_operand): Declare.
1509 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1510 new argument `want'.
1511 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1512 (enum cgen_parse_operand_type): New enum.
1513
1514Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1515
1516 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1517
1518Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1519
1520 * cgen.h: New file.
1521
1522Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1523
1524 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1525 fdivrp.
1526
1527Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1528
1529 * v850.h (extract): Make unsigned.
1530
1531Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1532
1533 * i386.h: Add iclr.
1534
1535Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1536
1537 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1538 take a direction bit.
1539
1540Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1541
1542 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1543
1544Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1545
1546 * sparc.h: Include <ansidecl.h>. Update function declarations to
1547 use prototypes, and to use const when appropriate.
1548
1549Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1550
1551 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1552
1553Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1554
1555 * d10v.h: Change pre_defined_registers to
1556 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1557
1558Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1559
1560 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1561 Change mips_opcodes from const array to a pointer,
1562 and change bfd_mips_num_opcodes from const int to int,
1563 so that we can increase the size of the mips opcodes table
1564 dynamically.
1565
1566Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1567
1568 * d30v.h (FLAG_X): Remove unused flag.
1569
1570Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1571
1572 * d30v.h: New file.
1573
1574Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1575
1576 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1577 (PDS_VALUE): Macro to access value field of predefined symbols.
1578 (tic80_next_predefined_symbol): Add prototype.
1579
1580Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1581
1582 * tic80.h (tic80_symbol_to_value): Change prototype to match
1583 change in function, added class parameter.
1584
1585Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1586
1587 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1588 endmask fields, which are somewhat weird in that 0 and 32 are
1589 treated exactly the same.
1590
1591Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1592
1593 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1594 rather than a constant that is 2**X. Reorder them to put bits for
1595 operands that have symbolic names in the upper bits, so they can
1596 be packed into an int where the lower bits contain the value that
1597 corresponds to that symbolic name.
1598 (predefined_symbo): Add struct.
1599 (tic80_predefined_symbols): Declare array of translations.
1600 (tic80_num_predefined_symbols): Declare size of that array.
1601 (tic80_value_to_symbol): Declare function.
1602 (tic80_symbol_to_value): Declare function.
1603
1604Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1605
1606 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1607
1608Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1609
1610 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1611 be the destination register.
1612
1613Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1614
1615 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1616 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1617 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1618 that the opcode can have two vector instructions in a single
1619 32 bit word and we have to encode/decode both.
1620
1621Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1622
1623 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1624 TIC80_OPERAND_RELATIVE for PC relative.
1625 (TIC80_OPERAND_BASEREL): New flag bit for register
1626 base relative.
1627
1628Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1629
1630 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1631
1632Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1633
1634 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1635 ":s" modifier for scaling.
1636
1637Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1638
1639 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1640 (TIC80_OPERAND_M_LI): Ditto
1641
1642Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1643
1644 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1645 (TIC80_OPERAND_CC): New define for condition code operand.
1646 (TIC80_OPERAND_CR): New define for control register operand.
1647
1648Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1649
1650 * tic80.h (struct tic80_opcode): Name changed.
1651 (struct tic80_opcode): Remove format field.
1652 (struct tic80_operand): Add insertion and extraction functions.
1653 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1654 correct ones.
1655 (FMT_*): Ditto.
1656
1657Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1658
1659 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1660 type IV instruction offsets.
1661
1662Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1663
1664 * tic80.h: New file.
1665
1666Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1667
1668 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1669
1670Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1671
1672 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1673 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1674 * v850.h: Fix comment, v850_operand not powerpc_operand.
1675
1676Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1677
1678 * mn10200.h: Flesh out structures and definitions needed by
1679 the mn10200 assembler & disassembler.
1680
1681Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1682
1683 * mips.h: Add mips16 definitions.
1684
1685Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1686
1687 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1688
1689Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1690
1691 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1692 (MN10300_OPERAND_MEMADDR): Define.
1693
1694Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1695
1696 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1697
1698Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1699
1700 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1701
1702Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1703
1704 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1705
1706Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1707
1708 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1709
1710Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1711
1712 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1713 negative to minimize problems with shared libraries. Organize
1714 instruction subsets by AMASK extensions and PALcode
1715 implementation.
252b5132
RH
1716 (struct alpha_operand): Move flags slot for better packing.
1717
1718Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1719
1720 * v850.h (V850_OPERAND_RELAX): New operand flag.
1721
1722Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1723
1724 * mn10300.h (FMT_*): Move operand format definitions
1725 here.
1726
1727Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1728
1729 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1730
1731Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1732
1733 * mn10300.h (mn10300_opcode): Add "format" field.
1734 (MN10300_OPERAND_*): Define.
1735
1736Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1737
1738 * mn10x00.h: Delete.
1739 * mn10200.h, mn10300.h: New files.
1740
1741Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1742
1743 * mn10x00.h: New file.
1744
1745Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1746
1747 * v850.h: Add new flag to indicate this instruction uses a PC
1748 displacement.
1749
1750Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1751
1752 * h8300.h (stmac): Add missing instruction.
1753
1754Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1755
1756 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1757 field.
1758
1759Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1760
1761 * v850.h (V850_OPERAND_EP): Define.
1762
1763 * v850.h (v850_opcode): Add size field.
1764
1765Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1766
1767 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1768 to functions used to handle unusual operand encoding.
252b5132 1769 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1770 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1771
1772Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1773
1774 * v850.h (v850_operands): Add flags field.
1775 (OPERAND_REG, OPERAND_NUM): Defined.
1776
1777Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1778
1779 * v850.h: New file.
1780
1781Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1782
1783 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1784 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1785 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1786 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1787 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1788 Defined.
252b5132
RH
1789
1790Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1791
1792 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1793 a 3 bit space id instead of a 2 bit space id.
1794
1795Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1796
1797 * d10v.h: Add some additional defines to support the
d83c6548 1798 assembler in determining which operations can be done in parallel.
252b5132
RH
1799
1800Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1801
1802 * h8300.h (SN): Define.
1803 (eepmov.b): Renamed from "eepmov"
1804 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1805 with them.
1806
1807Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1808
1809 * d10v.h (OPERAND_SHIFT): New operand flag.
1810
1811Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1812
1813 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1814 signed numbers.
252b5132
RH
1815
1816Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1817
1818 * d10v.h (pd_reg): Define. Putting the definition here allows
1819 the assembler and disassembler to share the same struct.
1820
1821Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1822
1823 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1824 Williams <steve@icarus.com>.
1825
1826Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1827
1828 * d10v.h: New file.
1829
1830Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1831
1832 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1833
1834Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1835
d83c6548 1836 * m68k.h (mcf5200): New macro.
252b5132
RH
1837 Document names of coldfire control registers.
1838
1839Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1840
1841 * h8300.h (SRC_IN_DST): Define.
1842
1843 * h8300.h (UNOP3): Mark the register operand in this insn
1844 as a source operand, not a destination operand.
1845 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1846 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1847 register operand with SRC_IN_DST.
1848
1849Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1850
1851 * alpha.h: New file.
1852
1853Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1854
1855 * rs6k.h: Remove obsolete file.
1856
1857Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1858
1859 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1860 fdivp, and fdivrp. Add ffreep.
1861
1862Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1863
1864 * h8300.h: Reorder various #defines for readability.
1865 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1866 (BITOP): Accept additional (unused) argument. All callers changed.
1867 (EBITOP): Likewise.
1868 (O_LAST): Bump.
1869 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1870
1871 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1872 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1873 (BITOP, EBITOP): Handle new H8/S addressing modes for
1874 bit insns.
1875 (UNOP3): Handle new shift/rotate insns on the H8/S.
1876 (insns using exr): New instructions.
1877 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1878
1879Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1880
1881 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1882 was incorrect.
1883
1884Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1885
1886 * h8300.h (START): Remove.
1887 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1888 and mov.l insns that can be relaxed.
1889
1890Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1891
1892 * i386.h: Remove Abs32 from lcall.
1893
1894Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1895
1896 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1897 (SLCPOP): New macro.
1898 Mark X,Y opcode letters as in use.
1899
1900Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1901
1902 * sparc.h (F_FLOAT, F_FBR): Define.
1903
1904Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1905
1906 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1907 from all insns.
1908 (ABS8SRC,ABS8DST): Add ABS8MEM.
1909 (add.l): Fix reg+reg variant.
1910 (eepmov.w): Renamed from eepmovw.
1911 (ldc,stc): Fix many cases.
1912
1913Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1914
1915 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1916
1917Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1918
1919 * sparc.h (O): Mark operand letter as in use.
1920
1921Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1922
1923 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1924 Mark operand letters uU as in use.
1925
1926Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1927
1928 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1929 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1930 (SPARC_OPCODE_SUPPORTED): New macro.
1931 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1932 (F_NOTV9): Delete.
1933
1934Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1935
1936 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1937 declaration consistent with return type in definition.
1938
1939Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1940
1941 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1942
1943Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1944
1945 * i386.h (i386_regtab): Add 80486 test registers.
1946
1947Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1948
1949 * i960.h (I_HX): Define.
1950 (i960_opcodes): Add HX instruction.
1951
1952Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1953
1954 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1955 and fclex.
1956
1957Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1958
1959 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1960 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1961 (bfd_* defines): Delete.
1962 (sparc_opcode_archs): Replaces architecture_pname.
1963 (sparc_opcode_lookup_arch): Declare.
1964 (NUMOPCODES): Delete.
1965
1966Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1967
1968 * sparc.h (enum sparc_architecture): Add v9a.
1969 (ARCHITECTURES_CONFLICT_P): Update.
1970
1971Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1972
1973 * i386.h: Added Pentium Pro instructions.
1974
1975Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1976
1977 * m68k.h: Document new 'W' operand place.
1978
1979Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1980
1981 * hppa.h: Add lci and syncdma instructions.
1982
1983Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1984
1985 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1986 instructions.
252b5132
RH
1987
1988Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1989
1990 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1991 assembler's -mcom and -many switches.
1992
1993Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1994
1995 * i386.h: Fix cmpxchg8b extension opcode description.
1996
1997Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1998
1999 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2000 and register cr4.
2001
2002Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2003
2004 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2005
2006Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2007
2008 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2009
2010Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2011
2012 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2013
2014Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2015
2016 * m68kmri.h: Remove.
2017
2018 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2019 declarations. Remove F_ALIAS and flag field of struct
2020 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2021 int. Make name and args fields of struct m68k_opcode const.
2022
2023Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2024
2025 * sparc.h (F_NOTV9): Define.
2026
2027Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2028
2029 * mips.h (INSN_4010): Define.
2030
2031Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2032
2033 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2034
2035 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2036 * m68k.h: Fix argument descriptions of coprocessor
2037 instructions to allow only alterable operands where appropriate.
2038 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2039 (m68k_opcode_aliases): Add more aliases.
2040
2041Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2042
2043 * m68k.h: Added explcitly short-sized conditional branches, and a
2044 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2045 svr4-based configurations.
2046
2047Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2048
2049 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2050 * i386.h: added missing Data16/Data32 flags to a few instructions.
2051
2052Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2053
2054 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2055 (OP_MASK_BCC, OP_SH_BCC): Define.
2056 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2057 (OP_MASK_CCC, OP_SH_CCC): Define.
2058 (INSN_READ_FPR_R): Define.
2059 (INSN_RFE): Delete.
2060
2061Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2062
2063 * m68k.h (enum m68k_architecture): Deleted.
2064 (struct m68k_opcode_alias): New type.
2065 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2066 matching constraints, values and flags. As a side effect of this,
2067 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2068 as I know were never used, now may need re-examining.
2069 (numopcodes): Now const.
2070 (m68k_opcode_aliases, numaliases): New variables.
2071 (endop): Deleted.
2072 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2073 m68k_opcode_aliases; update declaration of m68k_opcodes.
2074
2075Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2076
2077 * hppa.h (delay_type): Delete unused enumeration.
2078 (pa_opcode): Replace unused delayed field with an architecture
2079 field.
2080 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2081
2082Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2083
2084 * mips.h (INSN_ISA4): Define.
2085
2086Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2087
2088 * mips.h (M_DLA_AB, M_DLI): Define.
2089
2090Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2091
2092 * hppa.h (fstwx): Fix single-bit error.
2093
2094Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2095
2096 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2097
2098Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2099
2100 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2101 debug registers. From Charles Hannum (mycroft@netbsd.org).
2102
2103Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2104
2105 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2106 i386 support:
2107 * i386.h (MOV_AX_DISP32): New macro.
2108 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2109 of several call/return instructions.
2110 (ADDR_PREFIX_OPCODE): New macro.
2111
2112Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2113
2114 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2115
4f1d9bd8
NC
2116 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2117 char.
252b5132
RH
2118 (struct vot, field `name'): ditto.
2119
2120Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2121
2122 * vax.h: Supply and properly group all values in end sentinel.
2123
2124Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2125
2126 * mips.h (INSN_ISA, INSN_4650): Define.
2127
2128Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2129
2130 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2131 systems with a separate instruction and data cache, such as the
2132 29040, these instructions take an optional argument.
2133
2134Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2135
2136 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2137 INSN_TRAP.
2138
2139Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2140
2141 * mips.h (INSN_STORE_MEMORY): Define.
2142
2143Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2144
2145 * sparc.h: Document new operand type 'x'.
2146
2147Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2148
2149 * i960.h (I_CX2): New instruction category. It includes
2150 instructions available on Cx and Jx processors.
2151 (I_JX): New instruction category, for JX-only instructions.
2152 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2153 Jx-only instructions, in I_JX category.
2154
2155Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2156
2157 * ns32k.h (endop): Made pointer const too.
2158
2159Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2160
2161 * ns32k.h: Drop Q operand type as there is no correct use
2162 for it. Add I and Z operand types which allow better checking.
2163
2164Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2165
2166 * h8300.h (xor.l) :fix bit pattern.
2167 (L_2): New size of operand.
2168 (trapa): Use it.
2169
2170Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2171
2172 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2173
2174Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2175
2176 * sparc.h: Include v9 definitions.
2177
2178Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2179
2180 * m68k.h (m68060): Defined.
2181 (m68040up, mfloat, mmmu): Include it.
2182 (struct m68k_opcode): Widen `arch' field.
2183 (m68k_opcodes): Updated for M68060. Removed comments that were
2184 instructions commented out by "JF" years ago.
2185
2186Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2187
2188 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2189 add a one-bit `flags' field.
2190 (F_ALIAS): New macro.
2191
2192Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2193
2194 * h8300.h (dec, inc): Get encoding right.
2195
2196Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2197
2198 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2199 a flag instead.
2200 (PPC_OPERAND_SIGNED): Define.
2201 (PPC_OPERAND_SIGNOPT): Define.
2202
2203Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2204
2205 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2206 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2207
2208Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2209
2210 * i386.h: Reverse last change. It'll be handled in gas instead.
2211
2212Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2213
2214 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2215 slower on the 486 and used the implicit shift count despite the
2216 explicit operand. The one-operand form is still available to get
2217 the shorter form with the implicit shift count.
2218
2219Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2220
2221 * hppa.h: Fix typo in fstws arg string.
2222
2223Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2224
2225 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2226
2227Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2228
2229 * ppc.h (PPC_OPCODE_601): Define.
2230
2231Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2232
2233 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2234 (so we can determine valid completers for both addb and addb[tf].)
2235
2236 * hppa.h (xmpyu): No floating point format specifier for the
2237 xmpyu instruction.
2238
2239Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2240
2241 * ppc.h (PPC_OPERAND_NEXT): Define.
2242 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2243 (struct powerpc_macro): Define.
2244 (powerpc_macros, powerpc_num_macros): Declare.
2245
2246Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2247
2248 * ppc.h: New file. Header file for PowerPC opcode table.
2249
2250Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2251
2252 * hppa.h: More minor template fixes for sfu and copr (to allow
2253 for easier disassembly).
2254
2255 * hppa.h: Fix templates for all the sfu and copr instructions.
2256
2257Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2258
2259 * i386.h (push): Permit Imm16 operand too.
2260
2261Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2262
2263 * h8300.h (andc): Exists in base arch.
2264
2265Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2266
2267 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2268 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2269
2270Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2271
2272 * hppa.h: Add FP quadword store instructions.
2273
2274Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2275
2276 * mips.h: (M_J_A): Added.
2277 (M_LA): Removed.
2278
2279Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2280
2281 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2282 <mellon@pepper.ncd.com>.
2283
2284Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2285
2286 * hppa.h: Immediate field in probei instructions is unsigned,
2287 not low-sign extended.
2288
2289Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2290
2291 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2292
2293Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2294
2295 * i386.h: Add "fxch" without operand.
2296
2297Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2298
2299 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2300
2301Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2302
2303 * hppa.h: Add gfw and gfr to the opcode table.
2304
2305Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2306
2307 * m88k.h: extended to handle m88110.
2308
2309Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2310
2311 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2312 addresses.
2313
2314Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2315
2316 * i960.h (i960_opcodes): Properly bracket initializers.
2317
2318Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2319
2320 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2321
2322Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2323
2324 * m68k.h (two): Protect second argument with parentheses.
2325
2326Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2327
2328 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2329 Deleted old in/out instructions in "#if 0" section.
2330
2331Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2332
2333 * i386.h (i386_optab): Properly bracket initializers.
2334
2335Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2336
2337 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2338 Jeff Law, law@cs.utah.edu).
2339
2340Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2341
2342 * i386.h (lcall): Accept Imm32 operand also.
2343
2344Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2345
2346 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2347 (M_DABS): Added.
2348
2349Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2350
2351 * mips.h (INSN_*): Changed values. Removed unused definitions.
2352 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2353 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2354 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2355 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2356 (M_*): Added new values for r6000 and r4000 macros.
2357 (ANY_DELAY): Removed.
2358
2359Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2360
2361 * mips.h: Added M_LI_S and M_LI_SS.
2362
2363Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2364
2365 * h8300.h: Get some rare mov.bs correct.
2366
2367Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2368
2369 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2370 been included.
2371
2372Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2373
2374 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2375 jump instructions, for use in disassemblers.
2376
2377Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2378
2379 * m88k.h: Make bitfields just unsigned, not unsigned long or
2380 unsigned short.
2381
2382Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2383
2384 * hppa.h: New argument type 'y'. Use in various float instructions.
2385
2386Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2387
2388 * hppa.h (break): First immediate field is unsigned.
2389
2390 * hppa.h: Add rfir instruction.
2391
2392Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2393
2394 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2395
2396Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2397
2398 * mips.h: Reworked the hazard information somewhat, and fixed some
2399 bugs in the instruction hazard descriptions.
2400
2401Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2402
2403 * m88k.h: Corrected a couple of opcodes.
2404
2405Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2406
2407 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2408 new version includes instruction hazard information, but is
2409 otherwise reasonably similar.
2410
2411Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2412
2413 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2414
2415Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2416
2417 Patches from Jeff Law, law@cs.utah.edu:
2418 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2419 Make the tables be the same for the following instructions:
2420 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2421 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2422 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2423 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2424 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2425 "fcmp", and "ftest".
2426
2427 * hppa.h: Make new and old tables the same for "break", "mtctl",
2428 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2429 Fix typo in last patch. Collapse several #ifdefs into a
2430 single #ifdef.
2431
2432 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2433 of the comments up-to-date.
2434
2435 * hppa.h: Update "free list" of letters and update
2436 comments describing each letter's function.
2437
4f1d9bd8
NC
2438Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2439
2440 * h8300.h: Lots of little fixes for the h8/300h.
2441
2442Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2443
2444 Support for H8/300-H
2445 * h8300.h: Lots of new opcodes.
2446
252b5132
RH
2447Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2448
2449 * h8300.h: checkpoint, includes H8/300-H opcodes.
2450
2451Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2452
2453 * Patches from Jeffrey Law <law@cs.utah.edu>.
2454 * hppa.h: Rework single precision FP
2455 instructions so that they correctly disassemble code
2456 PA1.1 code.
2457
2458Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2459
2460 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2461 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2462
2463Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2464
2465 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2466 gdb will define it for now.
2467
2468Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2469
2470 * sparc.h: Don't end enumerator list with comma.
2471
2472Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2473
2474 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2475 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2476 ("bc2t"): Correct typo.
2477 ("[ls]wc[023]"): Use T rather than t.
2478 ("c[0123]"): Define general coprocessor instructions.
2479
2480Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2481
2482 * m68k.h: Move split point for gcc compilation more towards
2483 middle.
2484
2485Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2486
2487 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2488 simply wrong, ics, rfi, & rfsvc were missing).
2489 Add "a" to opr_ext for "bb". Doc fix.
2490
2491Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2492
2493 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2494 * mips.h: Add casts, to suppress warnings about shifting too much.
2495 * m68k.h: Document the placement code '9'.
2496
2497Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2498
2499 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2500 allows callers to break up the large initialized struct full of
2501 opcodes into two half-sized ones. This permits GCC to compile
2502 this module, since it takes exponential space for initializers.
2503 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2504
2505Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2506
2507 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2508 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2509 initialized structs in it.
2510
2511Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2512
2513 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2514 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2515 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2516
2517Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2518
2519 * mips.h: document "i" and "j" operands correctly.
2520
2521Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2522
2523 * mips.h: Removed endianness dependency.
2524
2525Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2526
2527 * h8300.h: include info on number of cycles per instruction.
2528
2529Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2530
2531 * hppa.h: Move handy aliases to the front. Fix masks for extract
2532 and deposit instructions.
2533
2534Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2535
2536 * i386.h: accept shld and shrd both with and without the shift
2537 count argument, which is always %cl.
2538
2539Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2540
2541 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2542 (one_byte_segment_defaults, two_byte_segment_defaults,
2543 i386_prefixtab_end): Ditto.
2544
2545Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2546
2547 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2548 for operand 2; from John Carr, jfc@dsg.dec.com.
2549
2550Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2551
2552 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2553 always use 16-bit offsets. Makes calculated-size jump tables
2554 feasible.
2555
2556Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2557
2558 * i386.h: Fix one-operand forms of in* and out* patterns.
2559
2560Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2561
2562 * m68k.h: Added CPU32 support.
2563
2564Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2565
2566 * mips.h (break): Disassemble the argument. Patch from
2567 jonathan@cs.stanford.edu (Jonathan Stone).
2568
2569Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2570
2571 * m68k.h: merged Motorola and MIT syntax.
2572
2573Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2574
2575 * m68k.h (pmove): make the tests less strict, the 68k book is
2576 wrong.
2577
2578Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2579
2580 * m68k.h (m68ec030): Defined as alias for 68030.
2581 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2582 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2583 them. Tightened description of "fmovex" to distinguish it from
2584 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2585 up descriptions that claimed versions were available for chips not
2586 supporting them. Added "pmovefd".
2587
2588Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2589
2590 * m68k.h: fix where the . goes in divull
2591
2592Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2593
2594 * m68k.h: the cas2 instruction is supposed to be written with
2595 indirection on the last two operands, which can be either data or
2596 address registers. Added a new operand type 'r' which accepts
2597 either register type. Added new cases for cas2l and cas2w which
2598 use them. Corrected masks for cas2 which failed to recognize use
2599 of address register.
2600
2601Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2602
2603 * m68k.h: Merged in patches (mostly m68040-specific) from
2604 Colin Smith <colin@wrs.com>.
2605
2606 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2607 base). Also cleaned up duplicates, re-ordered instructions for
2608 the sake of dis-assembling (so aliases come after standard names).
2609 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2610
2611Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2612
2613 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2614 all missing .s
2615
2616Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2617
2618 * sparc.h: Moved tables to BFD library.
2619
2620 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2621
2622Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2623
2624 * h8300.h: Finish filling in all the holes in the opcode table,
2625 so that the Lucid C compiler can digest this as well...
2626
2627Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2628
2629 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2630 Fix opcodes on various sizes of fild/fist instructions
2631 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2632 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2633
2634Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2635
2636 * h8300.h: Fill in all the holes in the opcode table so that the
2637 losing HPUX C compiler can digest this...
2638
2639Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2640
2641 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2642 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2643
2644Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2645
2646 * sparc.h: Add new architecture variant sparclite; add its scan
2647 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2648
2649Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2650
2651 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2652 fy@lucid.com).
2653
2654Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2655
2656 * rs6k.h: New version from IBM (Metin).
2657
2658Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2659
2660 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2661 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2662
2663Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2664
2665 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2666
2667Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2668
2669 * m68k.h (one, two): Cast macro args to unsigned to suppress
2670 complaints from compiler and lint about integer overflow during
2671 shift.
2672
2673Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2674
2675 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2676
2677Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2678
2679 * mips.h: Make bitfield layout depend on the HOST compiler,
2680 not on the TARGET system.
2681
2682Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2683
2684 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2685 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2686 <TRANLE@INTELLICORP.COM>.
2687
2688Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2689
2690 * h8300.h: turned op_type enum into #define list
2691
2692Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2693
2694 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2695 similar instructions -- they've been renamed to "fitoq", etc.
2696 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2697 number of arguments.
2698 * h8300.h: Remove extra ; which produces compiler warning.
2699
2700Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2701
2702 * sparc.h: fix opcode for tsubcctv.
2703
2704Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2705
2706 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2707
2708Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2709
2710 * sparc.h (nop): Made the 'lose' field be even tighter,
2711 so only a standard 'nop' is disassembled as a nop.
2712
2713Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2714
2715 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2716 disassembled as a nop.
2717
4f1d9bd8
NC
2718Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2719
2720 * m68k.h, sparc.h: ANSIfy enums.
2721
252b5132
RH
2722Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2723
2724 * sparc.h: fix a typo.
2725
2726Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2727
2728 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2729 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2730 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2731
2732\f
2733Local Variables:
2734version-control: never
2735End: