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* Makefile.am (OBJS): Depend on ansidecl.h and fopen-same.h.
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
771c7ce4
TS
12002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
2
3 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
4
b9c9142c
AV
52002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
6
7 * h8300.h: Corrected defs of all control regs
8 and eepmov instr.
9
cd47f4f1
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102002-04-11 Alan Modra <amodra@bigpond.net.au>
11
12 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 13 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 14
1f25f5d3
CD
152002-03-15 Chris G. Demetriou <cgd@broadcom.com>
16
17 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
18 instructions.
19 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
20 may be passed along with the ISA bitmask.
21
e4b29ec6
AM
222002-03-05 Paul Koning <pkoning@equallogic.com>
23
24 * pdp11.h: Add format codes for float instruction formats.
25
eea5c83f
AM
262002-02-25 Alan Modra <amodra@bigpond.net.au>
27
28 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
29
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JH
30Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
31
32 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
33
85a33fe2
JH
34Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
35
36 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
37 (xchg): Fix.
38 (in, out): Disable 64bit operands.
39 (call, jmp): Avoid REX prefixes.
40 (jcxz): Prohibit in 64bit mode
41 (jrcxz, loop): Add 64bit variants.
42 (movq): Fix patterns.
43 (movmskps, pextrw, pinstrw): Add 64bit variants.
44
3b16e843
NC
452002-01-31 Ivan Guzvinec <ivang@opencores.org>
46
47 * or32.h: New file.
48
9a2e995d
GH
492002-01-22 Graydon Hoare <graydon@redhat.com>
50
51 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
52 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
53
7b45c6e1
AM
542002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
55
56 * h8300.h: Comment typo fix.
57
a09cf9bd
MG
582002-01-03 matthew green <mrg@redhat.com>
59
60 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
61 (PPC_OPCODE_BOOKE64): Likewise.
62
1befefea
JL
63Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
64
65 * hppa.h (call, ret): Move to end of table.
66 (addb, addib): PA2.0 variants should have been PA2.0W.
67 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
68 happy.
69 (fldw, fldd, fstw, fstd, bb): Likewise.
70 (short loads/stores): Tweak format specifier slightly to keep
71 disassembler happy.
72 (indexed loads/stores): Likewise.
73 (absolute loads/stores): Likewise.
74
124ddbb2
AO
752001-12-04 Alexandre Oliva <aoliva@redhat.com>
76
77 * d10v.h (OPERAND_NOSP): New macro.
78
9b21d49b
AO
792001-11-29 Alexandre Oliva <aoliva@redhat.com>
80
81 * d10v.h (OPERAND_SP): New macro.
82
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AM
832001-11-15 Alan Modra <amodra@bigpond.net.au>
84
85 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
86
6e917903
TW
872001-11-11 Timothy Wall <twall@alum.mit.edu>
88
89 * tic54x.h: Revise opcode layout; don't really need a separate
90 structure for parallel opcodes.
91
e5470cdc
AM
922001-11-13 Zack Weinberg <zack@codesourcery.com>
93 Alan Modra <amodra@bigpond.net.au>
94
95 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
96 accept WordReg.
97
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CD
982001-11-04 Chris Demetriou <cgd@broadcom.com>
99
100 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
101
3c3bdf30
NC
1022001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
103
104 * mmix.h: New file.
105
e4432525
CD
1062001-10-18 Chris Demetriou <cgd@broadcom.com>
107
108 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
109 of the expression, to make source code merging easier.
110
8ff529d8
CD
1112001-10-17 Chris Demetriou <cgd@broadcom.com>
112
113 * mips.h: Sort coprocessor instruction argument characters
114 in comment, add a few more words of description for "H".
115
2228315b
CD
1162001-10-17 Chris Demetriou <cgd@broadcom.com>
117
118 * mips.h (INSN_SB1): New cpu-specific instruction bit.
119 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
120 if cpu is CPU_SB1.
121
f5c120c5
MG
1222001-10-17 matthew green <mrg@redhat.com>
123
124 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
125
418c1742
MG
1262001-10-12 matthew green <mrg@redhat.com>
127
0716ce0d
MG
128 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
129 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
130 instructions, respectively.
418c1742 131
6ff2f2ba
NC
1322001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
133
134 * v850.h: Remove spurious comment.
135
015cf428
NC
1362001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
137
138 * h8300.h: Fix compile time warning messages
139
847b8b31
RH
1402001-09-04 Richard Henderson <rth@redhat.com>
141
142 * alpha.h (struct alpha_operand): Pack elements into bitfields.
143
a98b9439
EC
1442001-08-31 Eric Christopher <echristo@redhat.com>
145
146 * mips.h: Remove CPU_MIPS32_4K.
147
a6959011
AM
1482001-08-27 Torbjorn Granlund <tege@swox.com>
149
150 * ppc.h (PPC_OPERAND_DS): Define.
151
d83c6548
AJ
1522001-08-25 Andreas Jaeger <aj@suse.de>
153
154 * d30v.h: Fix declaration of reg_name_cnt.
155
156 * d10v.h: Fix declaration of d10v_reg_name_cnt.
157
158 * arc.h: Add prototypes from opcodes/arc-opc.c.
159
99c14723
TS
1602001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
161
162 * mips.h (INSN_10000): Define.
163 (OPCODE_IS_MEMBER): Check for INSN_10000.
164
11b37b7b
AM
1652001-08-10 Alan Modra <amodra@one.net.au>
166
167 * ppc.h: Revert 2001-08-08.
168
3b16e843
NC
1692001-08-10 Richard Sandiford <rsandifo@redhat.com>
170
171 * mips.h (INSN_GP32): Remove.
172 (OPCODE_IS_MEMBER): Remove gp32 parameter.
173 (M_MOVE): New macro identifier.
174
0f1bac05
AM
1752001-08-08 Alan Modra <amodra@one.net.au>
176
177 1999-10-25 Torbjorn Granlund <tege@swox.com>
178 * ppc.h (struct powerpc_operand): New field `reloc'.
179
3b16e843
NC
1802001-08-01 Aldy Hernandez <aldyh@redhat.com>
181
182 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
183
1842001-07-12 Jeff Johnston <jjohnstn@redhat.com>
185
186 * cgen.h (CGEN_INSN): Add regex support.
187 (build_insn_regex): Declare.
188
81f6038f
FCE
1892001-07-11 Frank Ch. Eigler <fche@redhat.com>
190
191 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
192 (cgen_cpu_desc): Ditto.
193
32cfffe3
BE
1942001-07-07 Ben Elliston <bje@redhat.com>
195
196 * m88k.h: Clean up and reformat. Remove unused code.
197
3e890047
GK
1982001-06-14 Geoffrey Keating <geoffk@redhat.com>
199
200 * cgen.h (cgen_keyword): Add nonalpha_chars field.
201
d1cf510e
NC
2022001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
203
204 * mips.h (CPU_R12000): Define.
205
e281c457
JH
2062001-05-23 John Healy <jhealy@redhat.com>
207
208 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 209
aa5f19f2
NC
2102001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
211
212 * mips.h (INSN_ISA_MASK): Define.
213
67d6227d
AM
2142001-05-12 Alan Modra <amodra@one.net.au>
215
216 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
217 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
218 and use InvMem as these insns must have register operands.
219
992aaec9
AM
2202001-05-04 Alan Modra <amodra@one.net.au>
221
222 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
223 and pextrw to swap reg/rm assignments.
224
4ef7f0bf
HPN
2252001-04-05 Hans-Peter Nilsson <hp@axis.com>
226
227 * cris.h (enum cris_insn_version_usage): Correct comment for
228 cris_ver_v3p.
229
0f17484f
AM
2302001-03-24 Alan Modra <alan@linuxcare.com.au>
231
232 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
233 Add InvMem to first operand of "maskmovdqu".
234
7ccb5238
HPN
2352001-03-22 Hans-Peter Nilsson <hp@axis.com>
236
237 * cris.h (ADD_PC_INCR_OPCODE): New macro.
238
361bfa20
KH
2392001-03-21 Kazu Hirata <kazu@hxi.com>
240
241 * h8300.h: Fix formatting.
242
87890af0
AM
2432001-03-22 Alan Modra <alan@linuxcare.com.au>
244
245 * i386.h (i386_optab): Add paddq, psubq.
246
2e98d2de
AM
2472001-03-19 Alan Modra <alan@linuxcare.com.au>
248
249 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
250
80a523c2
NC
2512001-02-28 Igor Shevlyakov <igor@windriver.com>
252
253 * m68k.h: new defines for Coldfire V4. Update mcf to know
254 about mcf5407.
255
e135f41b
NC
2562001-02-18 lars brinkhoff <lars@nocrew.org>
257
258 * pdp11.h: New file.
259
2602001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
261
262 * i386.h (i386_optab): SSE integer converison instructions have
263 64bit versions on x86-64.
264
8eaec934
NC
2652001-02-10 Nick Clifton <nickc@redhat.com>
266
267 * mips.h: Remove extraneous whitespace. Formating change to allow
268 for future contribution.
269
a85d7ed0
NC
2702001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
271
272 * s390.h: New file.
273
0715dc88
PM
2742001-02-02 Patrick Macdonald <patrickm@redhat.com>
275
276 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
277 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
278 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
279
296bc568
AM
2802001-01-24 Karsten Keil <kkeil@suse.de>
281
282 * i386.h (i386_optab): Fix swapgs
283
1328dc98
AM
2842001-01-14 Alan Modra <alan@linuxcare.com.au>
285
286 * hppa.h: Describe new '<' and '>' operand types, and tidy
287 existing comments.
288 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
289 Remove duplicate "ldw j(s,b),x". Sort some entries.
290
e135f41b 2912001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
292
293 * i386.h (i386_optab): Fix pusha and ret templates.
294
0d2bcfaf
NC
2952001-01-11 Peter Targett <peter.targett@arccores.com>
296
297 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
298 definitions for masking cpu type.
299 (arc_ext_operand_value) New structure for storing extended
300 operands.
301 (ARC_OPERAND_*) Flags for operand values.
302
3032001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
304
305 * i386.h (pinsrw): Add.
306 (pshufw): Remove.
307 (cvttpd2dq): Fix operands.
308 (cvttps2dq): Likewise.
309 (movq2q): Rename to movdq2q.
310
079966a8
AM
3112001-01-10 Richard Schaal <richard.schaal@intel.com>
312
313 * i386.h: Correct movnti instruction.
314
8c1f9e76
JJ
3152001-01-09 Jeff Johnston <jjohnstn@redhat.com>
316
317 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
318 of operands (unsigned char or unsigned short).
319 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
320 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
321
0d2bcfaf 3222001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
323
324 * i386.h (i386_optab): Make [sml]fence template to use immext field.
325
0d2bcfaf 3262001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
327
328 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
329 introduced by Pentium4
330
0d2bcfaf 3312000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
332
333 * i386.h (i386_optab): Add "rex*" instructions;
334 add swapgs; disable jmp/call far direct instructions for
335 64bit mode; add syscall and sysret; disable registers for 0xc6
336 template. Add 'q' suffixes to extendable instructions, disable
079966a8 337 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
338 (i386_regtab): Add extended registers.
339 (*Suf): Add No_qSuf.
340 (q_Suf, wlq_Suf, bwlq_Suf): New.
341
0d2bcfaf 3422000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
343
344 * i386.h (i386_optab): Replace "Imm" with "EncImm".
345 (i386_regtab): Add flags field.
d83c6548 346
bf40d919
NC
3472000-12-12 Nick Clifton <nickc@redhat.com>
348
349 * mips.h: Fix formatting.
350
4372b673
NC
3512000-12-01 Chris Demetriou <cgd@sibyte.com>
352
353 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
354 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
355 OP_*_SYSCALL definitions.
356 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
357 19 bit wait codes.
358 (MIPS operand specifier comments): Remove 'm', add 'U' and
359 'J', and update the meaning of 'B' so that it's more general.
360
e7af610e
NC
361 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
362 INSN_ISA5): Renumber, redefine to mean the ISA at which the
363 instruction was added.
364 (INSN_ISA32): New constant.
365 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
366 Renumber to avoid new and/or renumbered INSN_* constants.
367 (INSN_MIPS32): Delete.
368 (ISA_UNKNOWN): New constant to indicate unknown ISA.
369 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
370 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 371 constants available at that ISA level.
e7af610e
NC
372 (CPU_UNKNOWN): New constant to indicate unknown CPU.
373 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
374 define it with a unique value.
375 (OPCODE_IS_MEMBER): Update for new ISA membership-related
376 constant meanings.
377
84ea6cf2 378 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 379 definitions.
84ea6cf2 380
c6c98b38
NC
381 * mips.h (CPU_SB1): New constant.
382
19f7b010
JJ
3832000-10-20 Jakub Jelinek <jakub@redhat.com>
384
385 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
386 Note that '3' is used for siam operand.
387
139368c9
JW
3882000-09-22 Jim Wilson <wilson@cygnus.com>
389
390 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
391
156c2f8b 3922000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 393
156c2f8b
NC
394 * mips.h: Use defines instead of hard-coded processor numbers.
395 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 396 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
397 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
398 CPU_4KC, CPU_4KM, CPU_4KP): Define..
399 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 400 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 401 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
402 Add 'P' to used characters.
403 Use 'H' for coprocessor select field.
156c2f8b 404 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
405 Document new arg characters and add to used characters.
406 (INSN_MIPS32): New define for MIPS32 extensions.
407 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 408
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AM
4092000-09-05 Alan Modra <alan@linuxcare.com.au>
410
411 * hppa.h: Mention cz completer.
412
50b81f19
JW
4132000-08-16 Jim Wilson <wilson@cygnus.com>
414
415 * ia64.h (IA64_OPCODE_POSTINC): New.
416
fc29466d
L
4172000-08-15 H.J. Lu <hjl@gnu.org>
418
419 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
420 IgnoreSize change.
421
4f1d9bd8
NC
4222000-08-08 Jason Eckhardt <jle@cygnus.com>
423
424 * i860.h: Small formatting adjustments.
425
45ee1401
DC
4262000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
427
428 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
429 Move related opcodes closer to each other.
430 Minor changes in comments, list undefined opcodes.
431
9d551405
DB
4322000-07-26 Dave Brolley <brolley@redhat.com>
433
434 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
435
4f1d9bd8
NC
4362000-07-22 Jason Eckhardt <jle@cygnus.com>
437
438 * i860.h (btne, bte, bla): Changed these opcodes
439 to use sbroff ('r') instead of split16 ('s').
440 (J, K, L, M): New operand types for 16-bit aligned fields.
441 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
442 use I, J, K, L, M instead of just I.
443 (T, U): New operand types for split 16-bit aligned fields.
444 (st.x): Changed these opcodes to use S, T, U instead of just S.
445 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
446 exist on the i860.
447 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
448 (pfeq.ss, pfeq.dd): New opcodes.
449 (st.s): Fixed incorrect mask bits.
450 (fmlow): Fixed incorrect mask bits.
451 (fzchkl, pfzchkl): Fixed incorrect mask bits.
452 (faddz, pfaddz): Fixed incorrect mask bits.
453 (form, pform): Fixed incorrect mask bits.
454 (pfld.l): Fixed incorrect mask bits.
455 (fst.q): Fixed incorrect mask bits.
456 (all floating point opcodes): Fixed incorrect mask bits for
457 handling of dual bit.
458
c8488617
HPN
4592000-07-20 Hans-Peter Nilsson <hp@axis.com>
460
461 cris.h: New file.
462
65aa24b6
NC
4632000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
464
465 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
466 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
467 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
468 (AVR_ISA_M83): Define for ATmega83, ATmega85.
469 (espm): Remove, because ESPM removed in databook update.
470 (eicall, eijmp): Move to the end of opcode table.
471
60bcf0fa
NC
4722000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
473
474 * m68hc11.h: New file for support of Motorola 68hc11.
475
60a2978a
DC
476Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
477
478 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
479
68ab2dd9
DC
480Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
481
482 * avr.h: New file with AVR opcodes.
483
f0662e27
DL
484Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
485
486 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
487
b722f2be
AM
4882000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
489
490 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
491
f9e0cf0b
AM
4922000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
493
494 * i386.h: Use sl_FP, not sl_Suf for fild.
495
f660ee8b
FCE
4962000-05-16 Frank Ch. Eigler <fche@redhat.com>
497
498 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
499 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
500 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
501 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
502
558b0a60
AM
5032000-05-13 Alan Modra <alan@linuxcare.com.au>,
504
505 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
506
e413e4e9
AM
5072000-05-13 Alan Modra <alan@linuxcare.com.au>,
508 Alexander Sokolov <robocop@netlink.ru>
509
510 * i386.h (i386_optab): Add cpu_flags for all instructions.
511
5122000-05-13 Alan Modra <alan@linuxcare.com.au>
513
514 From Gavin Romig-Koch <gavin@cygnus.com>
515 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
516
5c84d377
TW
5172000-05-04 Timothy Wall <twall@cygnus.com>
518
519 * tic54x.h: New.
520
966f959b
C
5212000-05-03 J.T. Conklin <jtc@redback.com>
522
523 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
524 (PPC_OPERAND_VR): New operand flag for vector registers.
525
c5d05dbb
JL
5262000-05-01 Kazu Hirata <kazu@hxi.com>
527
528 * h8300.h (EOP): Add missing initializer.
529
a7fba0e0
JL
530Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
531
532 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
533 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
534 New operand types l,y,&,fe,fE,fx added to support above forms.
535 (pa_opcodes): Replaced usage of 'x' as source/target for
536 floating point double-word loads/stores with 'fx'.
537
800eeca4
JW
538Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
539 David Mosberger <davidm@hpl.hp.com>
540 Timothy Wall <twall@cygnus.com>
541 Jim Wilson <wilson@cygnus.com>
542
543 * ia64.h: New file.
544
ba23e138
NC
5452000-03-27 Nick Clifton <nickc@cygnus.com>
546
547 * d30v.h (SHORT_A1): Fix value.
548 (SHORT_AR): Renumber so that it is at the end of the list of short
549 instructions, not the end of the list of long instructions.
550
d0b47220
AM
5512000-03-26 Alan Modra <alan@linuxcare.com>
552
553 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
554 problem isn't really specific to Unixware.
555 (OLDGCC_COMPAT): Define.
556 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
557 destination %st(0).
558 Fix lots of comments.
559
866afedc
NC
5602000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
561
562 * d30v.h:
563 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
564 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
565 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
566 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
567 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
568 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
569 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
570
cc5ca5ce
AM
5712000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
572
573 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
574 fistpd without suffix.
575
68e324a2
NC
5762000-02-24 Nick Clifton <nickc@cygnus.com>
577
578 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
579 'signed_overflow_ok_p'.
580 Delete prototypes for cgen_set_flags() and cgen_get_flags().
581
60f036a2
AH
5822000-02-24 Andrew Haley <aph@cygnus.com>
583
584 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
585 (CGEN_CPU_TABLE): flags: new field.
586 Add prototypes for new functions.
d83c6548 587
9b9b5cd4
AM
5882000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
589
590 * i386.h: Add some more UNIXWARE_COMPAT comments.
591
5b93d8bb
AM
5922000-02-23 Linas Vepstas <linas@linas.org>
593
594 * i370.h: New file.
595
4f1d9bd8
NC
5962000-02-22 Chandra Chavva <cchavva@cygnus.com>
597
598 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
599 cannot be combined in parallel with ADD/SUBppp.
600
87f398dd
AH
6012000-02-22 Andrew Haley <aph@cygnus.com>
602
603 * mips.h: (OPCODE_IS_MEMBER): Add comment.
604
367c01af
AH
6051999-12-30 Andrew Haley <aph@cygnus.com>
606
9a1e79ca
AH
607 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
608 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
609 insns.
367c01af 610
add0c677
AM
6112000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
612
613 * i386.h: Qualify intel mode far call and jmp with x_Suf.
614
3138f287
AM
6151999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
616
617 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
618 indirect jumps and calls. Add FF/3 call for intel mode.
619
ccecd07b
JL
620Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
621
622 * mn10300.h: Add new operand types. Add new instruction formats.
623
b37e19e9
JL
624Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
625
626 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
627 instruction.
628
5fce5ddf
GRK
6291999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
630
631 * mips.h (INSN_ISA5): New.
632
2bd7f1f3
GRK
6331999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
634
635 * mips.h (OPCODE_IS_MEMBER): New.
636
4df2b5c5
NC
6371999-10-29 Nick Clifton <nickc@cygnus.com>
638
639 * d30v.h (SHORT_AR): Define.
640
446a06c9
MM
6411999-10-18 Michael Meissner <meissner@cygnus.com>
642
643 * alpha.h (alpha_num_opcodes): Convert to unsigned.
644 (alpha_num_operands): Ditto.
645
eca04c6a
JL
646Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
647
648 * hppa.h (pa_opcodes): Add load and store cache control to
649 instructions. Add ordered access load and store.
650
651 * hppa.h (pa_opcode): Add new entries for addb and addib.
652
653 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
654
655 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
656
c43185de
DN
657Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
658
659 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
660
ec3533da
JL
661Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
662
390f858d
JL
663 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
664 and "be" using completer prefixes.
665
8c47ebd9
JL
666 * hppa.h (pa_opcodes): Add initializers to silence compiler.
667
ec3533da
JL
668 * hppa.h: Update comments about character usage.
669
18369bea
JL
670Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
671
672 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
673 up the new fstw & bve instructions.
674
c36efdd2
JL
675Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
676
d3ffb032
JL
677 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
678 instructions.
679
c49ec3da
JL
680 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
681
5d2e7ecc
JL
682 * hppa.h (pa_opcodes): Add long offset double word load/store
683 instructions.
684
6397d1a2
JL
685 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
686 stores.
687
142f0fe0
JL
688 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
689
f5a68b45
JL
690 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
691
8235801e
JL
692 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
693
35184366
JL
694 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
695
f0bfde5e
JL
696 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
697
27bbbb58
JL
698 * hppa.h (pa_opcodes): Add support for "b,l".
699
c36efdd2
JL
700 * hppa.h (pa_opcodes): Add support for "b,gate".
701
f2727d04
JL
702Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
703
9392fb11 704 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 705 in xmpyu.
9392fb11 706
e0c52e99
JL
707 * hppa.h (pa_opcodes): Fix mask for probe and probei.
708
f2727d04
JL
709 * hppa.h (pa_opcodes): Fix mask for depwi.
710
52d836e2
JL
711Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
712
713 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
714 an explicit output argument.
715
90765e3a
JL
716Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
717
718 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
719 Add a few PA2.0 loads and store variants.
720
8340b17f
ILT
7211999-09-04 Steve Chamberlain <sac@pobox.com>
722
723 * pj.h: New file.
724
5f47d35b
AM
7251999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
726
727 * i386.h (i386_regtab): Move %st to top of table, and split off
728 other fp reg entries.
729 (i386_float_regtab): To here.
730
1c143202
JL
731Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
732
7d8fdb64
JL
733 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
734 by 'f'.
735
90927b9c
JL
736 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
737 Add supporting args.
738
1d16bf9c
JL
739 * hppa.h: Document new completers and args.
740 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
741 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
742 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
743 pmenb and pmdis.
744
96226a68
JL
745 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
746 hshr, hsub, mixh, mixw, permh.
747
5d4ba527
JL
748 * hppa.h (pa_opcodes): Change completers in instructions to
749 use 'c' prefix.
750
e9fc28c6
JL
751 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
752 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
753
1c143202
JL
754 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
755 fnegabs to use 'I' instead of 'F'.
756
9e525108
AM
7571999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
758
759 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
760 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
761 Alphabetically sort PIII insns.
762
e8da1bf1
DE
763Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
764
765 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
766
7d627258
JL
767Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
768
5696871a
JL
769 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
770 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
771
7d627258
JL
772 * hppa.h: Document 64 bit condition completers.
773
c5e52916
JL
774Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
775
776 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
777
eecb386c
AM
7781999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
779
780 * i386.h (i386_optab): Add DefaultSize modifier to all insns
781 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
782 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
783
88a380f3
JL
784Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
785 Jeff Law <law@cygnus.com>
786
787 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
788
789 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 790
d83c6548 791 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
792 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
793
145cf1f0
AM
7941999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
795
796 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
797
73826640
JL
798Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
799
800 * hppa.h (struct pa_opcode): Add new field "flags".
801 (FLAGS_STRICT): Define.
802
b65db252
JL
803Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
804 Jeff Law <law@cygnus.com>
805
f7fc668b
JL
806 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
807
808 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 809
10084519
AM
8101999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
811
812 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
813 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
814 flag to fcomi and friends.
815
cd8a80ba
JL
816Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
817
818 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 819 integer logical instructions.
cd8a80ba 820
1fca749b
ILT
8211999-05-28 Linus Nordberg <linus.nordberg@canit.se>
822
823 * m68k.h: Document new formats `E', `G', `H' and new places `N',
824 `n', `o'.
825
826 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
827 and new places `m', `M', `h'.
828
aa008907
JL
829Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
830
831 * hppa.h (pa_opcodes): Add several processor specific system
832 instructions.
833
e26b85f0
JL
834Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
835
d83c6548 836 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
837 "addb", and "addib" to be used by the disassembler.
838
c608c12e
AM
8391999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
840
841 * i386.h (ReverseModrm): Remove all occurences.
842 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
843 movmskps, pextrw, pmovmskb, maskmovq.
844 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
845 ignore the data size prefix.
846
847 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
848 Mostly stolen from Doug Ledford <dledford@redhat.com>
849
45c18104
RH
850Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
851
852 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
853
252b5132
RH
8541999-04-14 Doug Evans <devans@casey.cygnus.com>
855
856 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
857 (CGEN_ATTR_TYPE): Update.
858 (CGEN_ATTR_MASK): Number booleans starting at 0.
859 (CGEN_ATTR_VALUE): Update.
860 (CGEN_INSN_ATTR): Update.
861
862Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
863
864 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
865 instructions.
866
867Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
868
869 * hppa.h (bb, bvb): Tweak opcode/mask.
870
871
8721999-03-22 Doug Evans <devans@casey.cygnus.com>
873
874 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
875 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
876 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
877 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
878 Delete member max_insn_size.
879 (enum cgen_cpu_open_arg): New enum.
880 (cpu_open): Update prototype.
881 (cpu_open_1): Declare.
882 (cgen_set_cpu): Delete.
883
8841999-03-11 Doug Evans <devans@casey.cygnus.com>
885
886 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
887 (CGEN_OPERAND_NIL): New macro.
888 (CGEN_OPERAND): New member `type'.
889 (@arch@_cgen_operand_table): Delete decl.
890 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
891 (CGEN_OPERAND_TABLE): New struct.
892 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
893 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
894 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
895 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
896 {get,set}_{int,vma}_operand.
897 (@arch@_cgen_cpu_open): New arg `isa'.
898 (cgen_set_cpu): Ditto.
899
900Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
901
902 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
903
9041999-02-25 Doug Evans <devans@casey.cygnus.com>
905
906 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
907 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
908 enum cgen_hw_type.
909 (CGEN_HW_TABLE): New struct.
910 (hw_table): Delete declaration.
911 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
912 to table entry to enum.
913 (CGEN_OPINST): Ditto.
914 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
915
916Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
917
918 * alpha.h (AXP_OPCODE_EV6): New.
919 (AXP_OPCODE_NOPAL): Include it.
920
9211999-02-09 Doug Evans <devans@casey.cygnus.com>
922
923 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
924 All uses updated. New members int_insn_p, max_insn_size,
925 parse_operand,insert_operand,extract_operand,print_operand,
926 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
927 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
928 extract_handlers,print_handlers.
929 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
930 (CGEN_ATTR_BOOL_OFFSET): New macro.
931 (CGEN_ATTR_MASK): Subtract it to compute bit number.
932 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
933 (cgen_opcode_handler): Renamed from cgen_base.
934 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
935 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
936 all uses updated.
937 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
938 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
939 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
940 (CGEN_OPCODE,CGEN_IBASE): New types.
941 (CGEN_INSN): Rewrite.
942 (CGEN_{ASM,DIS}_HASH*): Delete.
943 (init_opcode_table,init_ibld_table): Declare.
944 (CGEN_INSN_ATTR): New type.
945
946Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 947
252b5132
RH
948 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
949 (x_FP, d_FP, dls_FP, sldx_FP): Define.
950 Change *Suf definitions to include x and d suffixes.
951 (movsx): Use w_Suf and b_Suf.
952 (movzx): Likewise.
953 (movs): Use bwld_Suf.
954 (fld): Change ordering. Use sld_FP.
955 (fild): Add Intel Syntax equivalent of fildq.
956 (fst): Use sld_FP.
957 (fist): Use sld_FP.
958 (fstp): Use sld_FP. Add x_FP version.
959 (fistp): LLongMem version for Intel Syntax.
960 (fcom, fcomp): Use sld_FP.
961 (fadd, fiadd, fsub): Use sld_FP.
962 (fsubr): Use sld_FP.
963 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
964
9651999-01-27 Doug Evans <devans@casey.cygnus.com>
966
967 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
968 CGEN_MODE_UINT.
969
e135f41b 9701999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
971
972 * hppa.h (bv): Fix mask.
973
9741999-01-05 Doug Evans <devans@casey.cygnus.com>
975
976 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
977 (CGEN_ATTR): Use it.
978 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
979 (CGEN_ATTR_TABLE): New member dfault.
980
9811998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
982
983 * mips.h (MIPS16_INSN_BRANCH): New.
984
985Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
986
987 The following is part of a change made by Edith Epstein
d83c6548
AJ
988 <eepstein@sophia.cygnus.com> as part of a project to merge in
989 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
990
991 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 992 after.
252b5132
RH
993
994Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
995
996 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 997 status word instructions.
252b5132
RH
998
9991998-11-30 Doug Evans <devans@casey.cygnus.com>
1000
1001 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1002 (struct cgen_keyword_entry): Ditto.
1003 (struct cgen_operand): Ditto.
1004 (CGEN_IFLD): New typedef, with associated access macros.
1005 (CGEN_IFMT): New typedef, with associated access macros.
1006 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1007 (CGEN_IVALUE): New typedef.
1008 (struct cgen_insn): Delete const on syntax,attrs members.
1009 `format' now points to format data. Type of `value' is now
1010 CGEN_IVALUE.
1011 (struct cgen_opcode_table): New member ifld_table.
1012
10131998-11-18 Doug Evans <devans@casey.cygnus.com>
1014
1015 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1016 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1017 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1018 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1019 (cgen_opcode_table): Update type of dis_hash fn.
1020 (extract_operand): Update type of `insn_value' arg.
1021
1022Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1023
1024 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1025
1026Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1027
1028 * mips.h (INSN_MULT): Added.
1029
1030Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1031
1032 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1033
1034Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1035
1036 * cgen.h (CGEN_INSN_INT): New typedef.
1037 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1038 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1039 (CGEN_INSN_BYTES_PTR): New typedef.
1040 (CGEN_EXTRACT_INFO): New typedef.
1041 (cgen_insert_fn,cgen_extract_fn): Update.
1042 (cgen_opcode_table): New member `insn_endian'.
1043 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1044 (insert_operand,extract_operand): Update.
1045 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1046
1047Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1048
1049 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1050 (struct CGEN_HW_ENTRY): New member `attrs'.
1051 (CGEN_HW_ATTR): New macro.
1052 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1053 (CGEN_INSN_INVALID_P): New macro.
1054
1055Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1056
1057 * hppa.h: Add "fid".
d83c6548 1058
252b5132
RH
1059Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1060
1061 From Robert Andrew Dale <rob@nb.net>
1062 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1063 (AMD_3DNOW_OPCODE): Define.
1064
1065Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1066
1067 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1068
1069Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1070
1071 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1072
1073Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1074
1075 Move all global state data into opcode table struct, and treat
1076 opcode table as something that is "opened/closed".
1077 * cgen.h (CGEN_OPCODE_DESC): New type.
1078 (all fns): New first arg of opcode table descriptor.
1079 (cgen_set_parse_operand_fn): Add prototype.
1080 (cgen_current_machine,cgen_current_endian): Delete.
1081 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1082 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1083 dis_hash_table,dis_hash_table_entries.
1084 (opcode_open,opcode_close): Add prototypes.
1085
1086 * cgen.h (cgen_insn): New element `cdx'.
1087
1088Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1089
1090 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1091
1092Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1093
1094 * mn10300.h: Add "no_match_operands" field for instructions.
1095 (MN10300_MAX_OPERANDS): Define.
1096
1097Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1098
1099 * cgen.h (cgen_macro_insn_count): Declare.
1100
1101Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1102
1103 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1104 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1105 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1106 set_{int,vma}_operand.
1107
1108Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1109
1110 * mn10300.h: Add "machine" field for instructions.
1111 (MN103, AM30): Define machine types.
d83c6548 1112
252b5132
RH
1113Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1114
1115 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1116
11171998-06-18 Ulrich Drepper <drepper@cygnus.com>
1118
1119 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1120
1121Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1122
1123 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1124 and ud2b.
1125 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1126 those that happen to be implemented on pentiums.
1127
1128Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1129
1130 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1131 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1132 with Size16|IgnoreSize or Size32|IgnoreSize.
1133
1134Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1135
1136 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1137 (REPE): Rename to REPE_PREFIX_OPCODE.
1138 (i386_regtab_end): Remove.
1139 (i386_prefixtab, i386_prefixtab_end): Remove.
1140 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1141 of md_begin.
1142 (MAX_OPCODE_SIZE): Define.
1143 (i386_optab_end): Remove.
1144 (sl_Suf): Define.
1145 (sl_FP): Use sl_Suf.
1146
1147 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1148 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1149 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1150 data32, dword, and adword prefixes.
1151 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1152 regs.
1153
1154Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1155
1156 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1157
1158 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1159 register operands, because this is a common idiom. Flag them with
1160 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1161 fdivrp because gcc erroneously generates them. Also flag with a
1162 warning.
1163
1164 * i386.h: Add suffix modifiers to most insns, and tighter operand
1165 checks in some cases. Fix a number of UnixWare compatibility
1166 issues with float insns. Merge some floating point opcodes, using
1167 new FloatMF modifier.
1168 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1169 consistency.
1170
1171 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1172 IgnoreDataSize where appropriate.
1173
1174Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1175
1176 * i386.h: (one_byte_segment_defaults): Remove.
1177 (two_byte_segment_defaults): Remove.
1178 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1179
1180Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1181
1182 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1183 (cgen_hw_lookup_by_num): Declare.
1184
1185Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1186
1187 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1188 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1189
1190Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1191
1192 * cgen.h (cgen_asm_init_parse): Delete.
1193 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1194 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1195
1196Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1197
1198 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1199 (cgen_asm_finish_insn): Update prototype.
1200 (cgen_insn): New members num, data.
1201 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1202 dis_hash, dis_hash_table_size moved to ...
1203 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1204 All uses updated. New members asm_hash_p, dis_hash_p.
1205 (CGEN_MINSN_EXPANSION): New struct.
1206 (cgen_expand_macro_insn): Declare.
1207 (cgen_macro_insn_count): Declare.
1208 (get_insn_operands): Update prototype.
1209 (lookup_get_insn_operands): Declare.
1210
1211Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1212
1213 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1214 regKludge. Add operands types for string instructions.
1215
1216Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1217
1218 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1219 table.
1220
1221Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1222
1223 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1224 for `gettext'.
1225
1226Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1227
1228 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1229 Add IsString flag to string instructions.
1230 (IS_STRING): Don't define.
1231 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1232 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1233 (SS_PREFIX_OPCODE): Define.
1234
1235Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1236
1237 * i386.h: Revert March 24 patch; no more LinearAddress.
1238
1239Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1240
1241 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1242 instructions, and instead add FWait opcode modifier. Add short
1243 form of fldenv and fstenv.
1244 (FWAIT_OPCODE): Define.
1245
1246 * i386.h (i386_optab): Change second operand constraint of `mov
1247 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1248 allow legal instructions such as `movl %gs,%esi'
1249
1250Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1251
1252 * h8300.h: Various changes to fully bracket initializers.
1253
1254Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1255
1256 * i386.h: Set LinearAddress for lidt and lgdt.
1257
1258Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1259
1260 * cgen.h (CGEN_BOOL_ATTR): New macro.
1261
1262Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1263
1264 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1265
1266Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1267
1268 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1269 (cgen_insn): Record syntax and format entries here, rather than
1270 separately.
1271
1272Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1273
1274 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1275
1276Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1277
1278 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1279 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1280 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1281
1282Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1283
1284 * cgen.h (lookup_insn): New argument alias_p.
1285
1286Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1287
1288Fix rac to accept only a0:
1289 * d10v.h (OPERAND_ACC): Split into:
1290 (OPERAND_ACC0, OPERAND_ACC1) .
1291 (OPERAND_GPR): Define.
1292
1293Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1294
1295 * cgen.h (CGEN_FIELDS): Define here.
1296 (CGEN_HW_ENTRY): New member `type'.
1297 (hw_list): Delete decl.
1298 (enum cgen_mode): Declare.
1299 (CGEN_OPERAND): New member `hw'.
1300 (enum cgen_operand_instance_type): Declare.
1301 (CGEN_OPERAND_INSTANCE): New type.
1302 (CGEN_INSN): New member `operands'.
1303 (CGEN_OPCODE_DATA): Make hw_list const.
1304 (get_insn_operands,lookup_insn): Add prototypes for.
1305
1306Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1307
1308 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1309 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1310 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1311 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1312
1313Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1314
1315 * cgen.h: Correct typo in comment end marker.
1316
1317Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1318
1319 * tic30.h: New file.
1320
5a109b67 1321Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1322
1323 * cgen.h: Add prototypes for cgen_save_fixups(),
1324 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1325 of cgen_asm_finish_insn() to return a char *.
1326
1327Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1328
1329 * cgen.h: Formatting changes to improve readability.
1330
1331Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1332
1333 * cgen.h (*): Clean up pass over `struct foo' usage.
1334 (CGEN_ATTR): Make unsigned char.
1335 (CGEN_ATTR_TYPE): Update.
1336 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1337 (cgen_base): Move member `attrs' to cgen_insn.
1338 (CGEN_KEYWORD): New member `null_entry'.
1339 (CGEN_{SYNTAX,FORMAT}): New types.
1340 (cgen_insn): Format and syntax separated from each other.
1341
1342Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1343
1344 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1345 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1346 flags_{used,set} long.
1347 (d30v_operand): Make flags field long.
1348
1349Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1350
1351 * m68k.h: Fix comment describing operand types.
1352
1353Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1354
1355 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1356 everything else after down.
1357
1358Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1359
1360 * d10v.h (OPERAND_FLAG): Split into:
1361 (OPERAND_FFLAG, OPERAND_CFLAG) .
1362
1363Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1364
1365 * mips.h (struct mips_opcode): Changed comments to reflect new
1366 field usage.
1367
1368Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1369
1370 * mips.h: Added to comments a quick-ref list of all assigned
1371 operand type characters.
1372 (OP_{MASK,SH}_PERFREG): New macros.
1373
1374Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1375
1376 * sparc.h: Add '_' and '/' for v9a asr's.
1377 Patch from David Miller <davem@vger.rutgers.edu>
1378
1379Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1380
1381 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1382 area are not available in the base model (H8/300).
1383
1384Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1385
1386 * m68k.h: Remove documentation of ` operand specifier.
1387
1388Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1389
1390 * m68k.h: Document q and v operand specifiers.
1391
1392Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1393
1394 * v850.h (struct v850_opcode): Add processors field.
1395 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1396 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1397 (PROCESSOR_V850EA): New bit constants.
1398
1399Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1400
1401 Merge changes from Martin Hunt:
1402
1403 * d30v.h: Allow up to 64 control registers. Add
1404 SHORT_A5S format.
1405
1406 * d30v.h (LONG_Db): New form for delayed branches.
1407
1408 * d30v.h: (LONG_Db): New form for repeati.
1409
1410 * d30v.h (SHORT_D2B): New form.
1411
1412 * d30v.h (SHORT_A2): New form.
1413
1414 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1415 registers are used. Needed for VLIW optimization.
1416
1417Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1418
1419 * cgen.h: Move assembler interface section
1420 up so cgen_parse_operand_result is defined for cgen_parse_address.
1421 (cgen_parse_address): Update prototype.
1422
1423Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1424
1425 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1426
1427Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1428
1429 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1430 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1431 <paubert@iram.es>.
1432
1433 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1434 <paubert@iram.es>.
1435
1436 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1437 <paubert@iram.es>.
1438
1439 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1440 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1441
1442Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1443
1444 * v850.h (V850_NOT_R0): New flag.
1445
1446Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1447
1448 * v850.h (struct v850_opcode): Remove flags field.
1449
1450Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1451
1452 * v850.h (struct v850_opcode): Add flags field.
1453 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1454 fields.
1455 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1456 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1457
1458Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1459
1460 * arc.h: New file.
1461
1462Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1463
1464 * sparc.h (sparc_opcodes): Declare as const.
1465
1466Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1467
1468 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1469 uses single or double precision floating point resources.
1470 (INSN_NO_ISA, INSN_ISA1): Define.
1471 (cpu specific INSN macros): Tweak into bitmasks outside the range
1472 of INSN_ISA field.
1473
1474Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1475
1476 * i386.h: Fix pand opcode.
1477
1478Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1479
1480 * mips.h: Widen INSN_ISA and move it to a more convenient
1481 bit position. Add INSN_3900.
1482
1483Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1484
1485 * mips.h (struct mips_opcode): added new field membership.
1486
1487Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1488
1489 * i386.h (movd): only Reg32 is allowed.
1490
1491 * i386.h: add fcomp and ud2. From Wayne Scott
1492 <wscott@ichips.intel.com>.
1493
1494Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1495
1496 * i386.h: Add MMX instructions.
1497
1498Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1499
1500 * i386.h: Remove W modifier from conditional move instructions.
1501
1502Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1503
1504 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1505 with no arguments to match that generated by the UnixWare
1506 assembler.
1507
1508Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1509
1510 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1511 (cgen_parse_operand_fn): Declare.
1512 (cgen_init_parse_operand): Declare.
1513 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1514 new argument `want'.
1515 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1516 (enum cgen_parse_operand_type): New enum.
1517
1518Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1519
1520 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1521
1522Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1523
1524 * cgen.h: New file.
1525
1526Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1527
1528 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1529 fdivrp.
1530
1531Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1532
1533 * v850.h (extract): Make unsigned.
1534
1535Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1536
1537 * i386.h: Add iclr.
1538
1539Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1540
1541 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1542 take a direction bit.
1543
1544Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1545
1546 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1547
1548Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1549
1550 * sparc.h: Include <ansidecl.h>. Update function declarations to
1551 use prototypes, and to use const when appropriate.
1552
1553Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1554
1555 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1556
1557Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1558
1559 * d10v.h: Change pre_defined_registers to
1560 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1561
1562Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1563
1564 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1565 Change mips_opcodes from const array to a pointer,
1566 and change bfd_mips_num_opcodes from const int to int,
1567 so that we can increase the size of the mips opcodes table
1568 dynamically.
1569
1570Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1571
1572 * d30v.h (FLAG_X): Remove unused flag.
1573
1574Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1575
1576 * d30v.h: New file.
1577
1578Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1579
1580 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1581 (PDS_VALUE): Macro to access value field of predefined symbols.
1582 (tic80_next_predefined_symbol): Add prototype.
1583
1584Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1585
1586 * tic80.h (tic80_symbol_to_value): Change prototype to match
1587 change in function, added class parameter.
1588
1589Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1590
1591 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1592 endmask fields, which are somewhat weird in that 0 and 32 are
1593 treated exactly the same.
1594
1595Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1596
1597 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1598 rather than a constant that is 2**X. Reorder them to put bits for
1599 operands that have symbolic names in the upper bits, so they can
1600 be packed into an int where the lower bits contain the value that
1601 corresponds to that symbolic name.
1602 (predefined_symbo): Add struct.
1603 (tic80_predefined_symbols): Declare array of translations.
1604 (tic80_num_predefined_symbols): Declare size of that array.
1605 (tic80_value_to_symbol): Declare function.
1606 (tic80_symbol_to_value): Declare function.
1607
1608Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1609
1610 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1611
1612Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1613
1614 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1615 be the destination register.
1616
1617Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1618
1619 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1620 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1621 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1622 that the opcode can have two vector instructions in a single
1623 32 bit word and we have to encode/decode both.
1624
1625Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1626
1627 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1628 TIC80_OPERAND_RELATIVE for PC relative.
1629 (TIC80_OPERAND_BASEREL): New flag bit for register
1630 base relative.
1631
1632Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1633
1634 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1635
1636Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1637
1638 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1639 ":s" modifier for scaling.
1640
1641Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1642
1643 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1644 (TIC80_OPERAND_M_LI): Ditto
1645
1646Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1647
1648 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1649 (TIC80_OPERAND_CC): New define for condition code operand.
1650 (TIC80_OPERAND_CR): New define for control register operand.
1651
1652Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1653
1654 * tic80.h (struct tic80_opcode): Name changed.
1655 (struct tic80_opcode): Remove format field.
1656 (struct tic80_operand): Add insertion and extraction functions.
1657 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1658 correct ones.
1659 (FMT_*): Ditto.
1660
1661Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1662
1663 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1664 type IV instruction offsets.
1665
1666Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1667
1668 * tic80.h: New file.
1669
1670Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1671
1672 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1673
1674Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1675
1676 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1677 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1678 * v850.h: Fix comment, v850_operand not powerpc_operand.
1679
1680Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1681
1682 * mn10200.h: Flesh out structures and definitions needed by
1683 the mn10200 assembler & disassembler.
1684
1685Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1686
1687 * mips.h: Add mips16 definitions.
1688
1689Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1690
1691 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1692
1693Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1694
1695 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1696 (MN10300_OPERAND_MEMADDR): Define.
1697
1698Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1699
1700 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1701
1702Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1703
1704 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1705
1706Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1707
1708 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1709
1710Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1711
1712 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1713
1714Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1715
1716 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1717 negative to minimize problems with shared libraries. Organize
1718 instruction subsets by AMASK extensions and PALcode
1719 implementation.
252b5132
RH
1720 (struct alpha_operand): Move flags slot for better packing.
1721
1722Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1723
1724 * v850.h (V850_OPERAND_RELAX): New operand flag.
1725
1726Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1727
1728 * mn10300.h (FMT_*): Move operand format definitions
1729 here.
1730
1731Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1732
1733 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1734
1735Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1736
1737 * mn10300.h (mn10300_opcode): Add "format" field.
1738 (MN10300_OPERAND_*): Define.
1739
1740Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1741
1742 * mn10x00.h: Delete.
1743 * mn10200.h, mn10300.h: New files.
1744
1745Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1746
1747 * mn10x00.h: New file.
1748
1749Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1750
1751 * v850.h: Add new flag to indicate this instruction uses a PC
1752 displacement.
1753
1754Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1755
1756 * h8300.h (stmac): Add missing instruction.
1757
1758Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1759
1760 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1761 field.
1762
1763Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1764
1765 * v850.h (V850_OPERAND_EP): Define.
1766
1767 * v850.h (v850_opcode): Add size field.
1768
1769Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1770
1771 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1772 to functions used to handle unusual operand encoding.
252b5132 1773 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1774 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1775
1776Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1777
1778 * v850.h (v850_operands): Add flags field.
1779 (OPERAND_REG, OPERAND_NUM): Defined.
1780
1781Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1782
1783 * v850.h: New file.
1784
1785Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1786
1787 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1788 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1789 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1790 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1791 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1792 Defined.
252b5132
RH
1793
1794Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1795
1796 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1797 a 3 bit space id instead of a 2 bit space id.
1798
1799Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1800
1801 * d10v.h: Add some additional defines to support the
d83c6548 1802 assembler in determining which operations can be done in parallel.
252b5132
RH
1803
1804Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1805
1806 * h8300.h (SN): Define.
1807 (eepmov.b): Renamed from "eepmov"
1808 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1809 with them.
1810
1811Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1812
1813 * d10v.h (OPERAND_SHIFT): New operand flag.
1814
1815Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1816
1817 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1818 signed numbers.
252b5132
RH
1819
1820Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1821
1822 * d10v.h (pd_reg): Define. Putting the definition here allows
1823 the assembler and disassembler to share the same struct.
1824
1825Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1826
1827 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1828 Williams <steve@icarus.com>.
1829
1830Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1831
1832 * d10v.h: New file.
1833
1834Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1835
1836 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1837
1838Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1839
d83c6548 1840 * m68k.h (mcf5200): New macro.
252b5132
RH
1841 Document names of coldfire control registers.
1842
1843Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1844
1845 * h8300.h (SRC_IN_DST): Define.
1846
1847 * h8300.h (UNOP3): Mark the register operand in this insn
1848 as a source operand, not a destination operand.
1849 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1850 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1851 register operand with SRC_IN_DST.
1852
1853Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1854
1855 * alpha.h: New file.
1856
1857Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1858
1859 * rs6k.h: Remove obsolete file.
1860
1861Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1862
1863 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1864 fdivp, and fdivrp. Add ffreep.
1865
1866Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1867
1868 * h8300.h: Reorder various #defines for readability.
1869 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1870 (BITOP): Accept additional (unused) argument. All callers changed.
1871 (EBITOP): Likewise.
1872 (O_LAST): Bump.
1873 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1874
1875 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1876 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1877 (BITOP, EBITOP): Handle new H8/S addressing modes for
1878 bit insns.
1879 (UNOP3): Handle new shift/rotate insns on the H8/S.
1880 (insns using exr): New instructions.
1881 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1882
1883Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1884
1885 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1886 was incorrect.
1887
1888Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1889
1890 * h8300.h (START): Remove.
1891 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1892 and mov.l insns that can be relaxed.
1893
1894Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1895
1896 * i386.h: Remove Abs32 from lcall.
1897
1898Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1899
1900 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1901 (SLCPOP): New macro.
1902 Mark X,Y opcode letters as in use.
1903
1904Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1905
1906 * sparc.h (F_FLOAT, F_FBR): Define.
1907
1908Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1909
1910 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1911 from all insns.
1912 (ABS8SRC,ABS8DST): Add ABS8MEM.
1913 (add.l): Fix reg+reg variant.
1914 (eepmov.w): Renamed from eepmovw.
1915 (ldc,stc): Fix many cases.
1916
1917Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1918
1919 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1920
1921Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1922
1923 * sparc.h (O): Mark operand letter as in use.
1924
1925Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1926
1927 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1928 Mark operand letters uU as in use.
1929
1930Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1931
1932 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1933 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1934 (SPARC_OPCODE_SUPPORTED): New macro.
1935 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1936 (F_NOTV9): Delete.
1937
1938Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1939
1940 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1941 declaration consistent with return type in definition.
1942
1943Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1944
1945 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1946
1947Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1948
1949 * i386.h (i386_regtab): Add 80486 test registers.
1950
1951Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1952
1953 * i960.h (I_HX): Define.
1954 (i960_opcodes): Add HX instruction.
1955
1956Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1957
1958 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1959 and fclex.
1960
1961Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1962
1963 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1964 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1965 (bfd_* defines): Delete.
1966 (sparc_opcode_archs): Replaces architecture_pname.
1967 (sparc_opcode_lookup_arch): Declare.
1968 (NUMOPCODES): Delete.
1969
1970Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1971
1972 * sparc.h (enum sparc_architecture): Add v9a.
1973 (ARCHITECTURES_CONFLICT_P): Update.
1974
1975Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1976
1977 * i386.h: Added Pentium Pro instructions.
1978
1979Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1980
1981 * m68k.h: Document new 'W' operand place.
1982
1983Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1984
1985 * hppa.h: Add lci and syncdma instructions.
1986
1987Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1988
1989 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1990 instructions.
252b5132
RH
1991
1992Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1993
1994 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1995 assembler's -mcom and -many switches.
1996
1997Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1998
1999 * i386.h: Fix cmpxchg8b extension opcode description.
2000
2001Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2002
2003 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2004 and register cr4.
2005
2006Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2007
2008 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2009
2010Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2011
2012 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2013
2014Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2015
2016 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2017
2018Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2019
2020 * m68kmri.h: Remove.
2021
2022 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2023 declarations. Remove F_ALIAS and flag field of struct
2024 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2025 int. Make name and args fields of struct m68k_opcode const.
2026
2027Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2028
2029 * sparc.h (F_NOTV9): Define.
2030
2031Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2032
2033 * mips.h (INSN_4010): Define.
2034
2035Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2036
2037 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2038
2039 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2040 * m68k.h: Fix argument descriptions of coprocessor
2041 instructions to allow only alterable operands where appropriate.
2042 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2043 (m68k_opcode_aliases): Add more aliases.
2044
2045Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2046
2047 * m68k.h: Added explcitly short-sized conditional branches, and a
2048 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2049 svr4-based configurations.
2050
2051Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2052
2053 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2054 * i386.h: added missing Data16/Data32 flags to a few instructions.
2055
2056Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2057
2058 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2059 (OP_MASK_BCC, OP_SH_BCC): Define.
2060 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2061 (OP_MASK_CCC, OP_SH_CCC): Define.
2062 (INSN_READ_FPR_R): Define.
2063 (INSN_RFE): Delete.
2064
2065Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2066
2067 * m68k.h (enum m68k_architecture): Deleted.
2068 (struct m68k_opcode_alias): New type.
2069 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2070 matching constraints, values and flags. As a side effect of this,
2071 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2072 as I know were never used, now may need re-examining.
2073 (numopcodes): Now const.
2074 (m68k_opcode_aliases, numaliases): New variables.
2075 (endop): Deleted.
2076 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2077 m68k_opcode_aliases; update declaration of m68k_opcodes.
2078
2079Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2080
2081 * hppa.h (delay_type): Delete unused enumeration.
2082 (pa_opcode): Replace unused delayed field with an architecture
2083 field.
2084 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2085
2086Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2087
2088 * mips.h (INSN_ISA4): Define.
2089
2090Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2091
2092 * mips.h (M_DLA_AB, M_DLI): Define.
2093
2094Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2095
2096 * hppa.h (fstwx): Fix single-bit error.
2097
2098Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2099
2100 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2101
2102Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2103
2104 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2105 debug registers. From Charles Hannum (mycroft@netbsd.org).
2106
2107Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2108
2109 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2110 i386 support:
2111 * i386.h (MOV_AX_DISP32): New macro.
2112 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2113 of several call/return instructions.
2114 (ADDR_PREFIX_OPCODE): New macro.
2115
2116Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2117
2118 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2119
4f1d9bd8
NC
2120 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2121 char.
252b5132
RH
2122 (struct vot, field `name'): ditto.
2123
2124Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2125
2126 * vax.h: Supply and properly group all values in end sentinel.
2127
2128Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2129
2130 * mips.h (INSN_ISA, INSN_4650): Define.
2131
2132Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2133
2134 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2135 systems with a separate instruction and data cache, such as the
2136 29040, these instructions take an optional argument.
2137
2138Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2139
2140 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2141 INSN_TRAP.
2142
2143Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2144
2145 * mips.h (INSN_STORE_MEMORY): Define.
2146
2147Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2148
2149 * sparc.h: Document new operand type 'x'.
2150
2151Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2152
2153 * i960.h (I_CX2): New instruction category. It includes
2154 instructions available on Cx and Jx processors.
2155 (I_JX): New instruction category, for JX-only instructions.
2156 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2157 Jx-only instructions, in I_JX category.
2158
2159Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2160
2161 * ns32k.h (endop): Made pointer const too.
2162
2163Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2164
2165 * ns32k.h: Drop Q operand type as there is no correct use
2166 for it. Add I and Z operand types which allow better checking.
2167
2168Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2169
2170 * h8300.h (xor.l) :fix bit pattern.
2171 (L_2): New size of operand.
2172 (trapa): Use it.
2173
2174Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2175
2176 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2177
2178Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2179
2180 * sparc.h: Include v9 definitions.
2181
2182Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2183
2184 * m68k.h (m68060): Defined.
2185 (m68040up, mfloat, mmmu): Include it.
2186 (struct m68k_opcode): Widen `arch' field.
2187 (m68k_opcodes): Updated for M68060. Removed comments that were
2188 instructions commented out by "JF" years ago.
2189
2190Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2191
2192 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2193 add a one-bit `flags' field.
2194 (F_ALIAS): New macro.
2195
2196Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2197
2198 * h8300.h (dec, inc): Get encoding right.
2199
2200Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2201
2202 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2203 a flag instead.
2204 (PPC_OPERAND_SIGNED): Define.
2205 (PPC_OPERAND_SIGNOPT): Define.
2206
2207Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2208
2209 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2210 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2211
2212Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2213
2214 * i386.h: Reverse last change. It'll be handled in gas instead.
2215
2216Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2217
2218 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2219 slower on the 486 and used the implicit shift count despite the
2220 explicit operand. The one-operand form is still available to get
2221 the shorter form with the implicit shift count.
2222
2223Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2224
2225 * hppa.h: Fix typo in fstws arg string.
2226
2227Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2228
2229 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2230
2231Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2232
2233 * ppc.h (PPC_OPCODE_601): Define.
2234
2235Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2236
2237 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2238 (so we can determine valid completers for both addb and addb[tf].)
2239
2240 * hppa.h (xmpyu): No floating point format specifier for the
2241 xmpyu instruction.
2242
2243Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2244
2245 * ppc.h (PPC_OPERAND_NEXT): Define.
2246 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2247 (struct powerpc_macro): Define.
2248 (powerpc_macros, powerpc_num_macros): Declare.
2249
2250Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2251
2252 * ppc.h: New file. Header file for PowerPC opcode table.
2253
2254Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2255
2256 * hppa.h: More minor template fixes for sfu and copr (to allow
2257 for easier disassembly).
2258
2259 * hppa.h: Fix templates for all the sfu and copr instructions.
2260
2261Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2262
2263 * i386.h (push): Permit Imm16 operand too.
2264
2265Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2266
2267 * h8300.h (andc): Exists in base arch.
2268
2269Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2270
2271 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2272 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2273
2274Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2275
2276 * hppa.h: Add FP quadword store instructions.
2277
2278Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2279
2280 * mips.h: (M_J_A): Added.
2281 (M_LA): Removed.
2282
2283Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2284
2285 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2286 <mellon@pepper.ncd.com>.
2287
2288Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2289
2290 * hppa.h: Immediate field in probei instructions is unsigned,
2291 not low-sign extended.
2292
2293Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2294
2295 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2296
2297Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2298
2299 * i386.h: Add "fxch" without operand.
2300
2301Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2302
2303 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2304
2305Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2306
2307 * hppa.h: Add gfw and gfr to the opcode table.
2308
2309Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2310
2311 * m88k.h: extended to handle m88110.
2312
2313Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2314
2315 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2316 addresses.
2317
2318Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2319
2320 * i960.h (i960_opcodes): Properly bracket initializers.
2321
2322Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2323
2324 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2325
2326Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2327
2328 * m68k.h (two): Protect second argument with parentheses.
2329
2330Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2331
2332 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2333 Deleted old in/out instructions in "#if 0" section.
2334
2335Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2336
2337 * i386.h (i386_optab): Properly bracket initializers.
2338
2339Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2340
2341 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2342 Jeff Law, law@cs.utah.edu).
2343
2344Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2345
2346 * i386.h (lcall): Accept Imm32 operand also.
2347
2348Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2349
2350 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2351 (M_DABS): Added.
2352
2353Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2354
2355 * mips.h (INSN_*): Changed values. Removed unused definitions.
2356 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2357 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2358 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2359 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2360 (M_*): Added new values for r6000 and r4000 macros.
2361 (ANY_DELAY): Removed.
2362
2363Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2364
2365 * mips.h: Added M_LI_S and M_LI_SS.
2366
2367Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2368
2369 * h8300.h: Get some rare mov.bs correct.
2370
2371Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2372
2373 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2374 been included.
2375
2376Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2377
2378 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2379 jump instructions, for use in disassemblers.
2380
2381Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2382
2383 * m88k.h: Make bitfields just unsigned, not unsigned long or
2384 unsigned short.
2385
2386Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2387
2388 * hppa.h: New argument type 'y'. Use in various float instructions.
2389
2390Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2391
2392 * hppa.h (break): First immediate field is unsigned.
2393
2394 * hppa.h: Add rfir instruction.
2395
2396Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2397
2398 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2399
2400Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2401
2402 * mips.h: Reworked the hazard information somewhat, and fixed some
2403 bugs in the instruction hazard descriptions.
2404
2405Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2406
2407 * m88k.h: Corrected a couple of opcodes.
2408
2409Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2410
2411 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2412 new version includes instruction hazard information, but is
2413 otherwise reasonably similar.
2414
2415Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2416
2417 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2418
2419Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2420
2421 Patches from Jeff Law, law@cs.utah.edu:
2422 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2423 Make the tables be the same for the following instructions:
2424 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2425 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2426 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2427 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2428 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2429 "fcmp", and "ftest".
2430
2431 * hppa.h: Make new and old tables the same for "break", "mtctl",
2432 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2433 Fix typo in last patch. Collapse several #ifdefs into a
2434 single #ifdef.
2435
2436 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2437 of the comments up-to-date.
2438
2439 * hppa.h: Update "free list" of letters and update
2440 comments describing each letter's function.
2441
4f1d9bd8
NC
2442Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2443
2444 * h8300.h: Lots of little fixes for the h8/300h.
2445
2446Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2447
2448 Support for H8/300-H
2449 * h8300.h: Lots of new opcodes.
2450
252b5132
RH
2451Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2452
2453 * h8300.h: checkpoint, includes H8/300-H opcodes.
2454
2455Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2456
2457 * Patches from Jeffrey Law <law@cs.utah.edu>.
2458 * hppa.h: Rework single precision FP
2459 instructions so that they correctly disassemble code
2460 PA1.1 code.
2461
2462Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2463
2464 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2465 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2466
2467Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2468
2469 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2470 gdb will define it for now.
2471
2472Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2473
2474 * sparc.h: Don't end enumerator list with comma.
2475
2476Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2477
2478 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2479 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2480 ("bc2t"): Correct typo.
2481 ("[ls]wc[023]"): Use T rather than t.
2482 ("c[0123]"): Define general coprocessor instructions.
2483
2484Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2485
2486 * m68k.h: Move split point for gcc compilation more towards
2487 middle.
2488
2489Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2490
2491 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2492 simply wrong, ics, rfi, & rfsvc were missing).
2493 Add "a" to opr_ext for "bb". Doc fix.
2494
2495Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2496
2497 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2498 * mips.h: Add casts, to suppress warnings about shifting too much.
2499 * m68k.h: Document the placement code '9'.
2500
2501Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2502
2503 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2504 allows callers to break up the large initialized struct full of
2505 opcodes into two half-sized ones. This permits GCC to compile
2506 this module, since it takes exponential space for initializers.
2507 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2508
2509Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2510
2511 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2512 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2513 initialized structs in it.
2514
2515Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2516
2517 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2518 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2519 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2520
2521Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2522
2523 * mips.h: document "i" and "j" operands correctly.
2524
2525Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2526
2527 * mips.h: Removed endianness dependency.
2528
2529Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2530
2531 * h8300.h: include info on number of cycles per instruction.
2532
2533Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2534
2535 * hppa.h: Move handy aliases to the front. Fix masks for extract
2536 and deposit instructions.
2537
2538Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2539
2540 * i386.h: accept shld and shrd both with and without the shift
2541 count argument, which is always %cl.
2542
2543Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2544
2545 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2546 (one_byte_segment_defaults, two_byte_segment_defaults,
2547 i386_prefixtab_end): Ditto.
2548
2549Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2550
2551 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2552 for operand 2; from John Carr, jfc@dsg.dec.com.
2553
2554Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2555
2556 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2557 always use 16-bit offsets. Makes calculated-size jump tables
2558 feasible.
2559
2560Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2561
2562 * i386.h: Fix one-operand forms of in* and out* patterns.
2563
2564Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2565
2566 * m68k.h: Added CPU32 support.
2567
2568Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2569
2570 * mips.h (break): Disassemble the argument. Patch from
2571 jonathan@cs.stanford.edu (Jonathan Stone).
2572
2573Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2574
2575 * m68k.h: merged Motorola and MIT syntax.
2576
2577Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2578
2579 * m68k.h (pmove): make the tests less strict, the 68k book is
2580 wrong.
2581
2582Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2583
2584 * m68k.h (m68ec030): Defined as alias for 68030.
2585 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2586 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2587 them. Tightened description of "fmovex" to distinguish it from
2588 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2589 up descriptions that claimed versions were available for chips not
2590 supporting them. Added "pmovefd".
2591
2592Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2593
2594 * m68k.h: fix where the . goes in divull
2595
2596Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2597
2598 * m68k.h: the cas2 instruction is supposed to be written with
2599 indirection on the last two operands, which can be either data or
2600 address registers. Added a new operand type 'r' which accepts
2601 either register type. Added new cases for cas2l and cas2w which
2602 use them. Corrected masks for cas2 which failed to recognize use
2603 of address register.
2604
2605Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2606
2607 * m68k.h: Merged in patches (mostly m68040-specific) from
2608 Colin Smith <colin@wrs.com>.
2609
2610 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2611 base). Also cleaned up duplicates, re-ordered instructions for
2612 the sake of dis-assembling (so aliases come after standard names).
2613 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2614
2615Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2616
2617 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2618 all missing .s
2619
2620Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2621
2622 * sparc.h: Moved tables to BFD library.
2623
2624 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2625
2626Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2627
2628 * h8300.h: Finish filling in all the holes in the opcode table,
2629 so that the Lucid C compiler can digest this as well...
2630
2631Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2632
2633 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2634 Fix opcodes on various sizes of fild/fist instructions
2635 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2636 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2637
2638Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2639
2640 * h8300.h: Fill in all the holes in the opcode table so that the
2641 losing HPUX C compiler can digest this...
2642
2643Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2644
2645 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2646 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2647
2648Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2649
2650 * sparc.h: Add new architecture variant sparclite; add its scan
2651 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2652
2653Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2654
2655 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2656 fy@lucid.com).
2657
2658Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2659
2660 * rs6k.h: New version from IBM (Metin).
2661
2662Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2663
2664 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2665 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2666
2667Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2668
2669 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2670
2671Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2672
2673 * m68k.h (one, two): Cast macro args to unsigned to suppress
2674 complaints from compiler and lint about integer overflow during
2675 shift.
2676
2677Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2678
2679 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2680
2681Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2682
2683 * mips.h: Make bitfield layout depend on the HOST compiler,
2684 not on the TARGET system.
2685
2686Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2687
2688 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2689 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2690 <TRANLE@INTELLICORP.COM>.
2691
2692Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2693
2694 * h8300.h: turned op_type enum into #define list
2695
2696Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2697
2698 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2699 similar instructions -- they've been renamed to "fitoq", etc.
2700 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2701 number of arguments.
2702 * h8300.h: Remove extra ; which produces compiler warning.
2703
2704Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2705
2706 * sparc.h: fix opcode for tsubcctv.
2707
2708Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2709
2710 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2711
2712Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2713
2714 * sparc.h (nop): Made the 'lose' field be even tighter,
2715 so only a standard 'nop' is disassembled as a nop.
2716
2717Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2718
2719 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2720 disassembled as a nop.
2721
4f1d9bd8
NC
2722Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2723
2724 * m68k.h, sparc.h: ANSIfy enums.
2725
252b5132
RH
2726Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2727
2728 * sparc.h: fix a typo.
2729
2730Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2731
2732 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2733 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2734 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2735
2736\f
2737Local Variables:
2738version-control: never
2739End: