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[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
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4372b673
NC		 12000-12-01 Chris Demetriou <cgd@sibyte.com>
2
3 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
4 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
5 OP_*_SYSCALL definitions.
6 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
7 19 bit wait codes.
8 (MIPS operand specifier comments): Remove 'm', add 'U' and
9 'J', and update the meaning of 'B' so that it's more general.
10
e7af610e
NC		 11 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
12 INSN_ISA5): Renumber, redefine to mean the ISA at which the
13 instruction was added.
14 (INSN_ISA32): New constant.
15 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
16 Renumber to avoid new and/or renumbered INSN_* constants.
17 (INSN_MIPS32): Delete.
18 (ISA_UNKNOWN): New constant to indicate unknown ISA.
19 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
20 ISA_MIPS32): New constants, defined to be the mask of INSN_*
21 constants available at that ISA level.
22 (CPU_UNKNOWN): New constant to indicate unknown CPU.
23 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
24 define it with a unique value.
25 (OPCODE_IS_MEMBER): Update for new ISA membership-related
26 constant meanings.
27
84ea6cf2
NC		 28 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
29 definitions.
30
c6c98b38
NC		 31 * mips.h (CPU_SB1): New constant.
32
19f7b010
JJ		 332000-10-20 Jakub Jelinek <jakub@redhat.com>
34
35 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
36 Note that '3' is used for siam operand.
37
139368c9
JW		 382000-09-22 Jim Wilson <wilson@cygnus.com>
39
40 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
41
156c2f8b
NC		 422000-09-13 Anders Norlander <anorland@acc.umu.se>
43
44 * mips.h: Use defines instead of hard-coded processor numbers.
45 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
46 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
47 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
48 CPU_4KC, CPU_4KM, CPU_4KP): Define..
49 (OPCODE_IS_MEMBER): Use new defines.
50 (OP_MASK_SEL, OP_SH_SEL): Define.
51 (OP_MASK_CODE20, OP_SH_CODE20): Define.
52 Add 'P' to used characters.
53 Use 'H' for coprocessor select field.
54 Use 'm' for 20 bit breakpoint code.
55 Document new arg characters and add to used characters.
56 (INSN_MIPS32): New define for MIPS32 extensions.
57 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
58
3c5ce02e
AM		 592000-09-05 Alan Modra <alan@linuxcare.com.au>
60
61 * hppa.h: Mention cz completer.
62
50b81f19
JW		 632000-08-16 Jim Wilson <wilson@cygnus.com>
64
65 * ia64.h (IA64_OPCODE_POSTINC): New.
66
fc29466d
L		 672000-08-15 H.J. Lu <hjl@gnu.org>
68
69 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
70 IgnoreSize change.
71
45ee1401
DC		 722000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
73
74 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
75 Move related opcodes closer to each other.
76 Minor changes in comments, list undefined opcodes.
77
9d551405
DB		 782000-07-26 Dave Brolley <brolley@redhat.com>
79
80 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
81
c8488617
HPN		 822000-07-20 Hans-Peter Nilsson <hp@axis.com>
83
84 cris.h: New file.
85
65aa24b6
NC		 862000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
87
88 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
89 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
90 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
91 (AVR_ISA_M83): Define for ATmega83, ATmega85.
92 (espm): Remove, because ESPM removed in databook update.
93 (eicall, eijmp): Move to the end of opcode table.
94
60bcf0fa
NC		 952000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
96
97 * m68hc11.h: New file for support of Motorola 68hc11.
98
60a2978a
DC		 99Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
100
101 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
102
68ab2dd9
DC		 103Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
104
105 * avr.h: New file with AVR opcodes.
106
f0662e27
DL		 107Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
108
109 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
110
b722f2be
AM		 1112000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
112
113 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
114
f9e0cf0b
AM		 1152000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
116
117 * i386.h: Use sl_FP, not sl_Suf for fild.
118
f660ee8b
FCE		 1192000-05-16 Frank Ch. Eigler <fche@redhat.com>
120
121 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
122 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
123 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
124 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
125
558b0a60
AM		 1262000-05-13 Alan Modra <alan@linuxcare.com.au>,
127
128 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
129
e413e4e9
AM		 1302000-05-13 Alan Modra <alan@linuxcare.com.au>,
131 Alexander Sokolov <robocop@netlink.ru>
132
133 * i386.h (i386_optab): Add cpu_flags for all instructions.
134
1352000-05-13 Alan Modra <alan@linuxcare.com.au>
136
137 From Gavin Romig-Koch <gavin@cygnus.com>
138 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
139
5c84d377
TW		 1402000-05-04 Timothy Wall <twall@cygnus.com>
141
142 * tic54x.h: New.
143
966f959b
C		 1442000-05-03 J.T. Conklin <jtc@redback.com>
145
146 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
147 (PPC_OPERAND_VR): New operand flag for vector registers.
148
c5d05dbb
JL		 1492000-05-01 Kazu Hirata <kazu@hxi.com>
150
151 * h8300.h (EOP): Add missing initializer.
152
a7fba0e0
JL		 153Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
154
155 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
156 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
157 New operand types l,y,&,fe,fE,fx added to support above forms.
158 (pa_opcodes): Replaced usage of 'x' as source/target for
159 floating point double-word loads/stores with 'fx'.
160
800eeca4
JW		 161Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
162 David Mosberger <davidm@hpl.hp.com>
163 Timothy Wall <twall@cygnus.com>
164 Jim Wilson <wilson@cygnus.com>
165
166 * ia64.h: New file.
167
ba23e138
NC		 1682000-03-27 Nick Clifton <nickc@cygnus.com>
169
170 * d30v.h (SHORT_A1): Fix value.
171 (SHORT_AR): Renumber so that it is at the end of the list of short
172 instructions, not the end of the list of long instructions.
173
d0b47220
AM		 1742000-03-26 Alan Modra <alan@linuxcare.com>
175
176 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
177 problem isn't really specific to Unixware.
178 (OLDGCC_COMPAT): Define.
179 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
180 destination %st(0).
181 Fix lots of comments.
182
866afedc
NC		 1832000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
184
185 * d30v.h:
186 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
187 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
188 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
189 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
190 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
191 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
192 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
193
cc5ca5ce
AM		 1942000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
195
196 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
197 fistpd without suffix.
198
68e324a2
NC		 1992000-02-24 Nick Clifton <nickc@cygnus.com>
200
201 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
202 'signed_overflow_ok_p'.
203 Delete prototypes for cgen_set_flags() and cgen_get_flags().
204
60f036a2
AH		 2052000-02-24 Andrew Haley <aph@cygnus.com>
206
207 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
208 (CGEN_CPU_TABLE): flags: new field.
209 Add prototypes for new functions.
210
9b9b5cd4
AM		 2112000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
212
213 * i386.h: Add some more UNIXWARE_COMPAT comments.
214
5b93d8bb
AM		 2152000-02-23 Linas Vepstas <linas@linas.org>
216
217 * i370.h: New file.
218
87f398dd
AH		 2192000-02-22 Andrew Haley <aph@cygnus.com>
220
221 * mips.h: (OPCODE_IS_MEMBER): Add comment.
222
367c01af
AH		 2231999-12-30 Andrew Haley <aph@cygnus.com>
224
9a1e79ca
AH		 225 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
226 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
227 insns.
367c01af 228
add0c677
AM		 2292000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
230
231 * i386.h: Qualify intel mode far call and jmp with x_Suf.
232
3138f287
AM		 2331999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
234
235 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
236 indirect jumps and calls. Add FF/3 call for intel mode.
237
ccecd07b
JL		 238Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
239
240 * mn10300.h: Add new operand types. Add new instruction formats.
241
b37e19e9
JL		 242Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
243
244 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
245 instruction.
246
5fce5ddf
GRK		 2471999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
248
249 * mips.h (INSN_ISA5): New.
250
2bd7f1f3
GRK		 2511999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
252
253 * mips.h (OPCODE_IS_MEMBER): New.
254
4df2b5c5
NC		 2551999-10-29 Nick Clifton <nickc@cygnus.com>
256
257 * d30v.h (SHORT_AR): Define.
258
446a06c9
MM		 2591999-10-18 Michael Meissner <meissner@cygnus.com>
260
261 * alpha.h (alpha_num_opcodes): Convert to unsigned.
262 (alpha_num_operands): Ditto.
263
eca04c6a
JL		 264Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
265
266 * hppa.h (pa_opcodes): Add load and store cache control to
267 instructions. Add ordered access load and store.
268
269 * hppa.h (pa_opcode): Add new entries for addb and addib.
270
271 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
272
273 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
274
c43185de
DN		 275Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
276
277 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
278
ec3533da
JL		 279Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
280
390f858d
JL		 281 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
282 and "be" using completer prefixes.
283
8c47ebd9
JL		 284 * hppa.h (pa_opcodes): Add initializers to silence compiler.
285
ec3533da
JL		 286 * hppa.h: Update comments about character usage.
287
18369bea
JL		 288Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
289
290 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
291 up the new fstw & bve instructions.
292
c36efdd2
JL		 293Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
294
d3ffb032
JL		 295 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
296 instructions.
297
c49ec3da
JL		 298 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
299
5d2e7ecc
JL		 300 * hppa.h (pa_opcodes): Add long offset double word load/store
301 instructions.
302
6397d1a2
JL		 303 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
304 stores.
305
142f0fe0
JL		 306 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
307
f5a68b45
JL		 308 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
309
8235801e
JL		 310 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
311
35184366
JL		 312 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
313
f0bfde5e
JL		 314 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
315
27bbbb58
JL		 316 * hppa.h (pa_opcodes): Add support for "b,l".
317
c36efdd2
JL		 318 * hppa.h (pa_opcodes): Add support for "b,gate".
319
f2727d04
JL		 320Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
321
9392fb11
JL		 322 * hppa.h (pa_opcodes): Use 'fX' for first register operand
323 in xmpyu.
324
e0c52e99
JL		 325 * hppa.h (pa_opcodes): Fix mask for probe and probei.
326
f2727d04
JL		 327 * hppa.h (pa_opcodes): Fix mask for depwi.
328
52d836e2
JL		 329Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
330
331 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
332 an explicit output argument.
333
90765e3a
JL		 334Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
335
336 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
337 Add a few PA2.0 loads and store variants.
338
8340b17f
ILT		 3391999-09-04 Steve Chamberlain <sac@pobox.com>
340
341 * pj.h: New file.
342
5f47d35b
AM		 3431999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
344
345 * i386.h (i386_regtab): Move %st to top of table, and split off
346 other fp reg entries.
347 (i386_float_regtab): To here.
348
1c143202
JL		 349Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
350
7d8fdb64
JL		 351 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
352 by 'f'.
353
90927b9c
JL		 354 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
355 Add supporting args.
356
1d16bf9c
JL		 357 * hppa.h: Document new completers and args.
358 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
359 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
360 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
361 pmenb and pmdis.
362
96226a68
JL		 363 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
364 hshr, hsub, mixh, mixw, permh.
365
5d4ba527
JL		 366 * hppa.h (pa_opcodes): Change completers in instructions to
367 use 'c' prefix.
368
e9fc28c6
JL		 369 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
370 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
371
1c143202
JL		 372 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
373 fnegabs to use 'I' instead of 'F'.
374
9e525108
AM		 3751999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
376
377 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
378 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
379 Alphabetically sort PIII insns.
380
e8da1bf1
DE		 381Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
382
383 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
384
7d627258
JL		 385Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
386
5696871a
JL		 387 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
388 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
389
7d627258
JL		 390 * hppa.h: Document 64 bit condition completers.
391
c5e52916
JL		 392Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
393
394 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
395
eecb386c
AM		 3961999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
397
398 * i386.h (i386_optab): Add DefaultSize modifier to all insns
399 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
400 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
401
88a380f3
JL		 402Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
403 Jeff Law <law@cygnus.com>
404
405 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
406
407 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 408
409 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
410 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
411
145cf1f0
AM		 4121999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
413
414 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
415
73826640
JL		 416Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
417
418 * hppa.h (struct pa_opcode): Add new field "flags".
419 (FLAGS_STRICT): Define.
420
b65db252
JL		 421Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
422 Jeff Law <law@cygnus.com>
423
f7fc668b
JL		 424 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
425
426 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 427
10084519
AM		 4281999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
429
430 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
431 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
432 flag to fcomi and friends.
433
cd8a80ba
JL		 434Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
435
436 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
437 integer logical instructions.
438
1fca749b
ILT		 4391999-05-28 Linus Nordberg <linus.nordberg@canit.se>
440
441 * m68k.h: Document new formats `E', `G', `H' and new places `N',
442 `n', `o'.
443
444 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
445 and new places `m', `M', `h'.
446
aa008907
JL		 447Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
448
449 * hppa.h (pa_opcodes): Add several processor specific system
450 instructions.
451
e26b85f0
JL		 452Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
453
454 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
455 "addb", and "addib" to be used by the disassembler.
456
c608c12e
AM		 4571999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
458
459 * i386.h (ReverseModrm): Remove all occurences.
460 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
461 movmskps, pextrw, pmovmskb, maskmovq.
462 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
463 ignore the data size prefix.
464
465 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
466 Mostly stolen from Doug Ledford <dledford@redhat.com>
467
45c18104
RH		 468Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
469
470 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
471
252b5132
RH		 4721999-04-14 Doug Evans <devans@casey.cygnus.com>
473
474 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
475 (CGEN_ATTR_TYPE): Update.
476 (CGEN_ATTR_MASK): Number booleans starting at 0.
477 (CGEN_ATTR_VALUE): Update.
478 (CGEN_INSN_ATTR): Update.
479
480Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
481
482 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
483 instructions.
484
485Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
486
487 * hppa.h (bb, bvb): Tweak opcode/mask.
488
489
4901999-03-22 Doug Evans <devans@casey.cygnus.com>
491
492 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
493 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
494 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
495 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
496 Delete member max_insn_size.
497 (enum cgen_cpu_open_arg): New enum.
498 (cpu_open): Update prototype.
499 (cpu_open_1): Declare.
500 (cgen_set_cpu): Delete.
501
5021999-03-11 Doug Evans <devans@casey.cygnus.com>
503
504 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
505 (CGEN_OPERAND_NIL): New macro.
506 (CGEN_OPERAND): New member `type'.
507 (@arch@_cgen_operand_table): Delete decl.
508 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
509 (CGEN_OPERAND_TABLE): New struct.
510 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
511 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
512 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
513 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
514 {get,set}_{int,vma}_operand.
515 (@arch@_cgen_cpu_open): New arg `isa'.
516 (cgen_set_cpu): Ditto.
517
518Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
519
520 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
521
5221999-02-25 Doug Evans <devans@casey.cygnus.com>
523
524 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
525 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
526 enum cgen_hw_type.
527 (CGEN_HW_TABLE): New struct.
528 (hw_table): Delete declaration.
529 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
530 to table entry to enum.
531 (CGEN_OPINST): Ditto.
532 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
533
534Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
535
536 * alpha.h (AXP_OPCODE_EV6): New.
537 (AXP_OPCODE_NOPAL): Include it.
538
5391999-02-09 Doug Evans <devans@casey.cygnus.com>
540
541 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
542 All uses updated. New members int_insn_p, max_insn_size,
543 parse_operand,insert_operand,extract_operand,print_operand,
544 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
545 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
546 extract_handlers,print_handlers.
547 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
548 (CGEN_ATTR_BOOL_OFFSET): New macro.
549 (CGEN_ATTR_MASK): Subtract it to compute bit number.
550 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
551 (cgen_opcode_handler): Renamed from cgen_base.
552 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
553 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
554 all uses updated.
555 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
556 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
557 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
558 (CGEN_OPCODE,CGEN_IBASE): New types.
559 (CGEN_INSN): Rewrite.
560 (CGEN_{ASM,DIS}_HASH*): Delete.
561 (init_opcode_table,init_ibld_table): Declare.
562 (CGEN_INSN_ATTR): New type.
563
564Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
565
566 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
567 (x_FP, d_FP, dls_FP, sldx_FP): Define.
568 Change *Suf definitions to include x and d suffixes.
569 (movsx): Use w_Suf and b_Suf.
570 (movzx): Likewise.
571 (movs): Use bwld_Suf.
572 (fld): Change ordering. Use sld_FP.
573 (fild): Add Intel Syntax equivalent of fildq.
574 (fst): Use sld_FP.
575 (fist): Use sld_FP.
576 (fstp): Use sld_FP. Add x_FP version.
577 (fistp): LLongMem version for Intel Syntax.
578 (fcom, fcomp): Use sld_FP.
579 (fadd, fiadd, fsub): Use sld_FP.
580 (fsubr): Use sld_FP.
581 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
582
5831999-01-27 Doug Evans <devans@casey.cygnus.com>
584
585 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
586 CGEN_MODE_UINT.
587
588Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
589
590 * hppa.h (bv): Fix mask.
591
5921999-01-05 Doug Evans <devans@casey.cygnus.com>
593
594 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
595 (CGEN_ATTR): Use it.
596 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
597 (CGEN_ATTR_TABLE): New member dfault.
598
5991998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
600
601 * mips.h (MIPS16_INSN_BRANCH): New.
602
603Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
604
605 The following is part of a change made by Edith Epstein
606 <eepstein@sophia.cygnus.com> as part of a project to merge in
607 changes by HP; HP did not create ChangeLog entries.
608
609 * hppa.h (completer_chars): list of chars to not put a space
610 after.
611
612Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
613
614 * i386.h (i386_optab): Permit w suffix on processor control and
615 status word instructions.
616
6171998-11-30 Doug Evans <devans@casey.cygnus.com>
618
619 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
620 (struct cgen_keyword_entry): Ditto.
621 (struct cgen_operand): Ditto.
622 (CGEN_IFLD): New typedef, with associated access macros.
623 (CGEN_IFMT): New typedef, with associated access macros.
624 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
625 (CGEN_IVALUE): New typedef.
626 (struct cgen_insn): Delete const on syntax,attrs members.
627 `format' now points to format data. Type of `value' is now
628 CGEN_IVALUE.
629 (struct cgen_opcode_table): New member ifld_table.
630
6311998-11-18 Doug Evans <devans@casey.cygnus.com>
632
633 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
634 (CGEN_OPERAND_INSTANCE): New member `attrs'.
635 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
636 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
637 (cgen_opcode_table): Update type of dis_hash fn.
638 (extract_operand): Update type of `insn_value' arg.
639
640Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
641
642 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
643
644Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
645
646 * mips.h (INSN_MULT): Added.
647
648Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
649
650 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
651
652Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
653
654 * cgen.h (CGEN_INSN_INT): New typedef.
655 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
656 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
657 (CGEN_INSN_BYTES_PTR): New typedef.
658 (CGEN_EXTRACT_INFO): New typedef.
659 (cgen_insert_fn,cgen_extract_fn): Update.
660 (cgen_opcode_table): New member `insn_endian'.
661 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
662 (insert_operand,extract_operand): Update.
663 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
664
665Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
666
667 * cgen.h (CGEN_ATTR_BOOLS): New macro.
668 (struct CGEN_HW_ENTRY): New member `attrs'.
669 (CGEN_HW_ATTR): New macro.
670 (struct CGEN_OPERAND_INSTANCE): New member `name'.
671 (CGEN_INSN_INVALID_P): New macro.
672
673Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
674
675 * hppa.h: Add "fid".
676
677Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
678
679 From Robert Andrew Dale <rob@nb.net>
680 * i386.h (i386_optab): Add AMD 3DNow! instructions.
681 (AMD_3DNOW_OPCODE): Define.
682
683Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
684
685 * d30v.h (EITHER_BUT_PREFER_MU): Define.
686
687Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
688
689 * cgen.h (cgen_insn): #if 0 out element `cdx'.
690
691Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
692
693 Move all global state data into opcode table struct, and treat
694 opcode table as something that is "opened/closed".
695 * cgen.h (CGEN_OPCODE_DESC): New type.
696 (all fns): New first arg of opcode table descriptor.
697 (cgen_set_parse_operand_fn): Add prototype.
698 (cgen_current_machine,cgen_current_endian): Delete.
699 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
700 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
701 dis_hash_table,dis_hash_table_entries.
702 (opcode_open,opcode_close): Add prototypes.
703
704 * cgen.h (cgen_insn): New element `cdx'.
705
706Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
707
708 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
709
710Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
711
712 * mn10300.h: Add "no_match_operands" field for instructions.
713 (MN10300_MAX_OPERANDS): Define.
714
715Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
716
717 * cgen.h (cgen_macro_insn_count): Declare.
718
719Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
720
721 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
722 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
723 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
724 set_{int,vma}_operand.
725
726Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
727
728 * mn10300.h: Add "machine" field for instructions.
729 (MN103, AM30): Define machine types.
730
731Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
732
733 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
734
7351998-06-18 Ulrich Drepper <drepper@cygnus.com>
736
737 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
738
739Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
740
741 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
742 and ud2b.
743 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
744 those that happen to be implemented on pentiums.
745
746Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
747
748 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
749 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
750 with Size16|IgnoreSize or Size32|IgnoreSize.
751
752Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
753
754 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
755 (REPE): Rename to REPE_PREFIX_OPCODE.
756 (i386_regtab_end): Remove.
757 (i386_prefixtab, i386_prefixtab_end): Remove.
758 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
759 of md_begin.
760 (MAX_OPCODE_SIZE): Define.
761 (i386_optab_end): Remove.
762 (sl_Suf): Define.
763 (sl_FP): Use sl_Suf.
764
765 * i386.h (i386_optab): Allow 16 bit displacement for `mov
766 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
767 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
768 data32, dword, and adword prefixes.
769 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
770 regs.
771
772Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
773
774 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
775
776 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
777 register operands, because this is a common idiom. Flag them with
778 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
779 fdivrp because gcc erroneously generates them. Also flag with a
780 warning.
781
782 * i386.h: Add suffix modifiers to most insns, and tighter operand
783 checks in some cases. Fix a number of UnixWare compatibility
784 issues with float insns. Merge some floating point opcodes, using
785 new FloatMF modifier.
786 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
787 consistency.
788
789 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
790 IgnoreDataSize where appropriate.
791
792Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
793
794 * i386.h: (one_byte_segment_defaults): Remove.
795 (two_byte_segment_defaults): Remove.
796 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
797
798Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
799
800 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
801 (cgen_hw_lookup_by_num): Declare.
802
803Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
804
805 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
806 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
807
808Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
809
810 * cgen.h (cgen_asm_init_parse): Delete.
811 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
812 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
813
814Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
815
816 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
817 (cgen_asm_finish_insn): Update prototype.
818 (cgen_insn): New members num, data.
819 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
820 dis_hash, dis_hash_table_size moved to ...
821 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
822 All uses updated. New members asm_hash_p, dis_hash_p.
823 (CGEN_MINSN_EXPANSION): New struct.
824 (cgen_expand_macro_insn): Declare.
825 (cgen_macro_insn_count): Declare.
826 (get_insn_operands): Update prototype.
827 (lookup_get_insn_operands): Declare.
828
829Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
830
831 * i386.h (i386_optab): Change iclrKludge and imulKludge to
832 regKludge. Add operands types for string instructions.
833
834Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
835
836 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
837 table.
838
839Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
840
841 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
842 for `gettext'.
843
844Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
845
846 * i386.h: Remove NoModrm flag from all insns: it's never checked.
847 Add IsString flag to string instructions.
848 (IS_STRING): Don't define.
849 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
850 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
851 (SS_PREFIX_OPCODE): Define.
852
853Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
854
855 * i386.h: Revert March 24 patch; no more LinearAddress.
856
857Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
858
859 * i386.h (i386_optab): Remove fwait (9b) from all floating point
860 instructions, and instead add FWait opcode modifier. Add short
861 form of fldenv and fstenv.
862 (FWAIT_OPCODE): Define.
863
864 * i386.h (i386_optab): Change second operand constraint of `mov
865 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
866 allow legal instructions such as `movl %gs,%esi'
867
868Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
869
870 * h8300.h: Various changes to fully bracket initializers.
871
872Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
873
874 * i386.h: Set LinearAddress for lidt and lgdt.
875
876Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
877
878 * cgen.h (CGEN_BOOL_ATTR): New macro.
879
880Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
881
882 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
883
884Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
885
886 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
887 (cgen_insn): Record syntax and format entries here, rather than
888 separately.
889
890Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
891
892 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
893
894Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
895
896 * cgen.h (cgen_insert_fn): Change type of result to const char *.
897 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
898 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
899
900Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
901
902 * cgen.h (lookup_insn): New argument alias_p.
903
904Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
905
906Fix rac to accept only a0:
907 * d10v.h (OPERAND_ACC): Split into:
908 (OPERAND_ACC0, OPERAND_ACC1) .
909 (OPERAND_GPR): Define.
910
911Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
912
913 * cgen.h (CGEN_FIELDS): Define here.
914 (CGEN_HW_ENTRY): New member `type'.
915 (hw_list): Delete decl.
916 (enum cgen_mode): Declare.
917 (CGEN_OPERAND): New member `hw'.
918 (enum cgen_operand_instance_type): Declare.
919 (CGEN_OPERAND_INSTANCE): New type.
920 (CGEN_INSN): New member `operands'.
921 (CGEN_OPCODE_DATA): Make hw_list const.
922 (get_insn_operands,lookup_insn): Add prototypes for.
923
924Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
925
926 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
927 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
928 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
929 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
930
931Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
932
933 * cgen.h: Correct typo in comment end marker.
934
935Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
936
937 * tic30.h: New file.
938
939Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
940
941 * cgen.h: Add prototypes for cgen_save_fixups(),
942 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
943 of cgen_asm_finish_insn() to return a char *.
944
945Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
946
947 * cgen.h: Formatting changes to improve readability.
948
949Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
950
951 * cgen.h (*): Clean up pass over `struct foo' usage.
952 (CGEN_ATTR): Make unsigned char.
953 (CGEN_ATTR_TYPE): Update.
954 (CGEN_ATTR_{ENTRY,TABLE}): New types.
955 (cgen_base): Move member `attrs' to cgen_insn.
956 (CGEN_KEYWORD): New member `null_entry'.
957 (CGEN_{SYNTAX,FORMAT}): New types.
958 (cgen_insn): Format and syntax separated from each other.
959
960Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
961
962 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
963 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
964 flags_{used,set} long.
965 (d30v_operand): Make flags field long.
966
967Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
968
969 * m68k.h: Fix comment describing operand types.
970
971Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
972
973 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
974 everything else after down.
975
976Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
977
978 * d10v.h (OPERAND_FLAG): Split into:
979 (OPERAND_FFLAG, OPERAND_CFLAG) .
980
981Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
982
983 * mips.h (struct mips_opcode): Changed comments to reflect new
984 field usage.
985
986Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
987
988 * mips.h: Added to comments a quick-ref list of all assigned
989 operand type characters.
990 (OP_{MASK,SH}_PERFREG): New macros.
991
992Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
993
994 * sparc.h: Add '_' and '/' for v9a asr's.
995 Patch from David Miller <davem@vger.rutgers.edu>
996
997Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
998
999 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1000 area are not available in the base model (H8/300).
1001
1002Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1003
1004 * m68k.h: Remove documentation of ` operand specifier.
1005
1006Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1007
1008 * m68k.h: Document q and v operand specifiers.
1009
1010Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1011
1012 * v850.h (struct v850_opcode): Add processors field.
1013 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1014 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1015 (PROCESSOR_V850EA): New bit constants.
1016
1017Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1018
1019 Merge changes from Martin Hunt:
1020
1021 * d30v.h: Allow up to 64 control registers. Add
1022 SHORT_A5S format.
1023
1024 * d30v.h (LONG_Db): New form for delayed branches.
1025
1026 * d30v.h: (LONG_Db): New form for repeati.
1027
1028 * d30v.h (SHORT_D2B): New form.
1029
1030 * d30v.h (SHORT_A2): New form.
1031
1032 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1033 registers are used. Needed for VLIW optimization.
1034
1035Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1036
1037 * cgen.h: Move assembler interface section
1038 up so cgen_parse_operand_result is defined for cgen_parse_address.
1039 (cgen_parse_address): Update prototype.
1040
1041Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1042
1043 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1044
1045Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1046
1047 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1048 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1049 <paubert@iram.es>.
1050
1051 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1052 <paubert@iram.es>.
1053
1054 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1055 <paubert@iram.es>.
1056
1057 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1058 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1059
1060Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1061
1062 * v850.h (V850_NOT_R0): New flag.
1063
1064Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1065
1066 * v850.h (struct v850_opcode): Remove flags field.
1067
1068Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1069
1070 * v850.h (struct v850_opcode): Add flags field.
1071 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1072 fields.
1073 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1074 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1075
1076Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1077
1078 * arc.h: New file.
1079
1080Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1081
1082 * sparc.h (sparc_opcodes): Declare as const.
1083
1084Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1085
1086 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1087 uses single or double precision floating point resources.
1088 (INSN_NO_ISA, INSN_ISA1): Define.
1089 (cpu specific INSN macros): Tweak into bitmasks outside the range
1090 of INSN_ISA field.
1091
1092Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1093
1094 * i386.h: Fix pand opcode.
1095
1096Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1097
1098 * mips.h: Widen INSN_ISA and move it to a more convenient
1099 bit position. Add INSN_3900.
1100
1101Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1102
1103 * mips.h (struct mips_opcode): added new field membership.
1104
1105Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1106
1107 * i386.h (movd): only Reg32 is allowed.
1108
1109 * i386.h: add fcomp and ud2. From Wayne Scott
1110 <wscott@ichips.intel.com>.
1111
1112Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1113
1114 * i386.h: Add MMX instructions.
1115
1116Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1117
1118 * i386.h: Remove W modifier from conditional move instructions.
1119
1120Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1121
1122 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1123 with no arguments to match that generated by the UnixWare
1124 assembler.
1125
1126Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1127
1128 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1129 (cgen_parse_operand_fn): Declare.
1130 (cgen_init_parse_operand): Declare.
1131 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1132 new argument `want'.
1133 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1134 (enum cgen_parse_operand_type): New enum.
1135
1136Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1137
1138 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1139
1140Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1141
1142 * cgen.h: New file.
1143
1144Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1145
1146 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1147 fdivrp.
1148
1149Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1150
1151 * v850.h (extract): Make unsigned.
1152
1153Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1154
1155 * i386.h: Add iclr.
1156
1157Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1158
1159 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1160 take a direction bit.
1161
1162Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1163
1164 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1165
1166Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1167
1168 * sparc.h: Include <ansidecl.h>. Update function declarations to
1169 use prototypes, and to use const when appropriate.
1170
1171Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1172
1173 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1174
1175Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1176
1177 * d10v.h: Change pre_defined_registers to
1178 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1179
1180Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1181
1182 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1183 Change mips_opcodes from const array to a pointer,
1184 and change bfd_mips_num_opcodes from const int to int,
1185 so that we can increase the size of the mips opcodes table
1186 dynamically.
1187
1188Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1189
1190 * d30v.h (FLAG_X): Remove unused flag.
1191
1192Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1193
1194 * d30v.h: New file.
1195
1196Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1197
1198 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1199 (PDS_VALUE): Macro to access value field of predefined symbols.
1200 (tic80_next_predefined_symbol): Add prototype.
1201
1202Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1203
1204 * tic80.h (tic80_symbol_to_value): Change prototype to match
1205 change in function, added class parameter.
1206
1207Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1208
1209 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1210 endmask fields, which are somewhat weird in that 0 and 32 are
1211 treated exactly the same.
1212
1213Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1214
1215 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1216 rather than a constant that is 2**X. Reorder them to put bits for
1217 operands that have symbolic names in the upper bits, so they can
1218 be packed into an int where the lower bits contain the value that
1219 corresponds to that symbolic name.
1220 (predefined_symbo): Add struct.
1221 (tic80_predefined_symbols): Declare array of translations.
1222 (tic80_num_predefined_symbols): Declare size of that array.
1223 (tic80_value_to_symbol): Declare function.
1224 (tic80_symbol_to_value): Declare function.
1225
1226Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1227
1228 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1229
1230Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1231
1232 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1233 be the destination register.
1234
1235Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1236
1237 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1238 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1239 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1240 that the opcode can have two vector instructions in a single
1241 32 bit word and we have to encode/decode both.
1242
1243Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1244
1245 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1246 TIC80_OPERAND_RELATIVE for PC relative.
1247 (TIC80_OPERAND_BASEREL): New flag bit for register
1248 base relative.
1249
1250Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1251
1252 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1253
1254Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1255
1256 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1257 ":s" modifier for scaling.
1258
1259Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1260
1261 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1262 (TIC80_OPERAND_M_LI): Ditto
1263
1264Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1265
1266 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1267 (TIC80_OPERAND_CC): New define for condition code operand.
1268 (TIC80_OPERAND_CR): New define for control register operand.
1269
1270Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1271
1272 * tic80.h (struct tic80_opcode): Name changed.
1273 (struct tic80_opcode): Remove format field.
1274 (struct tic80_operand): Add insertion and extraction functions.
1275 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1276 correct ones.
1277 (FMT_*): Ditto.
1278
1279Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1280
1281 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1282 type IV instruction offsets.
1283
1284Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1285
1286 * tic80.h: New file.
1287
1288Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1289
1290 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1291
1292Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1293
1294 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1295 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1296 * v850.h: Fix comment, v850_operand not powerpc_operand.
1297
1298Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1299
1300 * mn10200.h: Flesh out structures and definitions needed by
1301 the mn10200 assembler & disassembler.
1302
1303Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1304
1305 * mips.h: Add mips16 definitions.
1306
1307Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1308
1309 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1310
1311Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1312
1313 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1314 (MN10300_OPERAND_MEMADDR): Define.
1315
1316Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1317
1318 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1319
1320Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1321
1322 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1323
1324Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1325
1326 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1327
1328Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1329
1330 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1331
1332Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1333
1334 * alpha.h: Don't include "bfd.h"; private relocation types are now
1335 negative to minimize problems with shared libraries. Organize
1336 instruction subsets by AMASK extensions and PALcode
1337 implementation.
1338 (struct alpha_operand): Move flags slot for better packing.
1339
1340Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1341
1342 * v850.h (V850_OPERAND_RELAX): New operand flag.
1343
1344Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1345
1346 * mn10300.h (FMT_*): Move operand format definitions
1347 here.
1348
1349Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1350
1351 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1352
1353Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1354
1355 * mn10300.h (mn10300_opcode): Add "format" field.
1356 (MN10300_OPERAND_*): Define.
1357
1358Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1359
1360 * mn10x00.h: Delete.
1361 * mn10200.h, mn10300.h: New files.
1362
1363Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1364
1365 * mn10x00.h: New file.
1366
1367Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1368
1369 * v850.h: Add new flag to indicate this instruction uses a PC
1370 displacement.
1371
1372Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1373
1374 * h8300.h (stmac): Add missing instruction.
1375
1376Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1377
1378 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1379 field.
1380
1381Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1382
1383 * v850.h (V850_OPERAND_EP): Define.
1384
1385 * v850.h (v850_opcode): Add size field.
1386
1387Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1388
1389 * v850.h (v850_operands): Add insert and extract fields, pointers
1390 to functions used to handle unusual operand encoding.
1391 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1392 V850_OPERAND_SIGNED): Defined.
1393
1394Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1395
1396 * v850.h (v850_operands): Add flags field.
1397 (OPERAND_REG, OPERAND_NUM): Defined.
1398
1399Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1400
1401 * v850.h: New file.
1402
1403Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1404
1405 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1406 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1407 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1408 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1409 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1410 Defined.
1411
1412Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1413
1414 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1415 a 3 bit space id instead of a 2 bit space id.
1416
1417Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1418
1419 * d10v.h: Add some additional defines to support the
1420 assembler in determining which operations can be done in parallel.
1421
1422Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1423
1424 * h8300.h (SN): Define.
1425 (eepmov.b): Renamed from "eepmov"
1426 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1427 with them.
1428
1429Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1430
1431 * d10v.h (OPERAND_SHIFT): New operand flag.
1432
1433Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1434
1435 * d10v.h: Changes for divs, parallel-only instructions, and
1436 signed numbers.
1437
1438Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1439
1440 * d10v.h (pd_reg): Define. Putting the definition here allows
1441 the assembler and disassembler to share the same struct.
1442
1443Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1444
1445 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1446 Williams <steve@icarus.com>.
1447
1448Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1449
1450 * d10v.h: New file.
1451
1452Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1453
1454 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1455
1456Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1457
1458 * m68k.h (mcf5200): New macro.
1459 Document names of coldfire control registers.
1460
1461Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1462
1463 * h8300.h (SRC_IN_DST): Define.
1464
1465 * h8300.h (UNOP3): Mark the register operand in this insn
1466 as a source operand, not a destination operand.
1467 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1468 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1469 register operand with SRC_IN_DST.
1470
1471Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1472
1473 * alpha.h: New file.
1474
1475Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1476
1477 * rs6k.h: Remove obsolete file.
1478
1479Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1480
1481 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1482 fdivp, and fdivrp. Add ffreep.
1483
1484Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1485
1486 * h8300.h: Reorder various #defines for readability.
1487 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1488 (BITOP): Accept additional (unused) argument. All callers changed.
1489 (EBITOP): Likewise.
1490 (O_LAST): Bump.
1491 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1492
1493 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1494 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1495 (BITOP, EBITOP): Handle new H8/S addressing modes for
1496 bit insns.
1497 (UNOP3): Handle new shift/rotate insns on the H8/S.
1498 (insns using exr): New instructions.
1499 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1500
1501Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1502
1503 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1504 was incorrect.
1505
1506Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1507
1508 * h8300.h (START): Remove.
1509 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1510 and mov.l insns that can be relaxed.
1511
1512Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1513
1514 * i386.h: Remove Abs32 from lcall.
1515
1516Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1517
1518 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1519 (SLCPOP): New macro.
1520 Mark X,Y opcode letters as in use.
1521
1522Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1523
1524 * sparc.h (F_FLOAT, F_FBR): Define.
1525
1526Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1527
1528 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1529 from all insns.
1530 (ABS8SRC,ABS8DST): Add ABS8MEM.
1531 (add.l): Fix reg+reg variant.
1532 (eepmov.w): Renamed from eepmovw.
1533 (ldc,stc): Fix many cases.
1534
1535Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1536
1537 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1538
1539Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1540
1541 * sparc.h (O): Mark operand letter as in use.
1542
1543Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1544
1545 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1546 Mark operand letters uU as in use.
1547
1548Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1549
1550 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1551 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1552 (SPARC_OPCODE_SUPPORTED): New macro.
1553 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1554 (F_NOTV9): Delete.
1555
1556Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1557
1558 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1559 declaration consistent with return type in definition.
1560
1561Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1562
1563 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1564
1565Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1566
1567 * i386.h (i386_regtab): Add 80486 test registers.
1568
1569Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1570
1571 * i960.h (I_HX): Define.
1572 (i960_opcodes): Add HX instruction.
1573
1574Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1575
1576 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1577 and fclex.
1578
1579Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1580
1581 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1582 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1583 (bfd_* defines): Delete.
1584 (sparc_opcode_archs): Replaces architecture_pname.
1585 (sparc_opcode_lookup_arch): Declare.
1586 (NUMOPCODES): Delete.
1587
1588Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1589
1590 * sparc.h (enum sparc_architecture): Add v9a.
1591 (ARCHITECTURES_CONFLICT_P): Update.
1592
1593Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1594
1595 * i386.h: Added Pentium Pro instructions.
1596
1597Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1598
1599 * m68k.h: Document new 'W' operand place.
1600
1601Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1602
1603 * hppa.h: Add lci and syncdma instructions.
1604
1605Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1606
1607 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1608 instructions.
1609
1610Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1611
1612 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1613 assembler's -mcom and -many switches.
1614
1615Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1616
1617 * i386.h: Fix cmpxchg8b extension opcode description.
1618
1619Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1620
1621 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1622 and register cr4.
1623
1624Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1625
1626 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1627
1628Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1629
1630 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1631
1632Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1633
1634 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1635
1636Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1637
1638 * m68kmri.h: Remove.
1639
1640 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1641 declarations. Remove F_ALIAS and flag field of struct
1642 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1643 int. Make name and args fields of struct m68k_opcode const.
1644
1645Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1646
1647 * sparc.h (F_NOTV9): Define.
1648
1649Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1650
1651 * mips.h (INSN_4010): Define.
1652
1653Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1654
1655 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1656
1657 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1658 * m68k.h: Fix argument descriptions of coprocessor
1659 instructions to allow only alterable operands where appropriate.
1660 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1661 (m68k_opcode_aliases): Add more aliases.
1662
1663Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1664
1665 * m68k.h: Added explcitly short-sized conditional branches, and a
1666 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1667 svr4-based configurations.
1668
1669Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1670
1671 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1672 * i386.h: added missing Data16/Data32 flags to a few instructions.
1673
1674Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1675
1676 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1677 (OP_MASK_BCC, OP_SH_BCC): Define.
1678 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1679 (OP_MASK_CCC, OP_SH_CCC): Define.
1680 (INSN_READ_FPR_R): Define.
1681 (INSN_RFE): Delete.
1682
1683Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1684
1685 * m68k.h (enum m68k_architecture): Deleted.
1686 (struct m68k_opcode_alias): New type.
1687 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1688 matching constraints, values and flags. As a side effect of this,
1689 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1690 as I know were never used, now may need re-examining.
1691 (numopcodes): Now const.
1692 (m68k_opcode_aliases, numaliases): New variables.
1693 (endop): Deleted.
1694 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1695 m68k_opcode_aliases; update declaration of m68k_opcodes.
1696
1697Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1698
1699 * hppa.h (delay_type): Delete unused enumeration.
1700 (pa_opcode): Replace unused delayed field with an architecture
1701 field.
1702 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1703
1704Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1705
1706 * mips.h (INSN_ISA4): Define.
1707
1708Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1709
1710 * mips.h (M_DLA_AB, M_DLI): Define.
1711
1712Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1713
1714 * hppa.h (fstwx): Fix single-bit error.
1715
1716Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1717
1718 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1719
1720Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1721
1722 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1723 debug registers. From Charles Hannum (mycroft@netbsd.org).
1724
1725Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1726
1727 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1728 i386 support:
1729 * i386.h (MOV_AX_DISP32): New macro.
1730 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1731 of several call/return instructions.
1732 (ADDR_PREFIX_OPCODE): New macro.
1733
1734Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1735
1736 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1737
1738 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1739 it pointer to const char;
1740 (struct vot, field `name'): ditto.
1741
1742Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1743
1744 * vax.h: Supply and properly group all values in end sentinel.
1745
1746Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1747
1748 * mips.h (INSN_ISA, INSN_4650): Define.
1749
1750Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1751
1752 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1753 systems with a separate instruction and data cache, such as the
1754 29040, these instructions take an optional argument.
1755
1756Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1757
1758 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1759 INSN_TRAP.
1760
1761Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1762
1763 * mips.h (INSN_STORE_MEMORY): Define.
1764
1765Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1766
1767 * sparc.h: Document new operand type 'x'.
1768
1769Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1770
1771 * i960.h (I_CX2): New instruction category. It includes
1772 instructions available on Cx and Jx processors.
1773 (I_JX): New instruction category, for JX-only instructions.
1774 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1775 Jx-only instructions, in I_JX category.
1776
1777Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1778
1779 * ns32k.h (endop): Made pointer const too.
1780
1781Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1782
1783 * ns32k.h: Drop Q operand type as there is no correct use
1784 for it. Add I and Z operand types which allow better checking.
1785
1786Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1787
1788 * h8300.h (xor.l) :fix bit pattern.
1789 (L_2): New size of operand.
1790 (trapa): Use it.
1791
1792Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1793
1794 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1795
1796Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1797
1798 * sparc.h: Include v9 definitions.
1799
1800Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1801
1802 * m68k.h (m68060): Defined.
1803 (m68040up, mfloat, mmmu): Include it.
1804 (struct m68k_opcode): Widen `arch' field.
1805 (m68k_opcodes): Updated for M68060. Removed comments that were
1806 instructions commented out by "JF" years ago.
1807
1808Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1809
1810 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1811 add a one-bit `flags' field.
1812 (F_ALIAS): New macro.
1813
1814Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1815
1816 * h8300.h (dec, inc): Get encoding right.
1817
1818Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1819
1820 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1821 a flag instead.
1822 (PPC_OPERAND_SIGNED): Define.
1823 (PPC_OPERAND_SIGNOPT): Define.
1824
1825Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1826
1827 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1828 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1829
1830Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1831
1832 * i386.h: Reverse last change. It'll be handled in gas instead.
1833
1834Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1835
1836 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1837 slower on the 486 and used the implicit shift count despite the
1838 explicit operand. The one-operand form is still available to get
1839 the shorter form with the implicit shift count.
1840
1841Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1842
1843 * hppa.h: Fix typo in fstws arg string.
1844
1845Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1846
1847 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1848
1849Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1850
1851 * ppc.h (PPC_OPCODE_601): Define.
1852
1853Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1854
1855 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1856 (so we can determine valid completers for both addb and addb[tf].)
1857
1858 * hppa.h (xmpyu): No floating point format specifier for the
1859 xmpyu instruction.
1860
1861Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1862
1863 * ppc.h (PPC_OPERAND_NEXT): Define.
1864 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1865 (struct powerpc_macro): Define.
1866 (powerpc_macros, powerpc_num_macros): Declare.
1867
1868Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1869
1870 * ppc.h: New file. Header file for PowerPC opcode table.
1871
1872Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1873
1874 * hppa.h: More minor template fixes for sfu and copr (to allow
1875 for easier disassembly).
1876
1877 * hppa.h: Fix templates for all the sfu and copr instructions.
1878
1879Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1880
1881 * i386.h (push): Permit Imm16 operand too.
1882
1883Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1884
1885 * h8300.h (andc): Exists in base arch.
1886
1887Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1888
1889 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1890 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1891
1892Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1893
1894 * hppa.h: Add FP quadword store instructions.
1895
1896Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1897
1898 * mips.h: (M_J_A): Added.
1899 (M_LA): Removed.
1900
1901Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1902
1903 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1904 <mellon@pepper.ncd.com>.
1905
1906Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1907
1908 * hppa.h: Immediate field in probei instructions is unsigned,
1909 not low-sign extended.
1910
1911Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1912
1913 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1914
1915Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1916
1917 * i386.h: Add "fxch" without operand.
1918
1919Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1920
1921 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1922
1923Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1924
1925 * hppa.h: Add gfw and gfr to the opcode table.
1926
1927Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1928
1929 * m88k.h: extended to handle m88110.
1930
1931Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1932
1933 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1934 addresses.
1935
1936Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1937
1938 * i960.h (i960_opcodes): Properly bracket initializers.
1939
1940Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1941
1942 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1943
1944Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1945
1946 * m68k.h (two): Protect second argument with parentheses.
1947
1948Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1949
1950 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1951 Deleted old in/out instructions in "#if 0" section.
1952
1953Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1954
1955 * i386.h (i386_optab): Properly bracket initializers.
1956
1957Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1958
1959 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1960 Jeff Law, law@cs.utah.edu).
1961
1962Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1963
1964 * i386.h (lcall): Accept Imm32 operand also.
1965
1966Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1967
1968 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1969 (M_DABS): Added.
1970
1971Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1972
1973 * mips.h (INSN_*): Changed values. Removed unused definitions.
1974 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1975 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1976 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1977 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1978 (M_*): Added new values for r6000 and r4000 macros.
1979 (ANY_DELAY): Removed.
1980
1981Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1982
1983 * mips.h: Added M_LI_S and M_LI_SS.
1984
1985Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1986
1987 * h8300.h: Get some rare mov.bs correct.
1988
1989Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1990
1991 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1992 been included.
1993
1994Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1995
1996 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1997 jump instructions, for use in disassemblers.
1998
1999Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2000
2001 * m88k.h: Make bitfields just unsigned, not unsigned long or
2002 unsigned short.
2003
2004Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2005
2006 * hppa.h: New argument type 'y'. Use in various float instructions.
2007
2008Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2009
2010 * hppa.h (break): First immediate field is unsigned.
2011
2012 * hppa.h: Add rfir instruction.
2013
2014Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2015
2016 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2017
2018Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2019
2020 * mips.h: Reworked the hazard information somewhat, and fixed some
2021 bugs in the instruction hazard descriptions.
2022
2023Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2024
2025 * m88k.h: Corrected a couple of opcodes.
2026
2027Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2028
2029 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2030 new version includes instruction hazard information, but is
2031 otherwise reasonably similar.
2032
2033Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2034
2035 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2036
2037Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2038
2039 Patches from Jeff Law, law@cs.utah.edu:
2040 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2041 Make the tables be the same for the following instructions:
2042 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2043 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2044 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2045 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2046 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2047 "fcmp", and "ftest".
2048
2049 * hppa.h: Make new and old tables the same for "break", "mtctl",
2050 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2051 Fix typo in last patch. Collapse several #ifdefs into a
2052 single #ifdef.
2053
2054 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2055 of the comments up-to-date.
2056
2057 * hppa.h: Update "free list" of letters and update
2058 comments describing each letter's function.
2059
2060Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2061
2062 * h8300.h: checkpoint, includes H8/300-H opcodes.
2063
2064Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2065
2066 * Patches from Jeffrey Law <law@cs.utah.edu>.
2067 * hppa.h: Rework single precision FP
2068 instructions so that they correctly disassemble code
2069 PA1.1 code.
2070
2071Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2072
2073 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2074 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2075
2076Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2077
2078 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2079 gdb will define it for now.
2080
2081Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2082
2083 * sparc.h: Don't end enumerator list with comma.
2084
2085Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2086
2087 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2088 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2089 ("bc2t"): Correct typo.
2090 ("[ls]wc[023]"): Use T rather than t.
2091 ("c[0123]"): Define general coprocessor instructions.
2092
2093Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2094
2095 * m68k.h: Move split point for gcc compilation more towards
2096 middle.
2097
2098Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2099
2100 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2101 simply wrong, ics, rfi, & rfsvc were missing).
2102 Add "a" to opr_ext for "bb". Doc fix.
2103
2104Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2105
2106 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2107 * mips.h: Add casts, to suppress warnings about shifting too much.
2108 * m68k.h: Document the placement code '9'.
2109
2110Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2111
2112 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2113 allows callers to break up the large initialized struct full of
2114 opcodes into two half-sized ones. This permits GCC to compile
2115 this module, since it takes exponential space for initializers.
2116 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2117
2118Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2119
2120 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2121 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2122 initialized structs in it.
2123
2124Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2125
2126 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2127 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2128 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2129
2130Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2131
2132 * mips.h: document "i" and "j" operands correctly.
2133
2134Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2135
2136 * mips.h: Removed endianness dependency.
2137
2138Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2139
2140 * h8300.h: include info on number of cycles per instruction.
2141
2142Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2143
2144 * hppa.h: Move handy aliases to the front. Fix masks for extract
2145 and deposit instructions.
2146
2147Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2148
2149 * i386.h: accept shld and shrd both with and without the shift
2150 count argument, which is always %cl.
2151
2152Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2153
2154 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2155 (one_byte_segment_defaults, two_byte_segment_defaults,
2156 i386_prefixtab_end): Ditto.
2157
2158Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2159
2160 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2161 for operand 2; from John Carr, jfc@dsg.dec.com.
2162
2163Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2164
2165 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2166 always use 16-bit offsets. Makes calculated-size jump tables
2167 feasible.
2168
2169Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2170
2171 * i386.h: Fix one-operand forms of in* and out* patterns.
2172
2173Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2174
2175 * m68k.h: Added CPU32 support.
2176
2177Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2178
2179 * mips.h (break): Disassemble the argument. Patch from
2180 jonathan@cs.stanford.edu (Jonathan Stone).
2181
2182Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2183
2184 * m68k.h: merged Motorola and MIT syntax.
2185
2186Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2187
2188 * m68k.h (pmove): make the tests less strict, the 68k book is
2189 wrong.
2190
2191Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2192
2193 * m68k.h (m68ec030): Defined as alias for 68030.
2194 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2195 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2196 them. Tightened description of "fmovex" to distinguish it from
2197 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2198 up descriptions that claimed versions were available for chips not
2199 supporting them. Added "pmovefd".
2200
2201Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2202
2203 * m68k.h: fix where the . goes in divull
2204
2205Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2206
2207 * m68k.h: the cas2 instruction is supposed to be written with
2208 indirection on the last two operands, which can be either data or
2209 address registers. Added a new operand type 'r' which accepts
2210 either register type. Added new cases for cas2l and cas2w which
2211 use them. Corrected masks for cas2 which failed to recognize use
2212 of address register.
2213
2214Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2215
2216 * m68k.h: Merged in patches (mostly m68040-specific) from
2217 Colin Smith <colin@wrs.com>.
2218
2219 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2220 base). Also cleaned up duplicates, re-ordered instructions for
2221 the sake of dis-assembling (so aliases come after standard names).
2222 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2223
2224Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2225
2226 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2227 all missing .s
2228
2229Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2230
2231 * sparc.h: Moved tables to BFD library.
2232
2233 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2234
2235Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2236
2237 * h8300.h: Finish filling in all the holes in the opcode table,
2238 so that the Lucid C compiler can digest this as well...
2239
2240Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2241
2242 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2243 Fix opcodes on various sizes of fild/fist instructions
2244 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2245 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2246
2247Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2248
2249 * h8300.h: Fill in all the holes in the opcode table so that the
2250 losing HPUX C compiler can digest this...
2251
2252Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2253
2254 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2255 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2256
2257Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2258
2259 * sparc.h: Add new architecture variant sparclite; add its scan
2260 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2261
2262Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2263
2264 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2265 fy@lucid.com).
2266
2267Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2268
2269 * rs6k.h: New version from IBM (Metin).
2270
2271Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2272
2273 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2274 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2275
2276Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2277
2278 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2279
2280Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2281
2282 * m68k.h (one, two): Cast macro args to unsigned to suppress
2283 complaints from compiler and lint about integer overflow during
2284 shift.
2285
2286Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2287
2288 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2289
2290Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2291
2292 * mips.h: Make bitfield layout depend on the HOST compiler,
2293 not on the TARGET system.
2294
2295Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2296
2297 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2298 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2299 <TRANLE@INTELLICORP.COM>.
2300
2301Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2302
2303 * h8300.h: turned op_type enum into #define list
2304
2305Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2306
2307 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2308 similar instructions -- they've been renamed to "fitoq", etc.
2309 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2310 number of arguments.
2311 * h8300.h: Remove extra ; which produces compiler warning.
2312
2313Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2314
2315 * sparc.h: fix opcode for tsubcctv.
2316
2317Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2318
2319 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2320
2321Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2322
2323 * sparc.h (nop): Made the 'lose' field be even tighter,
2324 so only a standard 'nop' is disassembled as a nop.
2325
2326Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2327
2328 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2329 disassembled as a nop.
2330
2331Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2332
2333 * sparc.h: fix a typo.
2334
2335Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2336
2337 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2338 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2339 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2340
2341\f
2342Local Variables:
2343version-control: never
2344End:
A mirror of the official binutils-gdb repository