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* i386-dis.c: Add x86_64 support.
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
6f8c0c4c
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1Wed Jan 3 16:27:15 MET 2001 Jan hubicka <jh@suse.cz>
2
3 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
4 introduced by Pentium4
5
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6Sat Dec 30 19:03:15 MET 2000 Jan hubicka <jh@suse.cz>
7
8 * i386.h (i386_optab): Add "rex*" instructions;
9 add swapgs; disable jmp/call far direct instructions for
10 64bit mode; add syscall and sysret; disable registers for 0xc6
11 template. Add 'q' suffixes to extendable instructions, disable
12 obsoletted instructions, add new sign/zero extension ones.
13 (i386_regtab): Add extended registers.
14 (*Suf): Add No_qSuf.
15 (q_Suf, wlq_Suf, bwlq_Suf): New.
16
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17Wed Dec 20 14:22:03 MET 2000 Jan Hubicka <jh@suse.cz>
18
19 * i386.h (i386_optab): Replace "Imm" with "EncImm".
20 (i386_regtab): Add flags field.
21
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222000-12-12 Nick Clifton <nickc@redhat.com>
23
24 * mips.h: Fix formatting.
25
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262000-12-01 Chris Demetriou <cgd@sibyte.com>
27
28 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
29 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
30 OP_*_SYSCALL definitions.
31 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
32 19 bit wait codes.
33 (MIPS operand specifier comments): Remove 'm', add 'U' and
34 'J', and update the meaning of 'B' so that it's more general.
35
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36 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
37 INSN_ISA5): Renumber, redefine to mean the ISA at which the
38 instruction was added.
39 (INSN_ISA32): New constant.
40 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
41 Renumber to avoid new and/or renumbered INSN_* constants.
42 (INSN_MIPS32): Delete.
43 (ISA_UNKNOWN): New constant to indicate unknown ISA.
44 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
45 ISA_MIPS32): New constants, defined to be the mask of INSN_*
46 constants available at that ISA level.
47 (CPU_UNKNOWN): New constant to indicate unknown CPU.
48 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
49 define it with a unique value.
50 (OPCODE_IS_MEMBER): Update for new ISA membership-related
51 constant meanings.
52
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53 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
54 definitions.
55
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56 * mips.h (CPU_SB1): New constant.
57
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582000-10-20 Jakub Jelinek <jakub@redhat.com>
59
60 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
61 Note that '3' is used for siam operand.
62
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632000-09-22 Jim Wilson <wilson@cygnus.com>
64
65 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
66
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672000-09-13 Anders Norlander <anorland@acc.umu.se>
68
69 * mips.h: Use defines instead of hard-coded processor numbers.
70 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
71 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
72 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
73 CPU_4KC, CPU_4KM, CPU_4KP): Define..
74 (OPCODE_IS_MEMBER): Use new defines.
75 (OP_MASK_SEL, OP_SH_SEL): Define.
76 (OP_MASK_CODE20, OP_SH_CODE20): Define.
77 Add 'P' to used characters.
78 Use 'H' for coprocessor select field.
79 Use 'm' for 20 bit breakpoint code.
80 Document new arg characters and add to used characters.
81 (INSN_MIPS32): New define for MIPS32 extensions.
82 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
83
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842000-09-05 Alan Modra <alan@linuxcare.com.au>
85
86 * hppa.h: Mention cz completer.
87
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882000-08-16 Jim Wilson <wilson@cygnus.com>
89
90 * ia64.h (IA64_OPCODE_POSTINC): New.
91
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922000-08-15 H.J. Lu <hjl@gnu.org>
93
94 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
95 IgnoreSize change.
96
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972000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
98
99 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
100 Move related opcodes closer to each other.
101 Minor changes in comments, list undefined opcodes.
102
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1032000-07-26 Dave Brolley <brolley@redhat.com>
104
105 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
106
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1072000-07-20 Hans-Peter Nilsson <hp@axis.com>
108
109 cris.h: New file.
110
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1112000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
112
113 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
114 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
115 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
116 (AVR_ISA_M83): Define for ATmega83, ATmega85.
117 (espm): Remove, because ESPM removed in databook update.
118 (eicall, eijmp): Move to the end of opcode table.
119
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1202000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
121
122 * m68hc11.h: New file for support of Motorola 68hc11.
123
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124Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
125
126 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
127
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128Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
129
130 * avr.h: New file with AVR opcodes.
131
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132Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
133
134 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
135
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1362000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
137
138 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
139
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1402000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
141
142 * i386.h: Use sl_FP, not sl_Suf for fild.
143
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1442000-05-16 Frank Ch. Eigler <fche@redhat.com>
145
146 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
147 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
148 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
149 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
150
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1512000-05-13 Alan Modra <alan@linuxcare.com.au>,
152
153 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
154
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1552000-05-13 Alan Modra <alan@linuxcare.com.au>,
156 Alexander Sokolov <robocop@netlink.ru>
157
158 * i386.h (i386_optab): Add cpu_flags for all instructions.
159
1602000-05-13 Alan Modra <alan@linuxcare.com.au>
161
162 From Gavin Romig-Koch <gavin@cygnus.com>
163 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
164
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1652000-05-04 Timothy Wall <twall@cygnus.com>
166
167 * tic54x.h: New.
168
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1692000-05-03 J.T. Conklin <jtc@redback.com>
170
171 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
172 (PPC_OPERAND_VR): New operand flag for vector registers.
173
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1742000-05-01 Kazu Hirata <kazu@hxi.com>
175
176 * h8300.h (EOP): Add missing initializer.
177
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178Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
179
180 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
181 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
182 New operand types l,y,&,fe,fE,fx added to support above forms.
183 (pa_opcodes): Replaced usage of 'x' as source/target for
184 floating point double-word loads/stores with 'fx'.
185
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186Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
187 David Mosberger <davidm@hpl.hp.com>
188 Timothy Wall <twall@cygnus.com>
189 Jim Wilson <wilson@cygnus.com>
190
191 * ia64.h: New file.
192
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1932000-03-27 Nick Clifton <nickc@cygnus.com>
194
195 * d30v.h (SHORT_A1): Fix value.
196 (SHORT_AR): Renumber so that it is at the end of the list of short
197 instructions, not the end of the list of long instructions.
198
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1992000-03-26 Alan Modra <alan@linuxcare.com>
200
201 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
202 problem isn't really specific to Unixware.
203 (OLDGCC_COMPAT): Define.
204 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
205 destination %st(0).
206 Fix lots of comments.
207
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2082000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
209
210 * d30v.h:
211 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
212 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
213 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
214 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
215 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
216 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
217 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
218
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2192000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
220
221 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
222 fistpd without suffix.
223
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2242000-02-24 Nick Clifton <nickc@cygnus.com>
225
226 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
227 'signed_overflow_ok_p'.
228 Delete prototypes for cgen_set_flags() and cgen_get_flags().
229
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2302000-02-24 Andrew Haley <aph@cygnus.com>
231
232 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
233 (CGEN_CPU_TABLE): flags: new field.
234 Add prototypes for new functions.
235
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2362000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
237
238 * i386.h: Add some more UNIXWARE_COMPAT comments.
239
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2402000-02-23 Linas Vepstas <linas@linas.org>
241
242 * i370.h: New file.
243
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2442000-02-22 Andrew Haley <aph@cygnus.com>
245
246 * mips.h: (OPCODE_IS_MEMBER): Add comment.
247
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2481999-12-30 Andrew Haley <aph@cygnus.com>
249
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250 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
251 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
252 insns.
367c01af 253
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2542000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
255
256 * i386.h: Qualify intel mode far call and jmp with x_Suf.
257
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2581999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
259
260 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
261 indirect jumps and calls. Add FF/3 call for intel mode.
262
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263Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
264
265 * mn10300.h: Add new operand types. Add new instruction formats.
266
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267Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
268
269 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
270 instruction.
271
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2721999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
273
274 * mips.h (INSN_ISA5): New.
275
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2761999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
277
278 * mips.h (OPCODE_IS_MEMBER): New.
279
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2801999-10-29 Nick Clifton <nickc@cygnus.com>
281
282 * d30v.h (SHORT_AR): Define.
283
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2841999-10-18 Michael Meissner <meissner@cygnus.com>
285
286 * alpha.h (alpha_num_opcodes): Convert to unsigned.
287 (alpha_num_operands): Ditto.
288
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289Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
290
291 * hppa.h (pa_opcodes): Add load and store cache control to
292 instructions. Add ordered access load and store.
293
294 * hppa.h (pa_opcode): Add new entries for addb and addib.
295
296 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
297
298 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
299
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300Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
301
302 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
303
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304Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
305
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306 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
307 and "be" using completer prefixes.
308
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309 * hppa.h (pa_opcodes): Add initializers to silence compiler.
310
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311 * hppa.h: Update comments about character usage.
312
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313Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
314
315 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
316 up the new fstw & bve instructions.
317
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318Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
319
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320 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
321 instructions.
322
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323 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
324
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325 * hppa.h (pa_opcodes): Add long offset double word load/store
326 instructions.
327
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328 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
329 stores.
330
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331 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
332
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333 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
334
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335 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
336
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337 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
338
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339 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
340
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341 * hppa.h (pa_opcodes): Add support for "b,l".
342
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343 * hppa.h (pa_opcodes): Add support for "b,gate".
344
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345Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
346
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347 * hppa.h (pa_opcodes): Use 'fX' for first register operand
348 in xmpyu.
349
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350 * hppa.h (pa_opcodes): Fix mask for probe and probei.
351
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352 * hppa.h (pa_opcodes): Fix mask for depwi.
353
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354Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
355
356 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
357 an explicit output argument.
358
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359Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
360
361 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
362 Add a few PA2.0 loads and store variants.
363
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3641999-09-04 Steve Chamberlain <sac@pobox.com>
365
366 * pj.h: New file.
367
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3681999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
369
370 * i386.h (i386_regtab): Move %st to top of table, and split off
371 other fp reg entries.
372 (i386_float_regtab): To here.
373
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374Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
375
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376 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
377 by 'f'.
378
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379 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
380 Add supporting args.
381
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382 * hppa.h: Document new completers and args.
383 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
384 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
385 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
386 pmenb and pmdis.
387
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388 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
389 hshr, hsub, mixh, mixw, permh.
390
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391 * hppa.h (pa_opcodes): Change completers in instructions to
392 use 'c' prefix.
393
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394 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
395 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
396
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397 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
398 fnegabs to use 'I' instead of 'F'.
399
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4001999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
401
402 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
403 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
404 Alphabetically sort PIII insns.
405
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406Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
407
408 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
409
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410Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
411
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412 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
413 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
414
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415 * hppa.h: Document 64 bit condition completers.
416
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417Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
418
419 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
420
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4211999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
422
423 * i386.h (i386_optab): Add DefaultSize modifier to all insns
424 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
425 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
426
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427Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
428 Jeff Law <law@cygnus.com>
429
430 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
431
432 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
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433
434 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
435 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
436
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4371999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
438
439 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
440
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441Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
442
443 * hppa.h (struct pa_opcode): Add new field "flags".
444 (FLAGS_STRICT): Define.
445
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446Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
447 Jeff Law <law@cygnus.com>
448
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449 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
450
451 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 452
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4531999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
454
455 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
456 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
457 flag to fcomi and friends.
458
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459Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
460
461 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
462 integer logical instructions.
463
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4641999-05-28 Linus Nordberg <linus.nordberg@canit.se>
465
466 * m68k.h: Document new formats `E', `G', `H' and new places `N',
467 `n', `o'.
468
469 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
470 and new places `m', `M', `h'.
471
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472Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
473
474 * hppa.h (pa_opcodes): Add several processor specific system
475 instructions.
476
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477Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
478
479 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
480 "addb", and "addib" to be used by the disassembler.
481
c608c12e
AM
4821999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
483
484 * i386.h (ReverseModrm): Remove all occurences.
485 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
486 movmskps, pextrw, pmovmskb, maskmovq.
487 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
488 ignore the data size prefix.
489
490 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
491 Mostly stolen from Doug Ledford <dledford@redhat.com>
492
45c18104
RH
493Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
494
495 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
496
252b5132
RH
4971999-04-14 Doug Evans <devans@casey.cygnus.com>
498
499 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
500 (CGEN_ATTR_TYPE): Update.
501 (CGEN_ATTR_MASK): Number booleans starting at 0.
502 (CGEN_ATTR_VALUE): Update.
503 (CGEN_INSN_ATTR): Update.
504
505Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
506
507 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
508 instructions.
509
510Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
511
512 * hppa.h (bb, bvb): Tweak opcode/mask.
513
514
5151999-03-22 Doug Evans <devans@casey.cygnus.com>
516
517 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
518 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
519 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
520 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
521 Delete member max_insn_size.
522 (enum cgen_cpu_open_arg): New enum.
523 (cpu_open): Update prototype.
524 (cpu_open_1): Declare.
525 (cgen_set_cpu): Delete.
526
5271999-03-11 Doug Evans <devans@casey.cygnus.com>
528
529 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
530 (CGEN_OPERAND_NIL): New macro.
531 (CGEN_OPERAND): New member `type'.
532 (@arch@_cgen_operand_table): Delete decl.
533 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
534 (CGEN_OPERAND_TABLE): New struct.
535 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
536 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
537 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
538 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
539 {get,set}_{int,vma}_operand.
540 (@arch@_cgen_cpu_open): New arg `isa'.
541 (cgen_set_cpu): Ditto.
542
543Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
544
545 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
546
5471999-02-25 Doug Evans <devans@casey.cygnus.com>
548
549 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
550 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
551 enum cgen_hw_type.
552 (CGEN_HW_TABLE): New struct.
553 (hw_table): Delete declaration.
554 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
555 to table entry to enum.
556 (CGEN_OPINST): Ditto.
557 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
558
559Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
560
561 * alpha.h (AXP_OPCODE_EV6): New.
562 (AXP_OPCODE_NOPAL): Include it.
563
5641999-02-09 Doug Evans <devans@casey.cygnus.com>
565
566 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
567 All uses updated. New members int_insn_p, max_insn_size,
568 parse_operand,insert_operand,extract_operand,print_operand,
569 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
570 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
571 extract_handlers,print_handlers.
572 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
573 (CGEN_ATTR_BOOL_OFFSET): New macro.
574 (CGEN_ATTR_MASK): Subtract it to compute bit number.
575 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
576 (cgen_opcode_handler): Renamed from cgen_base.
577 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
578 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
579 all uses updated.
580 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
581 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
582 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
583 (CGEN_OPCODE,CGEN_IBASE): New types.
584 (CGEN_INSN): Rewrite.
585 (CGEN_{ASM,DIS}_HASH*): Delete.
586 (init_opcode_table,init_ibld_table): Declare.
587 (CGEN_INSN_ATTR): New type.
588
589Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
590
591 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
592 (x_FP, d_FP, dls_FP, sldx_FP): Define.
593 Change *Suf definitions to include x and d suffixes.
594 (movsx): Use w_Suf and b_Suf.
595 (movzx): Likewise.
596 (movs): Use bwld_Suf.
597 (fld): Change ordering. Use sld_FP.
598 (fild): Add Intel Syntax equivalent of fildq.
599 (fst): Use sld_FP.
600 (fist): Use sld_FP.
601 (fstp): Use sld_FP. Add x_FP version.
602 (fistp): LLongMem version for Intel Syntax.
603 (fcom, fcomp): Use sld_FP.
604 (fadd, fiadd, fsub): Use sld_FP.
605 (fsubr): Use sld_FP.
606 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
607
6081999-01-27 Doug Evans <devans@casey.cygnus.com>
609
610 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
611 CGEN_MODE_UINT.
612
613Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
614
615 * hppa.h (bv): Fix mask.
616
6171999-01-05 Doug Evans <devans@casey.cygnus.com>
618
619 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
620 (CGEN_ATTR): Use it.
621 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
622 (CGEN_ATTR_TABLE): New member dfault.
623
6241998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
625
626 * mips.h (MIPS16_INSN_BRANCH): New.
627
628Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
629
630 The following is part of a change made by Edith Epstein
631 <eepstein@sophia.cygnus.com> as part of a project to merge in
632 changes by HP; HP did not create ChangeLog entries.
633
634 * hppa.h (completer_chars): list of chars to not put a space
635 after.
636
637Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
638
639 * i386.h (i386_optab): Permit w suffix on processor control and
640 status word instructions.
641
6421998-11-30 Doug Evans <devans@casey.cygnus.com>
643
644 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
645 (struct cgen_keyword_entry): Ditto.
646 (struct cgen_operand): Ditto.
647 (CGEN_IFLD): New typedef, with associated access macros.
648 (CGEN_IFMT): New typedef, with associated access macros.
649 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
650 (CGEN_IVALUE): New typedef.
651 (struct cgen_insn): Delete const on syntax,attrs members.
652 `format' now points to format data. Type of `value' is now
653 CGEN_IVALUE.
654 (struct cgen_opcode_table): New member ifld_table.
655
6561998-11-18 Doug Evans <devans@casey.cygnus.com>
657
658 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
659 (CGEN_OPERAND_INSTANCE): New member `attrs'.
660 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
661 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
662 (cgen_opcode_table): Update type of dis_hash fn.
663 (extract_operand): Update type of `insn_value' arg.
664
665Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
666
667 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
668
669Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
670
671 * mips.h (INSN_MULT): Added.
672
673Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
674
675 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
676
677Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
678
679 * cgen.h (CGEN_INSN_INT): New typedef.
680 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
681 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
682 (CGEN_INSN_BYTES_PTR): New typedef.
683 (CGEN_EXTRACT_INFO): New typedef.
684 (cgen_insert_fn,cgen_extract_fn): Update.
685 (cgen_opcode_table): New member `insn_endian'.
686 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
687 (insert_operand,extract_operand): Update.
688 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
689
690Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
691
692 * cgen.h (CGEN_ATTR_BOOLS): New macro.
693 (struct CGEN_HW_ENTRY): New member `attrs'.
694 (CGEN_HW_ATTR): New macro.
695 (struct CGEN_OPERAND_INSTANCE): New member `name'.
696 (CGEN_INSN_INVALID_P): New macro.
697
698Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
699
700 * hppa.h: Add "fid".
701
702Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
703
704 From Robert Andrew Dale <rob@nb.net>
705 * i386.h (i386_optab): Add AMD 3DNow! instructions.
706 (AMD_3DNOW_OPCODE): Define.
707
708Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
709
710 * d30v.h (EITHER_BUT_PREFER_MU): Define.
711
712Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
713
714 * cgen.h (cgen_insn): #if 0 out element `cdx'.
715
716Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
717
718 Move all global state data into opcode table struct, and treat
719 opcode table as something that is "opened/closed".
720 * cgen.h (CGEN_OPCODE_DESC): New type.
721 (all fns): New first arg of opcode table descriptor.
722 (cgen_set_parse_operand_fn): Add prototype.
723 (cgen_current_machine,cgen_current_endian): Delete.
724 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
725 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
726 dis_hash_table,dis_hash_table_entries.
727 (opcode_open,opcode_close): Add prototypes.
728
729 * cgen.h (cgen_insn): New element `cdx'.
730
731Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
732
733 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
734
735Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
736
737 * mn10300.h: Add "no_match_operands" field for instructions.
738 (MN10300_MAX_OPERANDS): Define.
739
740Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
741
742 * cgen.h (cgen_macro_insn_count): Declare.
743
744Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
745
746 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
747 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
748 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
749 set_{int,vma}_operand.
750
751Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
752
753 * mn10300.h: Add "machine" field for instructions.
754 (MN103, AM30): Define machine types.
755
756Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
757
758 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
759
7601998-06-18 Ulrich Drepper <drepper@cygnus.com>
761
762 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
763
764Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
765
766 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
767 and ud2b.
768 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
769 those that happen to be implemented on pentiums.
770
771Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
772
773 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
774 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
775 with Size16|IgnoreSize or Size32|IgnoreSize.
776
777Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
778
779 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
780 (REPE): Rename to REPE_PREFIX_OPCODE.
781 (i386_regtab_end): Remove.
782 (i386_prefixtab, i386_prefixtab_end): Remove.
783 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
784 of md_begin.
785 (MAX_OPCODE_SIZE): Define.
786 (i386_optab_end): Remove.
787 (sl_Suf): Define.
788 (sl_FP): Use sl_Suf.
789
790 * i386.h (i386_optab): Allow 16 bit displacement for `mov
791 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
792 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
793 data32, dword, and adword prefixes.
794 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
795 regs.
796
797Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
798
799 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
800
801 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
802 register operands, because this is a common idiom. Flag them with
803 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
804 fdivrp because gcc erroneously generates them. Also flag with a
805 warning.
806
807 * i386.h: Add suffix modifiers to most insns, and tighter operand
808 checks in some cases. Fix a number of UnixWare compatibility
809 issues with float insns. Merge some floating point opcodes, using
810 new FloatMF modifier.
811 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
812 consistency.
813
814 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
815 IgnoreDataSize where appropriate.
816
817Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
818
819 * i386.h: (one_byte_segment_defaults): Remove.
820 (two_byte_segment_defaults): Remove.
821 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
822
823Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
824
825 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
826 (cgen_hw_lookup_by_num): Declare.
827
828Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
829
830 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
831 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
832
833Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
834
835 * cgen.h (cgen_asm_init_parse): Delete.
836 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
837 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
838
839Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
840
841 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
842 (cgen_asm_finish_insn): Update prototype.
843 (cgen_insn): New members num, data.
844 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
845 dis_hash, dis_hash_table_size moved to ...
846 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
847 All uses updated. New members asm_hash_p, dis_hash_p.
848 (CGEN_MINSN_EXPANSION): New struct.
849 (cgen_expand_macro_insn): Declare.
850 (cgen_macro_insn_count): Declare.
851 (get_insn_operands): Update prototype.
852 (lookup_get_insn_operands): Declare.
853
854Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
855
856 * i386.h (i386_optab): Change iclrKludge and imulKludge to
857 regKludge. Add operands types for string instructions.
858
859Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
860
861 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
862 table.
863
864Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
865
866 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
867 for `gettext'.
868
869Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
870
871 * i386.h: Remove NoModrm flag from all insns: it's never checked.
872 Add IsString flag to string instructions.
873 (IS_STRING): Don't define.
874 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
875 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
876 (SS_PREFIX_OPCODE): Define.
877
878Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
879
880 * i386.h: Revert March 24 patch; no more LinearAddress.
881
882Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
883
884 * i386.h (i386_optab): Remove fwait (9b) from all floating point
885 instructions, and instead add FWait opcode modifier. Add short
886 form of fldenv and fstenv.
887 (FWAIT_OPCODE): Define.
888
889 * i386.h (i386_optab): Change second operand constraint of `mov
890 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
891 allow legal instructions such as `movl %gs,%esi'
892
893Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
894
895 * h8300.h: Various changes to fully bracket initializers.
896
897Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
898
899 * i386.h: Set LinearAddress for lidt and lgdt.
900
901Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
902
903 * cgen.h (CGEN_BOOL_ATTR): New macro.
904
905Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
906
907 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
908
909Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
910
911 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
912 (cgen_insn): Record syntax and format entries here, rather than
913 separately.
914
915Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
916
917 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
918
919Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
920
921 * cgen.h (cgen_insert_fn): Change type of result to const char *.
922 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
923 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
924
925Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
926
927 * cgen.h (lookup_insn): New argument alias_p.
928
929Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
930
931Fix rac to accept only a0:
932 * d10v.h (OPERAND_ACC): Split into:
933 (OPERAND_ACC0, OPERAND_ACC1) .
934 (OPERAND_GPR): Define.
935
936Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
937
938 * cgen.h (CGEN_FIELDS): Define here.
939 (CGEN_HW_ENTRY): New member `type'.
940 (hw_list): Delete decl.
941 (enum cgen_mode): Declare.
942 (CGEN_OPERAND): New member `hw'.
943 (enum cgen_operand_instance_type): Declare.
944 (CGEN_OPERAND_INSTANCE): New type.
945 (CGEN_INSN): New member `operands'.
946 (CGEN_OPCODE_DATA): Make hw_list const.
947 (get_insn_operands,lookup_insn): Add prototypes for.
948
949Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
950
951 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
952 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
953 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
954 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
955
956Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
957
958 * cgen.h: Correct typo in comment end marker.
959
960Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
961
962 * tic30.h: New file.
963
964Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
965
966 * cgen.h: Add prototypes for cgen_save_fixups(),
967 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
968 of cgen_asm_finish_insn() to return a char *.
969
970Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
971
972 * cgen.h: Formatting changes to improve readability.
973
974Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
975
976 * cgen.h (*): Clean up pass over `struct foo' usage.
977 (CGEN_ATTR): Make unsigned char.
978 (CGEN_ATTR_TYPE): Update.
979 (CGEN_ATTR_{ENTRY,TABLE}): New types.
980 (cgen_base): Move member `attrs' to cgen_insn.
981 (CGEN_KEYWORD): New member `null_entry'.
982 (CGEN_{SYNTAX,FORMAT}): New types.
983 (cgen_insn): Format and syntax separated from each other.
984
985Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
986
987 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
988 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
989 flags_{used,set} long.
990 (d30v_operand): Make flags field long.
991
992Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
993
994 * m68k.h: Fix comment describing operand types.
995
996Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
997
998 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
999 everything else after down.
1000
1001Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1002
1003 * d10v.h (OPERAND_FLAG): Split into:
1004 (OPERAND_FFLAG, OPERAND_CFLAG) .
1005
1006Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1007
1008 * mips.h (struct mips_opcode): Changed comments to reflect new
1009 field usage.
1010
1011Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1012
1013 * mips.h: Added to comments a quick-ref list of all assigned
1014 operand type characters.
1015 (OP_{MASK,SH}_PERFREG): New macros.
1016
1017Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1018
1019 * sparc.h: Add '_' and '/' for v9a asr's.
1020 Patch from David Miller <davem@vger.rutgers.edu>
1021
1022Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1023
1024 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1025 area are not available in the base model (H8/300).
1026
1027Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1028
1029 * m68k.h: Remove documentation of ` operand specifier.
1030
1031Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1032
1033 * m68k.h: Document q and v operand specifiers.
1034
1035Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1036
1037 * v850.h (struct v850_opcode): Add processors field.
1038 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1039 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1040 (PROCESSOR_V850EA): New bit constants.
1041
1042Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1043
1044 Merge changes from Martin Hunt:
1045
1046 * d30v.h: Allow up to 64 control registers. Add
1047 SHORT_A5S format.
1048
1049 * d30v.h (LONG_Db): New form for delayed branches.
1050
1051 * d30v.h: (LONG_Db): New form for repeati.
1052
1053 * d30v.h (SHORT_D2B): New form.
1054
1055 * d30v.h (SHORT_A2): New form.
1056
1057 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1058 registers are used. Needed for VLIW optimization.
1059
1060Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1061
1062 * cgen.h: Move assembler interface section
1063 up so cgen_parse_operand_result is defined for cgen_parse_address.
1064 (cgen_parse_address): Update prototype.
1065
1066Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1067
1068 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1069
1070Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1071
1072 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1073 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1074 <paubert@iram.es>.
1075
1076 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1077 <paubert@iram.es>.
1078
1079 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1080 <paubert@iram.es>.
1081
1082 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1083 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1084
1085Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1086
1087 * v850.h (V850_NOT_R0): New flag.
1088
1089Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1090
1091 * v850.h (struct v850_opcode): Remove flags field.
1092
1093Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1094
1095 * v850.h (struct v850_opcode): Add flags field.
1096 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1097 fields.
1098 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1099 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1100
1101Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1102
1103 * arc.h: New file.
1104
1105Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1106
1107 * sparc.h (sparc_opcodes): Declare as const.
1108
1109Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1110
1111 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1112 uses single or double precision floating point resources.
1113 (INSN_NO_ISA, INSN_ISA1): Define.
1114 (cpu specific INSN macros): Tweak into bitmasks outside the range
1115 of INSN_ISA field.
1116
1117Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1118
1119 * i386.h: Fix pand opcode.
1120
1121Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1122
1123 * mips.h: Widen INSN_ISA and move it to a more convenient
1124 bit position. Add INSN_3900.
1125
1126Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1127
1128 * mips.h (struct mips_opcode): added new field membership.
1129
1130Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1131
1132 * i386.h (movd): only Reg32 is allowed.
1133
1134 * i386.h: add fcomp and ud2. From Wayne Scott
1135 <wscott@ichips.intel.com>.
1136
1137Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1138
1139 * i386.h: Add MMX instructions.
1140
1141Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1142
1143 * i386.h: Remove W modifier from conditional move instructions.
1144
1145Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1146
1147 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1148 with no arguments to match that generated by the UnixWare
1149 assembler.
1150
1151Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1152
1153 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1154 (cgen_parse_operand_fn): Declare.
1155 (cgen_init_parse_operand): Declare.
1156 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1157 new argument `want'.
1158 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1159 (enum cgen_parse_operand_type): New enum.
1160
1161Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1162
1163 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1164
1165Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1166
1167 * cgen.h: New file.
1168
1169Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1170
1171 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1172 fdivrp.
1173
1174Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1175
1176 * v850.h (extract): Make unsigned.
1177
1178Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1179
1180 * i386.h: Add iclr.
1181
1182Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1183
1184 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1185 take a direction bit.
1186
1187Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1188
1189 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1190
1191Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1192
1193 * sparc.h: Include <ansidecl.h>. Update function declarations to
1194 use prototypes, and to use const when appropriate.
1195
1196Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1197
1198 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1199
1200Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1201
1202 * d10v.h: Change pre_defined_registers to
1203 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1204
1205Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1206
1207 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1208 Change mips_opcodes from const array to a pointer,
1209 and change bfd_mips_num_opcodes from const int to int,
1210 so that we can increase the size of the mips opcodes table
1211 dynamically.
1212
1213Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1214
1215 * d30v.h (FLAG_X): Remove unused flag.
1216
1217Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1218
1219 * d30v.h: New file.
1220
1221Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1222
1223 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1224 (PDS_VALUE): Macro to access value field of predefined symbols.
1225 (tic80_next_predefined_symbol): Add prototype.
1226
1227Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1228
1229 * tic80.h (tic80_symbol_to_value): Change prototype to match
1230 change in function, added class parameter.
1231
1232Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1233
1234 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1235 endmask fields, which are somewhat weird in that 0 and 32 are
1236 treated exactly the same.
1237
1238Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1239
1240 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1241 rather than a constant that is 2**X. Reorder them to put bits for
1242 operands that have symbolic names in the upper bits, so they can
1243 be packed into an int where the lower bits contain the value that
1244 corresponds to that symbolic name.
1245 (predefined_symbo): Add struct.
1246 (tic80_predefined_symbols): Declare array of translations.
1247 (tic80_num_predefined_symbols): Declare size of that array.
1248 (tic80_value_to_symbol): Declare function.
1249 (tic80_symbol_to_value): Declare function.
1250
1251Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1252
1253 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1254
1255Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1256
1257 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1258 be the destination register.
1259
1260Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1261
1262 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1263 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1264 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1265 that the opcode can have two vector instructions in a single
1266 32 bit word and we have to encode/decode both.
1267
1268Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1269
1270 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1271 TIC80_OPERAND_RELATIVE for PC relative.
1272 (TIC80_OPERAND_BASEREL): New flag bit for register
1273 base relative.
1274
1275Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1276
1277 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1278
1279Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1280
1281 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1282 ":s" modifier for scaling.
1283
1284Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1285
1286 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1287 (TIC80_OPERAND_M_LI): Ditto
1288
1289Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1290
1291 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1292 (TIC80_OPERAND_CC): New define for condition code operand.
1293 (TIC80_OPERAND_CR): New define for control register operand.
1294
1295Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1296
1297 * tic80.h (struct tic80_opcode): Name changed.
1298 (struct tic80_opcode): Remove format field.
1299 (struct tic80_operand): Add insertion and extraction functions.
1300 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1301 correct ones.
1302 (FMT_*): Ditto.
1303
1304Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1305
1306 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1307 type IV instruction offsets.
1308
1309Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1310
1311 * tic80.h: New file.
1312
1313Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1314
1315 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1316
1317Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1318
1319 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1320 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1321 * v850.h: Fix comment, v850_operand not powerpc_operand.
1322
1323Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1324
1325 * mn10200.h: Flesh out structures and definitions needed by
1326 the mn10200 assembler & disassembler.
1327
1328Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1329
1330 * mips.h: Add mips16 definitions.
1331
1332Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1333
1334 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1335
1336Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1337
1338 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1339 (MN10300_OPERAND_MEMADDR): Define.
1340
1341Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1342
1343 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1344
1345Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1346
1347 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1348
1349Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1350
1351 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1352
1353Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1354
1355 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1356
1357Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1358
1359 * alpha.h: Don't include "bfd.h"; private relocation types are now
1360 negative to minimize problems with shared libraries. Organize
1361 instruction subsets by AMASK extensions and PALcode
1362 implementation.
1363 (struct alpha_operand): Move flags slot for better packing.
1364
1365Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1366
1367 * v850.h (V850_OPERAND_RELAX): New operand flag.
1368
1369Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1370
1371 * mn10300.h (FMT_*): Move operand format definitions
1372 here.
1373
1374Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1375
1376 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1377
1378Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1379
1380 * mn10300.h (mn10300_opcode): Add "format" field.
1381 (MN10300_OPERAND_*): Define.
1382
1383Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1384
1385 * mn10x00.h: Delete.
1386 * mn10200.h, mn10300.h: New files.
1387
1388Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1389
1390 * mn10x00.h: New file.
1391
1392Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1393
1394 * v850.h: Add new flag to indicate this instruction uses a PC
1395 displacement.
1396
1397Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1398
1399 * h8300.h (stmac): Add missing instruction.
1400
1401Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1402
1403 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1404 field.
1405
1406Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1407
1408 * v850.h (V850_OPERAND_EP): Define.
1409
1410 * v850.h (v850_opcode): Add size field.
1411
1412Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1413
1414 * v850.h (v850_operands): Add insert and extract fields, pointers
1415 to functions used to handle unusual operand encoding.
1416 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1417 V850_OPERAND_SIGNED): Defined.
1418
1419Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1420
1421 * v850.h (v850_operands): Add flags field.
1422 (OPERAND_REG, OPERAND_NUM): Defined.
1423
1424Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1425
1426 * v850.h: New file.
1427
1428Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1429
1430 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1431 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1432 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1433 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1434 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1435 Defined.
1436
1437Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1438
1439 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1440 a 3 bit space id instead of a 2 bit space id.
1441
1442Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1443
1444 * d10v.h: Add some additional defines to support the
1445 assembler in determining which operations can be done in parallel.
1446
1447Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1448
1449 * h8300.h (SN): Define.
1450 (eepmov.b): Renamed from "eepmov"
1451 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1452 with them.
1453
1454Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1455
1456 * d10v.h (OPERAND_SHIFT): New operand flag.
1457
1458Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1459
1460 * d10v.h: Changes for divs, parallel-only instructions, and
1461 signed numbers.
1462
1463Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1464
1465 * d10v.h (pd_reg): Define. Putting the definition here allows
1466 the assembler and disassembler to share the same struct.
1467
1468Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1469
1470 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1471 Williams <steve@icarus.com>.
1472
1473Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1474
1475 * d10v.h: New file.
1476
1477Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1478
1479 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1480
1481Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1482
1483 * m68k.h (mcf5200): New macro.
1484 Document names of coldfire control registers.
1485
1486Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1487
1488 * h8300.h (SRC_IN_DST): Define.
1489
1490 * h8300.h (UNOP3): Mark the register operand in this insn
1491 as a source operand, not a destination operand.
1492 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1493 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1494 register operand with SRC_IN_DST.
1495
1496Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1497
1498 * alpha.h: New file.
1499
1500Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1501
1502 * rs6k.h: Remove obsolete file.
1503
1504Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1505
1506 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1507 fdivp, and fdivrp. Add ffreep.
1508
1509Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1510
1511 * h8300.h: Reorder various #defines for readability.
1512 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1513 (BITOP): Accept additional (unused) argument. All callers changed.
1514 (EBITOP): Likewise.
1515 (O_LAST): Bump.
1516 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1517
1518 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1519 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1520 (BITOP, EBITOP): Handle new H8/S addressing modes for
1521 bit insns.
1522 (UNOP3): Handle new shift/rotate insns on the H8/S.
1523 (insns using exr): New instructions.
1524 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1525
1526Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1527
1528 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1529 was incorrect.
1530
1531Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1532
1533 * h8300.h (START): Remove.
1534 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1535 and mov.l insns that can be relaxed.
1536
1537Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1538
1539 * i386.h: Remove Abs32 from lcall.
1540
1541Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1542
1543 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1544 (SLCPOP): New macro.
1545 Mark X,Y opcode letters as in use.
1546
1547Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1548
1549 * sparc.h (F_FLOAT, F_FBR): Define.
1550
1551Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1552
1553 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1554 from all insns.
1555 (ABS8SRC,ABS8DST): Add ABS8MEM.
1556 (add.l): Fix reg+reg variant.
1557 (eepmov.w): Renamed from eepmovw.
1558 (ldc,stc): Fix many cases.
1559
1560Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1561
1562 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1563
1564Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1565
1566 * sparc.h (O): Mark operand letter as in use.
1567
1568Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1569
1570 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1571 Mark operand letters uU as in use.
1572
1573Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1574
1575 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1576 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1577 (SPARC_OPCODE_SUPPORTED): New macro.
1578 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1579 (F_NOTV9): Delete.
1580
1581Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1582
1583 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1584 declaration consistent with return type in definition.
1585
1586Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1587
1588 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1589
1590Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1591
1592 * i386.h (i386_regtab): Add 80486 test registers.
1593
1594Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1595
1596 * i960.h (I_HX): Define.
1597 (i960_opcodes): Add HX instruction.
1598
1599Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1600
1601 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1602 and fclex.
1603
1604Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1605
1606 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1607 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1608 (bfd_* defines): Delete.
1609 (sparc_opcode_archs): Replaces architecture_pname.
1610 (sparc_opcode_lookup_arch): Declare.
1611 (NUMOPCODES): Delete.
1612
1613Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1614
1615 * sparc.h (enum sparc_architecture): Add v9a.
1616 (ARCHITECTURES_CONFLICT_P): Update.
1617
1618Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1619
1620 * i386.h: Added Pentium Pro instructions.
1621
1622Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1623
1624 * m68k.h: Document new 'W' operand place.
1625
1626Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1627
1628 * hppa.h: Add lci and syncdma instructions.
1629
1630Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1631
1632 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1633 instructions.
1634
1635Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1636
1637 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1638 assembler's -mcom and -many switches.
1639
1640Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1641
1642 * i386.h: Fix cmpxchg8b extension opcode description.
1643
1644Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1645
1646 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1647 and register cr4.
1648
1649Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1650
1651 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1652
1653Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1654
1655 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1656
1657Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1658
1659 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1660
1661Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1662
1663 * m68kmri.h: Remove.
1664
1665 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1666 declarations. Remove F_ALIAS and flag field of struct
1667 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1668 int. Make name and args fields of struct m68k_opcode const.
1669
1670Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1671
1672 * sparc.h (F_NOTV9): Define.
1673
1674Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1675
1676 * mips.h (INSN_4010): Define.
1677
1678Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1679
1680 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1681
1682 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1683 * m68k.h: Fix argument descriptions of coprocessor
1684 instructions to allow only alterable operands where appropriate.
1685 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1686 (m68k_opcode_aliases): Add more aliases.
1687
1688Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1689
1690 * m68k.h: Added explcitly short-sized conditional branches, and a
1691 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1692 svr4-based configurations.
1693
1694Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1695
1696 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1697 * i386.h: added missing Data16/Data32 flags to a few instructions.
1698
1699Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1700
1701 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1702 (OP_MASK_BCC, OP_SH_BCC): Define.
1703 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1704 (OP_MASK_CCC, OP_SH_CCC): Define.
1705 (INSN_READ_FPR_R): Define.
1706 (INSN_RFE): Delete.
1707
1708Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1709
1710 * m68k.h (enum m68k_architecture): Deleted.
1711 (struct m68k_opcode_alias): New type.
1712 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1713 matching constraints, values and flags. As a side effect of this,
1714 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1715 as I know were never used, now may need re-examining.
1716 (numopcodes): Now const.
1717 (m68k_opcode_aliases, numaliases): New variables.
1718 (endop): Deleted.
1719 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1720 m68k_opcode_aliases; update declaration of m68k_opcodes.
1721
1722Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1723
1724 * hppa.h (delay_type): Delete unused enumeration.
1725 (pa_opcode): Replace unused delayed field with an architecture
1726 field.
1727 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1728
1729Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1730
1731 * mips.h (INSN_ISA4): Define.
1732
1733Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1734
1735 * mips.h (M_DLA_AB, M_DLI): Define.
1736
1737Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1738
1739 * hppa.h (fstwx): Fix single-bit error.
1740
1741Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1742
1743 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1744
1745Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1746
1747 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1748 debug registers. From Charles Hannum (mycroft@netbsd.org).
1749
1750Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1751
1752 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1753 i386 support:
1754 * i386.h (MOV_AX_DISP32): New macro.
1755 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1756 of several call/return instructions.
1757 (ADDR_PREFIX_OPCODE): New macro.
1758
1759Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1760
1761 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1762
1763 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1764 it pointer to const char;
1765 (struct vot, field `name'): ditto.
1766
1767Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1768
1769 * vax.h: Supply and properly group all values in end sentinel.
1770
1771Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1772
1773 * mips.h (INSN_ISA, INSN_4650): Define.
1774
1775Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1776
1777 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1778 systems with a separate instruction and data cache, such as the
1779 29040, these instructions take an optional argument.
1780
1781Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1782
1783 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1784 INSN_TRAP.
1785
1786Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1787
1788 * mips.h (INSN_STORE_MEMORY): Define.
1789
1790Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1791
1792 * sparc.h: Document new operand type 'x'.
1793
1794Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1795
1796 * i960.h (I_CX2): New instruction category. It includes
1797 instructions available on Cx and Jx processors.
1798 (I_JX): New instruction category, for JX-only instructions.
1799 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1800 Jx-only instructions, in I_JX category.
1801
1802Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1803
1804 * ns32k.h (endop): Made pointer const too.
1805
1806Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1807
1808 * ns32k.h: Drop Q operand type as there is no correct use
1809 for it. Add I and Z operand types which allow better checking.
1810
1811Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1812
1813 * h8300.h (xor.l) :fix bit pattern.
1814 (L_2): New size of operand.
1815 (trapa): Use it.
1816
1817Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1818
1819 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1820
1821Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1822
1823 * sparc.h: Include v9 definitions.
1824
1825Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1826
1827 * m68k.h (m68060): Defined.
1828 (m68040up, mfloat, mmmu): Include it.
1829 (struct m68k_opcode): Widen `arch' field.
1830 (m68k_opcodes): Updated for M68060. Removed comments that were
1831 instructions commented out by "JF" years ago.
1832
1833Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1834
1835 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1836 add a one-bit `flags' field.
1837 (F_ALIAS): New macro.
1838
1839Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1840
1841 * h8300.h (dec, inc): Get encoding right.
1842
1843Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1844
1845 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1846 a flag instead.
1847 (PPC_OPERAND_SIGNED): Define.
1848 (PPC_OPERAND_SIGNOPT): Define.
1849
1850Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1851
1852 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1853 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1854
1855Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1856
1857 * i386.h: Reverse last change. It'll be handled in gas instead.
1858
1859Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1860
1861 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1862 slower on the 486 and used the implicit shift count despite the
1863 explicit operand. The one-operand form is still available to get
1864 the shorter form with the implicit shift count.
1865
1866Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1867
1868 * hppa.h: Fix typo in fstws arg string.
1869
1870Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1871
1872 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1873
1874Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1875
1876 * ppc.h (PPC_OPCODE_601): Define.
1877
1878Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1879
1880 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1881 (so we can determine valid completers for both addb and addb[tf].)
1882
1883 * hppa.h (xmpyu): No floating point format specifier for the
1884 xmpyu instruction.
1885
1886Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1887
1888 * ppc.h (PPC_OPERAND_NEXT): Define.
1889 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1890 (struct powerpc_macro): Define.
1891 (powerpc_macros, powerpc_num_macros): Declare.
1892
1893Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1894
1895 * ppc.h: New file. Header file for PowerPC opcode table.
1896
1897Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1898
1899 * hppa.h: More minor template fixes for sfu and copr (to allow
1900 for easier disassembly).
1901
1902 * hppa.h: Fix templates for all the sfu and copr instructions.
1903
1904Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1905
1906 * i386.h (push): Permit Imm16 operand too.
1907
1908Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1909
1910 * h8300.h (andc): Exists in base arch.
1911
1912Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1913
1914 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1915 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1916
1917Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1918
1919 * hppa.h: Add FP quadword store instructions.
1920
1921Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1922
1923 * mips.h: (M_J_A): Added.
1924 (M_LA): Removed.
1925
1926Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1927
1928 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1929 <mellon@pepper.ncd.com>.
1930
1931Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1932
1933 * hppa.h: Immediate field in probei instructions is unsigned,
1934 not low-sign extended.
1935
1936Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1937
1938 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1939
1940Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1941
1942 * i386.h: Add "fxch" without operand.
1943
1944Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1945
1946 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1947
1948Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1949
1950 * hppa.h: Add gfw and gfr to the opcode table.
1951
1952Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1953
1954 * m88k.h: extended to handle m88110.
1955
1956Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1957
1958 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1959 addresses.
1960
1961Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1962
1963 * i960.h (i960_opcodes): Properly bracket initializers.
1964
1965Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1966
1967 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1968
1969Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1970
1971 * m68k.h (two): Protect second argument with parentheses.
1972
1973Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1974
1975 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1976 Deleted old in/out instructions in "#if 0" section.
1977
1978Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1979
1980 * i386.h (i386_optab): Properly bracket initializers.
1981
1982Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1983
1984 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1985 Jeff Law, law@cs.utah.edu).
1986
1987Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1988
1989 * i386.h (lcall): Accept Imm32 operand also.
1990
1991Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1992
1993 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1994 (M_DABS): Added.
1995
1996Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1997
1998 * mips.h (INSN_*): Changed values. Removed unused definitions.
1999 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2000 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2001 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2002 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2003 (M_*): Added new values for r6000 and r4000 macros.
2004 (ANY_DELAY): Removed.
2005
2006Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2007
2008 * mips.h: Added M_LI_S and M_LI_SS.
2009
2010Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2011
2012 * h8300.h: Get some rare mov.bs correct.
2013
2014Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2015
2016 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2017 been included.
2018
2019Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2020
2021 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2022 jump instructions, for use in disassemblers.
2023
2024Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2025
2026 * m88k.h: Make bitfields just unsigned, not unsigned long or
2027 unsigned short.
2028
2029Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2030
2031 * hppa.h: New argument type 'y'. Use in various float instructions.
2032
2033Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2034
2035 * hppa.h (break): First immediate field is unsigned.
2036
2037 * hppa.h: Add rfir instruction.
2038
2039Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2040
2041 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2042
2043Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2044
2045 * mips.h: Reworked the hazard information somewhat, and fixed some
2046 bugs in the instruction hazard descriptions.
2047
2048Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2049
2050 * m88k.h: Corrected a couple of opcodes.
2051
2052Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2053
2054 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2055 new version includes instruction hazard information, but is
2056 otherwise reasonably similar.
2057
2058Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2059
2060 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2061
2062Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2063
2064 Patches from Jeff Law, law@cs.utah.edu:
2065 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2066 Make the tables be the same for the following instructions:
2067 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2068 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2069 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2070 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2071 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2072 "fcmp", and "ftest".
2073
2074 * hppa.h: Make new and old tables the same for "break", "mtctl",
2075 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2076 Fix typo in last patch. Collapse several #ifdefs into a
2077 single #ifdef.
2078
2079 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2080 of the comments up-to-date.
2081
2082 * hppa.h: Update "free list" of letters and update
2083 comments describing each letter's function.
2084
2085Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2086
2087 * h8300.h: checkpoint, includes H8/300-H opcodes.
2088
2089Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2090
2091 * Patches from Jeffrey Law <law@cs.utah.edu>.
2092 * hppa.h: Rework single precision FP
2093 instructions so that they correctly disassemble code
2094 PA1.1 code.
2095
2096Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2097
2098 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2099 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2100
2101Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2102
2103 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2104 gdb will define it for now.
2105
2106Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2107
2108 * sparc.h: Don't end enumerator list with comma.
2109
2110Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2111
2112 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2113 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2114 ("bc2t"): Correct typo.
2115 ("[ls]wc[023]"): Use T rather than t.
2116 ("c[0123]"): Define general coprocessor instructions.
2117
2118Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2119
2120 * m68k.h: Move split point for gcc compilation more towards
2121 middle.
2122
2123Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2124
2125 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2126 simply wrong, ics, rfi, & rfsvc were missing).
2127 Add "a" to opr_ext for "bb". Doc fix.
2128
2129Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2130
2131 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2132 * mips.h: Add casts, to suppress warnings about shifting too much.
2133 * m68k.h: Document the placement code '9'.
2134
2135Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2136
2137 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2138 allows callers to break up the large initialized struct full of
2139 opcodes into two half-sized ones. This permits GCC to compile
2140 this module, since it takes exponential space for initializers.
2141 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2142
2143Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2144
2145 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2146 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2147 initialized structs in it.
2148
2149Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2150
2151 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2152 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2153 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2154
2155Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2156
2157 * mips.h: document "i" and "j" operands correctly.
2158
2159Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2160
2161 * mips.h: Removed endianness dependency.
2162
2163Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2164
2165 * h8300.h: include info on number of cycles per instruction.
2166
2167Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2168
2169 * hppa.h: Move handy aliases to the front. Fix masks for extract
2170 and deposit instructions.
2171
2172Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2173
2174 * i386.h: accept shld and shrd both with and without the shift
2175 count argument, which is always %cl.
2176
2177Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2178
2179 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2180 (one_byte_segment_defaults, two_byte_segment_defaults,
2181 i386_prefixtab_end): Ditto.
2182
2183Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2184
2185 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2186 for operand 2; from John Carr, jfc@dsg.dec.com.
2187
2188Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2189
2190 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2191 always use 16-bit offsets. Makes calculated-size jump tables
2192 feasible.
2193
2194Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2195
2196 * i386.h: Fix one-operand forms of in* and out* patterns.
2197
2198Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2199
2200 * m68k.h: Added CPU32 support.
2201
2202Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2203
2204 * mips.h (break): Disassemble the argument. Patch from
2205 jonathan@cs.stanford.edu (Jonathan Stone).
2206
2207Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2208
2209 * m68k.h: merged Motorola and MIT syntax.
2210
2211Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2212
2213 * m68k.h (pmove): make the tests less strict, the 68k book is
2214 wrong.
2215
2216Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2217
2218 * m68k.h (m68ec030): Defined as alias for 68030.
2219 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2220 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2221 them. Tightened description of "fmovex" to distinguish it from
2222 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2223 up descriptions that claimed versions were available for chips not
2224 supporting them. Added "pmovefd".
2225
2226Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2227
2228 * m68k.h: fix where the . goes in divull
2229
2230Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2231
2232 * m68k.h: the cas2 instruction is supposed to be written with
2233 indirection on the last two operands, which can be either data or
2234 address registers. Added a new operand type 'r' which accepts
2235 either register type. Added new cases for cas2l and cas2w which
2236 use them. Corrected masks for cas2 which failed to recognize use
2237 of address register.
2238
2239Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2240
2241 * m68k.h: Merged in patches (mostly m68040-specific) from
2242 Colin Smith <colin@wrs.com>.
2243
2244 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2245 base). Also cleaned up duplicates, re-ordered instructions for
2246 the sake of dis-assembling (so aliases come after standard names).
2247 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2248
2249Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2250
2251 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2252 all missing .s
2253
2254Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2255
2256 * sparc.h: Moved tables to BFD library.
2257
2258 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2259
2260Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2261
2262 * h8300.h: Finish filling in all the holes in the opcode table,
2263 so that the Lucid C compiler can digest this as well...
2264
2265Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2266
2267 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2268 Fix opcodes on various sizes of fild/fist instructions
2269 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2270 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2271
2272Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2273
2274 * h8300.h: Fill in all the holes in the opcode table so that the
2275 losing HPUX C compiler can digest this...
2276
2277Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2278
2279 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2280 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2281
2282Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2283
2284 * sparc.h: Add new architecture variant sparclite; add its scan
2285 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2286
2287Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2288
2289 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2290 fy@lucid.com).
2291
2292Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2293
2294 * rs6k.h: New version from IBM (Metin).
2295
2296Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2297
2298 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2299 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2300
2301Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2302
2303 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2304
2305Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2306
2307 * m68k.h (one, two): Cast macro args to unsigned to suppress
2308 complaints from compiler and lint about integer overflow during
2309 shift.
2310
2311Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2312
2313 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2314
2315Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2316
2317 * mips.h: Make bitfield layout depend on the HOST compiler,
2318 not on the TARGET system.
2319
2320Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2321
2322 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2323 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2324 <TRANLE@INTELLICORP.COM>.
2325
2326Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2327
2328 * h8300.h: turned op_type enum into #define list
2329
2330Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2331
2332 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2333 similar instructions -- they've been renamed to "fitoq", etc.
2334 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2335 number of arguments.
2336 * h8300.h: Remove extra ; which produces compiler warning.
2337
2338Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2339
2340 * sparc.h: fix opcode for tsubcctv.
2341
2342Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2343
2344 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2345
2346Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2347
2348 * sparc.h (nop): Made the 'lose' field be even tighter,
2349 so only a standard 'nop' is disassembled as a nop.
2350
2351Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2352
2353 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2354 disassembled as a nop.
2355
2356Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2357
2358 * sparc.h: fix a typo.
2359
2360Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2361
2362 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2363 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2364 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2365
2366\f
2367Local Variables:
2368version-control: never
2369End: