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[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
015cf428
NC
12001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
2
3 * h8300.h: Fix compile time warning messages
4
847b8b31
RH
52001-09-04 Richard Henderson <rth@redhat.com>
6
7 * alpha.h (struct alpha_operand): Pack elements into bitfields.
8
a98b9439
EC
92001-08-31 Eric Christopher <echristo@redhat.com>
10
11 * mips.h: Remove CPU_MIPS32_4K.
12
a6959011
AM
132001-08-27 Torbjorn Granlund <tege@swox.com>
14
15 * ppc.h (PPC_OPERAND_DS): Define.
16
d83c6548
AJ
172001-08-25 Andreas Jaeger <aj@suse.de>
18
19 * d30v.h: Fix declaration of reg_name_cnt.
20
21 * d10v.h: Fix declaration of d10v_reg_name_cnt.
22
23 * arc.h: Add prototypes from opcodes/arc-opc.c.
24
99c14723
TS
252001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
26
27 * mips.h (INSN_10000): Define.
28 (OPCODE_IS_MEMBER): Check for INSN_10000.
29
11b37b7b
AM
302001-08-10 Alan Modra <amodra@one.net.au>
31
32 * ppc.h: Revert 2001-08-08.
33
0f1bac05
AM
342001-08-08 Alan Modra <amodra@one.net.au>
35
36 1999-10-25 Torbjorn Granlund <tege@swox.com>
37 * ppc.h (struct powerpc_operand): New field `reloc'.
38
81f6038f
FCE
392001-07-11 Frank Ch. Eigler <fche@redhat.com>
40
41 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
42 (cgen_cpu_desc): Ditto.
43
32cfffe3
BE
442001-07-07 Ben Elliston <bje@redhat.com>
45
46 * m88k.h: Clean up and reformat. Remove unused code.
47
3e890047
GK
482001-06-14 Geoffrey Keating <geoffk@redhat.com>
49
50 * cgen.h (cgen_keyword): Add nonalpha_chars field.
51
d1cf510e
NC
522001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
53
54 * mips.h (CPU_R12000): Define.
55
e281c457
JH
562001-05-23 John Healy <jhealy@redhat.com>
57
58 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 59
aa5f19f2
NC
602001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
61
62 * mips.h (INSN_ISA_MASK): Define.
63
67d6227d
AM
642001-05-12 Alan Modra <amodra@one.net.au>
65
66 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
67 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
68 and use InvMem as these insns must have register operands.
69
992aaec9
AM
702001-05-04 Alan Modra <amodra@one.net.au>
71
72 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
73 and pextrw to swap reg/rm assignments.
74
4ef7f0bf
HPN
752001-04-05 Hans-Peter Nilsson <hp@axis.com>
76
77 * cris.h (enum cris_insn_version_usage): Correct comment for
78 cris_ver_v3p.
79
0f17484f
AM
802001-03-24 Alan Modra <alan@linuxcare.com.au>
81
82 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
83 Add InvMem to first operand of "maskmovdqu".
84
7ccb5238
HPN
852001-03-22 Hans-Peter Nilsson <hp@axis.com>
86
87 * cris.h (ADD_PC_INCR_OPCODE): New macro.
88
361bfa20
KH
892001-03-21 Kazu Hirata <kazu@hxi.com>
90
91 * h8300.h: Fix formatting.
92
87890af0
AM
932001-03-22 Alan Modra <alan@linuxcare.com.au>
94
95 * i386.h (i386_optab): Add paddq, psubq.
96
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AM
972001-03-19 Alan Modra <alan@linuxcare.com.au>
98
99 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
100
80a523c2
NC
1012001-02-28 Igor Shevlyakov <igor@windriver.com>
102
103 * m68k.h: new defines for Coldfire V4. Update mcf to know
104 about mcf5407.
105
e135f41b
NC
1062001-02-18 lars brinkhoff <lars@nocrew.org>
107
108 * pdp11.h: New file.
109
1102001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
111
112 * i386.h (i386_optab): SSE integer converison instructions have
113 64bit versions on x86-64.
114
8eaec934
NC
1152001-02-10 Nick Clifton <nickc@redhat.com>
116
117 * mips.h: Remove extraneous whitespace. Formating change to allow
118 for future contribution.
119
a85d7ed0
NC
1202001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
121
122 * s390.h: New file.
123
0715dc88
PM
1242001-02-02 Patrick Macdonald <patrickm@redhat.com>
125
126 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
127 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
128 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
129
296bc568
AM
1302001-01-24 Karsten Keil <kkeil@suse.de>
131
132 * i386.h (i386_optab): Fix swapgs
133
1328dc98
AM
1342001-01-14 Alan Modra <alan@linuxcare.com.au>
135
136 * hppa.h: Describe new '<' and '>' operand types, and tidy
137 existing comments.
138 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
139 Remove duplicate "ldw j(s,b),x". Sort some entries.
140
e135f41b 1412001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
142
143 * i386.h (i386_optab): Fix pusha and ret templates.
144
0d2bcfaf
NC
1452001-01-11 Peter Targett <peter.targett@arccores.com>
146
147 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
148 definitions for masking cpu type.
149 (arc_ext_operand_value) New structure for storing extended
150 operands.
151 (ARC_OPERAND_*) Flags for operand values.
152
1532001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
154
155 * i386.h (pinsrw): Add.
156 (pshufw): Remove.
157 (cvttpd2dq): Fix operands.
158 (cvttps2dq): Likewise.
159 (movq2q): Rename to movdq2q.
160
079966a8
AM
1612001-01-10 Richard Schaal <richard.schaal@intel.com>
162
163 * i386.h: Correct movnti instruction.
164
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JJ
1652001-01-09 Jeff Johnston <jjohnstn@redhat.com>
166
167 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
168 of operands (unsigned char or unsigned short).
169 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
170 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
171
0d2bcfaf 1722001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
173
174 * i386.h (i386_optab): Make [sml]fence template to use immext field.
175
0d2bcfaf 1762001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
177
178 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
179 introduced by Pentium4
180
0d2bcfaf 1812000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
182
183 * i386.h (i386_optab): Add "rex*" instructions;
184 add swapgs; disable jmp/call far direct instructions for
185 64bit mode; add syscall and sysret; disable registers for 0xc6
186 template. Add 'q' suffixes to extendable instructions, disable
079966a8 187 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
188 (i386_regtab): Add extended registers.
189 (*Suf): Add No_qSuf.
190 (q_Suf, wlq_Suf, bwlq_Suf): New.
191
0d2bcfaf 1922000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
193
194 * i386.h (i386_optab): Replace "Imm" with "EncImm".
195 (i386_regtab): Add flags field.
d83c6548 196
bf40d919
NC
1972000-12-12 Nick Clifton <nickc@redhat.com>
198
199 * mips.h: Fix formatting.
200
4372b673
NC
2012000-12-01 Chris Demetriou <cgd@sibyte.com>
202
203 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
204 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
205 OP_*_SYSCALL definitions.
206 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
207 19 bit wait codes.
208 (MIPS operand specifier comments): Remove 'm', add 'U' and
209 'J', and update the meaning of 'B' so that it's more general.
210
e7af610e
NC
211 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
212 INSN_ISA5): Renumber, redefine to mean the ISA at which the
213 instruction was added.
214 (INSN_ISA32): New constant.
215 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
216 Renumber to avoid new and/or renumbered INSN_* constants.
217 (INSN_MIPS32): Delete.
218 (ISA_UNKNOWN): New constant to indicate unknown ISA.
219 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
220 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 221 constants available at that ISA level.
e7af610e
NC
222 (CPU_UNKNOWN): New constant to indicate unknown CPU.
223 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
224 define it with a unique value.
225 (OPCODE_IS_MEMBER): Update for new ISA membership-related
226 constant meanings.
227
84ea6cf2 228 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 229 definitions.
84ea6cf2 230
c6c98b38
NC
231 * mips.h (CPU_SB1): New constant.
232
19f7b010
JJ
2332000-10-20 Jakub Jelinek <jakub@redhat.com>
234
235 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
236 Note that '3' is used for siam operand.
237
139368c9
JW
2382000-09-22 Jim Wilson <wilson@cygnus.com>
239
240 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
241
156c2f8b 2422000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 243
156c2f8b
NC
244 * mips.h: Use defines instead of hard-coded processor numbers.
245 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 246 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
247 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
248 CPU_4KC, CPU_4KM, CPU_4KP): Define..
249 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 250 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 251 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
252 Add 'P' to used characters.
253 Use 'H' for coprocessor select field.
156c2f8b 254 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
255 Document new arg characters and add to used characters.
256 (INSN_MIPS32): New define for MIPS32 extensions.
257 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 258
3c5ce02e
AM
2592000-09-05 Alan Modra <alan@linuxcare.com.au>
260
261 * hppa.h: Mention cz completer.
262
50b81f19
JW
2632000-08-16 Jim Wilson <wilson@cygnus.com>
264
265 * ia64.h (IA64_OPCODE_POSTINC): New.
266
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L
2672000-08-15 H.J. Lu <hjl@gnu.org>
268
269 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
270 IgnoreSize change.
271
4f1d9bd8
NC
2722000-08-08 Jason Eckhardt <jle@cygnus.com>
273
274 * i860.h: Small formatting adjustments.
275
45ee1401
DC
2762000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
277
278 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
279 Move related opcodes closer to each other.
280 Minor changes in comments, list undefined opcodes.
281
9d551405
DB
2822000-07-26 Dave Brolley <brolley@redhat.com>
283
284 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
285
4f1d9bd8
NC
2862000-07-22 Jason Eckhardt <jle@cygnus.com>
287
288 * i860.h (btne, bte, bla): Changed these opcodes
289 to use sbroff ('r') instead of split16 ('s').
290 (J, K, L, M): New operand types for 16-bit aligned fields.
291 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
292 use I, J, K, L, M instead of just I.
293 (T, U): New operand types for split 16-bit aligned fields.
294 (st.x): Changed these opcodes to use S, T, U instead of just S.
295 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
296 exist on the i860.
297 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
298 (pfeq.ss, pfeq.dd): New opcodes.
299 (st.s): Fixed incorrect mask bits.
300 (fmlow): Fixed incorrect mask bits.
301 (fzchkl, pfzchkl): Fixed incorrect mask bits.
302 (faddz, pfaddz): Fixed incorrect mask bits.
303 (form, pform): Fixed incorrect mask bits.
304 (pfld.l): Fixed incorrect mask bits.
305 (fst.q): Fixed incorrect mask bits.
306 (all floating point opcodes): Fixed incorrect mask bits for
307 handling of dual bit.
308
c8488617
HPN
3092000-07-20 Hans-Peter Nilsson <hp@axis.com>
310
311 cris.h: New file.
312
65aa24b6
NC
3132000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
314
315 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
316 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
317 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
318 (AVR_ISA_M83): Define for ATmega83, ATmega85.
319 (espm): Remove, because ESPM removed in databook update.
320 (eicall, eijmp): Move to the end of opcode table.
321
60bcf0fa
NC
3222000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
323
324 * m68hc11.h: New file for support of Motorola 68hc11.
325
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DC
326Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
327
328 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
329
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DC
330Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
331
332 * avr.h: New file with AVR opcodes.
333
f0662e27
DL
334Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
335
336 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
337
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AM
3382000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
339
340 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
341
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AM
3422000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
343
344 * i386.h: Use sl_FP, not sl_Suf for fild.
345
f660ee8b
FCE
3462000-05-16 Frank Ch. Eigler <fche@redhat.com>
347
348 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
349 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
350 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
351 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
352
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AM
3532000-05-13 Alan Modra <alan@linuxcare.com.au>,
354
355 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
356
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AM
3572000-05-13 Alan Modra <alan@linuxcare.com.au>,
358 Alexander Sokolov <robocop@netlink.ru>
359
360 * i386.h (i386_optab): Add cpu_flags for all instructions.
361
3622000-05-13 Alan Modra <alan@linuxcare.com.au>
363
364 From Gavin Romig-Koch <gavin@cygnus.com>
365 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
366
5c84d377
TW
3672000-05-04 Timothy Wall <twall@cygnus.com>
368
369 * tic54x.h: New.
370
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C
3712000-05-03 J.T. Conklin <jtc@redback.com>
372
373 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
374 (PPC_OPERAND_VR): New operand flag for vector registers.
375
c5d05dbb
JL
3762000-05-01 Kazu Hirata <kazu@hxi.com>
377
378 * h8300.h (EOP): Add missing initializer.
379
a7fba0e0
JL
380Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
381
382 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
383 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
384 New operand types l,y,&,fe,fE,fx added to support above forms.
385 (pa_opcodes): Replaced usage of 'x' as source/target for
386 floating point double-word loads/stores with 'fx'.
387
800eeca4
JW
388Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
389 David Mosberger <davidm@hpl.hp.com>
390 Timothy Wall <twall@cygnus.com>
391 Jim Wilson <wilson@cygnus.com>
392
393 * ia64.h: New file.
394
ba23e138
NC
3952000-03-27 Nick Clifton <nickc@cygnus.com>
396
397 * d30v.h (SHORT_A1): Fix value.
398 (SHORT_AR): Renumber so that it is at the end of the list of short
399 instructions, not the end of the list of long instructions.
400
d0b47220
AM
4012000-03-26 Alan Modra <alan@linuxcare.com>
402
403 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
404 problem isn't really specific to Unixware.
405 (OLDGCC_COMPAT): Define.
406 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
407 destination %st(0).
408 Fix lots of comments.
409
866afedc
NC
4102000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
411
412 * d30v.h:
413 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
414 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
415 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
416 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
417 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
418 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
419 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
420
cc5ca5ce
AM
4212000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
422
423 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
424 fistpd without suffix.
425
68e324a2
NC
4262000-02-24 Nick Clifton <nickc@cygnus.com>
427
428 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
429 'signed_overflow_ok_p'.
430 Delete prototypes for cgen_set_flags() and cgen_get_flags().
431
60f036a2
AH
4322000-02-24 Andrew Haley <aph@cygnus.com>
433
434 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
435 (CGEN_CPU_TABLE): flags: new field.
436 Add prototypes for new functions.
d83c6548 437
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AM
4382000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
439
440 * i386.h: Add some more UNIXWARE_COMPAT comments.
441
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AM
4422000-02-23 Linas Vepstas <linas@linas.org>
443
444 * i370.h: New file.
445
4f1d9bd8
NC
4462000-02-22 Chandra Chavva <cchavva@cygnus.com>
447
448 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
449 cannot be combined in parallel with ADD/SUBppp.
450
87f398dd
AH
4512000-02-22 Andrew Haley <aph@cygnus.com>
452
453 * mips.h: (OPCODE_IS_MEMBER): Add comment.
454
367c01af
AH
4551999-12-30 Andrew Haley <aph@cygnus.com>
456
9a1e79ca
AH
457 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
458 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
459 insns.
367c01af 460
add0c677
AM
4612000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
462
463 * i386.h: Qualify intel mode far call and jmp with x_Suf.
464
3138f287
AM
4651999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
466
467 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
468 indirect jumps and calls. Add FF/3 call for intel mode.
469
ccecd07b
JL
470Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
471
472 * mn10300.h: Add new operand types. Add new instruction formats.
473
b37e19e9
JL
474Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
475
476 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
477 instruction.
478
5fce5ddf
GRK
4791999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
480
481 * mips.h (INSN_ISA5): New.
482
2bd7f1f3
GRK
4831999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
484
485 * mips.h (OPCODE_IS_MEMBER): New.
486
4df2b5c5
NC
4871999-10-29 Nick Clifton <nickc@cygnus.com>
488
489 * d30v.h (SHORT_AR): Define.
490
446a06c9
MM
4911999-10-18 Michael Meissner <meissner@cygnus.com>
492
493 * alpha.h (alpha_num_opcodes): Convert to unsigned.
494 (alpha_num_operands): Ditto.
495
eca04c6a
JL
496Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
497
498 * hppa.h (pa_opcodes): Add load and store cache control to
499 instructions. Add ordered access load and store.
500
501 * hppa.h (pa_opcode): Add new entries for addb and addib.
502
503 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
504
505 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
506
c43185de
DN
507Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
508
509 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
510
ec3533da
JL
511Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
512
390f858d
JL
513 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
514 and "be" using completer prefixes.
515
8c47ebd9
JL
516 * hppa.h (pa_opcodes): Add initializers to silence compiler.
517
ec3533da
JL
518 * hppa.h: Update comments about character usage.
519
18369bea
JL
520Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
521
522 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
523 up the new fstw & bve instructions.
524
c36efdd2
JL
525Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
526
d3ffb032
JL
527 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
528 instructions.
529
c49ec3da
JL
530 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
531
5d2e7ecc
JL
532 * hppa.h (pa_opcodes): Add long offset double word load/store
533 instructions.
534
6397d1a2
JL
535 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
536 stores.
537
142f0fe0
JL
538 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
539
f5a68b45
JL
540 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
541
8235801e
JL
542 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
543
35184366
JL
544 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
545
f0bfde5e
JL
546 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
547
27bbbb58
JL
548 * hppa.h (pa_opcodes): Add support for "b,l".
549
c36efdd2
JL
550 * hppa.h (pa_opcodes): Add support for "b,gate".
551
f2727d04
JL
552Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
553
9392fb11 554 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 555 in xmpyu.
9392fb11 556
e0c52e99
JL
557 * hppa.h (pa_opcodes): Fix mask for probe and probei.
558
f2727d04
JL
559 * hppa.h (pa_opcodes): Fix mask for depwi.
560
52d836e2
JL
561Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
562
563 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
564 an explicit output argument.
565
90765e3a
JL
566Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
567
568 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
569 Add a few PA2.0 loads and store variants.
570
8340b17f
ILT
5711999-09-04 Steve Chamberlain <sac@pobox.com>
572
573 * pj.h: New file.
574
5f47d35b
AM
5751999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
576
577 * i386.h (i386_regtab): Move %st to top of table, and split off
578 other fp reg entries.
579 (i386_float_regtab): To here.
580
1c143202
JL
581Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
582
7d8fdb64
JL
583 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
584 by 'f'.
585
90927b9c
JL
586 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
587 Add supporting args.
588
1d16bf9c
JL
589 * hppa.h: Document new completers and args.
590 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
591 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
592 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
593 pmenb and pmdis.
594
96226a68
JL
595 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
596 hshr, hsub, mixh, mixw, permh.
597
5d4ba527
JL
598 * hppa.h (pa_opcodes): Change completers in instructions to
599 use 'c' prefix.
600
e9fc28c6
JL
601 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
602 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
603
1c143202
JL
604 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
605 fnegabs to use 'I' instead of 'F'.
606
9e525108
AM
6071999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
608
609 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
610 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
611 Alphabetically sort PIII insns.
612
e8da1bf1
DE
613Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
614
615 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
616
7d627258
JL
617Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
618
5696871a
JL
619 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
620 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
621
7d627258
JL
622 * hppa.h: Document 64 bit condition completers.
623
c5e52916
JL
624Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
625
626 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
627
eecb386c
AM
6281999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
629
630 * i386.h (i386_optab): Add DefaultSize modifier to all insns
631 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
632 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
633
88a380f3
JL
634Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
635 Jeff Law <law@cygnus.com>
636
637 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
638
639 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 640
d83c6548 641 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
642 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
643
145cf1f0
AM
6441999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
645
646 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
647
73826640
JL
648Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
649
650 * hppa.h (struct pa_opcode): Add new field "flags".
651 (FLAGS_STRICT): Define.
652
b65db252
JL
653Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
654 Jeff Law <law@cygnus.com>
655
f7fc668b
JL
656 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
657
658 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 659
10084519
AM
6601999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
661
662 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
663 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
664 flag to fcomi and friends.
665
cd8a80ba
JL
666Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
667
668 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 669 integer logical instructions.
cd8a80ba 670
1fca749b
ILT
6711999-05-28 Linus Nordberg <linus.nordberg@canit.se>
672
673 * m68k.h: Document new formats `E', `G', `H' and new places `N',
674 `n', `o'.
675
676 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
677 and new places `m', `M', `h'.
678
aa008907
JL
679Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
680
681 * hppa.h (pa_opcodes): Add several processor specific system
682 instructions.
683
e26b85f0
JL
684Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
685
d83c6548 686 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
687 "addb", and "addib" to be used by the disassembler.
688
c608c12e
AM
6891999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
690
691 * i386.h (ReverseModrm): Remove all occurences.
692 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
693 movmskps, pextrw, pmovmskb, maskmovq.
694 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
695 ignore the data size prefix.
696
697 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
698 Mostly stolen from Doug Ledford <dledford@redhat.com>
699
45c18104
RH
700Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
701
702 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
703
252b5132
RH
7041999-04-14 Doug Evans <devans@casey.cygnus.com>
705
706 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
707 (CGEN_ATTR_TYPE): Update.
708 (CGEN_ATTR_MASK): Number booleans starting at 0.
709 (CGEN_ATTR_VALUE): Update.
710 (CGEN_INSN_ATTR): Update.
711
712Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
713
714 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
715 instructions.
716
717Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
718
719 * hppa.h (bb, bvb): Tweak opcode/mask.
720
721
7221999-03-22 Doug Evans <devans@casey.cygnus.com>
723
724 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
725 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
726 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
727 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
728 Delete member max_insn_size.
729 (enum cgen_cpu_open_arg): New enum.
730 (cpu_open): Update prototype.
731 (cpu_open_1): Declare.
732 (cgen_set_cpu): Delete.
733
7341999-03-11 Doug Evans <devans@casey.cygnus.com>
735
736 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
737 (CGEN_OPERAND_NIL): New macro.
738 (CGEN_OPERAND): New member `type'.
739 (@arch@_cgen_operand_table): Delete decl.
740 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
741 (CGEN_OPERAND_TABLE): New struct.
742 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
743 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
744 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
745 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
746 {get,set}_{int,vma}_operand.
747 (@arch@_cgen_cpu_open): New arg `isa'.
748 (cgen_set_cpu): Ditto.
749
750Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
751
752 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
753
7541999-02-25 Doug Evans <devans@casey.cygnus.com>
755
756 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
757 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
758 enum cgen_hw_type.
759 (CGEN_HW_TABLE): New struct.
760 (hw_table): Delete declaration.
761 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
762 to table entry to enum.
763 (CGEN_OPINST): Ditto.
764 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
765
766Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
767
768 * alpha.h (AXP_OPCODE_EV6): New.
769 (AXP_OPCODE_NOPAL): Include it.
770
7711999-02-09 Doug Evans <devans@casey.cygnus.com>
772
773 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
774 All uses updated. New members int_insn_p, max_insn_size,
775 parse_operand,insert_operand,extract_operand,print_operand,
776 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
777 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
778 extract_handlers,print_handlers.
779 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
780 (CGEN_ATTR_BOOL_OFFSET): New macro.
781 (CGEN_ATTR_MASK): Subtract it to compute bit number.
782 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
783 (cgen_opcode_handler): Renamed from cgen_base.
784 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
785 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
786 all uses updated.
787 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
788 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
789 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
790 (CGEN_OPCODE,CGEN_IBASE): New types.
791 (CGEN_INSN): Rewrite.
792 (CGEN_{ASM,DIS}_HASH*): Delete.
793 (init_opcode_table,init_ibld_table): Declare.
794 (CGEN_INSN_ATTR): New type.
795
796Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 797
252b5132
RH
798 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
799 (x_FP, d_FP, dls_FP, sldx_FP): Define.
800 Change *Suf definitions to include x and d suffixes.
801 (movsx): Use w_Suf and b_Suf.
802 (movzx): Likewise.
803 (movs): Use bwld_Suf.
804 (fld): Change ordering. Use sld_FP.
805 (fild): Add Intel Syntax equivalent of fildq.
806 (fst): Use sld_FP.
807 (fist): Use sld_FP.
808 (fstp): Use sld_FP. Add x_FP version.
809 (fistp): LLongMem version for Intel Syntax.
810 (fcom, fcomp): Use sld_FP.
811 (fadd, fiadd, fsub): Use sld_FP.
812 (fsubr): Use sld_FP.
813 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
814
8151999-01-27 Doug Evans <devans@casey.cygnus.com>
816
817 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
818 CGEN_MODE_UINT.
819
e135f41b 8201999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
821
822 * hppa.h (bv): Fix mask.
823
8241999-01-05 Doug Evans <devans@casey.cygnus.com>
825
826 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
827 (CGEN_ATTR): Use it.
828 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
829 (CGEN_ATTR_TABLE): New member dfault.
830
8311998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
832
833 * mips.h (MIPS16_INSN_BRANCH): New.
834
835Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
836
837 The following is part of a change made by Edith Epstein
d83c6548
AJ
838 <eepstein@sophia.cygnus.com> as part of a project to merge in
839 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
840
841 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 842 after.
252b5132
RH
843
844Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
845
846 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 847 status word instructions.
252b5132
RH
848
8491998-11-30 Doug Evans <devans@casey.cygnus.com>
850
851 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
852 (struct cgen_keyword_entry): Ditto.
853 (struct cgen_operand): Ditto.
854 (CGEN_IFLD): New typedef, with associated access macros.
855 (CGEN_IFMT): New typedef, with associated access macros.
856 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
857 (CGEN_IVALUE): New typedef.
858 (struct cgen_insn): Delete const on syntax,attrs members.
859 `format' now points to format data. Type of `value' is now
860 CGEN_IVALUE.
861 (struct cgen_opcode_table): New member ifld_table.
862
8631998-11-18 Doug Evans <devans@casey.cygnus.com>
864
865 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
866 (CGEN_OPERAND_INSTANCE): New member `attrs'.
867 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
868 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
869 (cgen_opcode_table): Update type of dis_hash fn.
870 (extract_operand): Update type of `insn_value' arg.
871
872Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
873
874 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
875
876Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
877
878 * mips.h (INSN_MULT): Added.
879
880Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
881
882 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
883
884Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
885
886 * cgen.h (CGEN_INSN_INT): New typedef.
887 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
888 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
889 (CGEN_INSN_BYTES_PTR): New typedef.
890 (CGEN_EXTRACT_INFO): New typedef.
891 (cgen_insert_fn,cgen_extract_fn): Update.
892 (cgen_opcode_table): New member `insn_endian'.
893 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
894 (insert_operand,extract_operand): Update.
895 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
896
897Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
898
899 * cgen.h (CGEN_ATTR_BOOLS): New macro.
900 (struct CGEN_HW_ENTRY): New member `attrs'.
901 (CGEN_HW_ATTR): New macro.
902 (struct CGEN_OPERAND_INSTANCE): New member `name'.
903 (CGEN_INSN_INVALID_P): New macro.
904
905Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
906
907 * hppa.h: Add "fid".
d83c6548 908
252b5132
RH
909Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
910
911 From Robert Andrew Dale <rob@nb.net>
912 * i386.h (i386_optab): Add AMD 3DNow! instructions.
913 (AMD_3DNOW_OPCODE): Define.
914
915Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
916
917 * d30v.h (EITHER_BUT_PREFER_MU): Define.
918
919Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
920
921 * cgen.h (cgen_insn): #if 0 out element `cdx'.
922
923Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
924
925 Move all global state data into opcode table struct, and treat
926 opcode table as something that is "opened/closed".
927 * cgen.h (CGEN_OPCODE_DESC): New type.
928 (all fns): New first arg of opcode table descriptor.
929 (cgen_set_parse_operand_fn): Add prototype.
930 (cgen_current_machine,cgen_current_endian): Delete.
931 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
932 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
933 dis_hash_table,dis_hash_table_entries.
934 (opcode_open,opcode_close): Add prototypes.
935
936 * cgen.h (cgen_insn): New element `cdx'.
937
938Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
939
940 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
941
942Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
943
944 * mn10300.h: Add "no_match_operands" field for instructions.
945 (MN10300_MAX_OPERANDS): Define.
946
947Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
948
949 * cgen.h (cgen_macro_insn_count): Declare.
950
951Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
952
953 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
954 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
955 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
956 set_{int,vma}_operand.
957
958Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
959
960 * mn10300.h: Add "machine" field for instructions.
961 (MN103, AM30): Define machine types.
d83c6548 962
252b5132
RH
963Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
964
965 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
966
9671998-06-18 Ulrich Drepper <drepper@cygnus.com>
968
969 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
970
971Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
972
973 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
974 and ud2b.
975 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
976 those that happen to be implemented on pentiums.
977
978Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
979
980 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
981 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
982 with Size16|IgnoreSize or Size32|IgnoreSize.
983
984Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
985
986 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
987 (REPE): Rename to REPE_PREFIX_OPCODE.
988 (i386_regtab_end): Remove.
989 (i386_prefixtab, i386_prefixtab_end): Remove.
990 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
991 of md_begin.
992 (MAX_OPCODE_SIZE): Define.
993 (i386_optab_end): Remove.
994 (sl_Suf): Define.
995 (sl_FP): Use sl_Suf.
996
997 * i386.h (i386_optab): Allow 16 bit displacement for `mov
998 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
999 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1000 data32, dword, and adword prefixes.
1001 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1002 regs.
1003
1004Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1005
1006 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1007
1008 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1009 register operands, because this is a common idiom. Flag them with
1010 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1011 fdivrp because gcc erroneously generates them. Also flag with a
1012 warning.
1013
1014 * i386.h: Add suffix modifiers to most insns, and tighter operand
1015 checks in some cases. Fix a number of UnixWare compatibility
1016 issues with float insns. Merge some floating point opcodes, using
1017 new FloatMF modifier.
1018 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1019 consistency.
1020
1021 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1022 IgnoreDataSize where appropriate.
1023
1024Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1025
1026 * i386.h: (one_byte_segment_defaults): Remove.
1027 (two_byte_segment_defaults): Remove.
1028 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1029
1030Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1031
1032 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1033 (cgen_hw_lookup_by_num): Declare.
1034
1035Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1036
1037 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1038 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1039
1040Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1041
1042 * cgen.h (cgen_asm_init_parse): Delete.
1043 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1044 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1045
1046Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1047
1048 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1049 (cgen_asm_finish_insn): Update prototype.
1050 (cgen_insn): New members num, data.
1051 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1052 dis_hash, dis_hash_table_size moved to ...
1053 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1054 All uses updated. New members asm_hash_p, dis_hash_p.
1055 (CGEN_MINSN_EXPANSION): New struct.
1056 (cgen_expand_macro_insn): Declare.
1057 (cgen_macro_insn_count): Declare.
1058 (get_insn_operands): Update prototype.
1059 (lookup_get_insn_operands): Declare.
1060
1061Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1062
1063 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1064 regKludge. Add operands types for string instructions.
1065
1066Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1067
1068 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1069 table.
1070
1071Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1072
1073 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1074 for `gettext'.
1075
1076Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1077
1078 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1079 Add IsString flag to string instructions.
1080 (IS_STRING): Don't define.
1081 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1082 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1083 (SS_PREFIX_OPCODE): Define.
1084
1085Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1086
1087 * i386.h: Revert March 24 patch; no more LinearAddress.
1088
1089Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1090
1091 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1092 instructions, and instead add FWait opcode modifier. Add short
1093 form of fldenv and fstenv.
1094 (FWAIT_OPCODE): Define.
1095
1096 * i386.h (i386_optab): Change second operand constraint of `mov
1097 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1098 allow legal instructions such as `movl %gs,%esi'
1099
1100Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1101
1102 * h8300.h: Various changes to fully bracket initializers.
1103
1104Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1105
1106 * i386.h: Set LinearAddress for lidt and lgdt.
1107
1108Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1109
1110 * cgen.h (CGEN_BOOL_ATTR): New macro.
1111
1112Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1113
1114 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1115
1116Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1117
1118 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1119 (cgen_insn): Record syntax and format entries here, rather than
1120 separately.
1121
1122Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1123
1124 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1125
1126Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1127
1128 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1129 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1130 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1131
1132Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1133
1134 * cgen.h (lookup_insn): New argument alias_p.
1135
1136Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1137
1138Fix rac to accept only a0:
1139 * d10v.h (OPERAND_ACC): Split into:
1140 (OPERAND_ACC0, OPERAND_ACC1) .
1141 (OPERAND_GPR): Define.
1142
1143Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1144
1145 * cgen.h (CGEN_FIELDS): Define here.
1146 (CGEN_HW_ENTRY): New member `type'.
1147 (hw_list): Delete decl.
1148 (enum cgen_mode): Declare.
1149 (CGEN_OPERAND): New member `hw'.
1150 (enum cgen_operand_instance_type): Declare.
1151 (CGEN_OPERAND_INSTANCE): New type.
1152 (CGEN_INSN): New member `operands'.
1153 (CGEN_OPCODE_DATA): Make hw_list const.
1154 (get_insn_operands,lookup_insn): Add prototypes for.
1155
1156Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1157
1158 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1159 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1160 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1161 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1162
1163Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1164
1165 * cgen.h: Correct typo in comment end marker.
1166
1167Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1168
1169 * tic30.h: New file.
1170
5a109b67 1171Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1172
1173 * cgen.h: Add prototypes for cgen_save_fixups(),
1174 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1175 of cgen_asm_finish_insn() to return a char *.
1176
1177Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1178
1179 * cgen.h: Formatting changes to improve readability.
1180
1181Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1182
1183 * cgen.h (*): Clean up pass over `struct foo' usage.
1184 (CGEN_ATTR): Make unsigned char.
1185 (CGEN_ATTR_TYPE): Update.
1186 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1187 (cgen_base): Move member `attrs' to cgen_insn.
1188 (CGEN_KEYWORD): New member `null_entry'.
1189 (CGEN_{SYNTAX,FORMAT}): New types.
1190 (cgen_insn): Format and syntax separated from each other.
1191
1192Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1193
1194 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1195 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1196 flags_{used,set} long.
1197 (d30v_operand): Make flags field long.
1198
1199Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1200
1201 * m68k.h: Fix comment describing operand types.
1202
1203Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1204
1205 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1206 everything else after down.
1207
1208Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1209
1210 * d10v.h (OPERAND_FLAG): Split into:
1211 (OPERAND_FFLAG, OPERAND_CFLAG) .
1212
1213Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1214
1215 * mips.h (struct mips_opcode): Changed comments to reflect new
1216 field usage.
1217
1218Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1219
1220 * mips.h: Added to comments a quick-ref list of all assigned
1221 operand type characters.
1222 (OP_{MASK,SH}_PERFREG): New macros.
1223
1224Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1225
1226 * sparc.h: Add '_' and '/' for v9a asr's.
1227 Patch from David Miller <davem@vger.rutgers.edu>
1228
1229Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1230
1231 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1232 area are not available in the base model (H8/300).
1233
1234Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1235
1236 * m68k.h: Remove documentation of ` operand specifier.
1237
1238Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1239
1240 * m68k.h: Document q and v operand specifiers.
1241
1242Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1243
1244 * v850.h (struct v850_opcode): Add processors field.
1245 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1246 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1247 (PROCESSOR_V850EA): New bit constants.
1248
1249Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1250
1251 Merge changes from Martin Hunt:
1252
1253 * d30v.h: Allow up to 64 control registers. Add
1254 SHORT_A5S format.
1255
1256 * d30v.h (LONG_Db): New form for delayed branches.
1257
1258 * d30v.h: (LONG_Db): New form for repeati.
1259
1260 * d30v.h (SHORT_D2B): New form.
1261
1262 * d30v.h (SHORT_A2): New form.
1263
1264 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1265 registers are used. Needed for VLIW optimization.
1266
1267Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1268
1269 * cgen.h: Move assembler interface section
1270 up so cgen_parse_operand_result is defined for cgen_parse_address.
1271 (cgen_parse_address): Update prototype.
1272
1273Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1274
1275 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1276
1277Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1278
1279 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1280 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1281 <paubert@iram.es>.
1282
1283 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1284 <paubert@iram.es>.
1285
1286 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1287 <paubert@iram.es>.
1288
1289 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1290 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1291
1292Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1293
1294 * v850.h (V850_NOT_R0): New flag.
1295
1296Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1297
1298 * v850.h (struct v850_opcode): Remove flags field.
1299
1300Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1301
1302 * v850.h (struct v850_opcode): Add flags field.
1303 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1304 fields.
1305 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1306 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1307
1308Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1309
1310 * arc.h: New file.
1311
1312Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1313
1314 * sparc.h (sparc_opcodes): Declare as const.
1315
1316Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1317
1318 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1319 uses single or double precision floating point resources.
1320 (INSN_NO_ISA, INSN_ISA1): Define.
1321 (cpu specific INSN macros): Tweak into bitmasks outside the range
1322 of INSN_ISA field.
1323
1324Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1325
1326 * i386.h: Fix pand opcode.
1327
1328Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1329
1330 * mips.h: Widen INSN_ISA and move it to a more convenient
1331 bit position. Add INSN_3900.
1332
1333Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1334
1335 * mips.h (struct mips_opcode): added new field membership.
1336
1337Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1338
1339 * i386.h (movd): only Reg32 is allowed.
1340
1341 * i386.h: add fcomp and ud2. From Wayne Scott
1342 <wscott@ichips.intel.com>.
1343
1344Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1345
1346 * i386.h: Add MMX instructions.
1347
1348Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1349
1350 * i386.h: Remove W modifier from conditional move instructions.
1351
1352Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1353
1354 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1355 with no arguments to match that generated by the UnixWare
1356 assembler.
1357
1358Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1359
1360 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1361 (cgen_parse_operand_fn): Declare.
1362 (cgen_init_parse_operand): Declare.
1363 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1364 new argument `want'.
1365 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1366 (enum cgen_parse_operand_type): New enum.
1367
1368Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1369
1370 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1371
1372Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1373
1374 * cgen.h: New file.
1375
1376Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1377
1378 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1379 fdivrp.
1380
1381Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1382
1383 * v850.h (extract): Make unsigned.
1384
1385Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1386
1387 * i386.h: Add iclr.
1388
1389Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1390
1391 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1392 take a direction bit.
1393
1394Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1395
1396 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1397
1398Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1399
1400 * sparc.h: Include <ansidecl.h>. Update function declarations to
1401 use prototypes, and to use const when appropriate.
1402
1403Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1404
1405 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1406
1407Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1408
1409 * d10v.h: Change pre_defined_registers to
1410 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1411
1412Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1413
1414 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1415 Change mips_opcodes from const array to a pointer,
1416 and change bfd_mips_num_opcodes from const int to int,
1417 so that we can increase the size of the mips opcodes table
1418 dynamically.
1419
1420Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1421
1422 * d30v.h (FLAG_X): Remove unused flag.
1423
1424Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1425
1426 * d30v.h: New file.
1427
1428Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1429
1430 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1431 (PDS_VALUE): Macro to access value field of predefined symbols.
1432 (tic80_next_predefined_symbol): Add prototype.
1433
1434Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1435
1436 * tic80.h (tic80_symbol_to_value): Change prototype to match
1437 change in function, added class parameter.
1438
1439Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1440
1441 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1442 endmask fields, which are somewhat weird in that 0 and 32 are
1443 treated exactly the same.
1444
1445Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1446
1447 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1448 rather than a constant that is 2**X. Reorder them to put bits for
1449 operands that have symbolic names in the upper bits, so they can
1450 be packed into an int where the lower bits contain the value that
1451 corresponds to that symbolic name.
1452 (predefined_symbo): Add struct.
1453 (tic80_predefined_symbols): Declare array of translations.
1454 (tic80_num_predefined_symbols): Declare size of that array.
1455 (tic80_value_to_symbol): Declare function.
1456 (tic80_symbol_to_value): Declare function.
1457
1458Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1459
1460 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1461
1462Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1463
1464 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1465 be the destination register.
1466
1467Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1468
1469 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1470 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1471 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1472 that the opcode can have two vector instructions in a single
1473 32 bit word and we have to encode/decode both.
1474
1475Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1476
1477 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1478 TIC80_OPERAND_RELATIVE for PC relative.
1479 (TIC80_OPERAND_BASEREL): New flag bit for register
1480 base relative.
1481
1482Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1483
1484 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1485
1486Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1487
1488 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1489 ":s" modifier for scaling.
1490
1491Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1492
1493 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1494 (TIC80_OPERAND_M_LI): Ditto
1495
1496Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1497
1498 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1499 (TIC80_OPERAND_CC): New define for condition code operand.
1500 (TIC80_OPERAND_CR): New define for control register operand.
1501
1502Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1503
1504 * tic80.h (struct tic80_opcode): Name changed.
1505 (struct tic80_opcode): Remove format field.
1506 (struct tic80_operand): Add insertion and extraction functions.
1507 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1508 correct ones.
1509 (FMT_*): Ditto.
1510
1511Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1512
1513 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1514 type IV instruction offsets.
1515
1516Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1517
1518 * tic80.h: New file.
1519
1520Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1521
1522 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1523
1524Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1525
1526 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1527 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1528 * v850.h: Fix comment, v850_operand not powerpc_operand.
1529
1530Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1531
1532 * mn10200.h: Flesh out structures and definitions needed by
1533 the mn10200 assembler & disassembler.
1534
1535Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1536
1537 * mips.h: Add mips16 definitions.
1538
1539Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1540
1541 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1542
1543Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1544
1545 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1546 (MN10300_OPERAND_MEMADDR): Define.
1547
1548Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1549
1550 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1551
1552Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1553
1554 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1555
1556Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1557
1558 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1559
1560Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1561
1562 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1563
1564Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1565
1566 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1567 negative to minimize problems with shared libraries. Organize
1568 instruction subsets by AMASK extensions and PALcode
1569 implementation.
252b5132
RH
1570 (struct alpha_operand): Move flags slot for better packing.
1571
1572Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1573
1574 * v850.h (V850_OPERAND_RELAX): New operand flag.
1575
1576Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1577
1578 * mn10300.h (FMT_*): Move operand format definitions
1579 here.
1580
1581Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1582
1583 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1584
1585Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1586
1587 * mn10300.h (mn10300_opcode): Add "format" field.
1588 (MN10300_OPERAND_*): Define.
1589
1590Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1591
1592 * mn10x00.h: Delete.
1593 * mn10200.h, mn10300.h: New files.
1594
1595Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1596
1597 * mn10x00.h: New file.
1598
1599Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1600
1601 * v850.h: Add new flag to indicate this instruction uses a PC
1602 displacement.
1603
1604Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1605
1606 * h8300.h (stmac): Add missing instruction.
1607
1608Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1609
1610 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1611 field.
1612
1613Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1614
1615 * v850.h (V850_OPERAND_EP): Define.
1616
1617 * v850.h (v850_opcode): Add size field.
1618
1619Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1620
1621 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1622 to functions used to handle unusual operand encoding.
252b5132 1623 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1624 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1625
1626Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1627
1628 * v850.h (v850_operands): Add flags field.
1629 (OPERAND_REG, OPERAND_NUM): Defined.
1630
1631Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1632
1633 * v850.h: New file.
1634
1635Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1636
1637 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1638 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1639 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1640 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1641 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1642 Defined.
252b5132
RH
1643
1644Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1645
1646 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1647 a 3 bit space id instead of a 2 bit space id.
1648
1649Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1650
1651 * d10v.h: Add some additional defines to support the
d83c6548 1652 assembler in determining which operations can be done in parallel.
252b5132
RH
1653
1654Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1655
1656 * h8300.h (SN): Define.
1657 (eepmov.b): Renamed from "eepmov"
1658 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1659 with them.
1660
1661Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1662
1663 * d10v.h (OPERAND_SHIFT): New operand flag.
1664
1665Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1666
1667 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1668 signed numbers.
252b5132
RH
1669
1670Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1671
1672 * d10v.h (pd_reg): Define. Putting the definition here allows
1673 the assembler and disassembler to share the same struct.
1674
1675Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1676
1677 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1678 Williams <steve@icarus.com>.
1679
1680Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1681
1682 * d10v.h: New file.
1683
1684Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1685
1686 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1687
1688Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1689
d83c6548 1690 * m68k.h (mcf5200): New macro.
252b5132
RH
1691 Document names of coldfire control registers.
1692
1693Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1694
1695 * h8300.h (SRC_IN_DST): Define.
1696
1697 * h8300.h (UNOP3): Mark the register operand in this insn
1698 as a source operand, not a destination operand.
1699 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1700 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1701 register operand with SRC_IN_DST.
1702
1703Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1704
1705 * alpha.h: New file.
1706
1707Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1708
1709 * rs6k.h: Remove obsolete file.
1710
1711Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1712
1713 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1714 fdivp, and fdivrp. Add ffreep.
1715
1716Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1717
1718 * h8300.h: Reorder various #defines for readability.
1719 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1720 (BITOP): Accept additional (unused) argument. All callers changed.
1721 (EBITOP): Likewise.
1722 (O_LAST): Bump.
1723 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1724
1725 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1726 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1727 (BITOP, EBITOP): Handle new H8/S addressing modes for
1728 bit insns.
1729 (UNOP3): Handle new shift/rotate insns on the H8/S.
1730 (insns using exr): New instructions.
1731 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1732
1733Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1734
1735 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1736 was incorrect.
1737
1738Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1739
1740 * h8300.h (START): Remove.
1741 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1742 and mov.l insns that can be relaxed.
1743
1744Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1745
1746 * i386.h: Remove Abs32 from lcall.
1747
1748Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1749
1750 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1751 (SLCPOP): New macro.
1752 Mark X,Y opcode letters as in use.
1753
1754Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1755
1756 * sparc.h (F_FLOAT, F_FBR): Define.
1757
1758Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1759
1760 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1761 from all insns.
1762 (ABS8SRC,ABS8DST): Add ABS8MEM.
1763 (add.l): Fix reg+reg variant.
1764 (eepmov.w): Renamed from eepmovw.
1765 (ldc,stc): Fix many cases.
1766
1767Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1768
1769 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1770
1771Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1772
1773 * sparc.h (O): Mark operand letter as in use.
1774
1775Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1776
1777 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1778 Mark operand letters uU as in use.
1779
1780Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1781
1782 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1783 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1784 (SPARC_OPCODE_SUPPORTED): New macro.
1785 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1786 (F_NOTV9): Delete.
1787
1788Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1789
1790 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1791 declaration consistent with return type in definition.
1792
1793Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1794
1795 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1796
1797Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1798
1799 * i386.h (i386_regtab): Add 80486 test registers.
1800
1801Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1802
1803 * i960.h (I_HX): Define.
1804 (i960_opcodes): Add HX instruction.
1805
1806Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1807
1808 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1809 and fclex.
1810
1811Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1812
1813 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1814 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1815 (bfd_* defines): Delete.
1816 (sparc_opcode_archs): Replaces architecture_pname.
1817 (sparc_opcode_lookup_arch): Declare.
1818 (NUMOPCODES): Delete.
1819
1820Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1821
1822 * sparc.h (enum sparc_architecture): Add v9a.
1823 (ARCHITECTURES_CONFLICT_P): Update.
1824
1825Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1826
1827 * i386.h: Added Pentium Pro instructions.
1828
1829Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1830
1831 * m68k.h: Document new 'W' operand place.
1832
1833Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1834
1835 * hppa.h: Add lci and syncdma instructions.
1836
1837Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1838
1839 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1840 instructions.
252b5132
RH
1841
1842Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1843
1844 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1845 assembler's -mcom and -many switches.
1846
1847Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1848
1849 * i386.h: Fix cmpxchg8b extension opcode description.
1850
1851Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1852
1853 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1854 and register cr4.
1855
1856Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1857
1858 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1859
1860Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1861
1862 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1863
1864Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1865
1866 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1867
1868Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1869
1870 * m68kmri.h: Remove.
1871
1872 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1873 declarations. Remove F_ALIAS and flag field of struct
1874 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1875 int. Make name and args fields of struct m68k_opcode const.
1876
1877Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1878
1879 * sparc.h (F_NOTV9): Define.
1880
1881Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1882
1883 * mips.h (INSN_4010): Define.
1884
1885Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1886
1887 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1888
1889 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1890 * m68k.h: Fix argument descriptions of coprocessor
1891 instructions to allow only alterable operands where appropriate.
1892 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1893 (m68k_opcode_aliases): Add more aliases.
1894
1895Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1896
1897 * m68k.h: Added explcitly short-sized conditional branches, and a
1898 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1899 svr4-based configurations.
1900
1901Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1902
1903 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1904 * i386.h: added missing Data16/Data32 flags to a few instructions.
1905
1906Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1907
1908 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1909 (OP_MASK_BCC, OP_SH_BCC): Define.
1910 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1911 (OP_MASK_CCC, OP_SH_CCC): Define.
1912 (INSN_READ_FPR_R): Define.
1913 (INSN_RFE): Delete.
1914
1915Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1916
1917 * m68k.h (enum m68k_architecture): Deleted.
1918 (struct m68k_opcode_alias): New type.
1919 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1920 matching constraints, values and flags. As a side effect of this,
1921 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1922 as I know were never used, now may need re-examining.
1923 (numopcodes): Now const.
1924 (m68k_opcode_aliases, numaliases): New variables.
1925 (endop): Deleted.
1926 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1927 m68k_opcode_aliases; update declaration of m68k_opcodes.
1928
1929Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1930
1931 * hppa.h (delay_type): Delete unused enumeration.
1932 (pa_opcode): Replace unused delayed field with an architecture
1933 field.
1934 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1935
1936Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1937
1938 * mips.h (INSN_ISA4): Define.
1939
1940Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1941
1942 * mips.h (M_DLA_AB, M_DLI): Define.
1943
1944Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1945
1946 * hppa.h (fstwx): Fix single-bit error.
1947
1948Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1949
1950 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1951
1952Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1953
1954 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1955 debug registers. From Charles Hannum (mycroft@netbsd.org).
1956
1957Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1958
1959 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1960 i386 support:
1961 * i386.h (MOV_AX_DISP32): New macro.
1962 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1963 of several call/return instructions.
1964 (ADDR_PREFIX_OPCODE): New macro.
1965
1966Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1967
1968 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1969
4f1d9bd8
NC
1970 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1971 char.
252b5132
RH
1972 (struct vot, field `name'): ditto.
1973
1974Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1975
1976 * vax.h: Supply and properly group all values in end sentinel.
1977
1978Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1979
1980 * mips.h (INSN_ISA, INSN_4650): Define.
1981
1982Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1983
1984 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1985 systems with a separate instruction and data cache, such as the
1986 29040, these instructions take an optional argument.
1987
1988Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1989
1990 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1991 INSN_TRAP.
1992
1993Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1994
1995 * mips.h (INSN_STORE_MEMORY): Define.
1996
1997Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1998
1999 * sparc.h: Document new operand type 'x'.
2000
2001Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2002
2003 * i960.h (I_CX2): New instruction category. It includes
2004 instructions available on Cx and Jx processors.
2005 (I_JX): New instruction category, for JX-only instructions.
2006 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2007 Jx-only instructions, in I_JX category.
2008
2009Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2010
2011 * ns32k.h (endop): Made pointer const too.
2012
2013Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2014
2015 * ns32k.h: Drop Q operand type as there is no correct use
2016 for it. Add I and Z operand types which allow better checking.
2017
2018Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2019
2020 * h8300.h (xor.l) :fix bit pattern.
2021 (L_2): New size of operand.
2022 (trapa): Use it.
2023
2024Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2025
2026 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2027
2028Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2029
2030 * sparc.h: Include v9 definitions.
2031
2032Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2033
2034 * m68k.h (m68060): Defined.
2035 (m68040up, mfloat, mmmu): Include it.
2036 (struct m68k_opcode): Widen `arch' field.
2037 (m68k_opcodes): Updated for M68060. Removed comments that were
2038 instructions commented out by "JF" years ago.
2039
2040Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2041
2042 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2043 add a one-bit `flags' field.
2044 (F_ALIAS): New macro.
2045
2046Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2047
2048 * h8300.h (dec, inc): Get encoding right.
2049
2050Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2051
2052 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2053 a flag instead.
2054 (PPC_OPERAND_SIGNED): Define.
2055 (PPC_OPERAND_SIGNOPT): Define.
2056
2057Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2058
2059 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2060 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2061
2062Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2063
2064 * i386.h: Reverse last change. It'll be handled in gas instead.
2065
2066Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2067
2068 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2069 slower on the 486 and used the implicit shift count despite the
2070 explicit operand. The one-operand form is still available to get
2071 the shorter form with the implicit shift count.
2072
2073Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2074
2075 * hppa.h: Fix typo in fstws arg string.
2076
2077Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2078
2079 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2080
2081Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2082
2083 * ppc.h (PPC_OPCODE_601): Define.
2084
2085Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2086
2087 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2088 (so we can determine valid completers for both addb and addb[tf].)
2089
2090 * hppa.h (xmpyu): No floating point format specifier for the
2091 xmpyu instruction.
2092
2093Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2094
2095 * ppc.h (PPC_OPERAND_NEXT): Define.
2096 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2097 (struct powerpc_macro): Define.
2098 (powerpc_macros, powerpc_num_macros): Declare.
2099
2100Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2101
2102 * ppc.h: New file. Header file for PowerPC opcode table.
2103
2104Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2105
2106 * hppa.h: More minor template fixes for sfu and copr (to allow
2107 for easier disassembly).
2108
2109 * hppa.h: Fix templates for all the sfu and copr instructions.
2110
2111Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2112
2113 * i386.h (push): Permit Imm16 operand too.
2114
2115Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2116
2117 * h8300.h (andc): Exists in base arch.
2118
2119Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2120
2121 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2122 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2123
2124Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2125
2126 * hppa.h: Add FP quadword store instructions.
2127
2128Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2129
2130 * mips.h: (M_J_A): Added.
2131 (M_LA): Removed.
2132
2133Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2134
2135 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2136 <mellon@pepper.ncd.com>.
2137
2138Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2139
2140 * hppa.h: Immediate field in probei instructions is unsigned,
2141 not low-sign extended.
2142
2143Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2144
2145 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2146
2147Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2148
2149 * i386.h: Add "fxch" without operand.
2150
2151Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2152
2153 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2154
2155Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2156
2157 * hppa.h: Add gfw and gfr to the opcode table.
2158
2159Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2160
2161 * m88k.h: extended to handle m88110.
2162
2163Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2164
2165 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2166 addresses.
2167
2168Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2169
2170 * i960.h (i960_opcodes): Properly bracket initializers.
2171
2172Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2173
2174 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2175
2176Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2177
2178 * m68k.h (two): Protect second argument with parentheses.
2179
2180Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2181
2182 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2183 Deleted old in/out instructions in "#if 0" section.
2184
2185Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2186
2187 * i386.h (i386_optab): Properly bracket initializers.
2188
2189Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2190
2191 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2192 Jeff Law, law@cs.utah.edu).
2193
2194Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2195
2196 * i386.h (lcall): Accept Imm32 operand also.
2197
2198Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2199
2200 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2201 (M_DABS): Added.
2202
2203Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2204
2205 * mips.h (INSN_*): Changed values. Removed unused definitions.
2206 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2207 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2208 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2209 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2210 (M_*): Added new values for r6000 and r4000 macros.
2211 (ANY_DELAY): Removed.
2212
2213Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2214
2215 * mips.h: Added M_LI_S and M_LI_SS.
2216
2217Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2218
2219 * h8300.h: Get some rare mov.bs correct.
2220
2221Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2222
2223 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2224 been included.
2225
2226Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2227
2228 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2229 jump instructions, for use in disassemblers.
2230
2231Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2232
2233 * m88k.h: Make bitfields just unsigned, not unsigned long or
2234 unsigned short.
2235
2236Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2237
2238 * hppa.h: New argument type 'y'. Use in various float instructions.
2239
2240Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2241
2242 * hppa.h (break): First immediate field is unsigned.
2243
2244 * hppa.h: Add rfir instruction.
2245
2246Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2247
2248 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2249
2250Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2251
2252 * mips.h: Reworked the hazard information somewhat, and fixed some
2253 bugs in the instruction hazard descriptions.
2254
2255Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2256
2257 * m88k.h: Corrected a couple of opcodes.
2258
2259Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2260
2261 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2262 new version includes instruction hazard information, but is
2263 otherwise reasonably similar.
2264
2265Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2266
2267 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2268
2269Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2270
2271 Patches from Jeff Law, law@cs.utah.edu:
2272 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2273 Make the tables be the same for the following instructions:
2274 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2275 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2276 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2277 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2278 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2279 "fcmp", and "ftest".
2280
2281 * hppa.h: Make new and old tables the same for "break", "mtctl",
2282 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2283 Fix typo in last patch. Collapse several #ifdefs into a
2284 single #ifdef.
2285
2286 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2287 of the comments up-to-date.
2288
2289 * hppa.h: Update "free list" of letters and update
2290 comments describing each letter's function.
2291
4f1d9bd8
NC
2292Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2293
2294 * h8300.h: Lots of little fixes for the h8/300h.
2295
2296Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2297
2298 Support for H8/300-H
2299 * h8300.h: Lots of new opcodes.
2300
252b5132
RH
2301Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2302
2303 * h8300.h: checkpoint, includes H8/300-H opcodes.
2304
2305Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2306
2307 * Patches from Jeffrey Law <law@cs.utah.edu>.
2308 * hppa.h: Rework single precision FP
2309 instructions so that they correctly disassemble code
2310 PA1.1 code.
2311
2312Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2313
2314 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2315 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2316
2317Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2318
2319 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2320 gdb will define it for now.
2321
2322Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2323
2324 * sparc.h: Don't end enumerator list with comma.
2325
2326Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2327
2328 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2329 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2330 ("bc2t"): Correct typo.
2331 ("[ls]wc[023]"): Use T rather than t.
2332 ("c[0123]"): Define general coprocessor instructions.
2333
2334Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2335
2336 * m68k.h: Move split point for gcc compilation more towards
2337 middle.
2338
2339Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2340
2341 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2342 simply wrong, ics, rfi, & rfsvc were missing).
2343 Add "a" to opr_ext for "bb". Doc fix.
2344
2345Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2346
2347 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2348 * mips.h: Add casts, to suppress warnings about shifting too much.
2349 * m68k.h: Document the placement code '9'.
2350
2351Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2352
2353 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2354 allows callers to break up the large initialized struct full of
2355 opcodes into two half-sized ones. This permits GCC to compile
2356 this module, since it takes exponential space for initializers.
2357 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2358
2359Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2360
2361 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2362 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2363 initialized structs in it.
2364
2365Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2366
2367 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2368 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2369 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2370
2371Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2372
2373 * mips.h: document "i" and "j" operands correctly.
2374
2375Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2376
2377 * mips.h: Removed endianness dependency.
2378
2379Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2380
2381 * h8300.h: include info on number of cycles per instruction.
2382
2383Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2384
2385 * hppa.h: Move handy aliases to the front. Fix masks for extract
2386 and deposit instructions.
2387
2388Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2389
2390 * i386.h: accept shld and shrd both with and without the shift
2391 count argument, which is always %cl.
2392
2393Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2394
2395 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2396 (one_byte_segment_defaults, two_byte_segment_defaults,
2397 i386_prefixtab_end): Ditto.
2398
2399Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2400
2401 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2402 for operand 2; from John Carr, jfc@dsg.dec.com.
2403
2404Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2405
2406 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2407 always use 16-bit offsets. Makes calculated-size jump tables
2408 feasible.
2409
2410Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2411
2412 * i386.h: Fix one-operand forms of in* and out* patterns.
2413
2414Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2415
2416 * m68k.h: Added CPU32 support.
2417
2418Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2419
2420 * mips.h (break): Disassemble the argument. Patch from
2421 jonathan@cs.stanford.edu (Jonathan Stone).
2422
2423Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2424
2425 * m68k.h: merged Motorola and MIT syntax.
2426
2427Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2428
2429 * m68k.h (pmove): make the tests less strict, the 68k book is
2430 wrong.
2431
2432Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2433
2434 * m68k.h (m68ec030): Defined as alias for 68030.
2435 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2436 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2437 them. Tightened description of "fmovex" to distinguish it from
2438 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2439 up descriptions that claimed versions were available for chips not
2440 supporting them. Added "pmovefd".
2441
2442Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2443
2444 * m68k.h: fix where the . goes in divull
2445
2446Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2447
2448 * m68k.h: the cas2 instruction is supposed to be written with
2449 indirection on the last two operands, which can be either data or
2450 address registers. Added a new operand type 'r' which accepts
2451 either register type. Added new cases for cas2l and cas2w which
2452 use them. Corrected masks for cas2 which failed to recognize use
2453 of address register.
2454
2455Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2456
2457 * m68k.h: Merged in patches (mostly m68040-specific) from
2458 Colin Smith <colin@wrs.com>.
2459
2460 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2461 base). Also cleaned up duplicates, re-ordered instructions for
2462 the sake of dis-assembling (so aliases come after standard names).
2463 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2464
2465Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2466
2467 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2468 all missing .s
2469
2470Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2471
2472 * sparc.h: Moved tables to BFD library.
2473
2474 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2475
2476Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2477
2478 * h8300.h: Finish filling in all the holes in the opcode table,
2479 so that the Lucid C compiler can digest this as well...
2480
2481Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2482
2483 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2484 Fix opcodes on various sizes of fild/fist instructions
2485 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2486 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2487
2488Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2489
2490 * h8300.h: Fill in all the holes in the opcode table so that the
2491 losing HPUX C compiler can digest this...
2492
2493Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2494
2495 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2496 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2497
2498Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2499
2500 * sparc.h: Add new architecture variant sparclite; add its scan
2501 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2502
2503Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2504
2505 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2506 fy@lucid.com).
2507
2508Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2509
2510 * rs6k.h: New version from IBM (Metin).
2511
2512Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2513
2514 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2515 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2516
2517Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2518
2519 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2520
2521Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2522
2523 * m68k.h (one, two): Cast macro args to unsigned to suppress
2524 complaints from compiler and lint about integer overflow during
2525 shift.
2526
2527Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2528
2529 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2530
2531Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2532
2533 * mips.h: Make bitfield layout depend on the HOST compiler,
2534 not on the TARGET system.
2535
2536Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2537
2538 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2539 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2540 <TRANLE@INTELLICORP.COM>.
2541
2542Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2543
2544 * h8300.h: turned op_type enum into #define list
2545
2546Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2547
2548 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2549 similar instructions -- they've been renamed to "fitoq", etc.
2550 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2551 number of arguments.
2552 * h8300.h: Remove extra ; which produces compiler warning.
2553
2554Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2555
2556 * sparc.h: fix opcode for tsubcctv.
2557
2558Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2559
2560 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2561
2562Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2563
2564 * sparc.h (nop): Made the 'lose' field be even tighter,
2565 so only a standard 'nop' is disassembled as a nop.
2566
2567Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2568
2569 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2570 disassembled as a nop.
2571
4f1d9bd8
NC
2572Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2573
2574 * m68k.h, sparc.h: ANSIfy enums.
2575
252b5132
RH
2576Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2577
2578 * sparc.h: fix a typo.
2579
2580Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2581
2582 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2583 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2584 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2585
2586\f
2587Local Variables:
2588version-control: never
2589End: