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[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
60a2978a
DC		 1Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
2
3 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
4
68ab2dd9
DC		 5Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
6
7 * avr.h: New file with AVR opcodes.
8
f0662e27
DL		 9Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
10
11 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
12
b722f2be
AM		 132000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
14
15 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
16
f9e0cf0b
AM		 172000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
18
19 * i386.h: Use sl_FP, not sl_Suf for fild.
20
f660ee8b
FCE		 212000-05-16 Frank Ch. Eigler <fche@redhat.com>
22
23 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
24 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
25 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
26 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
27
558b0a60
AM		 282000-05-13 Alan Modra <alan@linuxcare.com.au>,
29
30 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
31
e413e4e9
AM		 322000-05-13 Alan Modra <alan@linuxcare.com.au>,
33 Alexander Sokolov <robocop@netlink.ru>
34
35 * i386.h (i386_optab): Add cpu_flags for all instructions.
36
372000-05-13 Alan Modra <alan@linuxcare.com.au>
38
39 From Gavin Romig-Koch <gavin@cygnus.com>
40 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
41
5c84d377
TW		 422000-05-04 Timothy Wall <twall@cygnus.com>
43
44 * tic54x.h: New.
45
966f959b
C		 462000-05-03 J.T. Conklin <jtc@redback.com>
47
48 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
49 (PPC_OPERAND_VR): New operand flag for vector registers.
50
c5d05dbb
JL		 512000-05-01 Kazu Hirata <kazu@hxi.com>
52
53 * h8300.h (EOP): Add missing initializer.
54
a7fba0e0
JL		 55Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
56
57 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
58 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
59 New operand types l,y,&,fe,fE,fx added to support above forms.
60 (pa_opcodes): Replaced usage of 'x' as source/target for
61 floating point double-word loads/stores with 'fx'.
62
800eeca4
JW		 63Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
64 David Mosberger <davidm@hpl.hp.com>
65 Timothy Wall <twall@cygnus.com>
66 Jim Wilson <wilson@cygnus.com>
67
68 * ia64.h: New file.
69
ba23e138
NC		 702000-03-27 Nick Clifton <nickc@cygnus.com>
71
72 * d30v.h (SHORT_A1): Fix value.
73 (SHORT_AR): Renumber so that it is at the end of the list of short
74 instructions, not the end of the list of long instructions.
75
d0b47220
AM		 762000-03-26 Alan Modra <alan@linuxcare.com>
77
78 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
79 problem isn't really specific to Unixware.
80 (OLDGCC_COMPAT): Define.
81 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
82 destination %st(0).
83 Fix lots of comments.
84
866afedc
NC		 852000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
86
87 * d30v.h:
88 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
89 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
90 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
91 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
92 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
93 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
94 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
95
cc5ca5ce
AM		 962000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
97
98 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
99 fistpd without suffix.
100
68e324a2
NC		 1012000-02-24 Nick Clifton <nickc@cygnus.com>
102
103 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
104 'signed_overflow_ok_p'.
105 Delete prototypes for cgen_set_flags() and cgen_get_flags().
106
60f036a2
AH		 1072000-02-24 Andrew Haley <aph@cygnus.com>
108
109 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
110 (CGEN_CPU_TABLE): flags: new field.
111 Add prototypes for new functions.
112
9b9b5cd4
AM		 1132000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
114
115 * i386.h: Add some more UNIXWARE_COMPAT comments.
116
5b93d8bb
AM		 1172000-02-23 Linas Vepstas <linas@linas.org>
118
119 * i370.h: New file.
120
87f398dd
AH		 1212000-02-22 Andrew Haley <aph@cygnus.com>
122
123 * mips.h: (OPCODE_IS_MEMBER): Add comment.
124
367c01af
AH		 1251999-12-30 Andrew Haley <aph@cygnus.com>
126
9a1e79ca
AH		 127 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
128 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
129 insns.
367c01af 130
add0c677
AM		 1312000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
132
133 * i386.h: Qualify intel mode far call and jmp with x_Suf.
134
3138f287
AM		 1351999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
136
137 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
138 indirect jumps and calls. Add FF/3 call for intel mode.
139
ccecd07b
JL		 140Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
141
142 * mn10300.h: Add new operand types. Add new instruction formats.
143
b37e19e9
JL		 144Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
145
146 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
147 instruction.
148
5fce5ddf
GRK		 1491999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
150
151 * mips.h (INSN_ISA5): New.
152
2bd7f1f3
GRK		 1531999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
154
155 * mips.h (OPCODE_IS_MEMBER): New.
156
4df2b5c5
NC		 1571999-10-29 Nick Clifton <nickc@cygnus.com>
158
159 * d30v.h (SHORT_AR): Define.
160
446a06c9
MM		 1611999-10-18 Michael Meissner <meissner@cygnus.com>
162
163 * alpha.h (alpha_num_opcodes): Convert to unsigned.
164 (alpha_num_operands): Ditto.
165
eca04c6a
JL		 166Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
167
168 * hppa.h (pa_opcodes): Add load and store cache control to
169 instructions. Add ordered access load and store.
170
171 * hppa.h (pa_opcode): Add new entries for addb and addib.
172
173 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
174
175 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
176
c43185de
DN		 177Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
178
179 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
180
ec3533da
JL		 181Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
182
390f858d
JL		 183 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
184 and "be" using completer prefixes.
185
8c47ebd9
JL		 186 * hppa.h (pa_opcodes): Add initializers to silence compiler.
187
ec3533da
JL		 188 * hppa.h: Update comments about character usage.
189
18369bea
JL		 190Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
191
192 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
193 up the new fstw & bve instructions.
194
c36efdd2
JL		 195Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
196
d3ffb032
JL		 197 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
198 instructions.
199
c49ec3da
JL		 200 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
201
5d2e7ecc
JL		 202 * hppa.h (pa_opcodes): Add long offset double word load/store
203 instructions.
204
6397d1a2
JL		 205 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
206 stores.
207
142f0fe0
JL		 208 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
209
f5a68b45
JL		 210 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
211
8235801e
JL		 212 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
213
35184366
JL		 214 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
215
f0bfde5e
JL		 216 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
217
27bbbb58
JL		 218 * hppa.h (pa_opcodes): Add support for "b,l".
219
c36efdd2
JL		 220 * hppa.h (pa_opcodes): Add support for "b,gate".
221
f2727d04
JL		 222Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
223
9392fb11
JL		 224 * hppa.h (pa_opcodes): Use 'fX' for first register operand
225 in xmpyu.
226
e0c52e99
JL		 227 * hppa.h (pa_opcodes): Fix mask for probe and probei.
228
f2727d04
JL		 229 * hppa.h (pa_opcodes): Fix mask for depwi.
230
52d836e2
JL		 231Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
232
233 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
234 an explicit output argument.
235
90765e3a
JL		 236Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
237
238 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
239 Add a few PA2.0 loads and store variants.
240
8340b17f
ILT		 2411999-09-04 Steve Chamberlain <sac@pobox.com>
242
243 * pj.h: New file.
244
5f47d35b
AM		 2451999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
246
247 * i386.h (i386_regtab): Move %st to top of table, and split off
248 other fp reg entries.
249 (i386_float_regtab): To here.
250
1c143202
JL		 251Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
252
7d8fdb64
JL		 253 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
254 by 'f'.
255
90927b9c
JL		 256 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
257 Add supporting args.
258
1d16bf9c
JL		 259 * hppa.h: Document new completers and args.
260 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
261 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
262 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
263 pmenb and pmdis.
264
96226a68
JL		 265 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
266 hshr, hsub, mixh, mixw, permh.
267
5d4ba527
JL		 268 * hppa.h (pa_opcodes): Change completers in instructions to
269 use 'c' prefix.
270
e9fc28c6
JL		 271 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
272 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
273
1c143202
JL		 274 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
275 fnegabs to use 'I' instead of 'F'.
276
9e525108
AM		 2771999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
278
279 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
280 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
281 Alphabetically sort PIII insns.
282
e8da1bf1
DE		 283Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
284
285 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
286
7d627258
JL		 287Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
288
5696871a
JL		 289 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
290 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
291
7d627258
JL		 292 * hppa.h: Document 64 bit condition completers.
293
c5e52916
JL		 294Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
295
296 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
297
eecb386c
AM		 2981999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
299
300 * i386.h (i386_optab): Add DefaultSize modifier to all insns
301 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
302 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
303
88a380f3
JL		 304Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
305 Jeff Law <law@cygnus.com>
306
307 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
308
309 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL		 310
311 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
312 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
313
145cf1f0
AM		 3141999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
315
316 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
317
73826640
JL		 318Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
319
320 * hppa.h (struct pa_opcode): Add new field "flags".
321 (FLAGS_STRICT): Define.
322
b65db252
JL		 323Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
324 Jeff Law <law@cygnus.com>
325
f7fc668b
JL		 326 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
327
328 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 329
10084519
AM		 3301999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
331
332 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
333 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
334 flag to fcomi and friends.
335
cd8a80ba
JL		 336Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
337
338 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
339 integer logical instructions.
340
1fca749b
ILT		 3411999-05-28 Linus Nordberg <linus.nordberg@canit.se>
342
343 * m68k.h: Document new formats `E', `G', `H' and new places `N',
344 `n', `o'.
345
346 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
347 and new places `m', `M', `h'.
348
aa008907
JL		 349Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
350
351 * hppa.h (pa_opcodes): Add several processor specific system
352 instructions.
353
e26b85f0
JL		 354Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
355
356 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
357 "addb", and "addib" to be used by the disassembler.
358
c608c12e
AM		 3591999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
360
361 * i386.h (ReverseModrm): Remove all occurences.
362 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
363 movmskps, pextrw, pmovmskb, maskmovq.
364 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
365 ignore the data size prefix.
366
367 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
368 Mostly stolen from Doug Ledford <dledford@redhat.com>
369
45c18104
RH		 370Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
371
372 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
373
252b5132
RH		 3741999-04-14 Doug Evans <devans@casey.cygnus.com>
375
376 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
377 (CGEN_ATTR_TYPE): Update.
378 (CGEN_ATTR_MASK): Number booleans starting at 0.
379 (CGEN_ATTR_VALUE): Update.
380 (CGEN_INSN_ATTR): Update.
381
382Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
383
384 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
385 instructions.
386
387Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
388
389 * hppa.h (bb, bvb): Tweak opcode/mask.
390
391
3921999-03-22 Doug Evans <devans@casey.cygnus.com>
393
394 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
395 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
396 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
397 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
398 Delete member max_insn_size.
399 (enum cgen_cpu_open_arg): New enum.
400 (cpu_open): Update prototype.
401 (cpu_open_1): Declare.
402 (cgen_set_cpu): Delete.
403
4041999-03-11 Doug Evans <devans@casey.cygnus.com>
405
406 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
407 (CGEN_OPERAND_NIL): New macro.
408 (CGEN_OPERAND): New member `type'.
409 (@arch@_cgen_operand_table): Delete decl.
410 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
411 (CGEN_OPERAND_TABLE): New struct.
412 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
413 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
414 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
415 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
416 {get,set}_{int,vma}_operand.
417 (@arch@_cgen_cpu_open): New arg `isa'.
418 (cgen_set_cpu): Ditto.
419
420Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
421
422 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
423
4241999-02-25 Doug Evans <devans@casey.cygnus.com>
425
426 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
427 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
428 enum cgen_hw_type.
429 (CGEN_HW_TABLE): New struct.
430 (hw_table): Delete declaration.
431 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
432 to table entry to enum.
433 (CGEN_OPINST): Ditto.
434 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
435
436Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
437
438 * alpha.h (AXP_OPCODE_EV6): New.
439 (AXP_OPCODE_NOPAL): Include it.
440
4411999-02-09 Doug Evans <devans@casey.cygnus.com>
442
443 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
444 All uses updated. New members int_insn_p, max_insn_size,
445 parse_operand,insert_operand,extract_operand,print_operand,
446 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
447 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
448 extract_handlers,print_handlers.
449 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
450 (CGEN_ATTR_BOOL_OFFSET): New macro.
451 (CGEN_ATTR_MASK): Subtract it to compute bit number.
452 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
453 (cgen_opcode_handler): Renamed from cgen_base.
454 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
455 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
456 all uses updated.
457 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
458 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
459 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
460 (CGEN_OPCODE,CGEN_IBASE): New types.
461 (CGEN_INSN): Rewrite.
462 (CGEN_{ASM,DIS}_HASH*): Delete.
463 (init_opcode_table,init_ibld_table): Declare.
464 (CGEN_INSN_ATTR): New type.
465
466Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
467
468 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
469 (x_FP, d_FP, dls_FP, sldx_FP): Define.
470 Change *Suf definitions to include x and d suffixes.
471 (movsx): Use w_Suf and b_Suf.
472 (movzx): Likewise.
473 (movs): Use bwld_Suf.
474 (fld): Change ordering. Use sld_FP.
475 (fild): Add Intel Syntax equivalent of fildq.
476 (fst): Use sld_FP.
477 (fist): Use sld_FP.
478 (fstp): Use sld_FP. Add x_FP version.
479 (fistp): LLongMem version for Intel Syntax.
480 (fcom, fcomp): Use sld_FP.
481 (fadd, fiadd, fsub): Use sld_FP.
482 (fsubr): Use sld_FP.
483 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
484
4851999-01-27 Doug Evans <devans@casey.cygnus.com>
486
487 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
488 CGEN_MODE_UINT.
489
490Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
491
492 * hppa.h (bv): Fix mask.
493
4941999-01-05 Doug Evans <devans@casey.cygnus.com>
495
496 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
497 (CGEN_ATTR): Use it.
498 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
499 (CGEN_ATTR_TABLE): New member dfault.
500
5011998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
502
503 * mips.h (MIPS16_INSN_BRANCH): New.
504
505Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
506
507 The following is part of a change made by Edith Epstein
508 <eepstein@sophia.cygnus.com> as part of a project to merge in
509 changes by HP; HP did not create ChangeLog entries.
510
511 * hppa.h (completer_chars): list of chars to not put a space
512 after.
513
514Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
515
516 * i386.h (i386_optab): Permit w suffix on processor control and
517 status word instructions.
518
5191998-11-30 Doug Evans <devans@casey.cygnus.com>
520
521 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
522 (struct cgen_keyword_entry): Ditto.
523 (struct cgen_operand): Ditto.
524 (CGEN_IFLD): New typedef, with associated access macros.
525 (CGEN_IFMT): New typedef, with associated access macros.
526 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
527 (CGEN_IVALUE): New typedef.
528 (struct cgen_insn): Delete const on syntax,attrs members.
529 `format' now points to format data. Type of `value' is now
530 CGEN_IVALUE.
531 (struct cgen_opcode_table): New member ifld_table.
532
5331998-11-18 Doug Evans <devans@casey.cygnus.com>
534
535 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
536 (CGEN_OPERAND_INSTANCE): New member `attrs'.
537 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
538 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
539 (cgen_opcode_table): Update type of dis_hash fn.
540 (extract_operand): Update type of `insn_value' arg.
541
542Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
543
544 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
545
546Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
547
548 * mips.h (INSN_MULT): Added.
549
550Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
551
552 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
553
554Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
555
556 * cgen.h (CGEN_INSN_INT): New typedef.
557 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
558 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
559 (CGEN_INSN_BYTES_PTR): New typedef.
560 (CGEN_EXTRACT_INFO): New typedef.
561 (cgen_insert_fn,cgen_extract_fn): Update.
562 (cgen_opcode_table): New member `insn_endian'.
563 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
564 (insert_operand,extract_operand): Update.
565 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
566
567Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
568
569 * cgen.h (CGEN_ATTR_BOOLS): New macro.
570 (struct CGEN_HW_ENTRY): New member `attrs'.
571 (CGEN_HW_ATTR): New macro.
572 (struct CGEN_OPERAND_INSTANCE): New member `name'.
573 (CGEN_INSN_INVALID_P): New macro.
574
575Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
576
577 * hppa.h: Add "fid".
578
579Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
580
581 From Robert Andrew Dale <rob@nb.net>
582 * i386.h (i386_optab): Add AMD 3DNow! instructions.
583 (AMD_3DNOW_OPCODE): Define.
584
585Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
586
587 * d30v.h (EITHER_BUT_PREFER_MU): Define.
588
589Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
590
591 * cgen.h (cgen_insn): #if 0 out element `cdx'.
592
593Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
594
595 Move all global state data into opcode table struct, and treat
596 opcode table as something that is "opened/closed".
597 * cgen.h (CGEN_OPCODE_DESC): New type.
598 (all fns): New first arg of opcode table descriptor.
599 (cgen_set_parse_operand_fn): Add prototype.
600 (cgen_current_machine,cgen_current_endian): Delete.
601 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
602 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
603 dis_hash_table,dis_hash_table_entries.
604 (opcode_open,opcode_close): Add prototypes.
605
606 * cgen.h (cgen_insn): New element `cdx'.
607
608Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
609
610 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
611
612Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
613
614 * mn10300.h: Add "no_match_operands" field for instructions.
615 (MN10300_MAX_OPERANDS): Define.
616
617Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
618
619 * cgen.h (cgen_macro_insn_count): Declare.
620
621Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
622
623 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
624 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
625 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
626 set_{int,vma}_operand.
627
628Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
629
630 * mn10300.h: Add "machine" field for instructions.
631 (MN103, AM30): Define machine types.
632
633Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
634
635 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
636
6371998-06-18 Ulrich Drepper <drepper@cygnus.com>
638
639 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
640
641Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
642
643 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
644 and ud2b.
645 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
646 those that happen to be implemented on pentiums.
647
648Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
649
650 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
651 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
652 with Size16|IgnoreSize or Size32|IgnoreSize.
653
654Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
655
656 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
657 (REPE): Rename to REPE_PREFIX_OPCODE.
658 (i386_regtab_end): Remove.
659 (i386_prefixtab, i386_prefixtab_end): Remove.
660 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
661 of md_begin.
662 (MAX_OPCODE_SIZE): Define.
663 (i386_optab_end): Remove.
664 (sl_Suf): Define.
665 (sl_FP): Use sl_Suf.
666
667 * i386.h (i386_optab): Allow 16 bit displacement for `mov
668 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
669 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
670 data32, dword, and adword prefixes.
671 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
672 regs.
673
674Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
675
676 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
677
678 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
679 register operands, because this is a common idiom. Flag them with
680 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
681 fdivrp because gcc erroneously generates them. Also flag with a
682 warning.
683
684 * i386.h: Add suffix modifiers to most insns, and tighter operand
685 checks in some cases. Fix a number of UnixWare compatibility
686 issues with float insns. Merge some floating point opcodes, using
687 new FloatMF modifier.
688 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
689 consistency.
690
691 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
692 IgnoreDataSize where appropriate.
693
694Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
695
696 * i386.h: (one_byte_segment_defaults): Remove.
697 (two_byte_segment_defaults): Remove.
698 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
699
700Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
701
702 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
703 (cgen_hw_lookup_by_num): Declare.
704
705Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
706
707 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
708 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
709
710Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
711
712 * cgen.h (cgen_asm_init_parse): Delete.
713 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
714 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
715
716Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
717
718 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
719 (cgen_asm_finish_insn): Update prototype.
720 (cgen_insn): New members num, data.
721 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
722 dis_hash, dis_hash_table_size moved to ...
723 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
724 All uses updated. New members asm_hash_p, dis_hash_p.
725 (CGEN_MINSN_EXPANSION): New struct.
726 (cgen_expand_macro_insn): Declare.
727 (cgen_macro_insn_count): Declare.
728 (get_insn_operands): Update prototype.
729 (lookup_get_insn_operands): Declare.
730
731Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
732
733 * i386.h (i386_optab): Change iclrKludge and imulKludge to
734 regKludge. Add operands types for string instructions.
735
736Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
737
738 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
739 table.
740
741Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
742
743 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
744 for `gettext'.
745
746Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
747
748 * i386.h: Remove NoModrm flag from all insns: it's never checked.
749 Add IsString flag to string instructions.
750 (IS_STRING): Don't define.
751 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
752 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
753 (SS_PREFIX_OPCODE): Define.
754
755Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
756
757 * i386.h: Revert March 24 patch; no more LinearAddress.
758
759Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
760
761 * i386.h (i386_optab): Remove fwait (9b) from all floating point
762 instructions, and instead add FWait opcode modifier. Add short
763 form of fldenv and fstenv.
764 (FWAIT_OPCODE): Define.
765
766 * i386.h (i386_optab): Change second operand constraint of `mov
767 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
768 allow legal instructions such as `movl %gs,%esi'
769
770Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
771
772 * h8300.h: Various changes to fully bracket initializers.
773
774Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
775
776 * i386.h: Set LinearAddress for lidt and lgdt.
777
778Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
779
780 * cgen.h (CGEN_BOOL_ATTR): New macro.
781
782Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
783
784 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
785
786Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
787
788 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
789 (cgen_insn): Record syntax and format entries here, rather than
790 separately.
791
792Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
793
794 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
795
796Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
797
798 * cgen.h (cgen_insert_fn): Change type of result to const char *.
799 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
800 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
801
802Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
803
804 * cgen.h (lookup_insn): New argument alias_p.
805
806Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
807
808Fix rac to accept only a0:
809 * d10v.h (OPERAND_ACC): Split into:
810 (OPERAND_ACC0, OPERAND_ACC1) .
811 (OPERAND_GPR): Define.
812
813Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
814
815 * cgen.h (CGEN_FIELDS): Define here.
816 (CGEN_HW_ENTRY): New member `type'.
817 (hw_list): Delete decl.
818 (enum cgen_mode): Declare.
819 (CGEN_OPERAND): New member `hw'.
820 (enum cgen_operand_instance_type): Declare.
821 (CGEN_OPERAND_INSTANCE): New type.
822 (CGEN_INSN): New member `operands'.
823 (CGEN_OPCODE_DATA): Make hw_list const.
824 (get_insn_operands,lookup_insn): Add prototypes for.
825
826Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
827
828 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
829 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
830 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
831 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
832
833Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
834
835 * cgen.h: Correct typo in comment end marker.
836
837Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
838
839 * tic30.h: New file.
840
841Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
842
843 * cgen.h: Add prototypes for cgen_save_fixups(),
844 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
845 of cgen_asm_finish_insn() to return a char *.
846
847Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
848
849 * cgen.h: Formatting changes to improve readability.
850
851Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
852
853 * cgen.h (*): Clean up pass over `struct foo' usage.
854 (CGEN_ATTR): Make unsigned char.
855 (CGEN_ATTR_TYPE): Update.
856 (CGEN_ATTR_{ENTRY,TABLE}): New types.
857 (cgen_base): Move member `attrs' to cgen_insn.
858 (CGEN_KEYWORD): New member `null_entry'.
859 (CGEN_{SYNTAX,FORMAT}): New types.
860 (cgen_insn): Format and syntax separated from each other.
861
862Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
863
864 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
865 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
866 flags_{used,set} long.
867 (d30v_operand): Make flags field long.
868
869Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
870
871 * m68k.h: Fix comment describing operand types.
872
873Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
874
875 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
876 everything else after down.
877
878Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
879
880 * d10v.h (OPERAND_FLAG): Split into:
881 (OPERAND_FFLAG, OPERAND_CFLAG) .
882
883Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
884
885 * mips.h (struct mips_opcode): Changed comments to reflect new
886 field usage.
887
888Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
889
890 * mips.h: Added to comments a quick-ref list of all assigned
891 operand type characters.
892 (OP_{MASK,SH}_PERFREG): New macros.
893
894Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
895
896 * sparc.h: Add '_' and '/' for v9a asr's.
897 Patch from David Miller <davem@vger.rutgers.edu>
898
899Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
900
901 * h8300.h: Bit ops with absolute addresses not in the 8 bit
902 area are not available in the base model (H8/300).
903
904Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
905
906 * m68k.h: Remove documentation of ` operand specifier.
907
908Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
909
910 * m68k.h: Document q and v operand specifiers.
911
912Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
913
914 * v850.h (struct v850_opcode): Add processors field.
915 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
916 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
917 (PROCESSOR_V850EA): New bit constants.
918
919Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
920
921 Merge changes from Martin Hunt:
922
923 * d30v.h: Allow up to 64 control registers. Add
924 SHORT_A5S format.
925
926 * d30v.h (LONG_Db): New form for delayed branches.
927
928 * d30v.h: (LONG_Db): New form for repeati.
929
930 * d30v.h (SHORT_D2B): New form.
931
932 * d30v.h (SHORT_A2): New form.
933
934 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
935 registers are used. Needed for VLIW optimization.
936
937Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
938
939 * cgen.h: Move assembler interface section
940 up so cgen_parse_operand_result is defined for cgen_parse_address.
941 (cgen_parse_address): Update prototype.
942
943Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
944
945 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
946
947Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
948
949 * i386.h (two_byte_segment_defaults): Correct base register 5 in
950 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
951 <paubert@iram.es>.
952
953 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
954 <paubert@iram.es>.
955
956 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
957 <paubert@iram.es>.
958
959 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
960 (JUMP_ON_ECX_ZERO): Remove commented out macro.
961
962Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
963
964 * v850.h (V850_NOT_R0): New flag.
965
966Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
967
968 * v850.h (struct v850_opcode): Remove flags field.
969
970Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
971
972 * v850.h (struct v850_opcode): Add flags field.
973 (struct v850_operand): Extend meaning of 'bits' and 'shift'
974 fields.
975 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
976 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
977
978Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
979
980 * arc.h: New file.
981
982Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
983
984 * sparc.h (sparc_opcodes): Declare as const.
985
986Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
987
988 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
989 uses single or double precision floating point resources.
990 (INSN_NO_ISA, INSN_ISA1): Define.
991 (cpu specific INSN macros): Tweak into bitmasks outside the range
992 of INSN_ISA field.
993
994Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
995
996 * i386.h: Fix pand opcode.
997
998Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
999
1000 * mips.h: Widen INSN_ISA and move it to a more convenient
1001 bit position. Add INSN_3900.
1002
1003Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1004
1005 * mips.h (struct mips_opcode): added new field membership.
1006
1007Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1008
1009 * i386.h (movd): only Reg32 is allowed.
1010
1011 * i386.h: add fcomp and ud2. From Wayne Scott
1012 <wscott@ichips.intel.com>.
1013
1014Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1015
1016 * i386.h: Add MMX instructions.
1017
1018Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1019
1020 * i386.h: Remove W modifier from conditional move instructions.
1021
1022Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1023
1024 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1025 with no arguments to match that generated by the UnixWare
1026 assembler.
1027
1028Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1029
1030 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1031 (cgen_parse_operand_fn): Declare.
1032 (cgen_init_parse_operand): Declare.
1033 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1034 new argument `want'.
1035 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1036 (enum cgen_parse_operand_type): New enum.
1037
1038Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1039
1040 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1041
1042Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1043
1044 * cgen.h: New file.
1045
1046Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1047
1048 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1049 fdivrp.
1050
1051Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1052
1053 * v850.h (extract): Make unsigned.
1054
1055Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1056
1057 * i386.h: Add iclr.
1058
1059Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1060
1061 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1062 take a direction bit.
1063
1064Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1065
1066 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1067
1068Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1069
1070 * sparc.h: Include <ansidecl.h>. Update function declarations to
1071 use prototypes, and to use const when appropriate.
1072
1073Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1074
1075 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1076
1077Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1078
1079 * d10v.h: Change pre_defined_registers to
1080 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1081
1082Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1083
1084 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1085 Change mips_opcodes from const array to a pointer,
1086 and change bfd_mips_num_opcodes from const int to int,
1087 so that we can increase the size of the mips opcodes table
1088 dynamically.
1089
1090Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1091
1092 * d30v.h (FLAG_X): Remove unused flag.
1093
1094Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1095
1096 * d30v.h: New file.
1097
1098Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1099
1100 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1101 (PDS_VALUE): Macro to access value field of predefined symbols.
1102 (tic80_next_predefined_symbol): Add prototype.
1103
1104Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1105
1106 * tic80.h (tic80_symbol_to_value): Change prototype to match
1107 change in function, added class parameter.
1108
1109Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1110
1111 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1112 endmask fields, which are somewhat weird in that 0 and 32 are
1113 treated exactly the same.
1114
1115Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1116
1117 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1118 rather than a constant that is 2**X. Reorder them to put bits for
1119 operands that have symbolic names in the upper bits, so they can
1120 be packed into an int where the lower bits contain the value that
1121 corresponds to that symbolic name.
1122 (predefined_symbo): Add struct.
1123 (tic80_predefined_symbols): Declare array of translations.
1124 (tic80_num_predefined_symbols): Declare size of that array.
1125 (tic80_value_to_symbol): Declare function.
1126 (tic80_symbol_to_value): Declare function.
1127
1128Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1129
1130 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1131
1132Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1133
1134 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1135 be the destination register.
1136
1137Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1138
1139 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1140 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1141 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1142 that the opcode can have two vector instructions in a single
1143 32 bit word and we have to encode/decode both.
1144
1145Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1146
1147 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1148 TIC80_OPERAND_RELATIVE for PC relative.
1149 (TIC80_OPERAND_BASEREL): New flag bit for register
1150 base relative.
1151
1152Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1153
1154 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1155
1156Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1157
1158 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1159 ":s" modifier for scaling.
1160
1161Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1162
1163 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1164 (TIC80_OPERAND_M_LI): Ditto
1165
1166Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1167
1168 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1169 (TIC80_OPERAND_CC): New define for condition code operand.
1170 (TIC80_OPERAND_CR): New define for control register operand.
1171
1172Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1173
1174 * tic80.h (struct tic80_opcode): Name changed.
1175 (struct tic80_opcode): Remove format field.
1176 (struct tic80_operand): Add insertion and extraction functions.
1177 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1178 correct ones.
1179 (FMT_*): Ditto.
1180
1181Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1182
1183 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1184 type IV instruction offsets.
1185
1186Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1187
1188 * tic80.h: New file.
1189
1190Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1191
1192 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1193
1194Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1195
1196 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1197 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1198 * v850.h: Fix comment, v850_operand not powerpc_operand.
1199
1200Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1201
1202 * mn10200.h: Flesh out structures and definitions needed by
1203 the mn10200 assembler & disassembler.
1204
1205Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1206
1207 * mips.h: Add mips16 definitions.
1208
1209Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1210
1211 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1212
1213Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1214
1215 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1216 (MN10300_OPERAND_MEMADDR): Define.
1217
1218Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1219
1220 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1221
1222Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1223
1224 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1225
1226Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1227
1228 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1229
1230Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1231
1232 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1233
1234Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1235
1236 * alpha.h: Don't include "bfd.h"; private relocation types are now
1237 negative to minimize problems with shared libraries. Organize
1238 instruction subsets by AMASK extensions and PALcode
1239 implementation.
1240 (struct alpha_operand): Move flags slot for better packing.
1241
1242Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1243
1244 * v850.h (V850_OPERAND_RELAX): New operand flag.
1245
1246Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1247
1248 * mn10300.h (FMT_*): Move operand format definitions
1249 here.
1250
1251Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1252
1253 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1254
1255Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1256
1257 * mn10300.h (mn10300_opcode): Add "format" field.
1258 (MN10300_OPERAND_*): Define.
1259
1260Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1261
1262 * mn10x00.h: Delete.
1263 * mn10200.h, mn10300.h: New files.
1264
1265Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1266
1267 * mn10x00.h: New file.
1268
1269Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1270
1271 * v850.h: Add new flag to indicate this instruction uses a PC
1272 displacement.
1273
1274Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1275
1276 * h8300.h (stmac): Add missing instruction.
1277
1278Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1279
1280 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1281 field.
1282
1283Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1284
1285 * v850.h (V850_OPERAND_EP): Define.
1286
1287 * v850.h (v850_opcode): Add size field.
1288
1289Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1290
1291 * v850.h (v850_operands): Add insert and extract fields, pointers
1292 to functions used to handle unusual operand encoding.
1293 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1294 V850_OPERAND_SIGNED): Defined.
1295
1296Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1297
1298 * v850.h (v850_operands): Add flags field.
1299 (OPERAND_REG, OPERAND_NUM): Defined.
1300
1301Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1302
1303 * v850.h: New file.
1304
1305Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1306
1307 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1308 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1309 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1310 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1311 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1312 Defined.
1313
1314Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1315
1316 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1317 a 3 bit space id instead of a 2 bit space id.
1318
1319Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1320
1321 * d10v.h: Add some additional defines to support the
1322 assembler in determining which operations can be done in parallel.
1323
1324Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1325
1326 * h8300.h (SN): Define.
1327 (eepmov.b): Renamed from "eepmov"
1328 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1329 with them.
1330
1331Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1332
1333 * d10v.h (OPERAND_SHIFT): New operand flag.
1334
1335Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1336
1337 * d10v.h: Changes for divs, parallel-only instructions, and
1338 signed numbers.
1339
1340Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1341
1342 * d10v.h (pd_reg): Define. Putting the definition here allows
1343 the assembler and disassembler to share the same struct.
1344
1345Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1346
1347 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1348 Williams <steve@icarus.com>.
1349
1350Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1351
1352 * d10v.h: New file.
1353
1354Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1355
1356 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1357
1358Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1359
1360 * m68k.h (mcf5200): New macro.
1361 Document names of coldfire control registers.
1362
1363Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1364
1365 * h8300.h (SRC_IN_DST): Define.
1366
1367 * h8300.h (UNOP3): Mark the register operand in this insn
1368 as a source operand, not a destination operand.
1369 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1370 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1371 register operand with SRC_IN_DST.
1372
1373Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1374
1375 * alpha.h: New file.
1376
1377Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1378
1379 * rs6k.h: Remove obsolete file.
1380
1381Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1382
1383 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1384 fdivp, and fdivrp. Add ffreep.
1385
1386Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1387
1388 * h8300.h: Reorder various #defines for readability.
1389 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1390 (BITOP): Accept additional (unused) argument. All callers changed.
1391 (EBITOP): Likewise.
1392 (O_LAST): Bump.
1393 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1394
1395 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1396 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1397 (BITOP, EBITOP): Handle new H8/S addressing modes for
1398 bit insns.
1399 (UNOP3): Handle new shift/rotate insns on the H8/S.
1400 (insns using exr): New instructions.
1401 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1402
1403Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1404
1405 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1406 was incorrect.
1407
1408Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1409
1410 * h8300.h (START): Remove.
1411 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1412 and mov.l insns that can be relaxed.
1413
1414Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1415
1416 * i386.h: Remove Abs32 from lcall.
1417
1418Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1419
1420 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1421 (SLCPOP): New macro.
1422 Mark X,Y opcode letters as in use.
1423
1424Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1425
1426 * sparc.h (F_FLOAT, F_FBR): Define.
1427
1428Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1429
1430 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1431 from all insns.
1432 (ABS8SRC,ABS8DST): Add ABS8MEM.
1433 (add.l): Fix reg+reg variant.
1434 (eepmov.w): Renamed from eepmovw.
1435 (ldc,stc): Fix many cases.
1436
1437Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1438
1439 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1440
1441Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1442
1443 * sparc.h (O): Mark operand letter as in use.
1444
1445Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1446
1447 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1448 Mark operand letters uU as in use.
1449
1450Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1451
1452 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1453 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1454 (SPARC_OPCODE_SUPPORTED): New macro.
1455 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1456 (F_NOTV9): Delete.
1457
1458Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1459
1460 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1461 declaration consistent with return type in definition.
1462
1463Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1464
1465 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1466
1467Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1468
1469 * i386.h (i386_regtab): Add 80486 test registers.
1470
1471Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1472
1473 * i960.h (I_HX): Define.
1474 (i960_opcodes): Add HX instruction.
1475
1476Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1477
1478 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1479 and fclex.
1480
1481Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1482
1483 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1484 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1485 (bfd_* defines): Delete.
1486 (sparc_opcode_archs): Replaces architecture_pname.
1487 (sparc_opcode_lookup_arch): Declare.
1488 (NUMOPCODES): Delete.
1489
1490Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1491
1492 * sparc.h (enum sparc_architecture): Add v9a.
1493 (ARCHITECTURES_CONFLICT_P): Update.
1494
1495Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1496
1497 * i386.h: Added Pentium Pro instructions.
1498
1499Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1500
1501 * m68k.h: Document new 'W' operand place.
1502
1503Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1504
1505 * hppa.h: Add lci and syncdma instructions.
1506
1507Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1508
1509 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1510 instructions.
1511
1512Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1513
1514 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1515 assembler's -mcom and -many switches.
1516
1517Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1518
1519 * i386.h: Fix cmpxchg8b extension opcode description.
1520
1521Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1522
1523 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1524 and register cr4.
1525
1526Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1527
1528 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1529
1530Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1531
1532 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1533
1534Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1535
1536 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1537
1538Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1539
1540 * m68kmri.h: Remove.
1541
1542 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1543 declarations. Remove F_ALIAS and flag field of struct
1544 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1545 int. Make name and args fields of struct m68k_opcode const.
1546
1547Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1548
1549 * sparc.h (F_NOTV9): Define.
1550
1551Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1552
1553 * mips.h (INSN_4010): Define.
1554
1555Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1556
1557 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1558
1559 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1560 * m68k.h: Fix argument descriptions of coprocessor
1561 instructions to allow only alterable operands where appropriate.
1562 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1563 (m68k_opcode_aliases): Add more aliases.
1564
1565Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1566
1567 * m68k.h: Added explcitly short-sized conditional branches, and a
1568 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1569 svr4-based configurations.
1570
1571Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1572
1573 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1574 * i386.h: added missing Data16/Data32 flags to a few instructions.
1575
1576Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1577
1578 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1579 (OP_MASK_BCC, OP_SH_BCC): Define.
1580 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1581 (OP_MASK_CCC, OP_SH_CCC): Define.
1582 (INSN_READ_FPR_R): Define.
1583 (INSN_RFE): Delete.
1584
1585Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1586
1587 * m68k.h (enum m68k_architecture): Deleted.
1588 (struct m68k_opcode_alias): New type.
1589 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1590 matching constraints, values and flags. As a side effect of this,
1591 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1592 as I know were never used, now may need re-examining.
1593 (numopcodes): Now const.
1594 (m68k_opcode_aliases, numaliases): New variables.
1595 (endop): Deleted.
1596 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1597 m68k_opcode_aliases; update declaration of m68k_opcodes.
1598
1599Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1600
1601 * hppa.h (delay_type): Delete unused enumeration.
1602 (pa_opcode): Replace unused delayed field with an architecture
1603 field.
1604 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1605
1606Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1607
1608 * mips.h (INSN_ISA4): Define.
1609
1610Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1611
1612 * mips.h (M_DLA_AB, M_DLI): Define.
1613
1614Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1615
1616 * hppa.h (fstwx): Fix single-bit error.
1617
1618Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1619
1620 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1621
1622Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1623
1624 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1625 debug registers. From Charles Hannum (mycroft@netbsd.org).
1626
1627Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1628
1629 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1630 i386 support:
1631 * i386.h (MOV_AX_DISP32): New macro.
1632 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1633 of several call/return instructions.
1634 (ADDR_PREFIX_OPCODE): New macro.
1635
1636Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1637
1638 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1639
1640 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1641 it pointer to const char;
1642 (struct vot, field `name'): ditto.
1643
1644Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1645
1646 * vax.h: Supply and properly group all values in end sentinel.
1647
1648Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1649
1650 * mips.h (INSN_ISA, INSN_4650): Define.
1651
1652Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1653
1654 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1655 systems with a separate instruction and data cache, such as the
1656 29040, these instructions take an optional argument.
1657
1658Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1659
1660 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1661 INSN_TRAP.
1662
1663Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1664
1665 * mips.h (INSN_STORE_MEMORY): Define.
1666
1667Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1668
1669 * sparc.h: Document new operand type 'x'.
1670
1671Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1672
1673 * i960.h (I_CX2): New instruction category. It includes
1674 instructions available on Cx and Jx processors.
1675 (I_JX): New instruction category, for JX-only instructions.
1676 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1677 Jx-only instructions, in I_JX category.
1678
1679Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1680
1681 * ns32k.h (endop): Made pointer const too.
1682
1683Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1684
1685 * ns32k.h: Drop Q operand type as there is no correct use
1686 for it. Add I and Z operand types which allow better checking.
1687
1688Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1689
1690 * h8300.h (xor.l) :fix bit pattern.
1691 (L_2): New size of operand.
1692 (trapa): Use it.
1693
1694Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1695
1696 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1697
1698Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1699
1700 * sparc.h: Include v9 definitions.
1701
1702Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1703
1704 * m68k.h (m68060): Defined.
1705 (m68040up, mfloat, mmmu): Include it.
1706 (struct m68k_opcode): Widen `arch' field.
1707 (m68k_opcodes): Updated for M68060. Removed comments that were
1708 instructions commented out by "JF" years ago.
1709
1710Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1711
1712 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1713 add a one-bit `flags' field.
1714 (F_ALIAS): New macro.
1715
1716Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1717
1718 * h8300.h (dec, inc): Get encoding right.
1719
1720Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1721
1722 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1723 a flag instead.
1724 (PPC_OPERAND_SIGNED): Define.
1725 (PPC_OPERAND_SIGNOPT): Define.
1726
1727Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1728
1729 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1730 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1731
1732Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1733
1734 * i386.h: Reverse last change. It'll be handled in gas instead.
1735
1736Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1737
1738 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1739 slower on the 486 and used the implicit shift count despite the
1740 explicit operand. The one-operand form is still available to get
1741 the shorter form with the implicit shift count.
1742
1743Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1744
1745 * hppa.h: Fix typo in fstws arg string.
1746
1747Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1748
1749 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1750
1751Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1752
1753 * ppc.h (PPC_OPCODE_601): Define.
1754
1755Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1756
1757 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1758 (so we can determine valid completers for both addb and addb[tf].)
1759
1760 * hppa.h (xmpyu): No floating point format specifier for the
1761 xmpyu instruction.
1762
1763Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1764
1765 * ppc.h (PPC_OPERAND_NEXT): Define.
1766 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1767 (struct powerpc_macro): Define.
1768 (powerpc_macros, powerpc_num_macros): Declare.
1769
1770Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1771
1772 * ppc.h: New file. Header file for PowerPC opcode table.
1773
1774Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1775
1776 * hppa.h: More minor template fixes for sfu and copr (to allow
1777 for easier disassembly).
1778
1779 * hppa.h: Fix templates for all the sfu and copr instructions.
1780
1781Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1782
1783 * i386.h (push): Permit Imm16 operand too.
1784
1785Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1786
1787 * h8300.h (andc): Exists in base arch.
1788
1789Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1790
1791 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1792 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1793
1794Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1795
1796 * hppa.h: Add FP quadword store instructions.
1797
1798Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1799
1800 * mips.h: (M_J_A): Added.
1801 (M_LA): Removed.
1802
1803Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1804
1805 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1806 <mellon@pepper.ncd.com>.
1807
1808Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1809
1810 * hppa.h: Immediate field in probei instructions is unsigned,
1811 not low-sign extended.
1812
1813Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1814
1815 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1816
1817Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1818
1819 * i386.h: Add "fxch" without operand.
1820
1821Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1822
1823 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1824
1825Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1826
1827 * hppa.h: Add gfw and gfr to the opcode table.
1828
1829Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1830
1831 * m88k.h: extended to handle m88110.
1832
1833Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1834
1835 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1836 addresses.
1837
1838Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1839
1840 * i960.h (i960_opcodes): Properly bracket initializers.
1841
1842Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1843
1844 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1845
1846Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1847
1848 * m68k.h (two): Protect second argument with parentheses.
1849
1850Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1851
1852 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1853 Deleted old in/out instructions in "#if 0" section.
1854
1855Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1856
1857 * i386.h (i386_optab): Properly bracket initializers.
1858
1859Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1860
1861 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1862 Jeff Law, law@cs.utah.edu).
1863
1864Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1865
1866 * i386.h (lcall): Accept Imm32 operand also.
1867
1868Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1869
1870 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1871 (M_DABS): Added.
1872
1873Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1874
1875 * mips.h (INSN_*): Changed values. Removed unused definitions.
1876 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1877 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1878 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1879 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1880 (M_*): Added new values for r6000 and r4000 macros.
1881 (ANY_DELAY): Removed.
1882
1883Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1884
1885 * mips.h: Added M_LI_S and M_LI_SS.
1886
1887Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1888
1889 * h8300.h: Get some rare mov.bs correct.
1890
1891Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1892
1893 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1894 been included.
1895
1896Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1897
1898 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1899 jump instructions, for use in disassemblers.
1900
1901Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1902
1903 * m88k.h: Make bitfields just unsigned, not unsigned long or
1904 unsigned short.
1905
1906Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1907
1908 * hppa.h: New argument type 'y'. Use in various float instructions.
1909
1910Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1911
1912 * hppa.h (break): First immediate field is unsigned.
1913
1914 * hppa.h: Add rfir instruction.
1915
1916Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1917
1918 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1919
1920Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1921
1922 * mips.h: Reworked the hazard information somewhat, and fixed some
1923 bugs in the instruction hazard descriptions.
1924
1925Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1926
1927 * m88k.h: Corrected a couple of opcodes.
1928
1929Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1930
1931 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1932 new version includes instruction hazard information, but is
1933 otherwise reasonably similar.
1934
1935Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1936
1937 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1938
1939Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1940
1941 Patches from Jeff Law, law@cs.utah.edu:
1942 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1943 Make the tables be the same for the following instructions:
1944 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1945 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1946 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1947 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1948 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1949 "fcmp", and "ftest".
1950
1951 * hppa.h: Make new and old tables the same for "break", "mtctl",
1952 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1953 Fix typo in last patch. Collapse several #ifdefs into a
1954 single #ifdef.
1955
1956 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1957 of the comments up-to-date.
1958
1959 * hppa.h: Update "free list" of letters and update
1960 comments describing each letter's function.
1961
1962Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1963
1964 * h8300.h: checkpoint, includes H8/300-H opcodes.
1965
1966Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1967
1968 * Patches from Jeffrey Law <law@cs.utah.edu>.
1969 * hppa.h: Rework single precision FP
1970 instructions so that they correctly disassemble code
1971 PA1.1 code.
1972
1973Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1974
1975 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1976 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1977
1978Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1979
1980 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1981 gdb will define it for now.
1982
1983Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1984
1985 * sparc.h: Don't end enumerator list with comma.
1986
1987Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1988
1989 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1990 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1991 ("bc2t"): Correct typo.
1992 ("[ls]wc[023]"): Use T rather than t.
1993 ("c[0123]"): Define general coprocessor instructions.
1994
1995Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1996
1997 * m68k.h: Move split point for gcc compilation more towards
1998 middle.
1999
2000Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2001
2002 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2003 simply wrong, ics, rfi, & rfsvc were missing).
2004 Add "a" to opr_ext for "bb". Doc fix.
2005
2006Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2007
2008 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2009 * mips.h: Add casts, to suppress warnings about shifting too much.
2010 * m68k.h: Document the placement code '9'.
2011
2012Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2013
2014 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2015 allows callers to break up the large initialized struct full of
2016 opcodes into two half-sized ones. This permits GCC to compile
2017 this module, since it takes exponential space for initializers.
2018 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2019
2020Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2021
2022 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2023 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2024 initialized structs in it.
2025
2026Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2027
2028 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2029 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2030 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2031
2032Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2033
2034 * mips.h: document "i" and "j" operands correctly.
2035
2036Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2037
2038 * mips.h: Removed endianness dependency.
2039
2040Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2041
2042 * h8300.h: include info on number of cycles per instruction.
2043
2044Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2045
2046 * hppa.h: Move handy aliases to the front. Fix masks for extract
2047 and deposit instructions.
2048
2049Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2050
2051 * i386.h: accept shld and shrd both with and without the shift
2052 count argument, which is always %cl.
2053
2054Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2055
2056 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2057 (one_byte_segment_defaults, two_byte_segment_defaults,
2058 i386_prefixtab_end): Ditto.
2059
2060Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2061
2062 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2063 for operand 2; from John Carr, jfc@dsg.dec.com.
2064
2065Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2066
2067 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2068 always use 16-bit offsets. Makes calculated-size jump tables
2069 feasible.
2070
2071Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2072
2073 * i386.h: Fix one-operand forms of in* and out* patterns.
2074
2075Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2076
2077 * m68k.h: Added CPU32 support.
2078
2079Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2080
2081 * mips.h (break): Disassemble the argument. Patch from
2082 jonathan@cs.stanford.edu (Jonathan Stone).
2083
2084Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2085
2086 * m68k.h: merged Motorola and MIT syntax.
2087
2088Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2089
2090 * m68k.h (pmove): make the tests less strict, the 68k book is
2091 wrong.
2092
2093Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2094
2095 * m68k.h (m68ec030): Defined as alias for 68030.
2096 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2097 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2098 them. Tightened description of "fmovex" to distinguish it from
2099 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2100 up descriptions that claimed versions were available for chips not
2101 supporting them. Added "pmovefd".
2102
2103Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2104
2105 * m68k.h: fix where the . goes in divull
2106
2107Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2108
2109 * m68k.h: the cas2 instruction is supposed to be written with
2110 indirection on the last two operands, which can be either data or
2111 address registers. Added a new operand type 'r' which accepts
2112 either register type. Added new cases for cas2l and cas2w which
2113 use them. Corrected masks for cas2 which failed to recognize use
2114 of address register.
2115
2116Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2117
2118 * m68k.h: Merged in patches (mostly m68040-specific) from
2119 Colin Smith <colin@wrs.com>.
2120
2121 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2122 base). Also cleaned up duplicates, re-ordered instructions for
2123 the sake of dis-assembling (so aliases come after standard names).
2124 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2125
2126Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2127
2128 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2129 all missing .s
2130
2131Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2132
2133 * sparc.h: Moved tables to BFD library.
2134
2135 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2136
2137Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2138
2139 * h8300.h: Finish filling in all the holes in the opcode table,
2140 so that the Lucid C compiler can digest this as well...
2141
2142Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2143
2144 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2145 Fix opcodes on various sizes of fild/fist instructions
2146 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2147 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2148
2149Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2150
2151 * h8300.h: Fill in all the holes in the opcode table so that the
2152 losing HPUX C compiler can digest this...
2153
2154Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2155
2156 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2157 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2158
2159Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2160
2161 * sparc.h: Add new architecture variant sparclite; add its scan
2162 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2163
2164Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2165
2166 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2167 fy@lucid.com).
2168
2169Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2170
2171 * rs6k.h: New version from IBM (Metin).
2172
2173Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2174
2175 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2176 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2177
2178Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2179
2180 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2181
2182Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2183
2184 * m68k.h (one, two): Cast macro args to unsigned to suppress
2185 complaints from compiler and lint about integer overflow during
2186 shift.
2187
2188Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2189
2190 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2191
2192Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2193
2194 * mips.h: Make bitfield layout depend on the HOST compiler,
2195 not on the TARGET system.
2196
2197Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2198
2199 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2200 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2201 <TRANLE@INTELLICORP.COM>.
2202
2203Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2204
2205 * h8300.h: turned op_type enum into #define list
2206
2207Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2208
2209 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2210 similar instructions -- they've been renamed to "fitoq", etc.
2211 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2212 number of arguments.
2213 * h8300.h: Remove extra ; which produces compiler warning.
2214
2215Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2216
2217 * sparc.h: fix opcode for tsubcctv.
2218
2219Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2220
2221 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2222
2223Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2224
2225 * sparc.h (nop): Made the 'lose' field be even tighter,
2226 so only a standard 'nop' is disassembled as a nop.
2227
2228Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2229
2230 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2231 disassembled as a nop.
2232
2233Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2234
2235 * sparc.h: fix a typo.
2236
2237Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2238
2239 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2240 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2241 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2242
2243\f
2244Local Variables:
2245version-control: never
2246End:
A mirror of the official binutils-gdb repository