]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - include/opcode/ChangeLog
2000-02-22 Andrew Haley <aph@cygnus.com>
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
367c01af
AH
11999-12-30 Andrew Haley <aph@cygnus.com>
2
9a1e79ca
AH
3 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
4 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
5 insns.
367c01af 6
add0c677
AM
72000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
8
9 * i386.h: Qualify intel mode far call and jmp with x_Suf.
10
3138f287
AM
111999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
12
13 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
14 indirect jumps and calls. Add FF/3 call for intel mode.
15
ccecd07b
JL
16Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
17
18 * mn10300.h: Add new operand types. Add new instruction formats.
19
b37e19e9
JL
20Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
21
22 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
23 instruction.
24
5fce5ddf
GRK
251999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
26
27 * mips.h (INSN_ISA5): New.
28
2bd7f1f3
GRK
291999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
30
31 * mips.h (OPCODE_IS_MEMBER): New.
32
4df2b5c5
NC
331999-10-29 Nick Clifton <nickc@cygnus.com>
34
35 * d30v.h (SHORT_AR): Define.
36
446a06c9
MM
371999-10-18 Michael Meissner <meissner@cygnus.com>
38
39 * alpha.h (alpha_num_opcodes): Convert to unsigned.
40 (alpha_num_operands): Ditto.
41
eca04c6a
JL
42Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
43
44 * hppa.h (pa_opcodes): Add load and store cache control to
45 instructions. Add ordered access load and store.
46
47 * hppa.h (pa_opcode): Add new entries for addb and addib.
48
49 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
50
51 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
52
c43185de
DN
53Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
54
55 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
56
ec3533da
JL
57Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
58
390f858d
JL
59 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
60 and "be" using completer prefixes.
61
8c47ebd9
JL
62 * hppa.h (pa_opcodes): Add initializers to silence compiler.
63
ec3533da
JL
64 * hppa.h: Update comments about character usage.
65
18369bea
JL
66Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
67
68 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
69 up the new fstw & bve instructions.
70
c36efdd2
JL
71Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
72
d3ffb032
JL
73 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
74 instructions.
75
c49ec3da
JL
76 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
77
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JL
78 * hppa.h (pa_opcodes): Add long offset double word load/store
79 instructions.
80
6397d1a2
JL
81 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
82 stores.
83
142f0fe0
JL
84 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
85
f5a68b45
JL
86 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
87
8235801e
JL
88 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
89
35184366
JL
90 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
91
f0bfde5e
JL
92 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
93
27bbbb58
JL
94 * hppa.h (pa_opcodes): Add support for "b,l".
95
c36efdd2
JL
96 * hppa.h (pa_opcodes): Add support for "b,gate".
97
f2727d04
JL
98Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
99
9392fb11
JL
100 * hppa.h (pa_opcodes): Use 'fX' for first register operand
101 in xmpyu.
102
e0c52e99
JL
103 * hppa.h (pa_opcodes): Fix mask for probe and probei.
104
f2727d04
JL
105 * hppa.h (pa_opcodes): Fix mask for depwi.
106
52d836e2
JL
107Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
108
109 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
110 an explicit output argument.
111
90765e3a
JL
112Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
113
114 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
115 Add a few PA2.0 loads and store variants.
116
8340b17f
ILT
1171999-09-04 Steve Chamberlain <sac@pobox.com>
118
119 * pj.h: New file.
120
5f47d35b
AM
1211999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
122
123 * i386.h (i386_regtab): Move %st to top of table, and split off
124 other fp reg entries.
125 (i386_float_regtab): To here.
126
1c143202
JL
127Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
128
7d8fdb64
JL
129 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
130 by 'f'.
131
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JL
132 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
133 Add supporting args.
134
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JL
135 * hppa.h: Document new completers and args.
136 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
137 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
138 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
139 pmenb and pmdis.
140
96226a68
JL
141 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
142 hshr, hsub, mixh, mixw, permh.
143
5d4ba527
JL
144 * hppa.h (pa_opcodes): Change completers in instructions to
145 use 'c' prefix.
146
e9fc28c6
JL
147 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
148 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
149
1c143202
JL
150 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
151 fnegabs to use 'I' instead of 'F'.
152
9e525108
AM
1531999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
154
155 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
156 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
157 Alphabetically sort PIII insns.
158
e8da1bf1
DE
159Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
160
161 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
162
7d627258
JL
163Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
164
5696871a
JL
165 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
166 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
167
7d627258
JL
168 * hppa.h: Document 64 bit condition completers.
169
c5e52916
JL
170Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
171
172 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
173
eecb386c
AM
1741999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
175
176 * i386.h (i386_optab): Add DefaultSize modifier to all insns
177 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
178 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
179
88a380f3
JL
180Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
181 Jeff Law <law@cygnus.com>
182
183 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
184
185 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL
186
187 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
188 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
189
145cf1f0
AM
1901999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
191
192 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
193
73826640
JL
194Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
195
196 * hppa.h (struct pa_opcode): Add new field "flags".
197 (FLAGS_STRICT): Define.
198
b65db252
JL
199Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
200 Jeff Law <law@cygnus.com>
201
f7fc668b
JL
202 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
203
204 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 205
10084519
AM
2061999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
207
208 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
209 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
210 flag to fcomi and friends.
211
cd8a80ba
JL
212Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
213
214 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
215 integer logical instructions.
216
1fca749b
ILT
2171999-05-28 Linus Nordberg <linus.nordberg@canit.se>
218
219 * m68k.h: Document new formats `E', `G', `H' and new places `N',
220 `n', `o'.
221
222 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
223 and new places `m', `M', `h'.
224
aa008907
JL
225Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
226
227 * hppa.h (pa_opcodes): Add several processor specific system
228 instructions.
229
e26b85f0
JL
230Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
231
232 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
233 "addb", and "addib" to be used by the disassembler.
234
c608c12e
AM
2351999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
236
237 * i386.h (ReverseModrm): Remove all occurences.
238 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
239 movmskps, pextrw, pmovmskb, maskmovq.
240 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
241 ignore the data size prefix.
242
243 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
244 Mostly stolen from Doug Ledford <dledford@redhat.com>
245
45c18104
RH
246Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
247
248 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
249
252b5132
RH
2501999-04-14 Doug Evans <devans@casey.cygnus.com>
251
252 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
253 (CGEN_ATTR_TYPE): Update.
254 (CGEN_ATTR_MASK): Number booleans starting at 0.
255 (CGEN_ATTR_VALUE): Update.
256 (CGEN_INSN_ATTR): Update.
257
258Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
259
260 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
261 instructions.
262
263Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
264
265 * hppa.h (bb, bvb): Tweak opcode/mask.
266
267
2681999-03-22 Doug Evans <devans@casey.cygnus.com>
269
270 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
271 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
272 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
273 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
274 Delete member max_insn_size.
275 (enum cgen_cpu_open_arg): New enum.
276 (cpu_open): Update prototype.
277 (cpu_open_1): Declare.
278 (cgen_set_cpu): Delete.
279
2801999-03-11 Doug Evans <devans@casey.cygnus.com>
281
282 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
283 (CGEN_OPERAND_NIL): New macro.
284 (CGEN_OPERAND): New member `type'.
285 (@arch@_cgen_operand_table): Delete decl.
286 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
287 (CGEN_OPERAND_TABLE): New struct.
288 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
289 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
290 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
291 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
292 {get,set}_{int,vma}_operand.
293 (@arch@_cgen_cpu_open): New arg `isa'.
294 (cgen_set_cpu): Ditto.
295
296Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
297
298 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
299
3001999-02-25 Doug Evans <devans@casey.cygnus.com>
301
302 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
303 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
304 enum cgen_hw_type.
305 (CGEN_HW_TABLE): New struct.
306 (hw_table): Delete declaration.
307 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
308 to table entry to enum.
309 (CGEN_OPINST): Ditto.
310 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
311
312Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
313
314 * alpha.h (AXP_OPCODE_EV6): New.
315 (AXP_OPCODE_NOPAL): Include it.
316
3171999-02-09 Doug Evans <devans@casey.cygnus.com>
318
319 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
320 All uses updated. New members int_insn_p, max_insn_size,
321 parse_operand,insert_operand,extract_operand,print_operand,
322 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
323 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
324 extract_handlers,print_handlers.
325 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
326 (CGEN_ATTR_BOOL_OFFSET): New macro.
327 (CGEN_ATTR_MASK): Subtract it to compute bit number.
328 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
329 (cgen_opcode_handler): Renamed from cgen_base.
330 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
331 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
332 all uses updated.
333 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
334 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
335 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
336 (CGEN_OPCODE,CGEN_IBASE): New types.
337 (CGEN_INSN): Rewrite.
338 (CGEN_{ASM,DIS}_HASH*): Delete.
339 (init_opcode_table,init_ibld_table): Declare.
340 (CGEN_INSN_ATTR): New type.
341
342Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
343
344 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
345 (x_FP, d_FP, dls_FP, sldx_FP): Define.
346 Change *Suf definitions to include x and d suffixes.
347 (movsx): Use w_Suf and b_Suf.
348 (movzx): Likewise.
349 (movs): Use bwld_Suf.
350 (fld): Change ordering. Use sld_FP.
351 (fild): Add Intel Syntax equivalent of fildq.
352 (fst): Use sld_FP.
353 (fist): Use sld_FP.
354 (fstp): Use sld_FP. Add x_FP version.
355 (fistp): LLongMem version for Intel Syntax.
356 (fcom, fcomp): Use sld_FP.
357 (fadd, fiadd, fsub): Use sld_FP.
358 (fsubr): Use sld_FP.
359 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
360
3611999-01-27 Doug Evans <devans@casey.cygnus.com>
362
363 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
364 CGEN_MODE_UINT.
365
366Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
367
368 * hppa.h (bv): Fix mask.
369
3701999-01-05 Doug Evans <devans@casey.cygnus.com>
371
372 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
373 (CGEN_ATTR): Use it.
374 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
375 (CGEN_ATTR_TABLE): New member dfault.
376
3771998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
378
379 * mips.h (MIPS16_INSN_BRANCH): New.
380
381Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
382
383 The following is part of a change made by Edith Epstein
384 <eepstein@sophia.cygnus.com> as part of a project to merge in
385 changes by HP; HP did not create ChangeLog entries.
386
387 * hppa.h (completer_chars): list of chars to not put a space
388 after.
389
390Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
391
392 * i386.h (i386_optab): Permit w suffix on processor control and
393 status word instructions.
394
3951998-11-30 Doug Evans <devans@casey.cygnus.com>
396
397 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
398 (struct cgen_keyword_entry): Ditto.
399 (struct cgen_operand): Ditto.
400 (CGEN_IFLD): New typedef, with associated access macros.
401 (CGEN_IFMT): New typedef, with associated access macros.
402 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
403 (CGEN_IVALUE): New typedef.
404 (struct cgen_insn): Delete const on syntax,attrs members.
405 `format' now points to format data. Type of `value' is now
406 CGEN_IVALUE.
407 (struct cgen_opcode_table): New member ifld_table.
408
4091998-11-18 Doug Evans <devans@casey.cygnus.com>
410
411 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
412 (CGEN_OPERAND_INSTANCE): New member `attrs'.
413 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
414 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
415 (cgen_opcode_table): Update type of dis_hash fn.
416 (extract_operand): Update type of `insn_value' arg.
417
418Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
419
420 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
421
422Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
423
424 * mips.h (INSN_MULT): Added.
425
426Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
427
428 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
429
430Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
431
432 * cgen.h (CGEN_INSN_INT): New typedef.
433 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
434 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
435 (CGEN_INSN_BYTES_PTR): New typedef.
436 (CGEN_EXTRACT_INFO): New typedef.
437 (cgen_insert_fn,cgen_extract_fn): Update.
438 (cgen_opcode_table): New member `insn_endian'.
439 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
440 (insert_operand,extract_operand): Update.
441 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
442
443Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
444
445 * cgen.h (CGEN_ATTR_BOOLS): New macro.
446 (struct CGEN_HW_ENTRY): New member `attrs'.
447 (CGEN_HW_ATTR): New macro.
448 (struct CGEN_OPERAND_INSTANCE): New member `name'.
449 (CGEN_INSN_INVALID_P): New macro.
450
451Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
452
453 * hppa.h: Add "fid".
454
455Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
456
457 From Robert Andrew Dale <rob@nb.net>
458 * i386.h (i386_optab): Add AMD 3DNow! instructions.
459 (AMD_3DNOW_OPCODE): Define.
460
461Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
462
463 * d30v.h (EITHER_BUT_PREFER_MU): Define.
464
465Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
466
467 * cgen.h (cgen_insn): #if 0 out element `cdx'.
468
469Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
470
471 Move all global state data into opcode table struct, and treat
472 opcode table as something that is "opened/closed".
473 * cgen.h (CGEN_OPCODE_DESC): New type.
474 (all fns): New first arg of opcode table descriptor.
475 (cgen_set_parse_operand_fn): Add prototype.
476 (cgen_current_machine,cgen_current_endian): Delete.
477 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
478 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
479 dis_hash_table,dis_hash_table_entries.
480 (opcode_open,opcode_close): Add prototypes.
481
482 * cgen.h (cgen_insn): New element `cdx'.
483
484Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
485
486 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
487
488Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
489
490 * mn10300.h: Add "no_match_operands" field for instructions.
491 (MN10300_MAX_OPERANDS): Define.
492
493Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
494
495 * cgen.h (cgen_macro_insn_count): Declare.
496
497Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
498
499 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
500 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
501 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
502 set_{int,vma}_operand.
503
504Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
505
506 * mn10300.h: Add "machine" field for instructions.
507 (MN103, AM30): Define machine types.
508
509Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
510
511 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
512
5131998-06-18 Ulrich Drepper <drepper@cygnus.com>
514
515 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
516
517Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
518
519 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
520 and ud2b.
521 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
522 those that happen to be implemented on pentiums.
523
524Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
525
526 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
527 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
528 with Size16|IgnoreSize or Size32|IgnoreSize.
529
530Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
531
532 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
533 (REPE): Rename to REPE_PREFIX_OPCODE.
534 (i386_regtab_end): Remove.
535 (i386_prefixtab, i386_prefixtab_end): Remove.
536 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
537 of md_begin.
538 (MAX_OPCODE_SIZE): Define.
539 (i386_optab_end): Remove.
540 (sl_Suf): Define.
541 (sl_FP): Use sl_Suf.
542
543 * i386.h (i386_optab): Allow 16 bit displacement for `mov
544 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
545 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
546 data32, dword, and adword prefixes.
547 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
548 regs.
549
550Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
551
552 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
553
554 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
555 register operands, because this is a common idiom. Flag them with
556 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
557 fdivrp because gcc erroneously generates them. Also flag with a
558 warning.
559
560 * i386.h: Add suffix modifiers to most insns, and tighter operand
561 checks in some cases. Fix a number of UnixWare compatibility
562 issues with float insns. Merge some floating point opcodes, using
563 new FloatMF modifier.
564 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
565 consistency.
566
567 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
568 IgnoreDataSize where appropriate.
569
570Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
571
572 * i386.h: (one_byte_segment_defaults): Remove.
573 (two_byte_segment_defaults): Remove.
574 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
575
576Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
577
578 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
579 (cgen_hw_lookup_by_num): Declare.
580
581Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
582
583 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
584 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
585
586Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
587
588 * cgen.h (cgen_asm_init_parse): Delete.
589 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
590 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
591
592Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
593
594 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
595 (cgen_asm_finish_insn): Update prototype.
596 (cgen_insn): New members num, data.
597 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
598 dis_hash, dis_hash_table_size moved to ...
599 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
600 All uses updated. New members asm_hash_p, dis_hash_p.
601 (CGEN_MINSN_EXPANSION): New struct.
602 (cgen_expand_macro_insn): Declare.
603 (cgen_macro_insn_count): Declare.
604 (get_insn_operands): Update prototype.
605 (lookup_get_insn_operands): Declare.
606
607Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
608
609 * i386.h (i386_optab): Change iclrKludge and imulKludge to
610 regKludge. Add operands types for string instructions.
611
612Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
613
614 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
615 table.
616
617Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
618
619 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
620 for `gettext'.
621
622Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
623
624 * i386.h: Remove NoModrm flag from all insns: it's never checked.
625 Add IsString flag to string instructions.
626 (IS_STRING): Don't define.
627 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
628 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
629 (SS_PREFIX_OPCODE): Define.
630
631Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
632
633 * i386.h: Revert March 24 patch; no more LinearAddress.
634
635Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
636
637 * i386.h (i386_optab): Remove fwait (9b) from all floating point
638 instructions, and instead add FWait opcode modifier. Add short
639 form of fldenv and fstenv.
640 (FWAIT_OPCODE): Define.
641
642 * i386.h (i386_optab): Change second operand constraint of `mov
643 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
644 allow legal instructions such as `movl %gs,%esi'
645
646Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
647
648 * h8300.h: Various changes to fully bracket initializers.
649
650Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
651
652 * i386.h: Set LinearAddress for lidt and lgdt.
653
654Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
655
656 * cgen.h (CGEN_BOOL_ATTR): New macro.
657
658Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
659
660 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
661
662Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
663
664 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
665 (cgen_insn): Record syntax and format entries here, rather than
666 separately.
667
668Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
669
670 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
671
672Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
673
674 * cgen.h (cgen_insert_fn): Change type of result to const char *.
675 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
676 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
677
678Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
679
680 * cgen.h (lookup_insn): New argument alias_p.
681
682Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
683
684Fix rac to accept only a0:
685 * d10v.h (OPERAND_ACC): Split into:
686 (OPERAND_ACC0, OPERAND_ACC1) .
687 (OPERAND_GPR): Define.
688
689Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
690
691 * cgen.h (CGEN_FIELDS): Define here.
692 (CGEN_HW_ENTRY): New member `type'.
693 (hw_list): Delete decl.
694 (enum cgen_mode): Declare.
695 (CGEN_OPERAND): New member `hw'.
696 (enum cgen_operand_instance_type): Declare.
697 (CGEN_OPERAND_INSTANCE): New type.
698 (CGEN_INSN): New member `operands'.
699 (CGEN_OPCODE_DATA): Make hw_list const.
700 (get_insn_operands,lookup_insn): Add prototypes for.
701
702Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
703
704 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
705 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
706 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
707 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
708
709Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
710
711 * cgen.h: Correct typo in comment end marker.
712
713Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
714
715 * tic30.h: New file.
716
717Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
718
719 * cgen.h: Add prototypes for cgen_save_fixups(),
720 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
721 of cgen_asm_finish_insn() to return a char *.
722
723Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
724
725 * cgen.h: Formatting changes to improve readability.
726
727Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
728
729 * cgen.h (*): Clean up pass over `struct foo' usage.
730 (CGEN_ATTR): Make unsigned char.
731 (CGEN_ATTR_TYPE): Update.
732 (CGEN_ATTR_{ENTRY,TABLE}): New types.
733 (cgen_base): Move member `attrs' to cgen_insn.
734 (CGEN_KEYWORD): New member `null_entry'.
735 (CGEN_{SYNTAX,FORMAT}): New types.
736 (cgen_insn): Format and syntax separated from each other.
737
738Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
739
740 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
741 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
742 flags_{used,set} long.
743 (d30v_operand): Make flags field long.
744
745Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
746
747 * m68k.h: Fix comment describing operand types.
748
749Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
750
751 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
752 everything else after down.
753
754Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
755
756 * d10v.h (OPERAND_FLAG): Split into:
757 (OPERAND_FFLAG, OPERAND_CFLAG) .
758
759Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
760
761 * mips.h (struct mips_opcode): Changed comments to reflect new
762 field usage.
763
764Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
765
766 * mips.h: Added to comments a quick-ref list of all assigned
767 operand type characters.
768 (OP_{MASK,SH}_PERFREG): New macros.
769
770Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
771
772 * sparc.h: Add '_' and '/' for v9a asr's.
773 Patch from David Miller <davem@vger.rutgers.edu>
774
775Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
776
777 * h8300.h: Bit ops with absolute addresses not in the 8 bit
778 area are not available in the base model (H8/300).
779
780Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
781
782 * m68k.h: Remove documentation of ` operand specifier.
783
784Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
785
786 * m68k.h: Document q and v operand specifiers.
787
788Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
789
790 * v850.h (struct v850_opcode): Add processors field.
791 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
792 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
793 (PROCESSOR_V850EA): New bit constants.
794
795Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
796
797 Merge changes from Martin Hunt:
798
799 * d30v.h: Allow up to 64 control registers. Add
800 SHORT_A5S format.
801
802 * d30v.h (LONG_Db): New form for delayed branches.
803
804 * d30v.h: (LONG_Db): New form for repeati.
805
806 * d30v.h (SHORT_D2B): New form.
807
808 * d30v.h (SHORT_A2): New form.
809
810 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
811 registers are used. Needed for VLIW optimization.
812
813Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
814
815 * cgen.h: Move assembler interface section
816 up so cgen_parse_operand_result is defined for cgen_parse_address.
817 (cgen_parse_address): Update prototype.
818
819Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
820
821 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
822
823Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
824
825 * i386.h (two_byte_segment_defaults): Correct base register 5 in
826 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
827 <paubert@iram.es>.
828
829 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
830 <paubert@iram.es>.
831
832 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
833 <paubert@iram.es>.
834
835 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
836 (JUMP_ON_ECX_ZERO): Remove commented out macro.
837
838Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
839
840 * v850.h (V850_NOT_R0): New flag.
841
842Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
843
844 * v850.h (struct v850_opcode): Remove flags field.
845
846Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
847
848 * v850.h (struct v850_opcode): Add flags field.
849 (struct v850_operand): Extend meaning of 'bits' and 'shift'
850 fields.
851 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
852 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
853
854Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
855
856 * arc.h: New file.
857
858Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
859
860 * sparc.h (sparc_opcodes): Declare as const.
861
862Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
863
864 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
865 uses single or double precision floating point resources.
866 (INSN_NO_ISA, INSN_ISA1): Define.
867 (cpu specific INSN macros): Tweak into bitmasks outside the range
868 of INSN_ISA field.
869
870Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
871
872 * i386.h: Fix pand opcode.
873
874Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
875
876 * mips.h: Widen INSN_ISA and move it to a more convenient
877 bit position. Add INSN_3900.
878
879Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
880
881 * mips.h (struct mips_opcode): added new field membership.
882
883Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
884
885 * i386.h (movd): only Reg32 is allowed.
886
887 * i386.h: add fcomp and ud2. From Wayne Scott
888 <wscott@ichips.intel.com>.
889
890Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
891
892 * i386.h: Add MMX instructions.
893
894Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
895
896 * i386.h: Remove W modifier from conditional move instructions.
897
898Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
899
900 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
901 with no arguments to match that generated by the UnixWare
902 assembler.
903
904Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
905
906 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
907 (cgen_parse_operand_fn): Declare.
908 (cgen_init_parse_operand): Declare.
909 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
910 new argument `want'.
911 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
912 (enum cgen_parse_operand_type): New enum.
913
914Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
915
916 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
917
918Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
919
920 * cgen.h: New file.
921
922Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
923
924 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
925 fdivrp.
926
927Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
928
929 * v850.h (extract): Make unsigned.
930
931Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
932
933 * i386.h: Add iclr.
934
935Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
936
937 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
938 take a direction bit.
939
940Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
941
942 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
943
944Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
945
946 * sparc.h: Include <ansidecl.h>. Update function declarations to
947 use prototypes, and to use const when appropriate.
948
949Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
950
951 * mn10300.h (MN10300_OPERAND_RELAX): Define.
952
953Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
954
955 * d10v.h: Change pre_defined_registers to
956 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
957
958Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
959
960 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
961 Change mips_opcodes from const array to a pointer,
962 and change bfd_mips_num_opcodes from const int to int,
963 so that we can increase the size of the mips opcodes table
964 dynamically.
965
966Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
967
968 * d30v.h (FLAG_X): Remove unused flag.
969
970Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
971
972 * d30v.h: New file.
973
974Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
975
976 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
977 (PDS_VALUE): Macro to access value field of predefined symbols.
978 (tic80_next_predefined_symbol): Add prototype.
979
980Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
981
982 * tic80.h (tic80_symbol_to_value): Change prototype to match
983 change in function, added class parameter.
984
985Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
986
987 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
988 endmask fields, which are somewhat weird in that 0 and 32 are
989 treated exactly the same.
990
991Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
992
993 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
994 rather than a constant that is 2**X. Reorder them to put bits for
995 operands that have symbolic names in the upper bits, so they can
996 be packed into an int where the lower bits contain the value that
997 corresponds to that symbolic name.
998 (predefined_symbo): Add struct.
999 (tic80_predefined_symbols): Declare array of translations.
1000 (tic80_num_predefined_symbols): Declare size of that array.
1001 (tic80_value_to_symbol): Declare function.
1002 (tic80_symbol_to_value): Declare function.
1003
1004Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1005
1006 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1007
1008Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1009
1010 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1011 be the destination register.
1012
1013Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1014
1015 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1016 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1017 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1018 that the opcode can have two vector instructions in a single
1019 32 bit word and we have to encode/decode both.
1020
1021Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1022
1023 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1024 TIC80_OPERAND_RELATIVE for PC relative.
1025 (TIC80_OPERAND_BASEREL): New flag bit for register
1026 base relative.
1027
1028Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1029
1030 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1031
1032Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1033
1034 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1035 ":s" modifier for scaling.
1036
1037Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1038
1039 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1040 (TIC80_OPERAND_M_LI): Ditto
1041
1042Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1043
1044 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1045 (TIC80_OPERAND_CC): New define for condition code operand.
1046 (TIC80_OPERAND_CR): New define for control register operand.
1047
1048Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1049
1050 * tic80.h (struct tic80_opcode): Name changed.
1051 (struct tic80_opcode): Remove format field.
1052 (struct tic80_operand): Add insertion and extraction functions.
1053 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1054 correct ones.
1055 (FMT_*): Ditto.
1056
1057Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1058
1059 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1060 type IV instruction offsets.
1061
1062Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1063
1064 * tic80.h: New file.
1065
1066Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1067
1068 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1069
1070Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1071
1072 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1073 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1074 * v850.h: Fix comment, v850_operand not powerpc_operand.
1075
1076Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1077
1078 * mn10200.h: Flesh out structures and definitions needed by
1079 the mn10200 assembler & disassembler.
1080
1081Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1082
1083 * mips.h: Add mips16 definitions.
1084
1085Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1086
1087 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1088
1089Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1090
1091 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1092 (MN10300_OPERAND_MEMADDR): Define.
1093
1094Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1095
1096 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1097
1098Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1099
1100 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1101
1102Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1103
1104 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1105
1106Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1107
1108 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1109
1110Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1111
1112 * alpha.h: Don't include "bfd.h"; private relocation types are now
1113 negative to minimize problems with shared libraries. Organize
1114 instruction subsets by AMASK extensions and PALcode
1115 implementation.
1116 (struct alpha_operand): Move flags slot for better packing.
1117
1118Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1119
1120 * v850.h (V850_OPERAND_RELAX): New operand flag.
1121
1122Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1123
1124 * mn10300.h (FMT_*): Move operand format definitions
1125 here.
1126
1127Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1128
1129 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1130
1131Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1132
1133 * mn10300.h (mn10300_opcode): Add "format" field.
1134 (MN10300_OPERAND_*): Define.
1135
1136Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1137
1138 * mn10x00.h: Delete.
1139 * mn10200.h, mn10300.h: New files.
1140
1141Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1142
1143 * mn10x00.h: New file.
1144
1145Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1146
1147 * v850.h: Add new flag to indicate this instruction uses a PC
1148 displacement.
1149
1150Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1151
1152 * h8300.h (stmac): Add missing instruction.
1153
1154Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1155
1156 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1157 field.
1158
1159Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1160
1161 * v850.h (V850_OPERAND_EP): Define.
1162
1163 * v850.h (v850_opcode): Add size field.
1164
1165Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1166
1167 * v850.h (v850_operands): Add insert and extract fields, pointers
1168 to functions used to handle unusual operand encoding.
1169 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1170 V850_OPERAND_SIGNED): Defined.
1171
1172Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1173
1174 * v850.h (v850_operands): Add flags field.
1175 (OPERAND_REG, OPERAND_NUM): Defined.
1176
1177Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1178
1179 * v850.h: New file.
1180
1181Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1182
1183 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1184 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1185 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1186 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1187 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1188 Defined.
1189
1190Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1191
1192 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1193 a 3 bit space id instead of a 2 bit space id.
1194
1195Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1196
1197 * d10v.h: Add some additional defines to support the
1198 assembler in determining which operations can be done in parallel.
1199
1200Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1201
1202 * h8300.h (SN): Define.
1203 (eepmov.b): Renamed from "eepmov"
1204 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1205 with them.
1206
1207Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1208
1209 * d10v.h (OPERAND_SHIFT): New operand flag.
1210
1211Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1212
1213 * d10v.h: Changes for divs, parallel-only instructions, and
1214 signed numbers.
1215
1216Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1217
1218 * d10v.h (pd_reg): Define. Putting the definition here allows
1219 the assembler and disassembler to share the same struct.
1220
1221Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1222
1223 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1224 Williams <steve@icarus.com>.
1225
1226Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1227
1228 * d10v.h: New file.
1229
1230Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1231
1232 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1233
1234Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1235
1236 * m68k.h (mcf5200): New macro.
1237 Document names of coldfire control registers.
1238
1239Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1240
1241 * h8300.h (SRC_IN_DST): Define.
1242
1243 * h8300.h (UNOP3): Mark the register operand in this insn
1244 as a source operand, not a destination operand.
1245 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1246 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1247 register operand with SRC_IN_DST.
1248
1249Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1250
1251 * alpha.h: New file.
1252
1253Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1254
1255 * rs6k.h: Remove obsolete file.
1256
1257Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1258
1259 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1260 fdivp, and fdivrp. Add ffreep.
1261
1262Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1263
1264 * h8300.h: Reorder various #defines for readability.
1265 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1266 (BITOP): Accept additional (unused) argument. All callers changed.
1267 (EBITOP): Likewise.
1268 (O_LAST): Bump.
1269 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1270
1271 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1272 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1273 (BITOP, EBITOP): Handle new H8/S addressing modes for
1274 bit insns.
1275 (UNOP3): Handle new shift/rotate insns on the H8/S.
1276 (insns using exr): New instructions.
1277 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1278
1279Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1280
1281 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1282 was incorrect.
1283
1284Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1285
1286 * h8300.h (START): Remove.
1287 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1288 and mov.l insns that can be relaxed.
1289
1290Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1291
1292 * i386.h: Remove Abs32 from lcall.
1293
1294Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1295
1296 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1297 (SLCPOP): New macro.
1298 Mark X,Y opcode letters as in use.
1299
1300Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1301
1302 * sparc.h (F_FLOAT, F_FBR): Define.
1303
1304Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1305
1306 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1307 from all insns.
1308 (ABS8SRC,ABS8DST): Add ABS8MEM.
1309 (add.l): Fix reg+reg variant.
1310 (eepmov.w): Renamed from eepmovw.
1311 (ldc,stc): Fix many cases.
1312
1313Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1314
1315 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1316
1317Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1318
1319 * sparc.h (O): Mark operand letter as in use.
1320
1321Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1322
1323 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1324 Mark operand letters uU as in use.
1325
1326Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1327
1328 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1329 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1330 (SPARC_OPCODE_SUPPORTED): New macro.
1331 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1332 (F_NOTV9): Delete.
1333
1334Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1335
1336 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1337 declaration consistent with return type in definition.
1338
1339Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1340
1341 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1342
1343Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1344
1345 * i386.h (i386_regtab): Add 80486 test registers.
1346
1347Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1348
1349 * i960.h (I_HX): Define.
1350 (i960_opcodes): Add HX instruction.
1351
1352Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1353
1354 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1355 and fclex.
1356
1357Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1358
1359 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1360 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1361 (bfd_* defines): Delete.
1362 (sparc_opcode_archs): Replaces architecture_pname.
1363 (sparc_opcode_lookup_arch): Declare.
1364 (NUMOPCODES): Delete.
1365
1366Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1367
1368 * sparc.h (enum sparc_architecture): Add v9a.
1369 (ARCHITECTURES_CONFLICT_P): Update.
1370
1371Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1372
1373 * i386.h: Added Pentium Pro instructions.
1374
1375Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1376
1377 * m68k.h: Document new 'W' operand place.
1378
1379Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1380
1381 * hppa.h: Add lci and syncdma instructions.
1382
1383Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1384
1385 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1386 instructions.
1387
1388Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1389
1390 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1391 assembler's -mcom and -many switches.
1392
1393Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1394
1395 * i386.h: Fix cmpxchg8b extension opcode description.
1396
1397Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1398
1399 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1400 and register cr4.
1401
1402Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1403
1404 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1405
1406Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1407
1408 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1409
1410Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1411
1412 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1413
1414Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1415
1416 * m68kmri.h: Remove.
1417
1418 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1419 declarations. Remove F_ALIAS and flag field of struct
1420 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1421 int. Make name and args fields of struct m68k_opcode const.
1422
1423Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1424
1425 * sparc.h (F_NOTV9): Define.
1426
1427Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1428
1429 * mips.h (INSN_4010): Define.
1430
1431Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1432
1433 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1434
1435 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1436 * m68k.h: Fix argument descriptions of coprocessor
1437 instructions to allow only alterable operands where appropriate.
1438 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1439 (m68k_opcode_aliases): Add more aliases.
1440
1441Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1442
1443 * m68k.h: Added explcitly short-sized conditional branches, and a
1444 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1445 svr4-based configurations.
1446
1447Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1448
1449 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1450 * i386.h: added missing Data16/Data32 flags to a few instructions.
1451
1452Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1453
1454 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1455 (OP_MASK_BCC, OP_SH_BCC): Define.
1456 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1457 (OP_MASK_CCC, OP_SH_CCC): Define.
1458 (INSN_READ_FPR_R): Define.
1459 (INSN_RFE): Delete.
1460
1461Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1462
1463 * m68k.h (enum m68k_architecture): Deleted.
1464 (struct m68k_opcode_alias): New type.
1465 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1466 matching constraints, values and flags. As a side effect of this,
1467 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1468 as I know were never used, now may need re-examining.
1469 (numopcodes): Now const.
1470 (m68k_opcode_aliases, numaliases): New variables.
1471 (endop): Deleted.
1472 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1473 m68k_opcode_aliases; update declaration of m68k_opcodes.
1474
1475Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1476
1477 * hppa.h (delay_type): Delete unused enumeration.
1478 (pa_opcode): Replace unused delayed field with an architecture
1479 field.
1480 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1481
1482Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1483
1484 * mips.h (INSN_ISA4): Define.
1485
1486Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1487
1488 * mips.h (M_DLA_AB, M_DLI): Define.
1489
1490Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1491
1492 * hppa.h (fstwx): Fix single-bit error.
1493
1494Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1495
1496 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1497
1498Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1499
1500 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1501 debug registers. From Charles Hannum (mycroft@netbsd.org).
1502
1503Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1504
1505 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1506 i386 support:
1507 * i386.h (MOV_AX_DISP32): New macro.
1508 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1509 of several call/return instructions.
1510 (ADDR_PREFIX_OPCODE): New macro.
1511
1512Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1513
1514 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1515
1516 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1517 it pointer to const char;
1518 (struct vot, field `name'): ditto.
1519
1520Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1521
1522 * vax.h: Supply and properly group all values in end sentinel.
1523
1524Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1525
1526 * mips.h (INSN_ISA, INSN_4650): Define.
1527
1528Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1529
1530 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1531 systems with a separate instruction and data cache, such as the
1532 29040, these instructions take an optional argument.
1533
1534Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1535
1536 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1537 INSN_TRAP.
1538
1539Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1540
1541 * mips.h (INSN_STORE_MEMORY): Define.
1542
1543Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1544
1545 * sparc.h: Document new operand type 'x'.
1546
1547Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1548
1549 * i960.h (I_CX2): New instruction category. It includes
1550 instructions available on Cx and Jx processors.
1551 (I_JX): New instruction category, for JX-only instructions.
1552 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1553 Jx-only instructions, in I_JX category.
1554
1555Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1556
1557 * ns32k.h (endop): Made pointer const too.
1558
1559Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1560
1561 * ns32k.h: Drop Q operand type as there is no correct use
1562 for it. Add I and Z operand types which allow better checking.
1563
1564Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1565
1566 * h8300.h (xor.l) :fix bit pattern.
1567 (L_2): New size of operand.
1568 (trapa): Use it.
1569
1570Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1571
1572 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1573
1574Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1575
1576 * sparc.h: Include v9 definitions.
1577
1578Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1579
1580 * m68k.h (m68060): Defined.
1581 (m68040up, mfloat, mmmu): Include it.
1582 (struct m68k_opcode): Widen `arch' field.
1583 (m68k_opcodes): Updated for M68060. Removed comments that were
1584 instructions commented out by "JF" years ago.
1585
1586Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1587
1588 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1589 add a one-bit `flags' field.
1590 (F_ALIAS): New macro.
1591
1592Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1593
1594 * h8300.h (dec, inc): Get encoding right.
1595
1596Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1597
1598 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1599 a flag instead.
1600 (PPC_OPERAND_SIGNED): Define.
1601 (PPC_OPERAND_SIGNOPT): Define.
1602
1603Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1604
1605 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1606 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1607
1608Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1609
1610 * i386.h: Reverse last change. It'll be handled in gas instead.
1611
1612Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1613
1614 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1615 slower on the 486 and used the implicit shift count despite the
1616 explicit operand. The one-operand form is still available to get
1617 the shorter form with the implicit shift count.
1618
1619Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1620
1621 * hppa.h: Fix typo in fstws arg string.
1622
1623Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1624
1625 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1626
1627Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1628
1629 * ppc.h (PPC_OPCODE_601): Define.
1630
1631Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1632
1633 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1634 (so we can determine valid completers for both addb and addb[tf].)
1635
1636 * hppa.h (xmpyu): No floating point format specifier for the
1637 xmpyu instruction.
1638
1639Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1640
1641 * ppc.h (PPC_OPERAND_NEXT): Define.
1642 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1643 (struct powerpc_macro): Define.
1644 (powerpc_macros, powerpc_num_macros): Declare.
1645
1646Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1647
1648 * ppc.h: New file. Header file for PowerPC opcode table.
1649
1650Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1651
1652 * hppa.h: More minor template fixes for sfu and copr (to allow
1653 for easier disassembly).
1654
1655 * hppa.h: Fix templates for all the sfu and copr instructions.
1656
1657Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1658
1659 * i386.h (push): Permit Imm16 operand too.
1660
1661Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1662
1663 * h8300.h (andc): Exists in base arch.
1664
1665Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1666
1667 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1668 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1669
1670Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1671
1672 * hppa.h: Add FP quadword store instructions.
1673
1674Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1675
1676 * mips.h: (M_J_A): Added.
1677 (M_LA): Removed.
1678
1679Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1680
1681 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1682 <mellon@pepper.ncd.com>.
1683
1684Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1685
1686 * hppa.h: Immediate field in probei instructions is unsigned,
1687 not low-sign extended.
1688
1689Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1690
1691 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1692
1693Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1694
1695 * i386.h: Add "fxch" without operand.
1696
1697Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1698
1699 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1700
1701Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1702
1703 * hppa.h: Add gfw and gfr to the opcode table.
1704
1705Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1706
1707 * m88k.h: extended to handle m88110.
1708
1709Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1710
1711 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1712 addresses.
1713
1714Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1715
1716 * i960.h (i960_opcodes): Properly bracket initializers.
1717
1718Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1719
1720 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1721
1722Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1723
1724 * m68k.h (two): Protect second argument with parentheses.
1725
1726Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1727
1728 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1729 Deleted old in/out instructions in "#if 0" section.
1730
1731Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1732
1733 * i386.h (i386_optab): Properly bracket initializers.
1734
1735Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1736
1737 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1738 Jeff Law, law@cs.utah.edu).
1739
1740Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1741
1742 * i386.h (lcall): Accept Imm32 operand also.
1743
1744Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1745
1746 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1747 (M_DABS): Added.
1748
1749Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1750
1751 * mips.h (INSN_*): Changed values. Removed unused definitions.
1752 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1753 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1754 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1755 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1756 (M_*): Added new values for r6000 and r4000 macros.
1757 (ANY_DELAY): Removed.
1758
1759Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1760
1761 * mips.h: Added M_LI_S and M_LI_SS.
1762
1763Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1764
1765 * h8300.h: Get some rare mov.bs correct.
1766
1767Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1768
1769 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1770 been included.
1771
1772Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1773
1774 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1775 jump instructions, for use in disassemblers.
1776
1777Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1778
1779 * m88k.h: Make bitfields just unsigned, not unsigned long or
1780 unsigned short.
1781
1782Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1783
1784 * hppa.h: New argument type 'y'. Use in various float instructions.
1785
1786Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1787
1788 * hppa.h (break): First immediate field is unsigned.
1789
1790 * hppa.h: Add rfir instruction.
1791
1792Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1793
1794 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1795
1796Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1797
1798 * mips.h: Reworked the hazard information somewhat, and fixed some
1799 bugs in the instruction hazard descriptions.
1800
1801Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1802
1803 * m88k.h: Corrected a couple of opcodes.
1804
1805Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1806
1807 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1808 new version includes instruction hazard information, but is
1809 otherwise reasonably similar.
1810
1811Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1812
1813 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1814
1815Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1816
1817 Patches from Jeff Law, law@cs.utah.edu:
1818 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1819 Make the tables be the same for the following instructions:
1820 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1821 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1822 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1823 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1824 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1825 "fcmp", and "ftest".
1826
1827 * hppa.h: Make new and old tables the same for "break", "mtctl",
1828 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1829 Fix typo in last patch. Collapse several #ifdefs into a
1830 single #ifdef.
1831
1832 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1833 of the comments up-to-date.
1834
1835 * hppa.h: Update "free list" of letters and update
1836 comments describing each letter's function.
1837
1838Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1839
1840 * h8300.h: checkpoint, includes H8/300-H opcodes.
1841
1842Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1843
1844 * Patches from Jeffrey Law <law@cs.utah.edu>.
1845 * hppa.h: Rework single precision FP
1846 instructions so that they correctly disassemble code
1847 PA1.1 code.
1848
1849Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1850
1851 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1852 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1853
1854Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1855
1856 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1857 gdb will define it for now.
1858
1859Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1860
1861 * sparc.h: Don't end enumerator list with comma.
1862
1863Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1864
1865 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1866 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1867 ("bc2t"): Correct typo.
1868 ("[ls]wc[023]"): Use T rather than t.
1869 ("c[0123]"): Define general coprocessor instructions.
1870
1871Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1872
1873 * m68k.h: Move split point for gcc compilation more towards
1874 middle.
1875
1876Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1877
1878 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1879 simply wrong, ics, rfi, & rfsvc were missing).
1880 Add "a" to opr_ext for "bb". Doc fix.
1881
1882Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1883
1884 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1885 * mips.h: Add casts, to suppress warnings about shifting too much.
1886 * m68k.h: Document the placement code '9'.
1887
1888Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1889
1890 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1891 allows callers to break up the large initialized struct full of
1892 opcodes into two half-sized ones. This permits GCC to compile
1893 this module, since it takes exponential space for initializers.
1894 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1895
1896Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1897
1898 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1899 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1900 initialized structs in it.
1901
1902Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1903
1904 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1905 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1906 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1907
1908Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1909
1910 * mips.h: document "i" and "j" operands correctly.
1911
1912Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1913
1914 * mips.h: Removed endianness dependency.
1915
1916Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1917
1918 * h8300.h: include info on number of cycles per instruction.
1919
1920Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1921
1922 * hppa.h: Move handy aliases to the front. Fix masks for extract
1923 and deposit instructions.
1924
1925Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1926
1927 * i386.h: accept shld and shrd both with and without the shift
1928 count argument, which is always %cl.
1929
1930Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1931
1932 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1933 (one_byte_segment_defaults, two_byte_segment_defaults,
1934 i386_prefixtab_end): Ditto.
1935
1936Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1937
1938 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1939 for operand 2; from John Carr, jfc@dsg.dec.com.
1940
1941Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1942
1943 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1944 always use 16-bit offsets. Makes calculated-size jump tables
1945 feasible.
1946
1947Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1948
1949 * i386.h: Fix one-operand forms of in* and out* patterns.
1950
1951Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1952
1953 * m68k.h: Added CPU32 support.
1954
1955Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1956
1957 * mips.h (break): Disassemble the argument. Patch from
1958 jonathan@cs.stanford.edu (Jonathan Stone).
1959
1960Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1961
1962 * m68k.h: merged Motorola and MIT syntax.
1963
1964Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1965
1966 * m68k.h (pmove): make the tests less strict, the 68k book is
1967 wrong.
1968
1969Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1970
1971 * m68k.h (m68ec030): Defined as alias for 68030.
1972 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1973 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1974 them. Tightened description of "fmovex" to distinguish it from
1975 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1976 up descriptions that claimed versions were available for chips not
1977 supporting them. Added "pmovefd".
1978
1979Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1980
1981 * m68k.h: fix where the . goes in divull
1982
1983Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1984
1985 * m68k.h: the cas2 instruction is supposed to be written with
1986 indirection on the last two operands, which can be either data or
1987 address registers. Added a new operand type 'r' which accepts
1988 either register type. Added new cases for cas2l and cas2w which
1989 use them. Corrected masks for cas2 which failed to recognize use
1990 of address register.
1991
1992Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1993
1994 * m68k.h: Merged in patches (mostly m68040-specific) from
1995 Colin Smith <colin@wrs.com>.
1996
1997 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1998 base). Also cleaned up duplicates, re-ordered instructions for
1999 the sake of dis-assembling (so aliases come after standard names).
2000 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2001
2002Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2003
2004 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2005 all missing .s
2006
2007Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2008
2009 * sparc.h: Moved tables to BFD library.
2010
2011 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2012
2013Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2014
2015 * h8300.h: Finish filling in all the holes in the opcode table,
2016 so that the Lucid C compiler can digest this as well...
2017
2018Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2019
2020 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2021 Fix opcodes on various sizes of fild/fist instructions
2022 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2023 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2024
2025Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2026
2027 * h8300.h: Fill in all the holes in the opcode table so that the
2028 losing HPUX C compiler can digest this...
2029
2030Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2031
2032 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2033 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2034
2035Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2036
2037 * sparc.h: Add new architecture variant sparclite; add its scan
2038 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2039
2040Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2041
2042 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2043 fy@lucid.com).
2044
2045Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2046
2047 * rs6k.h: New version from IBM (Metin).
2048
2049Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2050
2051 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2052 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2053
2054Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2055
2056 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2057
2058Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2059
2060 * m68k.h (one, two): Cast macro args to unsigned to suppress
2061 complaints from compiler and lint about integer overflow during
2062 shift.
2063
2064Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2065
2066 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2067
2068Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2069
2070 * mips.h: Make bitfield layout depend on the HOST compiler,
2071 not on the TARGET system.
2072
2073Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2074
2075 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2076 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2077 <TRANLE@INTELLICORP.COM>.
2078
2079Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2080
2081 * h8300.h: turned op_type enum into #define list
2082
2083Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2084
2085 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2086 similar instructions -- they've been renamed to "fitoq", etc.
2087 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2088 number of arguments.
2089 * h8300.h: Remove extra ; which produces compiler warning.
2090
2091Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2092
2093 * sparc.h: fix opcode for tsubcctv.
2094
2095Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2096
2097 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2098
2099Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2100
2101 * sparc.h (nop): Made the 'lose' field be even tighter,
2102 so only a standard 'nop' is disassembled as a nop.
2103
2104Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2105
2106 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2107 disassembled as a nop.
2108
2109Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2110
2111 * sparc.h: fix a typo.
2112
2113Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2114
2115 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2116 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2117 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2118
2119\f
2120Local Variables:
2121version-control: never
2122End: