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Fix gas 68HC12 indexed addressing code generation
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
7c2b079e
JH
1Wed Jan 10 15:30:57 MET 2001 Jan Hubicka <jh@suse.cz>
2
3 * i386.h (pinsrw): Add.
4 (pshufw): Remove.
5 (cvttpd2dq): Fix operands.
6 (cvttps2dq): Likewise.
7 (movq2q): Rename to movdq2q.
8
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92001-01-10 Richard Schaal <richard.schaal@intel.com>
10
11 * i386.h: Correct movnti instruction.
12
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132001-01-09 Jeff Johnston <jjohnstn@redhat.com>
14
15 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
16 of operands (unsigned char or unsigned short).
17 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
18 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
19
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20Fri Jan 5 13:22:23 MET 2001 Jan Hubicka <jh@suse.cz>
21
22 * i386.h (i386_optab): Make [sml]fence template to use immext field.
23
24Wed Jan 3 16:27:15 MET 2001 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
25
26 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
27 introduced by Pentium4
28
7bc70a8e 29Sat Dec 30 19:03:15 MET 2000 Jan Hubicka <jh@suse.cz>
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30
31 * i386.h (i386_optab): Add "rex*" instructions;
32 add swapgs; disable jmp/call far direct instructions for
33 64bit mode; add syscall and sysret; disable registers for 0xc6
34 template. Add 'q' suffixes to extendable instructions, disable
079966a8 35 obsolete instructions, add new sign/zero extension ones.
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36 (i386_regtab): Add extended registers.
37 (*Suf): Add No_qSuf.
38 (q_Suf, wlq_Suf, bwlq_Suf): New.
39
3e73aa7c
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40Wed Dec 20 14:22:03 MET 2000 Jan Hubicka <jh@suse.cz>
41
42 * i386.h (i386_optab): Replace "Imm" with "EncImm".
43 (i386_regtab): Add flags field.
44
bf40d919
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452000-12-12 Nick Clifton <nickc@redhat.com>
46
47 * mips.h: Fix formatting.
48
4372b673
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492000-12-01 Chris Demetriou <cgd@sibyte.com>
50
51 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
52 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
53 OP_*_SYSCALL definitions.
54 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
55 19 bit wait codes.
56 (MIPS operand specifier comments): Remove 'm', add 'U' and
57 'J', and update the meaning of 'B' so that it's more general.
58
e7af610e
NC
59 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
60 INSN_ISA5): Renumber, redefine to mean the ISA at which the
61 instruction was added.
62 (INSN_ISA32): New constant.
63 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
64 Renumber to avoid new and/or renumbered INSN_* constants.
65 (INSN_MIPS32): Delete.
66 (ISA_UNKNOWN): New constant to indicate unknown ISA.
67 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
68 ISA_MIPS32): New constants, defined to be the mask of INSN_*
69 constants available at that ISA level.
70 (CPU_UNKNOWN): New constant to indicate unknown CPU.
71 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
72 define it with a unique value.
73 (OPCODE_IS_MEMBER): Update for new ISA membership-related
74 constant meanings.
75
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76 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
77 definitions.
78
c6c98b38
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79 * mips.h (CPU_SB1): New constant.
80
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JJ
812000-10-20 Jakub Jelinek <jakub@redhat.com>
82
83 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
84 Note that '3' is used for siam operand.
85
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862000-09-22 Jim Wilson <wilson@cygnus.com>
87
88 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
89
156c2f8b
NC
902000-09-13 Anders Norlander <anorland@acc.umu.se>
91
92 * mips.h: Use defines instead of hard-coded processor numbers.
93 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
94 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
95 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
96 CPU_4KC, CPU_4KM, CPU_4KP): Define..
97 (OPCODE_IS_MEMBER): Use new defines.
98 (OP_MASK_SEL, OP_SH_SEL): Define.
99 (OP_MASK_CODE20, OP_SH_CODE20): Define.
100 Add 'P' to used characters.
101 Use 'H' for coprocessor select field.
102 Use 'm' for 20 bit breakpoint code.
103 Document new arg characters and add to used characters.
104 (INSN_MIPS32): New define for MIPS32 extensions.
105 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
106
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1072000-09-05 Alan Modra <alan@linuxcare.com.au>
108
109 * hppa.h: Mention cz completer.
110
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1112000-08-16 Jim Wilson <wilson@cygnus.com>
112
113 * ia64.h (IA64_OPCODE_POSTINC): New.
114
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1152000-08-15 H.J. Lu <hjl@gnu.org>
116
117 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
118 IgnoreSize change.
119
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DC
1202000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
121
122 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
123 Move related opcodes closer to each other.
124 Minor changes in comments, list undefined opcodes.
125
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1262000-07-26 Dave Brolley <brolley@redhat.com>
127
128 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
129
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1302000-07-20 Hans-Peter Nilsson <hp@axis.com>
131
132 cris.h: New file.
133
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1342000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
135
136 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
137 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
138 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
139 (AVR_ISA_M83): Define for ATmega83, ATmega85.
140 (espm): Remove, because ESPM removed in databook update.
141 (eicall, eijmp): Move to the end of opcode table.
142
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1432000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
144
145 * m68hc11.h: New file for support of Motorola 68hc11.
146
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147Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
148
149 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
150
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151Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
152
153 * avr.h: New file with AVR opcodes.
154
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155Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
156
157 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
158
b722f2be
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1592000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
160
161 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
162
f9e0cf0b
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1632000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
164
165 * i386.h: Use sl_FP, not sl_Suf for fild.
166
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1672000-05-16 Frank Ch. Eigler <fche@redhat.com>
168
169 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
170 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
171 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
172 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
173
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1742000-05-13 Alan Modra <alan@linuxcare.com.au>,
175
176 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
177
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1782000-05-13 Alan Modra <alan@linuxcare.com.au>,
179 Alexander Sokolov <robocop@netlink.ru>
180
181 * i386.h (i386_optab): Add cpu_flags for all instructions.
182
1832000-05-13 Alan Modra <alan@linuxcare.com.au>
184
185 From Gavin Romig-Koch <gavin@cygnus.com>
186 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
187
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1882000-05-04 Timothy Wall <twall@cygnus.com>
189
190 * tic54x.h: New.
191
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1922000-05-03 J.T. Conklin <jtc@redback.com>
193
194 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
195 (PPC_OPERAND_VR): New operand flag for vector registers.
196
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1972000-05-01 Kazu Hirata <kazu@hxi.com>
198
199 * h8300.h (EOP): Add missing initializer.
200
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201Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
202
203 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
204 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
205 New operand types l,y,&,fe,fE,fx added to support above forms.
206 (pa_opcodes): Replaced usage of 'x' as source/target for
207 floating point double-word loads/stores with 'fx'.
208
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209Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
210 David Mosberger <davidm@hpl.hp.com>
211 Timothy Wall <twall@cygnus.com>
212 Jim Wilson <wilson@cygnus.com>
213
214 * ia64.h: New file.
215
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NC
2162000-03-27 Nick Clifton <nickc@cygnus.com>
217
218 * d30v.h (SHORT_A1): Fix value.
219 (SHORT_AR): Renumber so that it is at the end of the list of short
220 instructions, not the end of the list of long instructions.
221
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2222000-03-26 Alan Modra <alan@linuxcare.com>
223
224 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
225 problem isn't really specific to Unixware.
226 (OLDGCC_COMPAT): Define.
227 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
228 destination %st(0).
229 Fix lots of comments.
230
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2312000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
232
233 * d30v.h:
234 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
235 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
236 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
237 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
238 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
239 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
240 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
241
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2422000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
243
244 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
245 fistpd without suffix.
246
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2472000-02-24 Nick Clifton <nickc@cygnus.com>
248
249 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
250 'signed_overflow_ok_p'.
251 Delete prototypes for cgen_set_flags() and cgen_get_flags().
252
60f036a2
AH
2532000-02-24 Andrew Haley <aph@cygnus.com>
254
255 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
256 (CGEN_CPU_TABLE): flags: new field.
257 Add prototypes for new functions.
258
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2592000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
260
261 * i386.h: Add some more UNIXWARE_COMPAT comments.
262
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2632000-02-23 Linas Vepstas <linas@linas.org>
264
265 * i370.h: New file.
266
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2672000-02-22 Andrew Haley <aph@cygnus.com>
268
269 * mips.h: (OPCODE_IS_MEMBER): Add comment.
270
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2711999-12-30 Andrew Haley <aph@cygnus.com>
272
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273 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
274 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
275 insns.
367c01af 276
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2772000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
278
279 * i386.h: Qualify intel mode far call and jmp with x_Suf.
280
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2811999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
282
283 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
284 indirect jumps and calls. Add FF/3 call for intel mode.
285
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286Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
287
288 * mn10300.h: Add new operand types. Add new instruction formats.
289
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290Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
291
292 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
293 instruction.
294
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2951999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
296
297 * mips.h (INSN_ISA5): New.
298
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2991999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
300
301 * mips.h (OPCODE_IS_MEMBER): New.
302
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3031999-10-29 Nick Clifton <nickc@cygnus.com>
304
305 * d30v.h (SHORT_AR): Define.
306
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3071999-10-18 Michael Meissner <meissner@cygnus.com>
308
309 * alpha.h (alpha_num_opcodes): Convert to unsigned.
310 (alpha_num_operands): Ditto.
311
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312Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
313
314 * hppa.h (pa_opcodes): Add load and store cache control to
315 instructions. Add ordered access load and store.
316
317 * hppa.h (pa_opcode): Add new entries for addb and addib.
318
319 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
320
321 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
322
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323Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
324
325 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
326
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327Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
328
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329 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
330 and "be" using completer prefixes.
331
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332 * hppa.h (pa_opcodes): Add initializers to silence compiler.
333
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334 * hppa.h: Update comments about character usage.
335
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336Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
337
338 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
339 up the new fstw & bve instructions.
340
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341Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
342
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343 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
344 instructions.
345
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346 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
347
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348 * hppa.h (pa_opcodes): Add long offset double word load/store
349 instructions.
350
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351 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
352 stores.
353
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354 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
355
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356 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
357
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358 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
359
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360 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
361
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362 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
363
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364 * hppa.h (pa_opcodes): Add support for "b,l".
365
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366 * hppa.h (pa_opcodes): Add support for "b,gate".
367
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368Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
369
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370 * hppa.h (pa_opcodes): Use 'fX' for first register operand
371 in xmpyu.
372
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373 * hppa.h (pa_opcodes): Fix mask for probe and probei.
374
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375 * hppa.h (pa_opcodes): Fix mask for depwi.
376
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377Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
378
379 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
380 an explicit output argument.
381
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382Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
383
384 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
385 Add a few PA2.0 loads and store variants.
386
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3871999-09-04 Steve Chamberlain <sac@pobox.com>
388
389 * pj.h: New file.
390
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3911999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
392
393 * i386.h (i386_regtab): Move %st to top of table, and split off
394 other fp reg entries.
395 (i386_float_regtab): To here.
396
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397Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
398
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399 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
400 by 'f'.
401
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402 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
403 Add supporting args.
404
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405 * hppa.h: Document new completers and args.
406 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
407 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
408 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
409 pmenb and pmdis.
410
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411 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
412 hshr, hsub, mixh, mixw, permh.
413
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414 * hppa.h (pa_opcodes): Change completers in instructions to
415 use 'c' prefix.
416
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417 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
418 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
419
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420 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
421 fnegabs to use 'I' instead of 'F'.
422
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4231999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
424
425 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
426 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
427 Alphabetically sort PIII insns.
428
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429Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
430
431 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
432
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433Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
434
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435 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
436 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
437
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438 * hppa.h: Document 64 bit condition completers.
439
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440Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
441
442 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
443
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4441999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
445
446 * i386.h (i386_optab): Add DefaultSize modifier to all insns
447 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
448 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
449
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450Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
451 Jeff Law <law@cygnus.com>
452
453 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
454
455 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
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456
457 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
458 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
459
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4601999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
461
462 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
463
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464Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
465
466 * hppa.h (struct pa_opcode): Add new field "flags".
467 (FLAGS_STRICT): Define.
468
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469Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
470 Jeff Law <law@cygnus.com>
471
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472 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
473
474 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 475
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AM
4761999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
477
478 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
479 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
480 flag to fcomi and friends.
481
cd8a80ba
JL
482Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
483
484 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
485 integer logical instructions.
486
1fca749b
ILT
4871999-05-28 Linus Nordberg <linus.nordberg@canit.se>
488
489 * m68k.h: Document new formats `E', `G', `H' and new places `N',
490 `n', `o'.
491
492 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
493 and new places `m', `M', `h'.
494
aa008907
JL
495Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
496
497 * hppa.h (pa_opcodes): Add several processor specific system
498 instructions.
499
e26b85f0
JL
500Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
501
502 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
503 "addb", and "addib" to be used by the disassembler.
504
c608c12e
AM
5051999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
506
507 * i386.h (ReverseModrm): Remove all occurences.
508 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
509 movmskps, pextrw, pmovmskb, maskmovq.
510 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
511 ignore the data size prefix.
512
513 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
514 Mostly stolen from Doug Ledford <dledford@redhat.com>
515
45c18104
RH
516Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
517
518 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
519
252b5132
RH
5201999-04-14 Doug Evans <devans@casey.cygnus.com>
521
522 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
523 (CGEN_ATTR_TYPE): Update.
524 (CGEN_ATTR_MASK): Number booleans starting at 0.
525 (CGEN_ATTR_VALUE): Update.
526 (CGEN_INSN_ATTR): Update.
527
528Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
529
530 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
531 instructions.
532
533Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
534
535 * hppa.h (bb, bvb): Tweak opcode/mask.
536
537
5381999-03-22 Doug Evans <devans@casey.cygnus.com>
539
540 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
541 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
542 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
543 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
544 Delete member max_insn_size.
545 (enum cgen_cpu_open_arg): New enum.
546 (cpu_open): Update prototype.
547 (cpu_open_1): Declare.
548 (cgen_set_cpu): Delete.
549
5501999-03-11 Doug Evans <devans@casey.cygnus.com>
551
552 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
553 (CGEN_OPERAND_NIL): New macro.
554 (CGEN_OPERAND): New member `type'.
555 (@arch@_cgen_operand_table): Delete decl.
556 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
557 (CGEN_OPERAND_TABLE): New struct.
558 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
559 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
560 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
561 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
562 {get,set}_{int,vma}_operand.
563 (@arch@_cgen_cpu_open): New arg `isa'.
564 (cgen_set_cpu): Ditto.
565
566Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
567
568 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
569
5701999-02-25 Doug Evans <devans@casey.cygnus.com>
571
572 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
573 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
574 enum cgen_hw_type.
575 (CGEN_HW_TABLE): New struct.
576 (hw_table): Delete declaration.
577 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
578 to table entry to enum.
579 (CGEN_OPINST): Ditto.
580 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
581
582Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
583
584 * alpha.h (AXP_OPCODE_EV6): New.
585 (AXP_OPCODE_NOPAL): Include it.
586
5871999-02-09 Doug Evans <devans@casey.cygnus.com>
588
589 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
590 All uses updated. New members int_insn_p, max_insn_size,
591 parse_operand,insert_operand,extract_operand,print_operand,
592 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
593 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
594 extract_handlers,print_handlers.
595 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
596 (CGEN_ATTR_BOOL_OFFSET): New macro.
597 (CGEN_ATTR_MASK): Subtract it to compute bit number.
598 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
599 (cgen_opcode_handler): Renamed from cgen_base.
600 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
601 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
602 all uses updated.
603 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
604 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
605 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
606 (CGEN_OPCODE,CGEN_IBASE): New types.
607 (CGEN_INSN): Rewrite.
608 (CGEN_{ASM,DIS}_HASH*): Delete.
609 (init_opcode_table,init_ibld_table): Declare.
610 (CGEN_INSN_ATTR): New type.
611
612Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
613
614 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
615 (x_FP, d_FP, dls_FP, sldx_FP): Define.
616 Change *Suf definitions to include x and d suffixes.
617 (movsx): Use w_Suf and b_Suf.
618 (movzx): Likewise.
619 (movs): Use bwld_Suf.
620 (fld): Change ordering. Use sld_FP.
621 (fild): Add Intel Syntax equivalent of fildq.
622 (fst): Use sld_FP.
623 (fist): Use sld_FP.
624 (fstp): Use sld_FP. Add x_FP version.
625 (fistp): LLongMem version for Intel Syntax.
626 (fcom, fcomp): Use sld_FP.
627 (fadd, fiadd, fsub): Use sld_FP.
628 (fsubr): Use sld_FP.
629 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
630
6311999-01-27 Doug Evans <devans@casey.cygnus.com>
632
633 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
634 CGEN_MODE_UINT.
635
636Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
637
638 * hppa.h (bv): Fix mask.
639
6401999-01-05 Doug Evans <devans@casey.cygnus.com>
641
642 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
643 (CGEN_ATTR): Use it.
644 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
645 (CGEN_ATTR_TABLE): New member dfault.
646
6471998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
648
649 * mips.h (MIPS16_INSN_BRANCH): New.
650
651Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
652
653 The following is part of a change made by Edith Epstein
654 <eepstein@sophia.cygnus.com> as part of a project to merge in
655 changes by HP; HP did not create ChangeLog entries.
656
657 * hppa.h (completer_chars): list of chars to not put a space
658 after.
659
660Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
661
662 * i386.h (i386_optab): Permit w suffix on processor control and
663 status word instructions.
664
6651998-11-30 Doug Evans <devans@casey.cygnus.com>
666
667 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
668 (struct cgen_keyword_entry): Ditto.
669 (struct cgen_operand): Ditto.
670 (CGEN_IFLD): New typedef, with associated access macros.
671 (CGEN_IFMT): New typedef, with associated access macros.
672 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
673 (CGEN_IVALUE): New typedef.
674 (struct cgen_insn): Delete const on syntax,attrs members.
675 `format' now points to format data. Type of `value' is now
676 CGEN_IVALUE.
677 (struct cgen_opcode_table): New member ifld_table.
678
6791998-11-18 Doug Evans <devans@casey.cygnus.com>
680
681 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
682 (CGEN_OPERAND_INSTANCE): New member `attrs'.
683 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
684 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
685 (cgen_opcode_table): Update type of dis_hash fn.
686 (extract_operand): Update type of `insn_value' arg.
687
688Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
689
690 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
691
692Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
693
694 * mips.h (INSN_MULT): Added.
695
696Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
697
698 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
699
700Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
701
702 * cgen.h (CGEN_INSN_INT): New typedef.
703 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
704 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
705 (CGEN_INSN_BYTES_PTR): New typedef.
706 (CGEN_EXTRACT_INFO): New typedef.
707 (cgen_insert_fn,cgen_extract_fn): Update.
708 (cgen_opcode_table): New member `insn_endian'.
709 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
710 (insert_operand,extract_operand): Update.
711 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
712
713Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
714
715 * cgen.h (CGEN_ATTR_BOOLS): New macro.
716 (struct CGEN_HW_ENTRY): New member `attrs'.
717 (CGEN_HW_ATTR): New macro.
718 (struct CGEN_OPERAND_INSTANCE): New member `name'.
719 (CGEN_INSN_INVALID_P): New macro.
720
721Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
722
723 * hppa.h: Add "fid".
724
725Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
726
727 From Robert Andrew Dale <rob@nb.net>
728 * i386.h (i386_optab): Add AMD 3DNow! instructions.
729 (AMD_3DNOW_OPCODE): Define.
730
731Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
732
733 * d30v.h (EITHER_BUT_PREFER_MU): Define.
734
735Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
736
737 * cgen.h (cgen_insn): #if 0 out element `cdx'.
738
739Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
740
741 Move all global state data into opcode table struct, and treat
742 opcode table as something that is "opened/closed".
743 * cgen.h (CGEN_OPCODE_DESC): New type.
744 (all fns): New first arg of opcode table descriptor.
745 (cgen_set_parse_operand_fn): Add prototype.
746 (cgen_current_machine,cgen_current_endian): Delete.
747 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
748 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
749 dis_hash_table,dis_hash_table_entries.
750 (opcode_open,opcode_close): Add prototypes.
751
752 * cgen.h (cgen_insn): New element `cdx'.
753
754Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
755
756 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
757
758Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
759
760 * mn10300.h: Add "no_match_operands" field for instructions.
761 (MN10300_MAX_OPERANDS): Define.
762
763Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
764
765 * cgen.h (cgen_macro_insn_count): Declare.
766
767Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
768
769 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
770 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
771 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
772 set_{int,vma}_operand.
773
774Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
775
776 * mn10300.h: Add "machine" field for instructions.
777 (MN103, AM30): Define machine types.
778
779Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
780
781 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
782
7831998-06-18 Ulrich Drepper <drepper@cygnus.com>
784
785 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
786
787Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
788
789 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
790 and ud2b.
791 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
792 those that happen to be implemented on pentiums.
793
794Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
795
796 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
797 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
798 with Size16|IgnoreSize or Size32|IgnoreSize.
799
800Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
801
802 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
803 (REPE): Rename to REPE_PREFIX_OPCODE.
804 (i386_regtab_end): Remove.
805 (i386_prefixtab, i386_prefixtab_end): Remove.
806 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
807 of md_begin.
808 (MAX_OPCODE_SIZE): Define.
809 (i386_optab_end): Remove.
810 (sl_Suf): Define.
811 (sl_FP): Use sl_Suf.
812
813 * i386.h (i386_optab): Allow 16 bit displacement for `mov
814 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
815 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
816 data32, dword, and adword prefixes.
817 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
818 regs.
819
820Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
821
822 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
823
824 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
825 register operands, because this is a common idiom. Flag them with
826 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
827 fdivrp because gcc erroneously generates them. Also flag with a
828 warning.
829
830 * i386.h: Add suffix modifiers to most insns, and tighter operand
831 checks in some cases. Fix a number of UnixWare compatibility
832 issues with float insns. Merge some floating point opcodes, using
833 new FloatMF modifier.
834 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
835 consistency.
836
837 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
838 IgnoreDataSize where appropriate.
839
840Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
841
842 * i386.h: (one_byte_segment_defaults): Remove.
843 (two_byte_segment_defaults): Remove.
844 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
845
846Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
847
848 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
849 (cgen_hw_lookup_by_num): Declare.
850
851Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
852
853 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
854 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
855
856Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
857
858 * cgen.h (cgen_asm_init_parse): Delete.
859 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
860 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
861
862Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
863
864 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
865 (cgen_asm_finish_insn): Update prototype.
866 (cgen_insn): New members num, data.
867 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
868 dis_hash, dis_hash_table_size moved to ...
869 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
870 All uses updated. New members asm_hash_p, dis_hash_p.
871 (CGEN_MINSN_EXPANSION): New struct.
872 (cgen_expand_macro_insn): Declare.
873 (cgen_macro_insn_count): Declare.
874 (get_insn_operands): Update prototype.
875 (lookup_get_insn_operands): Declare.
876
877Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
878
879 * i386.h (i386_optab): Change iclrKludge and imulKludge to
880 regKludge. Add operands types for string instructions.
881
882Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
883
884 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
885 table.
886
887Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
888
889 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
890 for `gettext'.
891
892Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
893
894 * i386.h: Remove NoModrm flag from all insns: it's never checked.
895 Add IsString flag to string instructions.
896 (IS_STRING): Don't define.
897 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
898 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
899 (SS_PREFIX_OPCODE): Define.
900
901Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
902
903 * i386.h: Revert March 24 patch; no more LinearAddress.
904
905Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
906
907 * i386.h (i386_optab): Remove fwait (9b) from all floating point
908 instructions, and instead add FWait opcode modifier. Add short
909 form of fldenv and fstenv.
910 (FWAIT_OPCODE): Define.
911
912 * i386.h (i386_optab): Change second operand constraint of `mov
913 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
914 allow legal instructions such as `movl %gs,%esi'
915
916Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
917
918 * h8300.h: Various changes to fully bracket initializers.
919
920Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
921
922 * i386.h: Set LinearAddress for lidt and lgdt.
923
924Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
925
926 * cgen.h (CGEN_BOOL_ATTR): New macro.
927
928Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
929
930 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
931
932Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
933
934 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
935 (cgen_insn): Record syntax and format entries here, rather than
936 separately.
937
938Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
939
940 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
941
942Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
943
944 * cgen.h (cgen_insert_fn): Change type of result to const char *.
945 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
946 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
947
948Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
949
950 * cgen.h (lookup_insn): New argument alias_p.
951
952Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
953
954Fix rac to accept only a0:
955 * d10v.h (OPERAND_ACC): Split into:
956 (OPERAND_ACC0, OPERAND_ACC1) .
957 (OPERAND_GPR): Define.
958
959Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
960
961 * cgen.h (CGEN_FIELDS): Define here.
962 (CGEN_HW_ENTRY): New member `type'.
963 (hw_list): Delete decl.
964 (enum cgen_mode): Declare.
965 (CGEN_OPERAND): New member `hw'.
966 (enum cgen_operand_instance_type): Declare.
967 (CGEN_OPERAND_INSTANCE): New type.
968 (CGEN_INSN): New member `operands'.
969 (CGEN_OPCODE_DATA): Make hw_list const.
970 (get_insn_operands,lookup_insn): Add prototypes for.
971
972Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
973
974 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
975 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
976 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
977 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
978
979Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
980
981 * cgen.h: Correct typo in comment end marker.
982
983Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
984
985 * tic30.h: New file.
986
987Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
988
989 * cgen.h: Add prototypes for cgen_save_fixups(),
990 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
991 of cgen_asm_finish_insn() to return a char *.
992
993Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
994
995 * cgen.h: Formatting changes to improve readability.
996
997Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
998
999 * cgen.h (*): Clean up pass over `struct foo' usage.
1000 (CGEN_ATTR): Make unsigned char.
1001 (CGEN_ATTR_TYPE): Update.
1002 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1003 (cgen_base): Move member `attrs' to cgen_insn.
1004 (CGEN_KEYWORD): New member `null_entry'.
1005 (CGEN_{SYNTAX,FORMAT}): New types.
1006 (cgen_insn): Format and syntax separated from each other.
1007
1008Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1009
1010 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1011 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1012 flags_{used,set} long.
1013 (d30v_operand): Make flags field long.
1014
1015Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1016
1017 * m68k.h: Fix comment describing operand types.
1018
1019Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1020
1021 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1022 everything else after down.
1023
1024Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1025
1026 * d10v.h (OPERAND_FLAG): Split into:
1027 (OPERAND_FFLAG, OPERAND_CFLAG) .
1028
1029Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1030
1031 * mips.h (struct mips_opcode): Changed comments to reflect new
1032 field usage.
1033
1034Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1035
1036 * mips.h: Added to comments a quick-ref list of all assigned
1037 operand type characters.
1038 (OP_{MASK,SH}_PERFREG): New macros.
1039
1040Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1041
1042 * sparc.h: Add '_' and '/' for v9a asr's.
1043 Patch from David Miller <davem@vger.rutgers.edu>
1044
1045Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1046
1047 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1048 area are not available in the base model (H8/300).
1049
1050Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1051
1052 * m68k.h: Remove documentation of ` operand specifier.
1053
1054Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1055
1056 * m68k.h: Document q and v operand specifiers.
1057
1058Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1059
1060 * v850.h (struct v850_opcode): Add processors field.
1061 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1062 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1063 (PROCESSOR_V850EA): New bit constants.
1064
1065Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1066
1067 Merge changes from Martin Hunt:
1068
1069 * d30v.h: Allow up to 64 control registers. Add
1070 SHORT_A5S format.
1071
1072 * d30v.h (LONG_Db): New form for delayed branches.
1073
1074 * d30v.h: (LONG_Db): New form for repeati.
1075
1076 * d30v.h (SHORT_D2B): New form.
1077
1078 * d30v.h (SHORT_A2): New form.
1079
1080 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1081 registers are used. Needed for VLIW optimization.
1082
1083Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1084
1085 * cgen.h: Move assembler interface section
1086 up so cgen_parse_operand_result is defined for cgen_parse_address.
1087 (cgen_parse_address): Update prototype.
1088
1089Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1090
1091 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1092
1093Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1094
1095 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1096 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1097 <paubert@iram.es>.
1098
1099 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1100 <paubert@iram.es>.
1101
1102 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1103 <paubert@iram.es>.
1104
1105 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1106 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1107
1108Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1109
1110 * v850.h (V850_NOT_R0): New flag.
1111
1112Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1113
1114 * v850.h (struct v850_opcode): Remove flags field.
1115
1116Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1117
1118 * v850.h (struct v850_opcode): Add flags field.
1119 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1120 fields.
1121 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1122 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1123
1124Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1125
1126 * arc.h: New file.
1127
1128Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1129
1130 * sparc.h (sparc_opcodes): Declare as const.
1131
1132Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1133
1134 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1135 uses single or double precision floating point resources.
1136 (INSN_NO_ISA, INSN_ISA1): Define.
1137 (cpu specific INSN macros): Tweak into bitmasks outside the range
1138 of INSN_ISA field.
1139
1140Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1141
1142 * i386.h: Fix pand opcode.
1143
1144Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1145
1146 * mips.h: Widen INSN_ISA and move it to a more convenient
1147 bit position. Add INSN_3900.
1148
1149Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1150
1151 * mips.h (struct mips_opcode): added new field membership.
1152
1153Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1154
1155 * i386.h (movd): only Reg32 is allowed.
1156
1157 * i386.h: add fcomp and ud2. From Wayne Scott
1158 <wscott@ichips.intel.com>.
1159
1160Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1161
1162 * i386.h: Add MMX instructions.
1163
1164Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1165
1166 * i386.h: Remove W modifier from conditional move instructions.
1167
1168Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1169
1170 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1171 with no arguments to match that generated by the UnixWare
1172 assembler.
1173
1174Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1175
1176 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1177 (cgen_parse_operand_fn): Declare.
1178 (cgen_init_parse_operand): Declare.
1179 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1180 new argument `want'.
1181 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1182 (enum cgen_parse_operand_type): New enum.
1183
1184Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1185
1186 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1187
1188Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1189
1190 * cgen.h: New file.
1191
1192Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1193
1194 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1195 fdivrp.
1196
1197Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1198
1199 * v850.h (extract): Make unsigned.
1200
1201Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1202
1203 * i386.h: Add iclr.
1204
1205Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1206
1207 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1208 take a direction bit.
1209
1210Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1211
1212 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1213
1214Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1215
1216 * sparc.h: Include <ansidecl.h>. Update function declarations to
1217 use prototypes, and to use const when appropriate.
1218
1219Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1220
1221 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1222
1223Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1224
1225 * d10v.h: Change pre_defined_registers to
1226 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1227
1228Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1229
1230 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1231 Change mips_opcodes from const array to a pointer,
1232 and change bfd_mips_num_opcodes from const int to int,
1233 so that we can increase the size of the mips opcodes table
1234 dynamically.
1235
1236Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1237
1238 * d30v.h (FLAG_X): Remove unused flag.
1239
1240Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1241
1242 * d30v.h: New file.
1243
1244Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1245
1246 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1247 (PDS_VALUE): Macro to access value field of predefined symbols.
1248 (tic80_next_predefined_symbol): Add prototype.
1249
1250Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1251
1252 * tic80.h (tic80_symbol_to_value): Change prototype to match
1253 change in function, added class parameter.
1254
1255Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1256
1257 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1258 endmask fields, which are somewhat weird in that 0 and 32 are
1259 treated exactly the same.
1260
1261Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1262
1263 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1264 rather than a constant that is 2**X. Reorder them to put bits for
1265 operands that have symbolic names in the upper bits, so they can
1266 be packed into an int where the lower bits contain the value that
1267 corresponds to that symbolic name.
1268 (predefined_symbo): Add struct.
1269 (tic80_predefined_symbols): Declare array of translations.
1270 (tic80_num_predefined_symbols): Declare size of that array.
1271 (tic80_value_to_symbol): Declare function.
1272 (tic80_symbol_to_value): Declare function.
1273
1274Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1275
1276 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1277
1278Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1279
1280 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1281 be the destination register.
1282
1283Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1284
1285 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1286 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1287 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1288 that the opcode can have two vector instructions in a single
1289 32 bit word and we have to encode/decode both.
1290
1291Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1292
1293 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1294 TIC80_OPERAND_RELATIVE for PC relative.
1295 (TIC80_OPERAND_BASEREL): New flag bit for register
1296 base relative.
1297
1298Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1299
1300 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1301
1302Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1303
1304 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1305 ":s" modifier for scaling.
1306
1307Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1308
1309 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1310 (TIC80_OPERAND_M_LI): Ditto
1311
1312Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1313
1314 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1315 (TIC80_OPERAND_CC): New define for condition code operand.
1316 (TIC80_OPERAND_CR): New define for control register operand.
1317
1318Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1319
1320 * tic80.h (struct tic80_opcode): Name changed.
1321 (struct tic80_opcode): Remove format field.
1322 (struct tic80_operand): Add insertion and extraction functions.
1323 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1324 correct ones.
1325 (FMT_*): Ditto.
1326
1327Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1328
1329 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1330 type IV instruction offsets.
1331
1332Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1333
1334 * tic80.h: New file.
1335
1336Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1337
1338 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1339
1340Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1341
1342 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1343 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1344 * v850.h: Fix comment, v850_operand not powerpc_operand.
1345
1346Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1347
1348 * mn10200.h: Flesh out structures and definitions needed by
1349 the mn10200 assembler & disassembler.
1350
1351Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1352
1353 * mips.h: Add mips16 definitions.
1354
1355Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1356
1357 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1358
1359Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1360
1361 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1362 (MN10300_OPERAND_MEMADDR): Define.
1363
1364Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1365
1366 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1367
1368Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1369
1370 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1371
1372Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1373
1374 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1375
1376Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1377
1378 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1379
1380Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1381
1382 * alpha.h: Don't include "bfd.h"; private relocation types are now
1383 negative to minimize problems with shared libraries. Organize
1384 instruction subsets by AMASK extensions and PALcode
1385 implementation.
1386 (struct alpha_operand): Move flags slot for better packing.
1387
1388Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1389
1390 * v850.h (V850_OPERAND_RELAX): New operand flag.
1391
1392Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1393
1394 * mn10300.h (FMT_*): Move operand format definitions
1395 here.
1396
1397Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1398
1399 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1400
1401Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1402
1403 * mn10300.h (mn10300_opcode): Add "format" field.
1404 (MN10300_OPERAND_*): Define.
1405
1406Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1407
1408 * mn10x00.h: Delete.
1409 * mn10200.h, mn10300.h: New files.
1410
1411Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1412
1413 * mn10x00.h: New file.
1414
1415Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1416
1417 * v850.h: Add new flag to indicate this instruction uses a PC
1418 displacement.
1419
1420Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1421
1422 * h8300.h (stmac): Add missing instruction.
1423
1424Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1425
1426 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1427 field.
1428
1429Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1430
1431 * v850.h (V850_OPERAND_EP): Define.
1432
1433 * v850.h (v850_opcode): Add size field.
1434
1435Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1436
1437 * v850.h (v850_operands): Add insert and extract fields, pointers
1438 to functions used to handle unusual operand encoding.
1439 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1440 V850_OPERAND_SIGNED): Defined.
1441
1442Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1443
1444 * v850.h (v850_operands): Add flags field.
1445 (OPERAND_REG, OPERAND_NUM): Defined.
1446
1447Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1448
1449 * v850.h: New file.
1450
1451Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1452
1453 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1454 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1455 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1456 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1457 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1458 Defined.
1459
1460Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1461
1462 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1463 a 3 bit space id instead of a 2 bit space id.
1464
1465Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1466
1467 * d10v.h: Add some additional defines to support the
1468 assembler in determining which operations can be done in parallel.
1469
1470Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1471
1472 * h8300.h (SN): Define.
1473 (eepmov.b): Renamed from "eepmov"
1474 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1475 with them.
1476
1477Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1478
1479 * d10v.h (OPERAND_SHIFT): New operand flag.
1480
1481Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1482
1483 * d10v.h: Changes for divs, parallel-only instructions, and
1484 signed numbers.
1485
1486Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1487
1488 * d10v.h (pd_reg): Define. Putting the definition here allows
1489 the assembler and disassembler to share the same struct.
1490
1491Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1492
1493 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1494 Williams <steve@icarus.com>.
1495
1496Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1497
1498 * d10v.h: New file.
1499
1500Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1501
1502 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1503
1504Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1505
1506 * m68k.h (mcf5200): New macro.
1507 Document names of coldfire control registers.
1508
1509Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1510
1511 * h8300.h (SRC_IN_DST): Define.
1512
1513 * h8300.h (UNOP3): Mark the register operand in this insn
1514 as a source operand, not a destination operand.
1515 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1516 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1517 register operand with SRC_IN_DST.
1518
1519Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1520
1521 * alpha.h: New file.
1522
1523Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1524
1525 * rs6k.h: Remove obsolete file.
1526
1527Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1528
1529 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1530 fdivp, and fdivrp. Add ffreep.
1531
1532Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1533
1534 * h8300.h: Reorder various #defines for readability.
1535 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1536 (BITOP): Accept additional (unused) argument. All callers changed.
1537 (EBITOP): Likewise.
1538 (O_LAST): Bump.
1539 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1540
1541 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1542 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1543 (BITOP, EBITOP): Handle new H8/S addressing modes for
1544 bit insns.
1545 (UNOP3): Handle new shift/rotate insns on the H8/S.
1546 (insns using exr): New instructions.
1547 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1548
1549Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1550
1551 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1552 was incorrect.
1553
1554Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1555
1556 * h8300.h (START): Remove.
1557 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1558 and mov.l insns that can be relaxed.
1559
1560Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1561
1562 * i386.h: Remove Abs32 from lcall.
1563
1564Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1565
1566 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1567 (SLCPOP): New macro.
1568 Mark X,Y opcode letters as in use.
1569
1570Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1571
1572 * sparc.h (F_FLOAT, F_FBR): Define.
1573
1574Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1575
1576 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1577 from all insns.
1578 (ABS8SRC,ABS8DST): Add ABS8MEM.
1579 (add.l): Fix reg+reg variant.
1580 (eepmov.w): Renamed from eepmovw.
1581 (ldc,stc): Fix many cases.
1582
1583Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1584
1585 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1586
1587Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1588
1589 * sparc.h (O): Mark operand letter as in use.
1590
1591Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1592
1593 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1594 Mark operand letters uU as in use.
1595
1596Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1597
1598 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1599 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1600 (SPARC_OPCODE_SUPPORTED): New macro.
1601 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1602 (F_NOTV9): Delete.
1603
1604Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1605
1606 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1607 declaration consistent with return type in definition.
1608
1609Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1610
1611 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1612
1613Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1614
1615 * i386.h (i386_regtab): Add 80486 test registers.
1616
1617Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1618
1619 * i960.h (I_HX): Define.
1620 (i960_opcodes): Add HX instruction.
1621
1622Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1623
1624 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1625 and fclex.
1626
1627Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1628
1629 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1630 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1631 (bfd_* defines): Delete.
1632 (sparc_opcode_archs): Replaces architecture_pname.
1633 (sparc_opcode_lookup_arch): Declare.
1634 (NUMOPCODES): Delete.
1635
1636Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1637
1638 * sparc.h (enum sparc_architecture): Add v9a.
1639 (ARCHITECTURES_CONFLICT_P): Update.
1640
1641Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1642
1643 * i386.h: Added Pentium Pro instructions.
1644
1645Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1646
1647 * m68k.h: Document new 'W' operand place.
1648
1649Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1650
1651 * hppa.h: Add lci and syncdma instructions.
1652
1653Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1654
1655 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1656 instructions.
1657
1658Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1659
1660 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1661 assembler's -mcom and -many switches.
1662
1663Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1664
1665 * i386.h: Fix cmpxchg8b extension opcode description.
1666
1667Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1668
1669 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1670 and register cr4.
1671
1672Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1673
1674 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1675
1676Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1677
1678 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1679
1680Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1681
1682 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1683
1684Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1685
1686 * m68kmri.h: Remove.
1687
1688 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1689 declarations. Remove F_ALIAS and flag field of struct
1690 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1691 int. Make name and args fields of struct m68k_opcode const.
1692
1693Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1694
1695 * sparc.h (F_NOTV9): Define.
1696
1697Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1698
1699 * mips.h (INSN_4010): Define.
1700
1701Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1702
1703 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1704
1705 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1706 * m68k.h: Fix argument descriptions of coprocessor
1707 instructions to allow only alterable operands where appropriate.
1708 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1709 (m68k_opcode_aliases): Add more aliases.
1710
1711Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1712
1713 * m68k.h: Added explcitly short-sized conditional branches, and a
1714 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1715 svr4-based configurations.
1716
1717Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1718
1719 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1720 * i386.h: added missing Data16/Data32 flags to a few instructions.
1721
1722Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1723
1724 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1725 (OP_MASK_BCC, OP_SH_BCC): Define.
1726 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1727 (OP_MASK_CCC, OP_SH_CCC): Define.
1728 (INSN_READ_FPR_R): Define.
1729 (INSN_RFE): Delete.
1730
1731Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1732
1733 * m68k.h (enum m68k_architecture): Deleted.
1734 (struct m68k_opcode_alias): New type.
1735 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1736 matching constraints, values and flags. As a side effect of this,
1737 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1738 as I know were never used, now may need re-examining.
1739 (numopcodes): Now const.
1740 (m68k_opcode_aliases, numaliases): New variables.
1741 (endop): Deleted.
1742 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1743 m68k_opcode_aliases; update declaration of m68k_opcodes.
1744
1745Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1746
1747 * hppa.h (delay_type): Delete unused enumeration.
1748 (pa_opcode): Replace unused delayed field with an architecture
1749 field.
1750 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1751
1752Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1753
1754 * mips.h (INSN_ISA4): Define.
1755
1756Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1757
1758 * mips.h (M_DLA_AB, M_DLI): Define.
1759
1760Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1761
1762 * hppa.h (fstwx): Fix single-bit error.
1763
1764Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1765
1766 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1767
1768Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1769
1770 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1771 debug registers. From Charles Hannum (mycroft@netbsd.org).
1772
1773Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1774
1775 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1776 i386 support:
1777 * i386.h (MOV_AX_DISP32): New macro.
1778 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1779 of several call/return instructions.
1780 (ADDR_PREFIX_OPCODE): New macro.
1781
1782Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1783
1784 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1785
1786 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1787 it pointer to const char;
1788 (struct vot, field `name'): ditto.
1789
1790Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1791
1792 * vax.h: Supply and properly group all values in end sentinel.
1793
1794Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1795
1796 * mips.h (INSN_ISA, INSN_4650): Define.
1797
1798Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1799
1800 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1801 systems with a separate instruction and data cache, such as the
1802 29040, these instructions take an optional argument.
1803
1804Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1805
1806 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1807 INSN_TRAP.
1808
1809Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1810
1811 * mips.h (INSN_STORE_MEMORY): Define.
1812
1813Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1814
1815 * sparc.h: Document new operand type 'x'.
1816
1817Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1818
1819 * i960.h (I_CX2): New instruction category. It includes
1820 instructions available on Cx and Jx processors.
1821 (I_JX): New instruction category, for JX-only instructions.
1822 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1823 Jx-only instructions, in I_JX category.
1824
1825Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1826
1827 * ns32k.h (endop): Made pointer const too.
1828
1829Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1830
1831 * ns32k.h: Drop Q operand type as there is no correct use
1832 for it. Add I and Z operand types which allow better checking.
1833
1834Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1835
1836 * h8300.h (xor.l) :fix bit pattern.
1837 (L_2): New size of operand.
1838 (trapa): Use it.
1839
1840Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1841
1842 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1843
1844Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1845
1846 * sparc.h: Include v9 definitions.
1847
1848Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1849
1850 * m68k.h (m68060): Defined.
1851 (m68040up, mfloat, mmmu): Include it.
1852 (struct m68k_opcode): Widen `arch' field.
1853 (m68k_opcodes): Updated for M68060. Removed comments that were
1854 instructions commented out by "JF" years ago.
1855
1856Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1857
1858 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1859 add a one-bit `flags' field.
1860 (F_ALIAS): New macro.
1861
1862Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1863
1864 * h8300.h (dec, inc): Get encoding right.
1865
1866Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1867
1868 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1869 a flag instead.
1870 (PPC_OPERAND_SIGNED): Define.
1871 (PPC_OPERAND_SIGNOPT): Define.
1872
1873Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1874
1875 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1876 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1877
1878Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1879
1880 * i386.h: Reverse last change. It'll be handled in gas instead.
1881
1882Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1883
1884 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1885 slower on the 486 and used the implicit shift count despite the
1886 explicit operand. The one-operand form is still available to get
1887 the shorter form with the implicit shift count.
1888
1889Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1890
1891 * hppa.h: Fix typo in fstws arg string.
1892
1893Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1894
1895 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1896
1897Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1898
1899 * ppc.h (PPC_OPCODE_601): Define.
1900
1901Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1902
1903 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1904 (so we can determine valid completers for both addb and addb[tf].)
1905
1906 * hppa.h (xmpyu): No floating point format specifier for the
1907 xmpyu instruction.
1908
1909Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1910
1911 * ppc.h (PPC_OPERAND_NEXT): Define.
1912 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1913 (struct powerpc_macro): Define.
1914 (powerpc_macros, powerpc_num_macros): Declare.
1915
1916Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1917
1918 * ppc.h: New file. Header file for PowerPC opcode table.
1919
1920Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1921
1922 * hppa.h: More minor template fixes for sfu and copr (to allow
1923 for easier disassembly).
1924
1925 * hppa.h: Fix templates for all the sfu and copr instructions.
1926
1927Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1928
1929 * i386.h (push): Permit Imm16 operand too.
1930
1931Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1932
1933 * h8300.h (andc): Exists in base arch.
1934
1935Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1936
1937 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1938 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1939
1940Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1941
1942 * hppa.h: Add FP quadword store instructions.
1943
1944Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1945
1946 * mips.h: (M_J_A): Added.
1947 (M_LA): Removed.
1948
1949Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1950
1951 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1952 <mellon@pepper.ncd.com>.
1953
1954Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1955
1956 * hppa.h: Immediate field in probei instructions is unsigned,
1957 not low-sign extended.
1958
1959Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1960
1961 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1962
1963Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1964
1965 * i386.h: Add "fxch" without operand.
1966
1967Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1968
1969 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1970
1971Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1972
1973 * hppa.h: Add gfw and gfr to the opcode table.
1974
1975Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1976
1977 * m88k.h: extended to handle m88110.
1978
1979Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1980
1981 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1982 addresses.
1983
1984Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1985
1986 * i960.h (i960_opcodes): Properly bracket initializers.
1987
1988Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1989
1990 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1991
1992Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1993
1994 * m68k.h (two): Protect second argument with parentheses.
1995
1996Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1997
1998 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1999 Deleted old in/out instructions in "#if 0" section.
2000
2001Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2002
2003 * i386.h (i386_optab): Properly bracket initializers.
2004
2005Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2006
2007 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2008 Jeff Law, law@cs.utah.edu).
2009
2010Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2011
2012 * i386.h (lcall): Accept Imm32 operand also.
2013
2014Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2015
2016 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2017 (M_DABS): Added.
2018
2019Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2020
2021 * mips.h (INSN_*): Changed values. Removed unused definitions.
2022 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2023 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2024 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2025 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2026 (M_*): Added new values for r6000 and r4000 macros.
2027 (ANY_DELAY): Removed.
2028
2029Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2030
2031 * mips.h: Added M_LI_S and M_LI_SS.
2032
2033Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2034
2035 * h8300.h: Get some rare mov.bs correct.
2036
2037Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2038
2039 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2040 been included.
2041
2042Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2043
2044 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2045 jump instructions, for use in disassemblers.
2046
2047Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2048
2049 * m88k.h: Make bitfields just unsigned, not unsigned long or
2050 unsigned short.
2051
2052Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2053
2054 * hppa.h: New argument type 'y'. Use in various float instructions.
2055
2056Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2057
2058 * hppa.h (break): First immediate field is unsigned.
2059
2060 * hppa.h: Add rfir instruction.
2061
2062Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2063
2064 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2065
2066Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2067
2068 * mips.h: Reworked the hazard information somewhat, and fixed some
2069 bugs in the instruction hazard descriptions.
2070
2071Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2072
2073 * m88k.h: Corrected a couple of opcodes.
2074
2075Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2076
2077 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2078 new version includes instruction hazard information, but is
2079 otherwise reasonably similar.
2080
2081Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2082
2083 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2084
2085Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2086
2087 Patches from Jeff Law, law@cs.utah.edu:
2088 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2089 Make the tables be the same for the following instructions:
2090 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2091 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2092 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2093 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2094 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2095 "fcmp", and "ftest".
2096
2097 * hppa.h: Make new and old tables the same for "break", "mtctl",
2098 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2099 Fix typo in last patch. Collapse several #ifdefs into a
2100 single #ifdef.
2101
2102 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2103 of the comments up-to-date.
2104
2105 * hppa.h: Update "free list" of letters and update
2106 comments describing each letter's function.
2107
2108Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2109
2110 * h8300.h: checkpoint, includes H8/300-H opcodes.
2111
2112Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2113
2114 * Patches from Jeffrey Law <law@cs.utah.edu>.
2115 * hppa.h: Rework single precision FP
2116 instructions so that they correctly disassemble code
2117 PA1.1 code.
2118
2119Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2120
2121 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2122 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2123
2124Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2125
2126 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2127 gdb will define it for now.
2128
2129Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2130
2131 * sparc.h: Don't end enumerator list with comma.
2132
2133Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2134
2135 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2136 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2137 ("bc2t"): Correct typo.
2138 ("[ls]wc[023]"): Use T rather than t.
2139 ("c[0123]"): Define general coprocessor instructions.
2140
2141Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2142
2143 * m68k.h: Move split point for gcc compilation more towards
2144 middle.
2145
2146Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2147
2148 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2149 simply wrong, ics, rfi, & rfsvc were missing).
2150 Add "a" to opr_ext for "bb". Doc fix.
2151
2152Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2153
2154 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2155 * mips.h: Add casts, to suppress warnings about shifting too much.
2156 * m68k.h: Document the placement code '9'.
2157
2158Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2159
2160 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2161 allows callers to break up the large initialized struct full of
2162 opcodes into two half-sized ones. This permits GCC to compile
2163 this module, since it takes exponential space for initializers.
2164 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2165
2166Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2167
2168 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2169 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2170 initialized structs in it.
2171
2172Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2173
2174 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2175 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2176 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2177
2178Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2179
2180 * mips.h: document "i" and "j" operands correctly.
2181
2182Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2183
2184 * mips.h: Removed endianness dependency.
2185
2186Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2187
2188 * h8300.h: include info on number of cycles per instruction.
2189
2190Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2191
2192 * hppa.h: Move handy aliases to the front. Fix masks for extract
2193 and deposit instructions.
2194
2195Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2196
2197 * i386.h: accept shld and shrd both with and without the shift
2198 count argument, which is always %cl.
2199
2200Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2201
2202 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2203 (one_byte_segment_defaults, two_byte_segment_defaults,
2204 i386_prefixtab_end): Ditto.
2205
2206Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2207
2208 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2209 for operand 2; from John Carr, jfc@dsg.dec.com.
2210
2211Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2212
2213 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2214 always use 16-bit offsets. Makes calculated-size jump tables
2215 feasible.
2216
2217Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2218
2219 * i386.h: Fix one-operand forms of in* and out* patterns.
2220
2221Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2222
2223 * m68k.h: Added CPU32 support.
2224
2225Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2226
2227 * mips.h (break): Disassemble the argument. Patch from
2228 jonathan@cs.stanford.edu (Jonathan Stone).
2229
2230Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2231
2232 * m68k.h: merged Motorola and MIT syntax.
2233
2234Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2235
2236 * m68k.h (pmove): make the tests less strict, the 68k book is
2237 wrong.
2238
2239Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2240
2241 * m68k.h (m68ec030): Defined as alias for 68030.
2242 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2243 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2244 them. Tightened description of "fmovex" to distinguish it from
2245 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2246 up descriptions that claimed versions were available for chips not
2247 supporting them. Added "pmovefd".
2248
2249Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2250
2251 * m68k.h: fix where the . goes in divull
2252
2253Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2254
2255 * m68k.h: the cas2 instruction is supposed to be written with
2256 indirection on the last two operands, which can be either data or
2257 address registers. Added a new operand type 'r' which accepts
2258 either register type. Added new cases for cas2l and cas2w which
2259 use them. Corrected masks for cas2 which failed to recognize use
2260 of address register.
2261
2262Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2263
2264 * m68k.h: Merged in patches (mostly m68040-specific) from
2265 Colin Smith <colin@wrs.com>.
2266
2267 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2268 base). Also cleaned up duplicates, re-ordered instructions for
2269 the sake of dis-assembling (so aliases come after standard names).
2270 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2271
2272Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2273
2274 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2275 all missing .s
2276
2277Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2278
2279 * sparc.h: Moved tables to BFD library.
2280
2281 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2282
2283Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2284
2285 * h8300.h: Finish filling in all the holes in the opcode table,
2286 so that the Lucid C compiler can digest this as well...
2287
2288Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2289
2290 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2291 Fix opcodes on various sizes of fild/fist instructions
2292 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2293 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2294
2295Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2296
2297 * h8300.h: Fill in all the holes in the opcode table so that the
2298 losing HPUX C compiler can digest this...
2299
2300Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2301
2302 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2303 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2304
2305Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2306
2307 * sparc.h: Add new architecture variant sparclite; add its scan
2308 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2309
2310Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2311
2312 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2313 fy@lucid.com).
2314
2315Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2316
2317 * rs6k.h: New version from IBM (Metin).
2318
2319Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2320
2321 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2322 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2323
2324Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2325
2326 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2327
2328Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2329
2330 * m68k.h (one, two): Cast macro args to unsigned to suppress
2331 complaints from compiler and lint about integer overflow during
2332 shift.
2333
2334Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2335
2336 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2337
2338Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2339
2340 * mips.h: Make bitfield layout depend on the HOST compiler,
2341 not on the TARGET system.
2342
2343Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2344
2345 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2346 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2347 <TRANLE@INTELLICORP.COM>.
2348
2349Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2350
2351 * h8300.h: turned op_type enum into #define list
2352
2353Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2354
2355 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2356 similar instructions -- they've been renamed to "fitoq", etc.
2357 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2358 number of arguments.
2359 * h8300.h: Remove extra ; which produces compiler warning.
2360
2361Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2362
2363 * sparc.h: fix opcode for tsubcctv.
2364
2365Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2366
2367 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2368
2369Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2370
2371 * sparc.h (nop): Made the 'lose' field be even tighter,
2372 so only a standard 'nop' is disassembled as a nop.
2373
2374Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2375
2376 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2377 disassembled as a nop.
2378
2379Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2380
2381 * sparc.h: fix a typo.
2382
2383Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2384
2385 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2386 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2387 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2388
2389\f
2390Local Variables:
2391version-control: never
2392End: