]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - include/opcode/ChangeLog
2002-11-16 Klee Dienes <kdienes@apple.com>
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
eb128449
SS
12002-11-18 Svein E. Seldal <Svein.Seldal@solidas.com>
2
3 * tic4x.h: File reordering. Added enhanced opcodes.
4
52002-11-16 Svein E. Seldal <Svein.Seldal@solidas.com>
6
7 * tic4x.h: Major rewrite of entire file. Define instruction
8 classes, and put each instruction into a class.
9
102002-11-11 Svein E. Seldal <Svein.Seldal@solidas.com>
11
12 * tic4x.h: Added new opcodes and corrected some bugs. Add support
13 for new DSP types.
14
ea6a213a
AM
152002-10-14 Alan Modra <amodra@bigpond.net.au>
16
17 * cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
18
701b80cd 192002-09-30 Gavin Romig-Koch <gavin@redhat.com>
9752cf1b
RS
20 Ken Raeburn <raeburn@cygnus.com>
21 Aldy Hernandez <aldyh@redhat.com>
22 Eric Christopher <echristo@redhat.com>
23 Richard Sandiford <rsandifo@redhat.com>
24
25 * mips.h: Update comment for new opcodes.
26 (OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
27 (OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
28 (INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
29 (CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
30 (OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
31 Don't match CPU_R4111 with INSN_4100.
32
0449635d
EZ
332002-08-19 Elena Zannoni <ezannoni@redhat.com>
34
35 From matthew green <mrg@redhat.com>
36
37 * ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
38 instructions.
39 (PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
40 PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
41 e500x2 Integer select, branch locking, performance monitor,
42 cache locking and machine check APUs, respectively.
43 (PPC_OPCODE_EFS): New opcode type for efs* instructions.
44 (PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
45
030ad53b
SC
462002-08-13 Stephane Carrez <stcarrez@nerim.fr>
47
48 * m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
49 (M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
50 M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
51 memory banks.
52 (M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
53
aec421e0
TS
542002-07-09 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
55
56 * mips.h (INSN_MIPS16): New define.
57
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AM
582002-07-08 Alan Modra <amodra@bigpond.net.au>
59
60 * i386.h: Remove IgnoreSize from movsx and movzx.
61
92007e40
AM
622002-06-08 Alan Modra <amodra@bigpond.net.au>
63
64 * a29k.h: Replace CONST with const.
65 (CONST): Don't define.
66 * convex.h: Replace CONST with const.
67 (CONST): Don't define.
68 * dlx.h: Replace CONST with const.
69 * or32.h (CONST): Don't define.
70
deec1734
CD
712002-05-30 Chris G. Demetriou <cgd@broadcom.com>
72
73 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
74 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
75 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
76 (INSN_MDMX): New constants, for MDMX support.
77 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
78
d172d4ba
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792002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
80
81 * dlx.h: New file.
82
b3f7d5fd
AM
832002-05-25 Alan Modra <amodra@bigpond.net.au>
84
85 * ia64.h: Use #include "" instead of <> for local header files.
86 * sparc.h: Likewise.
87
771c7ce4
TS
882002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
89
90 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
91
b9c9142c
AV
922002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
93
94 * h8300.h: Corrected defs of all control regs
95 and eepmov instr.
96
cd47f4f1
AM
972002-04-11 Alan Modra <amodra@bigpond.net.au>
98
99 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 100 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 101
1f25f5d3
CD
1022002-03-15 Chris G. Demetriou <cgd@broadcom.com>
103
104 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
105 instructions.
106 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
107 may be passed along with the ISA bitmask.
108
e4b29ec6
AM
1092002-03-05 Paul Koning <pkoning@equallogic.com>
110
111 * pdp11.h: Add format codes for float instruction formats.
112
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1132002-02-25 Alan Modra <amodra@bigpond.net.au>
114
115 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
116
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JH
117Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
118
119 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
120
85a33fe2
JH
121Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
122
123 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
124 (xchg): Fix.
125 (in, out): Disable 64bit operands.
126 (call, jmp): Avoid REX prefixes.
127 (jcxz): Prohibit in 64bit mode
128 (jrcxz, loop): Add 64bit variants.
129 (movq): Fix patterns.
130 (movmskps, pextrw, pinstrw): Add 64bit variants.
131
3b16e843
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1322002-01-31 Ivan Guzvinec <ivang@opencores.org>
133
134 * or32.h: New file.
135
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GH
1362002-01-22 Graydon Hoare <graydon@redhat.com>
137
138 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
139 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
140
7b45c6e1
AM
1412002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
142
143 * h8300.h: Comment typo fix.
144
a09cf9bd
MG
1452002-01-03 matthew green <mrg@redhat.com>
146
147 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
148 (PPC_OPCODE_BOOKE64): Likewise.
149
1befefea
JL
150Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
151
152 * hppa.h (call, ret): Move to end of table.
153 (addb, addib): PA2.0 variants should have been PA2.0W.
154 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
155 happy.
156 (fldw, fldd, fstw, fstd, bb): Likewise.
157 (short loads/stores): Tweak format specifier slightly to keep
158 disassembler happy.
159 (indexed loads/stores): Likewise.
160 (absolute loads/stores): Likewise.
161
124ddbb2
AO
1622001-12-04 Alexandre Oliva <aoliva@redhat.com>
163
164 * d10v.h (OPERAND_NOSP): New macro.
165
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AO
1662001-11-29 Alexandre Oliva <aoliva@redhat.com>
167
168 * d10v.h (OPERAND_SP): New macro.
169
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AM
1702001-11-15 Alan Modra <amodra@bigpond.net.au>
171
172 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
173
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TW
1742001-11-11 Timothy Wall <twall@alum.mit.edu>
175
176 * tic54x.h: Revise opcode layout; don't really need a separate
177 structure for parallel opcodes.
178
e5470cdc
AM
1792001-11-13 Zack Weinberg <zack@codesourcery.com>
180 Alan Modra <amodra@bigpond.net.au>
181
182 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
183 accept WordReg.
184
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CD
1852001-11-04 Chris Demetriou <cgd@broadcom.com>
186
187 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
188
3c3bdf30
NC
1892001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
190
191 * mmix.h: New file.
192
e4432525
CD
1932001-10-18 Chris Demetriou <cgd@broadcom.com>
194
195 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
196 of the expression, to make source code merging easier.
197
8ff529d8
CD
1982001-10-17 Chris Demetriou <cgd@broadcom.com>
199
200 * mips.h: Sort coprocessor instruction argument characters
201 in comment, add a few more words of description for "H".
202
2228315b
CD
2032001-10-17 Chris Demetriou <cgd@broadcom.com>
204
205 * mips.h (INSN_SB1): New cpu-specific instruction bit.
206 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
207 if cpu is CPU_SB1.
208
f5c120c5
MG
2092001-10-17 matthew green <mrg@redhat.com>
210
211 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
212
418c1742
MG
2132001-10-12 matthew green <mrg@redhat.com>
214
0716ce0d
MG
215 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
216 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
217 instructions, respectively.
418c1742 218
6ff2f2ba
NC
2192001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
220
221 * v850.h: Remove spurious comment.
222
015cf428
NC
2232001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
224
225 * h8300.h: Fix compile time warning messages
226
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RH
2272001-09-04 Richard Henderson <rth@redhat.com>
228
229 * alpha.h (struct alpha_operand): Pack elements into bitfields.
230
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EC
2312001-08-31 Eric Christopher <echristo@redhat.com>
232
233 * mips.h: Remove CPU_MIPS32_4K.
234
a6959011
AM
2352001-08-27 Torbjorn Granlund <tege@swox.com>
236
237 * ppc.h (PPC_OPERAND_DS): Define.
238
d83c6548
AJ
2392001-08-25 Andreas Jaeger <aj@suse.de>
240
241 * d30v.h: Fix declaration of reg_name_cnt.
242
243 * d10v.h: Fix declaration of d10v_reg_name_cnt.
244
245 * arc.h: Add prototypes from opcodes/arc-opc.c.
246
99c14723
TS
2472001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
248
249 * mips.h (INSN_10000): Define.
250 (OPCODE_IS_MEMBER): Check for INSN_10000.
251
11b37b7b
AM
2522001-08-10 Alan Modra <amodra@one.net.au>
253
254 * ppc.h: Revert 2001-08-08.
255
3b16e843
NC
2562001-08-10 Richard Sandiford <rsandifo@redhat.com>
257
258 * mips.h (INSN_GP32): Remove.
259 (OPCODE_IS_MEMBER): Remove gp32 parameter.
260 (M_MOVE): New macro identifier.
261
0f1bac05
AM
2622001-08-08 Alan Modra <amodra@one.net.au>
263
264 1999-10-25 Torbjorn Granlund <tege@swox.com>
265 * ppc.h (struct powerpc_operand): New field `reloc'.
266
3b16e843
NC
2672001-08-01 Aldy Hernandez <aldyh@redhat.com>
268
269 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
270
2712001-07-12 Jeff Johnston <jjohnstn@redhat.com>
272
273 * cgen.h (CGEN_INSN): Add regex support.
274 (build_insn_regex): Declare.
275
81f6038f
FCE
2762001-07-11 Frank Ch. Eigler <fche@redhat.com>
277
278 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
279 (cgen_cpu_desc): Ditto.
280
32cfffe3
BE
2812001-07-07 Ben Elliston <bje@redhat.com>
282
283 * m88k.h: Clean up and reformat. Remove unused code.
284
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GK
2852001-06-14 Geoffrey Keating <geoffk@redhat.com>
286
287 * cgen.h (cgen_keyword): Add nonalpha_chars field.
288
d1cf510e
NC
2892001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
290
291 * mips.h (CPU_R12000): Define.
292
e281c457
JH
2932001-05-23 John Healy <jhealy@redhat.com>
294
295 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 296
aa5f19f2
NC
2972001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
298
299 * mips.h (INSN_ISA_MASK): Define.
300
67d6227d
AM
3012001-05-12 Alan Modra <amodra@one.net.au>
302
303 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
304 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
305 and use InvMem as these insns must have register operands.
306
992aaec9
AM
3072001-05-04 Alan Modra <amodra@one.net.au>
308
309 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
310 and pextrw to swap reg/rm assignments.
311
4ef7f0bf
HPN
3122001-04-05 Hans-Peter Nilsson <hp@axis.com>
313
314 * cris.h (enum cris_insn_version_usage): Correct comment for
315 cris_ver_v3p.
316
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AM
3172001-03-24 Alan Modra <alan@linuxcare.com.au>
318
319 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
320 Add InvMem to first operand of "maskmovdqu".
321
7ccb5238
HPN
3222001-03-22 Hans-Peter Nilsson <hp@axis.com>
323
324 * cris.h (ADD_PC_INCR_OPCODE): New macro.
325
361bfa20
KH
3262001-03-21 Kazu Hirata <kazu@hxi.com>
327
328 * h8300.h: Fix formatting.
329
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AM
3302001-03-22 Alan Modra <alan@linuxcare.com.au>
331
332 * i386.h (i386_optab): Add paddq, psubq.
333
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AM
3342001-03-19 Alan Modra <alan@linuxcare.com.au>
335
336 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
337
80a523c2
NC
3382001-02-28 Igor Shevlyakov <igor@windriver.com>
339
340 * m68k.h: new defines for Coldfire V4. Update mcf to know
341 about mcf5407.
342
e135f41b
NC
3432001-02-18 lars brinkhoff <lars@nocrew.org>
344
345 * pdp11.h: New file.
346
3472001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
348
349 * i386.h (i386_optab): SSE integer converison instructions have
350 64bit versions on x86-64.
351
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NC
3522001-02-10 Nick Clifton <nickc@redhat.com>
353
354 * mips.h: Remove extraneous whitespace. Formating change to allow
355 for future contribution.
356
a85d7ed0
NC
3572001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
358
359 * s390.h: New file.
360
0715dc88
PM
3612001-02-02 Patrick Macdonald <patrickm@redhat.com>
362
363 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
364 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
365 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
366
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AM
3672001-01-24 Karsten Keil <kkeil@suse.de>
368
369 * i386.h (i386_optab): Fix swapgs
370
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AM
3712001-01-14 Alan Modra <alan@linuxcare.com.au>
372
373 * hppa.h: Describe new '<' and '>' operand types, and tidy
374 existing comments.
375 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
376 Remove duplicate "ldw j(s,b),x". Sort some entries.
377
e135f41b 3782001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
379
380 * i386.h (i386_optab): Fix pusha and ret templates.
381
0d2bcfaf
NC
3822001-01-11 Peter Targett <peter.targett@arccores.com>
383
384 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
385 definitions for masking cpu type.
386 (arc_ext_operand_value) New structure for storing extended
387 operands.
388 (ARC_OPERAND_*) Flags for operand values.
389
3902001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
391
392 * i386.h (pinsrw): Add.
393 (pshufw): Remove.
394 (cvttpd2dq): Fix operands.
395 (cvttps2dq): Likewise.
396 (movq2q): Rename to movdq2q.
397
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AM
3982001-01-10 Richard Schaal <richard.schaal@intel.com>
399
400 * i386.h: Correct movnti instruction.
401
8c1f9e76
JJ
4022001-01-09 Jeff Johnston <jjohnstn@redhat.com>
403
404 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
405 of operands (unsigned char or unsigned short).
406 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
407 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
408
0d2bcfaf 4092001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
410
411 * i386.h (i386_optab): Make [sml]fence template to use immext field.
412
0d2bcfaf 4132001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
414
415 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
416 introduced by Pentium4
417
0d2bcfaf 4182000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
419
420 * i386.h (i386_optab): Add "rex*" instructions;
421 add swapgs; disable jmp/call far direct instructions for
422 64bit mode; add syscall and sysret; disable registers for 0xc6
423 template. Add 'q' suffixes to extendable instructions, disable
079966a8 424 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
425 (i386_regtab): Add extended registers.
426 (*Suf): Add No_qSuf.
427 (q_Suf, wlq_Suf, bwlq_Suf): New.
428
0d2bcfaf 4292000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
430
431 * i386.h (i386_optab): Replace "Imm" with "EncImm".
432 (i386_regtab): Add flags field.
d83c6548 433
bf40d919
NC
4342000-12-12 Nick Clifton <nickc@redhat.com>
435
436 * mips.h: Fix formatting.
437
4372b673
NC
4382000-12-01 Chris Demetriou <cgd@sibyte.com>
439
440 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
441 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
442 OP_*_SYSCALL definitions.
443 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
444 19 bit wait codes.
445 (MIPS operand specifier comments): Remove 'm', add 'U' and
446 'J', and update the meaning of 'B' so that it's more general.
447
e7af610e
NC
448 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
449 INSN_ISA5): Renumber, redefine to mean the ISA at which the
450 instruction was added.
451 (INSN_ISA32): New constant.
452 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
453 Renumber to avoid new and/or renumbered INSN_* constants.
454 (INSN_MIPS32): Delete.
455 (ISA_UNKNOWN): New constant to indicate unknown ISA.
456 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
457 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 458 constants available at that ISA level.
e7af610e
NC
459 (CPU_UNKNOWN): New constant to indicate unknown CPU.
460 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
461 define it with a unique value.
462 (OPCODE_IS_MEMBER): Update for new ISA membership-related
463 constant meanings.
464
84ea6cf2 465 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 466 definitions.
84ea6cf2 467
c6c98b38
NC
468 * mips.h (CPU_SB1): New constant.
469
19f7b010
JJ
4702000-10-20 Jakub Jelinek <jakub@redhat.com>
471
472 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
473 Note that '3' is used for siam operand.
474
139368c9
JW
4752000-09-22 Jim Wilson <wilson@cygnus.com>
476
477 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
478
156c2f8b 4792000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 480
156c2f8b
NC
481 * mips.h: Use defines instead of hard-coded processor numbers.
482 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 483 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
484 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
485 CPU_4KC, CPU_4KM, CPU_4KP): Define..
486 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 487 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 488 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
489 Add 'P' to used characters.
490 Use 'H' for coprocessor select field.
156c2f8b 491 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
492 Document new arg characters and add to used characters.
493 (INSN_MIPS32): New define for MIPS32 extensions.
494 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 495
3c5ce02e
AM
4962000-09-05 Alan Modra <alan@linuxcare.com.au>
497
498 * hppa.h: Mention cz completer.
499
50b81f19
JW
5002000-08-16 Jim Wilson <wilson@cygnus.com>
501
502 * ia64.h (IA64_OPCODE_POSTINC): New.
503
fc29466d
L
5042000-08-15 H.J. Lu <hjl@gnu.org>
505
506 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
507 IgnoreSize change.
508
4f1d9bd8
NC
5092000-08-08 Jason Eckhardt <jle@cygnus.com>
510
511 * i860.h: Small formatting adjustments.
512
45ee1401
DC
5132000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
514
515 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
516 Move related opcodes closer to each other.
517 Minor changes in comments, list undefined opcodes.
518
9d551405
DB
5192000-07-26 Dave Brolley <brolley@redhat.com>
520
521 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
522
4f1d9bd8
NC
5232000-07-22 Jason Eckhardt <jle@cygnus.com>
524
525 * i860.h (btne, bte, bla): Changed these opcodes
526 to use sbroff ('r') instead of split16 ('s').
527 (J, K, L, M): New operand types for 16-bit aligned fields.
528 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
529 use I, J, K, L, M instead of just I.
530 (T, U): New operand types for split 16-bit aligned fields.
531 (st.x): Changed these opcodes to use S, T, U instead of just S.
532 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
533 exist on the i860.
534 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
535 (pfeq.ss, pfeq.dd): New opcodes.
536 (st.s): Fixed incorrect mask bits.
537 (fmlow): Fixed incorrect mask bits.
538 (fzchkl, pfzchkl): Fixed incorrect mask bits.
539 (faddz, pfaddz): Fixed incorrect mask bits.
540 (form, pform): Fixed incorrect mask bits.
541 (pfld.l): Fixed incorrect mask bits.
542 (fst.q): Fixed incorrect mask bits.
543 (all floating point opcodes): Fixed incorrect mask bits for
544 handling of dual bit.
545
c8488617
HPN
5462000-07-20 Hans-Peter Nilsson <hp@axis.com>
547
548 cris.h: New file.
549
65aa24b6
NC
5502000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
551
552 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
553 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
554 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
555 (AVR_ISA_M83): Define for ATmega83, ATmega85.
556 (espm): Remove, because ESPM removed in databook update.
557 (eicall, eijmp): Move to the end of opcode table.
558
60bcf0fa
NC
5592000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
560
561 * m68hc11.h: New file for support of Motorola 68hc11.
562
60a2978a
DC
563Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
564
565 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
566
68ab2dd9
DC
567Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
568
569 * avr.h: New file with AVR opcodes.
570
f0662e27
DL
571Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
572
573 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
574
b722f2be
AM
5752000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
576
577 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
578
f9e0cf0b
AM
5792000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
580
581 * i386.h: Use sl_FP, not sl_Suf for fild.
582
f660ee8b
FCE
5832000-05-16 Frank Ch. Eigler <fche@redhat.com>
584
585 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
586 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
587 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
588 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
589
558b0a60
AM
5902000-05-13 Alan Modra <alan@linuxcare.com.au>,
591
592 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
593
e413e4e9
AM
5942000-05-13 Alan Modra <alan@linuxcare.com.au>,
595 Alexander Sokolov <robocop@netlink.ru>
596
597 * i386.h (i386_optab): Add cpu_flags for all instructions.
598
5992000-05-13 Alan Modra <alan@linuxcare.com.au>
600
601 From Gavin Romig-Koch <gavin@cygnus.com>
602 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
603
5c84d377
TW
6042000-05-04 Timothy Wall <twall@cygnus.com>
605
606 * tic54x.h: New.
607
966f959b
C
6082000-05-03 J.T. Conklin <jtc@redback.com>
609
610 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
611 (PPC_OPERAND_VR): New operand flag for vector registers.
612
c5d05dbb
JL
6132000-05-01 Kazu Hirata <kazu@hxi.com>
614
615 * h8300.h (EOP): Add missing initializer.
616
a7fba0e0
JL
617Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
618
619 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
620 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
621 New operand types l,y,&,fe,fE,fx added to support above forms.
622 (pa_opcodes): Replaced usage of 'x' as source/target for
623 floating point double-word loads/stores with 'fx'.
624
800eeca4
JW
625Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
626 David Mosberger <davidm@hpl.hp.com>
627 Timothy Wall <twall@cygnus.com>
628 Jim Wilson <wilson@cygnus.com>
629
630 * ia64.h: New file.
631
ba23e138
NC
6322000-03-27 Nick Clifton <nickc@cygnus.com>
633
634 * d30v.h (SHORT_A1): Fix value.
635 (SHORT_AR): Renumber so that it is at the end of the list of short
636 instructions, not the end of the list of long instructions.
637
d0b47220
AM
6382000-03-26 Alan Modra <alan@linuxcare.com>
639
640 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
641 problem isn't really specific to Unixware.
642 (OLDGCC_COMPAT): Define.
643 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
644 destination %st(0).
645 Fix lots of comments.
646
866afedc
NC
6472000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
648
649 * d30v.h:
650 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
651 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
652 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
653 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
654 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
655 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
656 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
657
cc5ca5ce
AM
6582000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
659
660 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
661 fistpd without suffix.
662
68e324a2
NC
6632000-02-24 Nick Clifton <nickc@cygnus.com>
664
665 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
666 'signed_overflow_ok_p'.
667 Delete prototypes for cgen_set_flags() and cgen_get_flags().
668
60f036a2
AH
6692000-02-24 Andrew Haley <aph@cygnus.com>
670
671 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
672 (CGEN_CPU_TABLE): flags: new field.
673 Add prototypes for new functions.
d83c6548 674
9b9b5cd4
AM
6752000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
676
677 * i386.h: Add some more UNIXWARE_COMPAT comments.
678
5b93d8bb
AM
6792000-02-23 Linas Vepstas <linas@linas.org>
680
681 * i370.h: New file.
682
4f1d9bd8
NC
6832000-02-22 Chandra Chavva <cchavva@cygnus.com>
684
685 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
686 cannot be combined in parallel with ADD/SUBppp.
687
87f398dd
AH
6882000-02-22 Andrew Haley <aph@cygnus.com>
689
690 * mips.h: (OPCODE_IS_MEMBER): Add comment.
691
367c01af
AH
6921999-12-30 Andrew Haley <aph@cygnus.com>
693
9a1e79ca
AH
694 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
695 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
696 insns.
367c01af 697
add0c677
AM
6982000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
699
700 * i386.h: Qualify intel mode far call and jmp with x_Suf.
701
3138f287
AM
7021999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
703
704 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
705 indirect jumps and calls. Add FF/3 call for intel mode.
706
ccecd07b
JL
707Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
708
709 * mn10300.h: Add new operand types. Add new instruction formats.
710
b37e19e9
JL
711Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
712
713 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
714 instruction.
715
5fce5ddf
GRK
7161999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
717
718 * mips.h (INSN_ISA5): New.
719
2bd7f1f3
GRK
7201999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
721
722 * mips.h (OPCODE_IS_MEMBER): New.
723
4df2b5c5
NC
7241999-10-29 Nick Clifton <nickc@cygnus.com>
725
726 * d30v.h (SHORT_AR): Define.
727
446a06c9
MM
7281999-10-18 Michael Meissner <meissner@cygnus.com>
729
730 * alpha.h (alpha_num_opcodes): Convert to unsigned.
731 (alpha_num_operands): Ditto.
732
eca04c6a
JL
733Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
734
735 * hppa.h (pa_opcodes): Add load and store cache control to
736 instructions. Add ordered access load and store.
737
738 * hppa.h (pa_opcode): Add new entries for addb and addib.
739
740 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
741
742 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
743
c43185de
DN
744Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
745
746 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
747
ec3533da
JL
748Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
749
390f858d
JL
750 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
751 and "be" using completer prefixes.
752
8c47ebd9
JL
753 * hppa.h (pa_opcodes): Add initializers to silence compiler.
754
ec3533da
JL
755 * hppa.h: Update comments about character usage.
756
18369bea
JL
757Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
758
759 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
760 up the new fstw & bve instructions.
761
c36efdd2
JL
762Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
763
d3ffb032
JL
764 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
765 instructions.
766
c49ec3da
JL
767 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
768
5d2e7ecc
JL
769 * hppa.h (pa_opcodes): Add long offset double word load/store
770 instructions.
771
6397d1a2
JL
772 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
773 stores.
774
142f0fe0
JL
775 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
776
f5a68b45
JL
777 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
778
8235801e
JL
779 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
780
35184366
JL
781 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
782
f0bfde5e
JL
783 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
784
27bbbb58
JL
785 * hppa.h (pa_opcodes): Add support for "b,l".
786
c36efdd2
JL
787 * hppa.h (pa_opcodes): Add support for "b,gate".
788
f2727d04
JL
789Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
790
9392fb11 791 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 792 in xmpyu.
9392fb11 793
e0c52e99
JL
794 * hppa.h (pa_opcodes): Fix mask for probe and probei.
795
f2727d04
JL
796 * hppa.h (pa_opcodes): Fix mask for depwi.
797
52d836e2
JL
798Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
799
800 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
801 an explicit output argument.
802
90765e3a
JL
803Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
804
805 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
806 Add a few PA2.0 loads and store variants.
807
8340b17f
ILT
8081999-09-04 Steve Chamberlain <sac@pobox.com>
809
810 * pj.h: New file.
811
5f47d35b
AM
8121999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
813
814 * i386.h (i386_regtab): Move %st to top of table, and split off
815 other fp reg entries.
816 (i386_float_regtab): To here.
817
1c143202
JL
818Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
819
7d8fdb64
JL
820 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
821 by 'f'.
822
90927b9c
JL
823 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
824 Add supporting args.
825
1d16bf9c
JL
826 * hppa.h: Document new completers and args.
827 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
828 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
829 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
830 pmenb and pmdis.
831
96226a68
JL
832 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
833 hshr, hsub, mixh, mixw, permh.
834
5d4ba527
JL
835 * hppa.h (pa_opcodes): Change completers in instructions to
836 use 'c' prefix.
837
e9fc28c6
JL
838 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
839 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
840
1c143202
JL
841 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
842 fnegabs to use 'I' instead of 'F'.
843
9e525108
AM
8441999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
845
846 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
847 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
848 Alphabetically sort PIII insns.
849
e8da1bf1
DE
850Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
851
852 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
853
7d627258
JL
854Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
855
5696871a
JL
856 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
857 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
858
7d627258
JL
859 * hppa.h: Document 64 bit condition completers.
860
c5e52916
JL
861Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
862
863 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
864
eecb386c
AM
8651999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
866
867 * i386.h (i386_optab): Add DefaultSize modifier to all insns
868 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
869 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
870
88a380f3
JL
871Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
872 Jeff Law <law@cygnus.com>
873
874 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
875
876 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 877
d83c6548 878 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
879 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
880
145cf1f0
AM
8811999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
882
883 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
884
73826640
JL
885Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
886
887 * hppa.h (struct pa_opcode): Add new field "flags".
888 (FLAGS_STRICT): Define.
889
b65db252
JL
890Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
891 Jeff Law <law@cygnus.com>
892
f7fc668b
JL
893 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
894
895 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 896
10084519
AM
8971999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
898
899 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
900 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
901 flag to fcomi and friends.
902
cd8a80ba
JL
903Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
904
905 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 906 integer logical instructions.
cd8a80ba 907
1fca749b
ILT
9081999-05-28 Linus Nordberg <linus.nordberg@canit.se>
909
910 * m68k.h: Document new formats `E', `G', `H' and new places `N',
911 `n', `o'.
912
913 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
914 and new places `m', `M', `h'.
915
aa008907
JL
916Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
917
918 * hppa.h (pa_opcodes): Add several processor specific system
919 instructions.
920
e26b85f0
JL
921Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
922
d83c6548 923 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
924 "addb", and "addib" to be used by the disassembler.
925
c608c12e
AM
9261999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
927
928 * i386.h (ReverseModrm): Remove all occurences.
929 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
930 movmskps, pextrw, pmovmskb, maskmovq.
931 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
932 ignore the data size prefix.
933
934 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
935 Mostly stolen from Doug Ledford <dledford@redhat.com>
936
45c18104
RH
937Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
938
939 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
940
252b5132
RH
9411999-04-14 Doug Evans <devans@casey.cygnus.com>
942
943 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
944 (CGEN_ATTR_TYPE): Update.
945 (CGEN_ATTR_MASK): Number booleans starting at 0.
946 (CGEN_ATTR_VALUE): Update.
947 (CGEN_INSN_ATTR): Update.
948
949Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
950
951 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
952 instructions.
953
954Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
955
956 * hppa.h (bb, bvb): Tweak opcode/mask.
957
958
9591999-03-22 Doug Evans <devans@casey.cygnus.com>
960
961 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
962 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
963 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
964 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
965 Delete member max_insn_size.
966 (enum cgen_cpu_open_arg): New enum.
967 (cpu_open): Update prototype.
968 (cpu_open_1): Declare.
969 (cgen_set_cpu): Delete.
970
9711999-03-11 Doug Evans <devans@casey.cygnus.com>
972
973 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
974 (CGEN_OPERAND_NIL): New macro.
975 (CGEN_OPERAND): New member `type'.
976 (@arch@_cgen_operand_table): Delete decl.
977 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
978 (CGEN_OPERAND_TABLE): New struct.
979 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
980 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
981 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
982 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
983 {get,set}_{int,vma}_operand.
984 (@arch@_cgen_cpu_open): New arg `isa'.
985 (cgen_set_cpu): Ditto.
986
987Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
988
989 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
990
9911999-02-25 Doug Evans <devans@casey.cygnus.com>
992
993 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
994 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
995 enum cgen_hw_type.
996 (CGEN_HW_TABLE): New struct.
997 (hw_table): Delete declaration.
998 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
999 to table entry to enum.
1000 (CGEN_OPINST): Ditto.
1001 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
1002
1003Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
1004
1005 * alpha.h (AXP_OPCODE_EV6): New.
1006 (AXP_OPCODE_NOPAL): Include it.
1007
10081999-02-09 Doug Evans <devans@casey.cygnus.com>
1009
1010 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
1011 All uses updated. New members int_insn_p, max_insn_size,
1012 parse_operand,insert_operand,extract_operand,print_operand,
1013 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
1014 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
1015 extract_handlers,print_handlers.
1016 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
1017 (CGEN_ATTR_BOOL_OFFSET): New macro.
1018 (CGEN_ATTR_MASK): Subtract it to compute bit number.
1019 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
1020 (cgen_opcode_handler): Renamed from cgen_base.
1021 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
1022 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
1023 all uses updated.
1024 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
1025 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
1026 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
1027 (CGEN_OPCODE,CGEN_IBASE): New types.
1028 (CGEN_INSN): Rewrite.
1029 (CGEN_{ASM,DIS}_HASH*): Delete.
1030 (init_opcode_table,init_ibld_table): Declare.
1031 (CGEN_INSN_ATTR): New type.
1032
1033Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 1034
252b5132
RH
1035 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
1036 (x_FP, d_FP, dls_FP, sldx_FP): Define.
1037 Change *Suf definitions to include x and d suffixes.
1038 (movsx): Use w_Suf and b_Suf.
1039 (movzx): Likewise.
1040 (movs): Use bwld_Suf.
1041 (fld): Change ordering. Use sld_FP.
1042 (fild): Add Intel Syntax equivalent of fildq.
1043 (fst): Use sld_FP.
1044 (fist): Use sld_FP.
1045 (fstp): Use sld_FP. Add x_FP version.
1046 (fistp): LLongMem version for Intel Syntax.
1047 (fcom, fcomp): Use sld_FP.
1048 (fadd, fiadd, fsub): Use sld_FP.
1049 (fsubr): Use sld_FP.
1050 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
1051
10521999-01-27 Doug Evans <devans@casey.cygnus.com>
1053
1054 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
1055 CGEN_MODE_UINT.
1056
e135f41b 10571999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1058
1059 * hppa.h (bv): Fix mask.
1060
10611999-01-05 Doug Evans <devans@casey.cygnus.com>
1062
1063 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1064 (CGEN_ATTR): Use it.
1065 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1066 (CGEN_ATTR_TABLE): New member dfault.
1067
10681998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1069
1070 * mips.h (MIPS16_INSN_BRANCH): New.
1071
1072Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1073
1074 The following is part of a change made by Edith Epstein
d83c6548
AJ
1075 <eepstein@sophia.cygnus.com> as part of a project to merge in
1076 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1077
1078 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1079 after.
252b5132
RH
1080
1081Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1082
1083 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1084 status word instructions.
252b5132
RH
1085
10861998-11-30 Doug Evans <devans@casey.cygnus.com>
1087
1088 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1089 (struct cgen_keyword_entry): Ditto.
1090 (struct cgen_operand): Ditto.
1091 (CGEN_IFLD): New typedef, with associated access macros.
1092 (CGEN_IFMT): New typedef, with associated access macros.
1093 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1094 (CGEN_IVALUE): New typedef.
1095 (struct cgen_insn): Delete const on syntax,attrs members.
1096 `format' now points to format data. Type of `value' is now
1097 CGEN_IVALUE.
1098 (struct cgen_opcode_table): New member ifld_table.
1099
11001998-11-18 Doug Evans <devans@casey.cygnus.com>
1101
1102 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1103 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1104 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1105 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1106 (cgen_opcode_table): Update type of dis_hash fn.
1107 (extract_operand): Update type of `insn_value' arg.
1108
1109Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1110
1111 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1112
1113Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1114
1115 * mips.h (INSN_MULT): Added.
1116
1117Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1118
1119 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1120
1121Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1122
1123 * cgen.h (CGEN_INSN_INT): New typedef.
1124 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1125 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1126 (CGEN_INSN_BYTES_PTR): New typedef.
1127 (CGEN_EXTRACT_INFO): New typedef.
1128 (cgen_insert_fn,cgen_extract_fn): Update.
1129 (cgen_opcode_table): New member `insn_endian'.
1130 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1131 (insert_operand,extract_operand): Update.
1132 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1133
1134Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1135
1136 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1137 (struct CGEN_HW_ENTRY): New member `attrs'.
1138 (CGEN_HW_ATTR): New macro.
1139 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1140 (CGEN_INSN_INVALID_P): New macro.
1141
1142Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1143
1144 * hppa.h: Add "fid".
d83c6548 1145
252b5132
RH
1146Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1147
1148 From Robert Andrew Dale <rob@nb.net>
1149 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1150 (AMD_3DNOW_OPCODE): Define.
1151
1152Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1153
1154 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1155
1156Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1157
1158 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1159
1160Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1161
1162 Move all global state data into opcode table struct, and treat
1163 opcode table as something that is "opened/closed".
1164 * cgen.h (CGEN_OPCODE_DESC): New type.
1165 (all fns): New first arg of opcode table descriptor.
1166 (cgen_set_parse_operand_fn): Add prototype.
1167 (cgen_current_machine,cgen_current_endian): Delete.
1168 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1169 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1170 dis_hash_table,dis_hash_table_entries.
1171 (opcode_open,opcode_close): Add prototypes.
1172
1173 * cgen.h (cgen_insn): New element `cdx'.
1174
1175Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1176
1177 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1178
1179Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1180
1181 * mn10300.h: Add "no_match_operands" field for instructions.
1182 (MN10300_MAX_OPERANDS): Define.
1183
1184Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1185
1186 * cgen.h (cgen_macro_insn_count): Declare.
1187
1188Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1189
1190 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1191 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1192 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1193 set_{int,vma}_operand.
1194
1195Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1196
1197 * mn10300.h: Add "machine" field for instructions.
1198 (MN103, AM30): Define machine types.
d83c6548 1199
252b5132
RH
1200Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1201
1202 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1203
12041998-06-18 Ulrich Drepper <drepper@cygnus.com>
1205
1206 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1207
1208Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1209
1210 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1211 and ud2b.
1212 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1213 those that happen to be implemented on pentiums.
1214
1215Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1216
1217 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1218 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1219 with Size16|IgnoreSize or Size32|IgnoreSize.
1220
1221Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1222
1223 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1224 (REPE): Rename to REPE_PREFIX_OPCODE.
1225 (i386_regtab_end): Remove.
1226 (i386_prefixtab, i386_prefixtab_end): Remove.
1227 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1228 of md_begin.
1229 (MAX_OPCODE_SIZE): Define.
1230 (i386_optab_end): Remove.
1231 (sl_Suf): Define.
1232 (sl_FP): Use sl_Suf.
1233
1234 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1235 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1236 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1237 data32, dword, and adword prefixes.
1238 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1239 regs.
1240
1241Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1242
1243 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1244
1245 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1246 register operands, because this is a common idiom. Flag them with
1247 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1248 fdivrp because gcc erroneously generates them. Also flag with a
1249 warning.
1250
1251 * i386.h: Add suffix modifiers to most insns, and tighter operand
1252 checks in some cases. Fix a number of UnixWare compatibility
1253 issues with float insns. Merge some floating point opcodes, using
1254 new FloatMF modifier.
1255 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1256 consistency.
1257
1258 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1259 IgnoreDataSize where appropriate.
1260
1261Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1262
1263 * i386.h: (one_byte_segment_defaults): Remove.
1264 (two_byte_segment_defaults): Remove.
1265 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1266
1267Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1268
1269 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1270 (cgen_hw_lookup_by_num): Declare.
1271
1272Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1273
1274 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1275 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1276
1277Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1278
1279 * cgen.h (cgen_asm_init_parse): Delete.
1280 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1281 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1282
1283Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1284
1285 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1286 (cgen_asm_finish_insn): Update prototype.
1287 (cgen_insn): New members num, data.
1288 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1289 dis_hash, dis_hash_table_size moved to ...
1290 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1291 All uses updated. New members asm_hash_p, dis_hash_p.
1292 (CGEN_MINSN_EXPANSION): New struct.
1293 (cgen_expand_macro_insn): Declare.
1294 (cgen_macro_insn_count): Declare.
1295 (get_insn_operands): Update prototype.
1296 (lookup_get_insn_operands): Declare.
1297
1298Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1299
1300 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1301 regKludge. Add operands types for string instructions.
1302
1303Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1304
1305 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1306 table.
1307
1308Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1309
1310 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1311 for `gettext'.
1312
1313Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1314
1315 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1316 Add IsString flag to string instructions.
1317 (IS_STRING): Don't define.
1318 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1319 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1320 (SS_PREFIX_OPCODE): Define.
1321
1322Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1323
1324 * i386.h: Revert March 24 patch; no more LinearAddress.
1325
1326Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1327
1328 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1329 instructions, and instead add FWait opcode modifier. Add short
1330 form of fldenv and fstenv.
1331 (FWAIT_OPCODE): Define.
1332
1333 * i386.h (i386_optab): Change second operand constraint of `mov
1334 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1335 allow legal instructions such as `movl %gs,%esi'
1336
1337Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1338
1339 * h8300.h: Various changes to fully bracket initializers.
1340
1341Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1342
1343 * i386.h: Set LinearAddress for lidt and lgdt.
1344
1345Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1346
1347 * cgen.h (CGEN_BOOL_ATTR): New macro.
1348
1349Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1350
1351 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1352
1353Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1354
1355 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1356 (cgen_insn): Record syntax and format entries here, rather than
1357 separately.
1358
1359Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1360
1361 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1362
1363Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1364
1365 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1366 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1367 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1368
1369Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1370
1371 * cgen.h (lookup_insn): New argument alias_p.
1372
1373Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1374
1375Fix rac to accept only a0:
1376 * d10v.h (OPERAND_ACC): Split into:
1377 (OPERAND_ACC0, OPERAND_ACC1) .
1378 (OPERAND_GPR): Define.
1379
1380Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1381
1382 * cgen.h (CGEN_FIELDS): Define here.
1383 (CGEN_HW_ENTRY): New member `type'.
1384 (hw_list): Delete decl.
1385 (enum cgen_mode): Declare.
1386 (CGEN_OPERAND): New member `hw'.
1387 (enum cgen_operand_instance_type): Declare.
1388 (CGEN_OPERAND_INSTANCE): New type.
1389 (CGEN_INSN): New member `operands'.
1390 (CGEN_OPCODE_DATA): Make hw_list const.
1391 (get_insn_operands,lookup_insn): Add prototypes for.
1392
1393Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1394
1395 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1396 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1397 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1398 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1399
1400Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1401
1402 * cgen.h: Correct typo in comment end marker.
1403
1404Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1405
1406 * tic30.h: New file.
1407
5a109b67 1408Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1409
1410 * cgen.h: Add prototypes for cgen_save_fixups(),
1411 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1412 of cgen_asm_finish_insn() to return a char *.
1413
1414Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1415
1416 * cgen.h: Formatting changes to improve readability.
1417
1418Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1419
1420 * cgen.h (*): Clean up pass over `struct foo' usage.
1421 (CGEN_ATTR): Make unsigned char.
1422 (CGEN_ATTR_TYPE): Update.
1423 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1424 (cgen_base): Move member `attrs' to cgen_insn.
1425 (CGEN_KEYWORD): New member `null_entry'.
1426 (CGEN_{SYNTAX,FORMAT}): New types.
1427 (cgen_insn): Format and syntax separated from each other.
1428
1429Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1430
1431 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1432 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1433 flags_{used,set} long.
1434 (d30v_operand): Make flags field long.
1435
1436Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1437
1438 * m68k.h: Fix comment describing operand types.
1439
1440Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1441
1442 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1443 everything else after down.
1444
1445Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1446
1447 * d10v.h (OPERAND_FLAG): Split into:
1448 (OPERAND_FFLAG, OPERAND_CFLAG) .
1449
1450Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1451
1452 * mips.h (struct mips_opcode): Changed comments to reflect new
1453 field usage.
1454
1455Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1456
1457 * mips.h: Added to comments a quick-ref list of all assigned
1458 operand type characters.
1459 (OP_{MASK,SH}_PERFREG): New macros.
1460
1461Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1462
1463 * sparc.h: Add '_' and '/' for v9a asr's.
1464 Patch from David Miller <davem@vger.rutgers.edu>
1465
1466Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1467
1468 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1469 area are not available in the base model (H8/300).
1470
1471Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1472
1473 * m68k.h: Remove documentation of ` operand specifier.
1474
1475Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1476
1477 * m68k.h: Document q and v operand specifiers.
1478
1479Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1480
1481 * v850.h (struct v850_opcode): Add processors field.
1482 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1483 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1484 (PROCESSOR_V850EA): New bit constants.
1485
1486Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1487
1488 Merge changes from Martin Hunt:
1489
1490 * d30v.h: Allow up to 64 control registers. Add
1491 SHORT_A5S format.
1492
1493 * d30v.h (LONG_Db): New form for delayed branches.
1494
1495 * d30v.h: (LONG_Db): New form for repeati.
1496
1497 * d30v.h (SHORT_D2B): New form.
1498
1499 * d30v.h (SHORT_A2): New form.
1500
1501 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1502 registers are used. Needed for VLIW optimization.
1503
1504Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1505
1506 * cgen.h: Move assembler interface section
1507 up so cgen_parse_operand_result is defined for cgen_parse_address.
1508 (cgen_parse_address): Update prototype.
1509
1510Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1511
1512 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1513
1514Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1515
1516 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1517 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1518 <paubert@iram.es>.
1519
1520 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1521 <paubert@iram.es>.
1522
1523 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1524 <paubert@iram.es>.
1525
1526 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1527 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1528
1529Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1530
1531 * v850.h (V850_NOT_R0): New flag.
1532
1533Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1534
1535 * v850.h (struct v850_opcode): Remove flags field.
1536
1537Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1538
1539 * v850.h (struct v850_opcode): Add flags field.
1540 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1541 fields.
1542 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1543 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1544
1545Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1546
1547 * arc.h: New file.
1548
1549Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1550
1551 * sparc.h (sparc_opcodes): Declare as const.
1552
1553Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1554
1555 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1556 uses single or double precision floating point resources.
1557 (INSN_NO_ISA, INSN_ISA1): Define.
1558 (cpu specific INSN macros): Tweak into bitmasks outside the range
1559 of INSN_ISA field.
1560
1561Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1562
1563 * i386.h: Fix pand opcode.
1564
1565Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1566
1567 * mips.h: Widen INSN_ISA and move it to a more convenient
1568 bit position. Add INSN_3900.
1569
1570Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1571
1572 * mips.h (struct mips_opcode): added new field membership.
1573
1574Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1575
1576 * i386.h (movd): only Reg32 is allowed.
1577
1578 * i386.h: add fcomp and ud2. From Wayne Scott
1579 <wscott@ichips.intel.com>.
1580
1581Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1582
1583 * i386.h: Add MMX instructions.
1584
1585Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1586
1587 * i386.h: Remove W modifier from conditional move instructions.
1588
1589Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1590
1591 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1592 with no arguments to match that generated by the UnixWare
1593 assembler.
1594
1595Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1596
1597 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1598 (cgen_parse_operand_fn): Declare.
1599 (cgen_init_parse_operand): Declare.
1600 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1601 new argument `want'.
1602 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1603 (enum cgen_parse_operand_type): New enum.
1604
1605Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1606
1607 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1608
1609Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1610
1611 * cgen.h: New file.
1612
1613Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1614
1615 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1616 fdivrp.
1617
1618Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1619
1620 * v850.h (extract): Make unsigned.
1621
1622Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1623
1624 * i386.h: Add iclr.
1625
1626Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1627
1628 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1629 take a direction bit.
1630
1631Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1632
1633 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1634
1635Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1636
1637 * sparc.h: Include <ansidecl.h>. Update function declarations to
1638 use prototypes, and to use const when appropriate.
1639
1640Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1641
1642 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1643
1644Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1645
1646 * d10v.h: Change pre_defined_registers to
1647 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1648
1649Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1650
1651 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1652 Change mips_opcodes from const array to a pointer,
1653 and change bfd_mips_num_opcodes from const int to int,
1654 so that we can increase the size of the mips opcodes table
1655 dynamically.
1656
1657Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1658
1659 * d30v.h (FLAG_X): Remove unused flag.
1660
1661Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1662
1663 * d30v.h: New file.
1664
1665Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1666
1667 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1668 (PDS_VALUE): Macro to access value field of predefined symbols.
1669 (tic80_next_predefined_symbol): Add prototype.
1670
1671Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1672
1673 * tic80.h (tic80_symbol_to_value): Change prototype to match
1674 change in function, added class parameter.
1675
1676Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1677
1678 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1679 endmask fields, which are somewhat weird in that 0 and 32 are
1680 treated exactly the same.
1681
1682Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1683
1684 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1685 rather than a constant that is 2**X. Reorder them to put bits for
1686 operands that have symbolic names in the upper bits, so they can
1687 be packed into an int where the lower bits contain the value that
1688 corresponds to that symbolic name.
1689 (predefined_symbo): Add struct.
1690 (tic80_predefined_symbols): Declare array of translations.
1691 (tic80_num_predefined_symbols): Declare size of that array.
1692 (tic80_value_to_symbol): Declare function.
1693 (tic80_symbol_to_value): Declare function.
1694
1695Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1696
1697 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1698
1699Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1700
1701 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1702 be the destination register.
1703
1704Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1705
1706 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1707 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1708 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1709 that the opcode can have two vector instructions in a single
1710 32 bit word and we have to encode/decode both.
1711
1712Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1713
1714 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1715 TIC80_OPERAND_RELATIVE for PC relative.
1716 (TIC80_OPERAND_BASEREL): New flag bit for register
1717 base relative.
1718
1719Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1720
1721 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1722
1723Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1724
1725 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1726 ":s" modifier for scaling.
1727
1728Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1729
1730 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1731 (TIC80_OPERAND_M_LI): Ditto
1732
1733Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1734
1735 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1736 (TIC80_OPERAND_CC): New define for condition code operand.
1737 (TIC80_OPERAND_CR): New define for control register operand.
1738
1739Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1740
1741 * tic80.h (struct tic80_opcode): Name changed.
1742 (struct tic80_opcode): Remove format field.
1743 (struct tic80_operand): Add insertion and extraction functions.
1744 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1745 correct ones.
1746 (FMT_*): Ditto.
1747
1748Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1749
1750 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1751 type IV instruction offsets.
1752
1753Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1754
1755 * tic80.h: New file.
1756
1757Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1758
1759 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1760
1761Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1762
1763 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1764 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1765 * v850.h: Fix comment, v850_operand not powerpc_operand.
1766
1767Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1768
1769 * mn10200.h: Flesh out structures and definitions needed by
1770 the mn10200 assembler & disassembler.
1771
1772Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1773
1774 * mips.h: Add mips16 definitions.
1775
1776Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1777
1778 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1779
1780Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1781
1782 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1783 (MN10300_OPERAND_MEMADDR): Define.
1784
1785Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1786
1787 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1788
1789Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1790
1791 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1792
1793Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1794
1795 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1796
1797Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1798
1799 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1800
1801Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1802
1803 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1804 negative to minimize problems with shared libraries. Organize
1805 instruction subsets by AMASK extensions and PALcode
1806 implementation.
252b5132
RH
1807 (struct alpha_operand): Move flags slot for better packing.
1808
1809Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1810
1811 * v850.h (V850_OPERAND_RELAX): New operand flag.
1812
1813Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1814
1815 * mn10300.h (FMT_*): Move operand format definitions
1816 here.
1817
1818Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1819
1820 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1821
1822Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1823
1824 * mn10300.h (mn10300_opcode): Add "format" field.
1825 (MN10300_OPERAND_*): Define.
1826
1827Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1828
1829 * mn10x00.h: Delete.
1830 * mn10200.h, mn10300.h: New files.
1831
1832Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1833
1834 * mn10x00.h: New file.
1835
1836Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1837
1838 * v850.h: Add new flag to indicate this instruction uses a PC
1839 displacement.
1840
1841Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1842
1843 * h8300.h (stmac): Add missing instruction.
1844
1845Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1846
1847 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1848 field.
1849
1850Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1851
1852 * v850.h (V850_OPERAND_EP): Define.
1853
1854 * v850.h (v850_opcode): Add size field.
1855
1856Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1857
1858 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1859 to functions used to handle unusual operand encoding.
252b5132 1860 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1861 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1862
1863Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1864
1865 * v850.h (v850_operands): Add flags field.
1866 (OPERAND_REG, OPERAND_NUM): Defined.
1867
1868Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1869
1870 * v850.h: New file.
1871
1872Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1873
1874 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1875 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1876 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1877 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1878 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1879 Defined.
252b5132
RH
1880
1881Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1882
1883 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1884 a 3 bit space id instead of a 2 bit space id.
1885
1886Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1887
1888 * d10v.h: Add some additional defines to support the
d83c6548 1889 assembler in determining which operations can be done in parallel.
252b5132
RH
1890
1891Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1892
1893 * h8300.h (SN): Define.
1894 (eepmov.b): Renamed from "eepmov"
1895 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1896 with them.
1897
1898Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1899
1900 * d10v.h (OPERAND_SHIFT): New operand flag.
1901
1902Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1903
1904 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1905 signed numbers.
252b5132
RH
1906
1907Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1908
1909 * d10v.h (pd_reg): Define. Putting the definition here allows
1910 the assembler and disassembler to share the same struct.
1911
1912Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1913
1914 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1915 Williams <steve@icarus.com>.
1916
1917Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1918
1919 * d10v.h: New file.
1920
1921Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1922
1923 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1924
1925Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1926
d83c6548 1927 * m68k.h (mcf5200): New macro.
252b5132
RH
1928 Document names of coldfire control registers.
1929
1930Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1931
1932 * h8300.h (SRC_IN_DST): Define.
1933
1934 * h8300.h (UNOP3): Mark the register operand in this insn
1935 as a source operand, not a destination operand.
1936 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1937 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1938 register operand with SRC_IN_DST.
1939
1940Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1941
1942 * alpha.h: New file.
1943
1944Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1945
1946 * rs6k.h: Remove obsolete file.
1947
1948Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1949
1950 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1951 fdivp, and fdivrp. Add ffreep.
1952
1953Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1954
1955 * h8300.h: Reorder various #defines for readability.
1956 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1957 (BITOP): Accept additional (unused) argument. All callers changed.
1958 (EBITOP): Likewise.
1959 (O_LAST): Bump.
1960 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1961
1962 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1963 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1964 (BITOP, EBITOP): Handle new H8/S addressing modes for
1965 bit insns.
1966 (UNOP3): Handle new shift/rotate insns on the H8/S.
1967 (insns using exr): New instructions.
1968 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1969
1970Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1971
1972 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1973 was incorrect.
1974
1975Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1976
1977 * h8300.h (START): Remove.
1978 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1979 and mov.l insns that can be relaxed.
1980
1981Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1982
1983 * i386.h: Remove Abs32 from lcall.
1984
1985Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1986
1987 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1988 (SLCPOP): New macro.
1989 Mark X,Y opcode letters as in use.
1990
1991Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1992
1993 * sparc.h (F_FLOAT, F_FBR): Define.
1994
1995Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1996
1997 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1998 from all insns.
1999 (ABS8SRC,ABS8DST): Add ABS8MEM.
2000 (add.l): Fix reg+reg variant.
2001 (eepmov.w): Renamed from eepmovw.
2002 (ldc,stc): Fix many cases.
2003
2004Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
2005
2006 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
2007
2008Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
2009
2010 * sparc.h (O): Mark operand letter as in use.
2011
2012Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
2013
2014 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
2015 Mark operand letters uU as in use.
2016
2017Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
2018
2019 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
2020 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
2021 (SPARC_OPCODE_SUPPORTED): New macro.
2022 (SPARC_OPCODE_CONFLICT_P): Rewrite.
2023 (F_NOTV9): Delete.
2024
2025Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
2026
2027 * sparc.h (sparc_opcode_lookup_arch) Make return type in
2028 declaration consistent with return type in definition.
2029
2030Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
2031
2032 * i386.h (i386_optab): Remove Data32 from pushf and popf.
2033
2034Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
2035
2036 * i386.h (i386_regtab): Add 80486 test registers.
2037
2038Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
2039
2040 * i960.h (I_HX): Define.
2041 (i960_opcodes): Add HX instruction.
2042
2043Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
2044
2045 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
2046 and fclex.
2047
2048Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
2049
2050 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
2051 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
2052 (bfd_* defines): Delete.
2053 (sparc_opcode_archs): Replaces architecture_pname.
2054 (sparc_opcode_lookup_arch): Declare.
2055 (NUMOPCODES): Delete.
2056
2057Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2058
2059 * sparc.h (enum sparc_architecture): Add v9a.
2060 (ARCHITECTURES_CONFLICT_P): Update.
2061
2062Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2063
2064 * i386.h: Added Pentium Pro instructions.
2065
2066Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2067
2068 * m68k.h: Document new 'W' operand place.
2069
2070Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2071
2072 * hppa.h: Add lci and syncdma instructions.
2073
2074Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2075
2076 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2077 instructions.
252b5132
RH
2078
2079Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2080
2081 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2082 assembler's -mcom and -many switches.
2083
2084Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2085
2086 * i386.h: Fix cmpxchg8b extension opcode description.
2087
2088Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2089
2090 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2091 and register cr4.
2092
2093Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2094
2095 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2096
2097Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2098
2099 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2100
2101Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2102
2103 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2104
2105Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2106
2107 * m68kmri.h: Remove.
2108
2109 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2110 declarations. Remove F_ALIAS and flag field of struct
2111 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2112 int. Make name and args fields of struct m68k_opcode const.
2113
2114Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2115
2116 * sparc.h (F_NOTV9): Define.
2117
2118Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2119
2120 * mips.h (INSN_4010): Define.
2121
2122Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2123
2124 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2125
2126 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2127 * m68k.h: Fix argument descriptions of coprocessor
2128 instructions to allow only alterable operands where appropriate.
2129 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2130 (m68k_opcode_aliases): Add more aliases.
2131
2132Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2133
2134 * m68k.h: Added explcitly short-sized conditional branches, and a
2135 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2136 svr4-based configurations.
2137
2138Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2139
2140 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2141 * i386.h: added missing Data16/Data32 flags to a few instructions.
2142
2143Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2144
2145 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2146 (OP_MASK_BCC, OP_SH_BCC): Define.
2147 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2148 (OP_MASK_CCC, OP_SH_CCC): Define.
2149 (INSN_READ_FPR_R): Define.
2150 (INSN_RFE): Delete.
2151
2152Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2153
2154 * m68k.h (enum m68k_architecture): Deleted.
2155 (struct m68k_opcode_alias): New type.
2156 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2157 matching constraints, values and flags. As a side effect of this,
2158 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2159 as I know were never used, now may need re-examining.
2160 (numopcodes): Now const.
2161 (m68k_opcode_aliases, numaliases): New variables.
2162 (endop): Deleted.
2163 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2164 m68k_opcode_aliases; update declaration of m68k_opcodes.
2165
2166Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2167
2168 * hppa.h (delay_type): Delete unused enumeration.
2169 (pa_opcode): Replace unused delayed field with an architecture
2170 field.
2171 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2172
2173Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2174
2175 * mips.h (INSN_ISA4): Define.
2176
2177Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2178
2179 * mips.h (M_DLA_AB, M_DLI): Define.
2180
2181Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2182
2183 * hppa.h (fstwx): Fix single-bit error.
2184
2185Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2186
2187 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2188
2189Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2190
2191 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2192 debug registers. From Charles Hannum (mycroft@netbsd.org).
2193
2194Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2195
2196 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2197 i386 support:
2198 * i386.h (MOV_AX_DISP32): New macro.
2199 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2200 of several call/return instructions.
2201 (ADDR_PREFIX_OPCODE): New macro.
2202
2203Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2204
2205 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2206
4f1d9bd8
NC
2207 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2208 char.
252b5132
RH
2209 (struct vot, field `name'): ditto.
2210
2211Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2212
2213 * vax.h: Supply and properly group all values in end sentinel.
2214
2215Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2216
2217 * mips.h (INSN_ISA, INSN_4650): Define.
2218
2219Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2220
2221 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2222 systems with a separate instruction and data cache, such as the
2223 29040, these instructions take an optional argument.
2224
2225Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2226
2227 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2228 INSN_TRAP.
2229
2230Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2231
2232 * mips.h (INSN_STORE_MEMORY): Define.
2233
2234Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2235
2236 * sparc.h: Document new operand type 'x'.
2237
2238Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2239
2240 * i960.h (I_CX2): New instruction category. It includes
2241 instructions available on Cx and Jx processors.
2242 (I_JX): New instruction category, for JX-only instructions.
2243 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2244 Jx-only instructions, in I_JX category.
2245
2246Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2247
2248 * ns32k.h (endop): Made pointer const too.
2249
2250Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2251
2252 * ns32k.h: Drop Q operand type as there is no correct use
2253 for it. Add I and Z operand types which allow better checking.
2254
2255Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2256
2257 * h8300.h (xor.l) :fix bit pattern.
2258 (L_2): New size of operand.
2259 (trapa): Use it.
2260
2261Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2262
2263 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2264
2265Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2266
2267 * sparc.h: Include v9 definitions.
2268
2269Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2270
2271 * m68k.h (m68060): Defined.
2272 (m68040up, mfloat, mmmu): Include it.
2273 (struct m68k_opcode): Widen `arch' field.
2274 (m68k_opcodes): Updated for M68060. Removed comments that were
2275 instructions commented out by "JF" years ago.
2276
2277Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2278
2279 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2280 add a one-bit `flags' field.
2281 (F_ALIAS): New macro.
2282
2283Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2284
2285 * h8300.h (dec, inc): Get encoding right.
2286
2287Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2288
2289 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2290 a flag instead.
2291 (PPC_OPERAND_SIGNED): Define.
2292 (PPC_OPERAND_SIGNOPT): Define.
2293
2294Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2295
2296 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2297 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2298
2299Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2300
2301 * i386.h: Reverse last change. It'll be handled in gas instead.
2302
2303Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2304
2305 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2306 slower on the 486 and used the implicit shift count despite the
2307 explicit operand. The one-operand form is still available to get
2308 the shorter form with the implicit shift count.
2309
2310Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2311
2312 * hppa.h: Fix typo in fstws arg string.
2313
2314Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2315
2316 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2317
2318Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2319
2320 * ppc.h (PPC_OPCODE_601): Define.
2321
2322Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2323
2324 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2325 (so we can determine valid completers for both addb and addb[tf].)
2326
2327 * hppa.h (xmpyu): No floating point format specifier for the
2328 xmpyu instruction.
2329
2330Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2331
2332 * ppc.h (PPC_OPERAND_NEXT): Define.
2333 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2334 (struct powerpc_macro): Define.
2335 (powerpc_macros, powerpc_num_macros): Declare.
2336
2337Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2338
2339 * ppc.h: New file. Header file for PowerPC opcode table.
2340
2341Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2342
2343 * hppa.h: More minor template fixes for sfu and copr (to allow
2344 for easier disassembly).
2345
2346 * hppa.h: Fix templates for all the sfu and copr instructions.
2347
2348Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2349
2350 * i386.h (push): Permit Imm16 operand too.
2351
2352Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2353
2354 * h8300.h (andc): Exists in base arch.
2355
2356Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2357
2358 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2359 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2360
2361Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2362
2363 * hppa.h: Add FP quadword store instructions.
2364
2365Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2366
2367 * mips.h: (M_J_A): Added.
2368 (M_LA): Removed.
2369
2370Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2371
2372 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2373 <mellon@pepper.ncd.com>.
2374
2375Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2376
2377 * hppa.h: Immediate field in probei instructions is unsigned,
2378 not low-sign extended.
2379
2380Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2381
2382 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2383
2384Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2385
2386 * i386.h: Add "fxch" without operand.
2387
2388Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2389
2390 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2391
2392Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2393
2394 * hppa.h: Add gfw and gfr to the opcode table.
2395
2396Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2397
2398 * m88k.h: extended to handle m88110.
2399
2400Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2401
2402 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2403 addresses.
2404
2405Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2406
2407 * i960.h (i960_opcodes): Properly bracket initializers.
2408
2409Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2410
2411 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2412
2413Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2414
2415 * m68k.h (two): Protect second argument with parentheses.
2416
2417Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2418
2419 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2420 Deleted old in/out instructions in "#if 0" section.
2421
2422Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2423
2424 * i386.h (i386_optab): Properly bracket initializers.
2425
2426Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2427
2428 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2429 Jeff Law, law@cs.utah.edu).
2430
2431Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2432
2433 * i386.h (lcall): Accept Imm32 operand also.
2434
2435Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2436
2437 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2438 (M_DABS): Added.
2439
2440Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2441
2442 * mips.h (INSN_*): Changed values. Removed unused definitions.
2443 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2444 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2445 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2446 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2447 (M_*): Added new values for r6000 and r4000 macros.
2448 (ANY_DELAY): Removed.
2449
2450Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2451
2452 * mips.h: Added M_LI_S and M_LI_SS.
2453
2454Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2455
2456 * h8300.h: Get some rare mov.bs correct.
2457
2458Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2459
2460 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2461 been included.
2462
2463Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2464
2465 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2466 jump instructions, for use in disassemblers.
2467
2468Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2469
2470 * m88k.h: Make bitfields just unsigned, not unsigned long or
2471 unsigned short.
2472
2473Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2474
2475 * hppa.h: New argument type 'y'. Use in various float instructions.
2476
2477Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2478
2479 * hppa.h (break): First immediate field is unsigned.
2480
2481 * hppa.h: Add rfir instruction.
2482
2483Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2484
2485 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2486
2487Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2488
2489 * mips.h: Reworked the hazard information somewhat, and fixed some
2490 bugs in the instruction hazard descriptions.
2491
2492Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2493
2494 * m88k.h: Corrected a couple of opcodes.
2495
2496Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2497
2498 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2499 new version includes instruction hazard information, but is
2500 otherwise reasonably similar.
2501
2502Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2503
2504 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2505
2506Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2507
2508 Patches from Jeff Law, law@cs.utah.edu:
2509 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2510 Make the tables be the same for the following instructions:
2511 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2512 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2513 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2514 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2515 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2516 "fcmp", and "ftest".
2517
2518 * hppa.h: Make new and old tables the same for "break", "mtctl",
2519 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2520 Fix typo in last patch. Collapse several #ifdefs into a
2521 single #ifdef.
2522
2523 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2524 of the comments up-to-date.
2525
2526 * hppa.h: Update "free list" of letters and update
2527 comments describing each letter's function.
2528
4f1d9bd8
NC
2529Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2530
2531 * h8300.h: Lots of little fixes for the h8/300h.
2532
2533Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2534
2535 Support for H8/300-H
2536 * h8300.h: Lots of new opcodes.
2537
252b5132
RH
2538Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2539
2540 * h8300.h: checkpoint, includes H8/300-H opcodes.
2541
2542Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2543
2544 * Patches from Jeffrey Law <law@cs.utah.edu>.
2545 * hppa.h: Rework single precision FP
2546 instructions so that they correctly disassemble code
2547 PA1.1 code.
2548
2549Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2550
2551 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2552 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2553
2554Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2555
2556 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2557 gdb will define it for now.
2558
2559Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2560
2561 * sparc.h: Don't end enumerator list with comma.
2562
2563Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2564
2565 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2566 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2567 ("bc2t"): Correct typo.
2568 ("[ls]wc[023]"): Use T rather than t.
2569 ("c[0123]"): Define general coprocessor instructions.
2570
2571Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2572
2573 * m68k.h: Move split point for gcc compilation more towards
2574 middle.
2575
2576Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2577
2578 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2579 simply wrong, ics, rfi, & rfsvc were missing).
2580 Add "a" to opr_ext for "bb". Doc fix.
2581
2582Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2583
2584 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2585 * mips.h: Add casts, to suppress warnings about shifting too much.
2586 * m68k.h: Document the placement code '9'.
2587
2588Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2589
2590 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2591 allows callers to break up the large initialized struct full of
2592 opcodes into two half-sized ones. This permits GCC to compile
2593 this module, since it takes exponential space for initializers.
2594 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2595
2596Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2597
2598 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2599 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2600 initialized structs in it.
2601
2602Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2603
2604 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2605 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2606 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2607
2608Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2609
2610 * mips.h: document "i" and "j" operands correctly.
2611
2612Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2613
2614 * mips.h: Removed endianness dependency.
2615
2616Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2617
2618 * h8300.h: include info on number of cycles per instruction.
2619
2620Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2621
2622 * hppa.h: Move handy aliases to the front. Fix masks for extract
2623 and deposit instructions.
2624
2625Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2626
2627 * i386.h: accept shld and shrd both with and without the shift
2628 count argument, which is always %cl.
2629
2630Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2631
2632 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2633 (one_byte_segment_defaults, two_byte_segment_defaults,
2634 i386_prefixtab_end): Ditto.
2635
2636Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2637
2638 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2639 for operand 2; from John Carr, jfc@dsg.dec.com.
2640
2641Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2642
2643 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2644 always use 16-bit offsets. Makes calculated-size jump tables
2645 feasible.
2646
2647Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2648
2649 * i386.h: Fix one-operand forms of in* and out* patterns.
2650
2651Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2652
2653 * m68k.h: Added CPU32 support.
2654
2655Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2656
2657 * mips.h (break): Disassemble the argument. Patch from
2658 jonathan@cs.stanford.edu (Jonathan Stone).
2659
2660Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2661
2662 * m68k.h: merged Motorola and MIT syntax.
2663
2664Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2665
2666 * m68k.h (pmove): make the tests less strict, the 68k book is
2667 wrong.
2668
2669Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2670
2671 * m68k.h (m68ec030): Defined as alias for 68030.
2672 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2673 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2674 them. Tightened description of "fmovex" to distinguish it from
2675 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2676 up descriptions that claimed versions were available for chips not
2677 supporting them. Added "pmovefd".
2678
2679Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2680
2681 * m68k.h: fix where the . goes in divull
2682
2683Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2684
2685 * m68k.h: the cas2 instruction is supposed to be written with
2686 indirection on the last two operands, which can be either data or
2687 address registers. Added a new operand type 'r' which accepts
2688 either register type. Added new cases for cas2l and cas2w which
2689 use them. Corrected masks for cas2 which failed to recognize use
2690 of address register.
2691
2692Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2693
2694 * m68k.h: Merged in patches (mostly m68040-specific) from
2695 Colin Smith <colin@wrs.com>.
2696
2697 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2698 base). Also cleaned up duplicates, re-ordered instructions for
2699 the sake of dis-assembling (so aliases come after standard names).
2700 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2701
2702Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2703
2704 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2705 all missing .s
2706
2707Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2708
2709 * sparc.h: Moved tables to BFD library.
2710
2711 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2712
2713Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2714
2715 * h8300.h: Finish filling in all the holes in the opcode table,
2716 so that the Lucid C compiler can digest this as well...
2717
2718Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2719
2720 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2721 Fix opcodes on various sizes of fild/fist instructions
2722 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2723 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2724
2725Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2726
2727 * h8300.h: Fill in all the holes in the opcode table so that the
2728 losing HPUX C compiler can digest this...
2729
2730Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2731
2732 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2733 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2734
2735Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2736
2737 * sparc.h: Add new architecture variant sparclite; add its scan
2738 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2739
2740Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2741
2742 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2743 fy@lucid.com).
2744
2745Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2746
2747 * rs6k.h: New version from IBM (Metin).
2748
2749Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2750
2751 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2752 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2753
2754Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2755
2756 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2757
2758Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2759
2760 * m68k.h (one, two): Cast macro args to unsigned to suppress
2761 complaints from compiler and lint about integer overflow during
2762 shift.
2763
2764Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2765
2766 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2767
2768Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2769
2770 * mips.h: Make bitfield layout depend on the HOST compiler,
2771 not on the TARGET system.
2772
2773Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2774
2775 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2776 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2777 <TRANLE@INTELLICORP.COM>.
2778
2779Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2780
2781 * h8300.h: turned op_type enum into #define list
2782
2783Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2784
2785 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2786 similar instructions -- they've been renamed to "fitoq", etc.
2787 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2788 number of arguments.
2789 * h8300.h: Remove extra ; which produces compiler warning.
2790
2791Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2792
2793 * sparc.h: fix opcode for tsubcctv.
2794
2795Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2796
2797 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2798
2799Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2800
2801 * sparc.h (nop): Made the 'lose' field be even tighter,
2802 so only a standard 'nop' is disassembled as a nop.
2803
2804Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2805
2806 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2807 disassembled as a nop.
2808
4f1d9bd8
NC
2809Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2810
2811 * m68k.h, sparc.h: ANSIfy enums.
2812
252b5132
RH
2813Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2814
2815 * sparc.h: fix a typo.
2816
2817Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2818
2819 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2820 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2821 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2822
2823\f
2824Local Variables:
2825version-control: never
2826End: