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* config.in, configure: Regenerate.
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
cd61ebfe
AM
12002-07-08 Alan Modra <amodra@bigpond.net.au>
2
3 * i386.h: Remove IgnoreSize from movsx and movzx.
4
92007e40
AM
52002-06-08 Alan Modra <amodra@bigpond.net.au>
6
7 * a29k.h: Replace CONST with const.
8 (CONST): Don't define.
9 * convex.h: Replace CONST with const.
10 (CONST): Don't define.
11 * dlx.h: Replace CONST with const.
12 * or32.h (CONST): Don't define.
13
deec1734
CD
142002-05-30 Chris G. Demetriou <cgd@broadcom.com>
15
16 * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
17 (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
18 (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
19 (INSN_MDMX): New constants, for MDMX support.
20 (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
21
d172d4ba
NC
222002-05-28 Kuang Hwa Lin <kuang@sbcglobal.net>
23
24 * dlx.h: New file.
25
b3f7d5fd
AM
262002-05-25 Alan Modra <amodra@bigpond.net.au>
27
28 * ia64.h: Use #include "" instead of <> for local header files.
29 * sparc.h: Likewise.
30
771c7ce4
TS
312002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
32
33 * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
34
b9c9142c
AV
352002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
36
37 * h8300.h: Corrected defs of all control regs
38 and eepmov instr.
39
cd47f4f1
AM
402002-04-11 Alan Modra <amodra@bigpond.net.au>
41
42 * i386.h: Add intel mode cmpsd and movsd.
b9612d14 43 Put them before SSE2 insns, so that rep prefix works.
cd47f4f1 44
1f25f5d3
CD
452002-03-15 Chris G. Demetriou <cgd@broadcom.com>
46
47 * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D
48 instructions.
49 (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks
50 may be passed along with the ISA bitmask.
51
e4b29ec6
AM
522002-03-05 Paul Koning <pkoning@equallogic.com>
53
54 * pdp11.h: Add format codes for float instruction formats.
55
eea5c83f
AM
562002-02-25 Alan Modra <amodra@bigpond.net.au>
57
58 * ppc.h (PPC_OPCODE_POWER4, PPC_OPCODE_NOPOWER4): Define.
59
5a8b245c
JH
60Mon Feb 18 17:31:48 CET 2002 Jan Hubicka <jh@suse.cz>
61
62 * i386.h (push,pop): Fix Reg64 to WordReg to allow 16bit operands.
63
85a33fe2
JH
64Mon Feb 11 12:53:19 CET 2002 Jan Hubicka <jh@suse.cz>
65
66 * i386.h (push,pop): Allow 16bit operands in 64bit mode.
67 (xchg): Fix.
68 (in, out): Disable 64bit operands.
69 (call, jmp): Avoid REX prefixes.
70 (jcxz): Prohibit in 64bit mode
71 (jrcxz, loop): Add 64bit variants.
72 (movq): Fix patterns.
73 (movmskps, pextrw, pinstrw): Add 64bit variants.
74
3b16e843
NC
752002-01-31 Ivan Guzvinec <ivang@opencores.org>
76
77 * or32.h: New file.
78
9a2e995d
GH
792002-01-22 Graydon Hoare <graydon@redhat.com>
80
81 * cgen.h (CGEN_MAYBE_MULTI_IFLD): New structure.
82 (CGEN_OPERAND): Add CGEN_MAYBE_MULTI_IFLD field.
83
7b45c6e1
AM
842002-01-21 Thomas Klausner <wiz@danbala.ifoer.tuwien.ac.at>
85
86 * h8300.h: Comment typo fix.
87
a09cf9bd
MG
882002-01-03 matthew green <mrg@redhat.com>
89
90 * ppc.h (PPC_OPCODE_BOOKE): BookE is not Motorola specific.
91 (PPC_OPCODE_BOOKE64): Likewise.
92
1befefea
JL
93Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
94
95 * hppa.h (call, ret): Move to end of table.
96 (addb, addib): PA2.0 variants should have been PA2.0W.
97 (ldw, ldh, ldb, stw, sth, stb, stwa): Reorder to keep disassembler
98 happy.
99 (fldw, fldd, fstw, fstd, bb): Likewise.
100 (short loads/stores): Tweak format specifier slightly to keep
101 disassembler happy.
102 (indexed loads/stores): Likewise.
103 (absolute loads/stores): Likewise.
104
124ddbb2
AO
1052001-12-04 Alexandre Oliva <aoliva@redhat.com>
106
107 * d10v.h (OPERAND_NOSP): New macro.
108
9b21d49b
AO
1092001-11-29 Alexandre Oliva <aoliva@redhat.com>
110
111 * d10v.h (OPERAND_SP): New macro.
112
802a735e
AM
1132001-11-15 Alan Modra <amodra@bigpond.net.au>
114
115 * ppc.h (struct powerpc_operand <insert, extract>): Add dialect param.
116
6e917903
TW
1172001-11-11 Timothy Wall <twall@alum.mit.edu>
118
119 * tic54x.h: Revise opcode layout; don't really need a separate
120 structure for parallel opcodes.
121
e5470cdc
AM
1222001-11-13 Zack Weinberg <zack@codesourcery.com>
123 Alan Modra <amodra@bigpond.net.au>
124
125 * i386.h (i386_optab): Add entries for "sldr", "smsw" and "str" to
126 accept WordReg.
127
5d84d93f
CD
1282001-11-04 Chris Demetriou <cgd@broadcom.com>
129
130 * mips.h (OPCODE_IS_MEMBER): Remove extra space.
131
3c3bdf30
NC
1322001-10-30 Hans-Peter Nilsson <hp@bitrange.com>
133
134 * mmix.h: New file.
135
e4432525
CD
1362001-10-18 Chris Demetriou <cgd@broadcom.com>
137
138 * mips.h (OPCODE_IS_MEMBER): Add a no-op term to the end
139 of the expression, to make source code merging easier.
140
8ff529d8
CD
1412001-10-17 Chris Demetriou <cgd@broadcom.com>
142
143 * mips.h: Sort coprocessor instruction argument characters
144 in comment, add a few more words of description for "H".
145
2228315b
CD
1462001-10-17 Chris Demetriou <cgd@broadcom.com>
147
148 * mips.h (INSN_SB1): New cpu-specific instruction bit.
149 (OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
150 if cpu is CPU_SB1.
151
f5c120c5
MG
1522001-10-17 matthew green <mrg@redhat.com>
153
154 * ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
155
418c1742
MG
1562001-10-12 matthew green <mrg@redhat.com>
157
0716ce0d
MG
158 * ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_BOOKE64, PPC_OPCODE_403): New
159 opcode flags for BookE 32-bit, BookE 64-bit and PowerPC 403
160 instructions, respectively.
418c1742 161
6ff2f2ba
NC
1622001-09-27 Nick Clifton <nickc@cambridge.redhat.com>
163
164 * v850.h: Remove spurious comment.
165
015cf428
NC
1662001-09-21 Nick Clifton <nickc@cambridge.redhat.com>
167
168 * h8300.h: Fix compile time warning messages
169
847b8b31
RH
1702001-09-04 Richard Henderson <rth@redhat.com>
171
172 * alpha.h (struct alpha_operand): Pack elements into bitfields.
173
a98b9439
EC
1742001-08-31 Eric Christopher <echristo@redhat.com>
175
176 * mips.h: Remove CPU_MIPS32_4K.
177
a6959011
AM
1782001-08-27 Torbjorn Granlund <tege@swox.com>
179
180 * ppc.h (PPC_OPERAND_DS): Define.
181
d83c6548
AJ
1822001-08-25 Andreas Jaeger <aj@suse.de>
183
184 * d30v.h: Fix declaration of reg_name_cnt.
185
186 * d10v.h: Fix declaration of d10v_reg_name_cnt.
187
188 * arc.h: Add prototypes from opcodes/arc-opc.c.
189
99c14723
TS
1902001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
191
192 * mips.h (INSN_10000): Define.
193 (OPCODE_IS_MEMBER): Check for INSN_10000.
194
11b37b7b
AM
1952001-08-10 Alan Modra <amodra@one.net.au>
196
197 * ppc.h: Revert 2001-08-08.
198
3b16e843
NC
1992001-08-10 Richard Sandiford <rsandifo@redhat.com>
200
201 * mips.h (INSN_GP32): Remove.
202 (OPCODE_IS_MEMBER): Remove gp32 parameter.
203 (M_MOVE): New macro identifier.
204
0f1bac05
AM
2052001-08-08 Alan Modra <amodra@one.net.au>
206
207 1999-10-25 Torbjorn Granlund <tege@swox.com>
208 * ppc.h (struct powerpc_operand): New field `reloc'.
209
3b16e843
NC
2102001-08-01 Aldy Hernandez <aldyh@redhat.com>
211
212 * mips.h (INSN_ISA_MASK): Nuke bits 12-15.
213
2142001-07-12 Jeff Johnston <jjohnstn@redhat.com>
215
216 * cgen.h (CGEN_INSN): Add regex support.
217 (build_insn_regex): Declare.
218
81f6038f
FCE
2192001-07-11 Frank Ch. Eigler <fche@redhat.com>
220
221 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
222 (cgen_cpu_desc): Ditto.
223
32cfffe3
BE
2242001-07-07 Ben Elliston <bje@redhat.com>
225
226 * m88k.h: Clean up and reformat. Remove unused code.
227
3e890047
GK
2282001-06-14 Geoffrey Keating <geoffk@redhat.com>
229
230 * cgen.h (cgen_keyword): Add nonalpha_chars field.
231
d1cf510e
NC
2322001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
233
234 * mips.h (CPU_R12000): Define.
235
e281c457
JH
2362001-05-23 John Healy <jhealy@redhat.com>
237
238 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 239
aa5f19f2
NC
2402001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
241
242 * mips.h (INSN_ISA_MASK): Define.
243
67d6227d
AM
2442001-05-12 Alan Modra <amodra@one.net.au>
245
246 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
247 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
248 and use InvMem as these insns must have register operands.
249
992aaec9
AM
2502001-05-04 Alan Modra <amodra@one.net.au>
251
252 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
253 and pextrw to swap reg/rm assignments.
254
4ef7f0bf
HPN
2552001-04-05 Hans-Peter Nilsson <hp@axis.com>
256
257 * cris.h (enum cris_insn_version_usage): Correct comment for
258 cris_ver_v3p.
259
0f17484f
AM
2602001-03-24 Alan Modra <alan@linuxcare.com.au>
261
262 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
263 Add InvMem to first operand of "maskmovdqu".
264
7ccb5238
HPN
2652001-03-22 Hans-Peter Nilsson <hp@axis.com>
266
267 * cris.h (ADD_PC_INCR_OPCODE): New macro.
268
361bfa20
KH
2692001-03-21 Kazu Hirata <kazu@hxi.com>
270
271 * h8300.h: Fix formatting.
272
87890af0
AM
2732001-03-22 Alan Modra <alan@linuxcare.com.au>
274
275 * i386.h (i386_optab): Add paddq, psubq.
276
2e98d2de
AM
2772001-03-19 Alan Modra <alan@linuxcare.com.au>
278
279 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
280
80a523c2
NC
2812001-02-28 Igor Shevlyakov <igor@windriver.com>
282
283 * m68k.h: new defines for Coldfire V4. Update mcf to know
284 about mcf5407.
285
e135f41b
NC
2862001-02-18 lars brinkhoff <lars@nocrew.org>
287
288 * pdp11.h: New file.
289
2902001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
291
292 * i386.h (i386_optab): SSE integer converison instructions have
293 64bit versions on x86-64.
294
8eaec934
NC
2952001-02-10 Nick Clifton <nickc@redhat.com>
296
297 * mips.h: Remove extraneous whitespace. Formating change to allow
298 for future contribution.
299
a85d7ed0
NC
3002001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
301
302 * s390.h: New file.
303
0715dc88
PM
3042001-02-02 Patrick Macdonald <patrickm@redhat.com>
305
306 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
307 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
308 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
309
296bc568
AM
3102001-01-24 Karsten Keil <kkeil@suse.de>
311
312 * i386.h (i386_optab): Fix swapgs
313
1328dc98
AM
3142001-01-14 Alan Modra <alan@linuxcare.com.au>
315
316 * hppa.h: Describe new '<' and '>' operand types, and tidy
317 existing comments.
318 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
319 Remove duplicate "ldw j(s,b),x". Sort some entries.
320
e135f41b 3212001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
322
323 * i386.h (i386_optab): Fix pusha and ret templates.
324
0d2bcfaf
NC
3252001-01-11 Peter Targett <peter.targett@arccores.com>
326
327 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
328 definitions for masking cpu type.
329 (arc_ext_operand_value) New structure for storing extended
330 operands.
331 (ARC_OPERAND_*) Flags for operand values.
332
3332001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
334
335 * i386.h (pinsrw): Add.
336 (pshufw): Remove.
337 (cvttpd2dq): Fix operands.
338 (cvttps2dq): Likewise.
339 (movq2q): Rename to movdq2q.
340
079966a8
AM
3412001-01-10 Richard Schaal <richard.schaal@intel.com>
342
343 * i386.h: Correct movnti instruction.
344
8c1f9e76
JJ
3452001-01-09 Jeff Johnston <jjohnstn@redhat.com>
346
347 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
348 of operands (unsigned char or unsigned short).
349 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
350 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
351
0d2bcfaf 3522001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
353
354 * i386.h (i386_optab): Make [sml]fence template to use immext field.
355
0d2bcfaf 3562001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
357
358 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
359 introduced by Pentium4
360
0d2bcfaf 3612000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
362
363 * i386.h (i386_optab): Add "rex*" instructions;
364 add swapgs; disable jmp/call far direct instructions for
365 64bit mode; add syscall and sysret; disable registers for 0xc6
366 template. Add 'q' suffixes to extendable instructions, disable
079966a8 367 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
368 (i386_regtab): Add extended registers.
369 (*Suf): Add No_qSuf.
370 (q_Suf, wlq_Suf, bwlq_Suf): New.
371
0d2bcfaf 3722000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
373
374 * i386.h (i386_optab): Replace "Imm" with "EncImm".
375 (i386_regtab): Add flags field.
d83c6548 376
bf40d919
NC
3772000-12-12 Nick Clifton <nickc@redhat.com>
378
379 * mips.h: Fix formatting.
380
4372b673
NC
3812000-12-01 Chris Demetriou <cgd@sibyte.com>
382
383 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
384 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
385 OP_*_SYSCALL definitions.
386 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
387 19 bit wait codes.
388 (MIPS operand specifier comments): Remove 'm', add 'U' and
389 'J', and update the meaning of 'B' so that it's more general.
390
e7af610e
NC
391 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
392 INSN_ISA5): Renumber, redefine to mean the ISA at which the
393 instruction was added.
394 (INSN_ISA32): New constant.
395 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
396 Renumber to avoid new and/or renumbered INSN_* constants.
397 (INSN_MIPS32): Delete.
398 (ISA_UNKNOWN): New constant to indicate unknown ISA.
399 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
400 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 401 constants available at that ISA level.
e7af610e
NC
402 (CPU_UNKNOWN): New constant to indicate unknown CPU.
403 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
404 define it with a unique value.
405 (OPCODE_IS_MEMBER): Update for new ISA membership-related
406 constant meanings.
407
84ea6cf2 408 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 409 definitions.
84ea6cf2 410
c6c98b38
NC
411 * mips.h (CPU_SB1): New constant.
412
19f7b010
JJ
4132000-10-20 Jakub Jelinek <jakub@redhat.com>
414
415 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
416 Note that '3' is used for siam operand.
417
139368c9
JW
4182000-09-22 Jim Wilson <wilson@cygnus.com>
419
420 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
421
156c2f8b 4222000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 423
156c2f8b
NC
424 * mips.h: Use defines instead of hard-coded processor numbers.
425 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 426 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC
427 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
428 CPU_4KC, CPU_4KM, CPU_4KP): Define..
429 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 430 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 431 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ
432 Add 'P' to used characters.
433 Use 'H' for coprocessor select field.
156c2f8b 434 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ
435 Document new arg characters and add to used characters.
436 (INSN_MIPS32): New define for MIPS32 extensions.
437 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 438
3c5ce02e
AM
4392000-09-05 Alan Modra <alan@linuxcare.com.au>
440
441 * hppa.h: Mention cz completer.
442
50b81f19
JW
4432000-08-16 Jim Wilson <wilson@cygnus.com>
444
445 * ia64.h (IA64_OPCODE_POSTINC): New.
446
fc29466d
L
4472000-08-15 H.J. Lu <hjl@gnu.org>
448
449 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
450 IgnoreSize change.
451
4f1d9bd8
NC
4522000-08-08 Jason Eckhardt <jle@cygnus.com>
453
454 * i860.h: Small formatting adjustments.
455
45ee1401
DC
4562000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
457
458 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
459 Move related opcodes closer to each other.
460 Minor changes in comments, list undefined opcodes.
461
9d551405
DB
4622000-07-26 Dave Brolley <brolley@redhat.com>
463
464 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
465
4f1d9bd8
NC
4662000-07-22 Jason Eckhardt <jle@cygnus.com>
467
468 * i860.h (btne, bte, bla): Changed these opcodes
469 to use sbroff ('r') instead of split16 ('s').
470 (J, K, L, M): New operand types for 16-bit aligned fields.
471 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
472 use I, J, K, L, M instead of just I.
473 (T, U): New operand types for split 16-bit aligned fields.
474 (st.x): Changed these opcodes to use S, T, U instead of just S.
475 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
476 exist on the i860.
477 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
478 (pfeq.ss, pfeq.dd): New opcodes.
479 (st.s): Fixed incorrect mask bits.
480 (fmlow): Fixed incorrect mask bits.
481 (fzchkl, pfzchkl): Fixed incorrect mask bits.
482 (faddz, pfaddz): Fixed incorrect mask bits.
483 (form, pform): Fixed incorrect mask bits.
484 (pfld.l): Fixed incorrect mask bits.
485 (fst.q): Fixed incorrect mask bits.
486 (all floating point opcodes): Fixed incorrect mask bits for
487 handling of dual bit.
488
c8488617
HPN
4892000-07-20 Hans-Peter Nilsson <hp@axis.com>
490
491 cris.h: New file.
492
65aa24b6
NC
4932000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
494
495 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
496 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
497 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
498 (AVR_ISA_M83): Define for ATmega83, ATmega85.
499 (espm): Remove, because ESPM removed in databook update.
500 (eicall, eijmp): Move to the end of opcode table.
501
60bcf0fa
NC
5022000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
503
504 * m68hc11.h: New file for support of Motorola 68hc11.
505
60a2978a
DC
506Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
507
508 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
509
68ab2dd9
DC
510Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
511
512 * avr.h: New file with AVR opcodes.
513
f0662e27
DL
514Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
515
516 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
517
b722f2be
AM
5182000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
519
520 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
521
f9e0cf0b
AM
5222000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
523
524 * i386.h: Use sl_FP, not sl_Suf for fild.
525
f660ee8b
FCE
5262000-05-16 Frank Ch. Eigler <fche@redhat.com>
527
528 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
529 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
530 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
531 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
532
558b0a60
AM
5332000-05-13 Alan Modra <alan@linuxcare.com.au>,
534
535 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
536
e413e4e9
AM
5372000-05-13 Alan Modra <alan@linuxcare.com.au>,
538 Alexander Sokolov <robocop@netlink.ru>
539
540 * i386.h (i386_optab): Add cpu_flags for all instructions.
541
5422000-05-13 Alan Modra <alan@linuxcare.com.au>
543
544 From Gavin Romig-Koch <gavin@cygnus.com>
545 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
546
5c84d377
TW
5472000-05-04 Timothy Wall <twall@cygnus.com>
548
549 * tic54x.h: New.
550
966f959b
C
5512000-05-03 J.T. Conklin <jtc@redback.com>
552
553 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
554 (PPC_OPERAND_VR): New operand flag for vector registers.
555
c5d05dbb
JL
5562000-05-01 Kazu Hirata <kazu@hxi.com>
557
558 * h8300.h (EOP): Add missing initializer.
559
a7fba0e0
JL
560Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
561
562 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
563 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
564 New operand types l,y,&,fe,fE,fx added to support above forms.
565 (pa_opcodes): Replaced usage of 'x' as source/target for
566 floating point double-word loads/stores with 'fx'.
567
800eeca4
JW
568Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
569 David Mosberger <davidm@hpl.hp.com>
570 Timothy Wall <twall@cygnus.com>
571 Jim Wilson <wilson@cygnus.com>
572
573 * ia64.h: New file.
574
ba23e138
NC
5752000-03-27 Nick Clifton <nickc@cygnus.com>
576
577 * d30v.h (SHORT_A1): Fix value.
578 (SHORT_AR): Renumber so that it is at the end of the list of short
579 instructions, not the end of the list of long instructions.
580
d0b47220
AM
5812000-03-26 Alan Modra <alan@linuxcare.com>
582
583 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
584 problem isn't really specific to Unixware.
585 (OLDGCC_COMPAT): Define.
586 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
587 destination %st(0).
588 Fix lots of comments.
589
866afedc
NC
5902000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
591
592 * d30v.h:
593 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
594 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
595 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
596 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
597 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
598 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
599 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
600
cc5ca5ce
AM
6012000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
602
603 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
604 fistpd without suffix.
605
68e324a2
NC
6062000-02-24 Nick Clifton <nickc@cygnus.com>
607
608 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
609 'signed_overflow_ok_p'.
610 Delete prototypes for cgen_set_flags() and cgen_get_flags().
611
60f036a2
AH
6122000-02-24 Andrew Haley <aph@cygnus.com>
613
614 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
615 (CGEN_CPU_TABLE): flags: new field.
616 Add prototypes for new functions.
d83c6548 617
9b9b5cd4
AM
6182000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
619
620 * i386.h: Add some more UNIXWARE_COMPAT comments.
621
5b93d8bb
AM
6222000-02-23 Linas Vepstas <linas@linas.org>
623
624 * i370.h: New file.
625
4f1d9bd8
NC
6262000-02-22 Chandra Chavva <cchavva@cygnus.com>
627
628 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
629 cannot be combined in parallel with ADD/SUBppp.
630
87f398dd
AH
6312000-02-22 Andrew Haley <aph@cygnus.com>
632
633 * mips.h: (OPCODE_IS_MEMBER): Add comment.
634
367c01af
AH
6351999-12-30 Andrew Haley <aph@cygnus.com>
636
9a1e79ca
AH
637 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
638 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
639 insns.
367c01af 640
add0c677
AM
6412000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
642
643 * i386.h: Qualify intel mode far call and jmp with x_Suf.
644
3138f287
AM
6451999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
646
647 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
648 indirect jumps and calls. Add FF/3 call for intel mode.
649
ccecd07b
JL
650Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
651
652 * mn10300.h: Add new operand types. Add new instruction formats.
653
b37e19e9
JL
654Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
655
656 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
657 instruction.
658
5fce5ddf
GRK
6591999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
660
661 * mips.h (INSN_ISA5): New.
662
2bd7f1f3
GRK
6631999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
664
665 * mips.h (OPCODE_IS_MEMBER): New.
666
4df2b5c5
NC
6671999-10-29 Nick Clifton <nickc@cygnus.com>
668
669 * d30v.h (SHORT_AR): Define.
670
446a06c9
MM
6711999-10-18 Michael Meissner <meissner@cygnus.com>
672
673 * alpha.h (alpha_num_opcodes): Convert to unsigned.
674 (alpha_num_operands): Ditto.
675
eca04c6a
JL
676Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
677
678 * hppa.h (pa_opcodes): Add load and store cache control to
679 instructions. Add ordered access load and store.
680
681 * hppa.h (pa_opcode): Add new entries for addb and addib.
682
683 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
684
685 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
686
c43185de
DN
687Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
688
689 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
690
ec3533da
JL
691Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
692
390f858d
JL
693 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
694 and "be" using completer prefixes.
695
8c47ebd9
JL
696 * hppa.h (pa_opcodes): Add initializers to silence compiler.
697
ec3533da
JL
698 * hppa.h: Update comments about character usage.
699
18369bea
JL
700Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
701
702 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
703 up the new fstw & bve instructions.
704
c36efdd2
JL
705Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
706
d3ffb032
JL
707 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
708 instructions.
709
c49ec3da
JL
710 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
711
5d2e7ecc
JL
712 * hppa.h (pa_opcodes): Add long offset double word load/store
713 instructions.
714
6397d1a2
JL
715 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
716 stores.
717
142f0fe0
JL
718 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
719
f5a68b45
JL
720 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
721
8235801e
JL
722 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
723
35184366
JL
724 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
725
f0bfde5e
JL
726 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
727
27bbbb58
JL
728 * hppa.h (pa_opcodes): Add support for "b,l".
729
c36efdd2
JL
730 * hppa.h (pa_opcodes): Add support for "b,gate".
731
f2727d04
JL
732Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
733
9392fb11 734 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 735 in xmpyu.
9392fb11 736
e0c52e99
JL
737 * hppa.h (pa_opcodes): Fix mask for probe and probei.
738
f2727d04
JL
739 * hppa.h (pa_opcodes): Fix mask for depwi.
740
52d836e2
JL
741Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
742
743 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
744 an explicit output argument.
745
90765e3a
JL
746Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
747
748 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
749 Add a few PA2.0 loads and store variants.
750
8340b17f
ILT
7511999-09-04 Steve Chamberlain <sac@pobox.com>
752
753 * pj.h: New file.
754
5f47d35b
AM
7551999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
756
757 * i386.h (i386_regtab): Move %st to top of table, and split off
758 other fp reg entries.
759 (i386_float_regtab): To here.
760
1c143202
JL
761Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
762
7d8fdb64
JL
763 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
764 by 'f'.
765
90927b9c
JL
766 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
767 Add supporting args.
768
1d16bf9c
JL
769 * hppa.h: Document new completers and args.
770 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
771 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
772 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
773 pmenb and pmdis.
774
96226a68
JL
775 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
776 hshr, hsub, mixh, mixw, permh.
777
5d4ba527
JL
778 * hppa.h (pa_opcodes): Change completers in instructions to
779 use 'c' prefix.
780
e9fc28c6
JL
781 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
782 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
783
1c143202
JL
784 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
785 fnegabs to use 'I' instead of 'F'.
786
9e525108
AM
7871999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
788
789 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
790 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
791 Alphabetically sort PIII insns.
792
e8da1bf1
DE
793Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
794
795 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
796
7d627258
JL
797Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
798
5696871a
JL
799 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
800 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
801
7d627258
JL
802 * hppa.h: Document 64 bit condition completers.
803
c5e52916
JL
804Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
805
806 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
807
eecb386c
AM
8081999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
809
810 * i386.h (i386_optab): Add DefaultSize modifier to all insns
811 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
812 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
813
88a380f3
JL
814Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
815 Jeff Law <law@cygnus.com>
816
817 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
818
819 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 820
d83c6548 821 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL
822 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
823
145cf1f0
AM
8241999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
825
826 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
827
73826640
JL
828Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
829
830 * hppa.h (struct pa_opcode): Add new field "flags".
831 (FLAGS_STRICT): Define.
832
b65db252
JL
833Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
834 Jeff Law <law@cygnus.com>
835
f7fc668b
JL
836 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
837
838 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 839
10084519
AM
8401999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
841
842 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
843 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
844 flag to fcomi and friends.
845
cd8a80ba
JL
846Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
847
848 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 849 integer logical instructions.
cd8a80ba 850
1fca749b
ILT
8511999-05-28 Linus Nordberg <linus.nordberg@canit.se>
852
853 * m68k.h: Document new formats `E', `G', `H' and new places `N',
854 `n', `o'.
855
856 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
857 and new places `m', `M', `h'.
858
aa008907
JL
859Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
860
861 * hppa.h (pa_opcodes): Add several processor specific system
862 instructions.
863
e26b85f0
JL
864Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
865
d83c6548 866 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL
867 "addb", and "addib" to be used by the disassembler.
868
c608c12e
AM
8691999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
870
871 * i386.h (ReverseModrm): Remove all occurences.
872 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
873 movmskps, pextrw, pmovmskb, maskmovq.
874 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
875 ignore the data size prefix.
876
877 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
878 Mostly stolen from Doug Ledford <dledford@redhat.com>
879
45c18104
RH
880Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
881
882 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
883
252b5132
RH
8841999-04-14 Doug Evans <devans@casey.cygnus.com>
885
886 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
887 (CGEN_ATTR_TYPE): Update.
888 (CGEN_ATTR_MASK): Number booleans starting at 0.
889 (CGEN_ATTR_VALUE): Update.
890 (CGEN_INSN_ATTR): Update.
891
892Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
893
894 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
895 instructions.
896
897Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
898
899 * hppa.h (bb, bvb): Tweak opcode/mask.
900
901
9021999-03-22 Doug Evans <devans@casey.cygnus.com>
903
904 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
905 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
906 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
907 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
908 Delete member max_insn_size.
909 (enum cgen_cpu_open_arg): New enum.
910 (cpu_open): Update prototype.
911 (cpu_open_1): Declare.
912 (cgen_set_cpu): Delete.
913
9141999-03-11 Doug Evans <devans@casey.cygnus.com>
915
916 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
917 (CGEN_OPERAND_NIL): New macro.
918 (CGEN_OPERAND): New member `type'.
919 (@arch@_cgen_operand_table): Delete decl.
920 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
921 (CGEN_OPERAND_TABLE): New struct.
922 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
923 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
924 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
925 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
926 {get,set}_{int,vma}_operand.
927 (@arch@_cgen_cpu_open): New arg `isa'.
928 (cgen_set_cpu): Ditto.
929
930Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
931
932 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
933
9341999-02-25 Doug Evans <devans@casey.cygnus.com>
935
936 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
937 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
938 enum cgen_hw_type.
939 (CGEN_HW_TABLE): New struct.
940 (hw_table): Delete declaration.
941 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
942 to table entry to enum.
943 (CGEN_OPINST): Ditto.
944 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
945
946Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
947
948 * alpha.h (AXP_OPCODE_EV6): New.
949 (AXP_OPCODE_NOPAL): Include it.
950
9511999-02-09 Doug Evans <devans@casey.cygnus.com>
952
953 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
954 All uses updated. New members int_insn_p, max_insn_size,
955 parse_operand,insert_operand,extract_operand,print_operand,
956 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
957 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
958 extract_handlers,print_handlers.
959 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
960 (CGEN_ATTR_BOOL_OFFSET): New macro.
961 (CGEN_ATTR_MASK): Subtract it to compute bit number.
962 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
963 (cgen_opcode_handler): Renamed from cgen_base.
964 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
965 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
966 all uses updated.
967 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
968 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
969 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
970 (CGEN_OPCODE,CGEN_IBASE): New types.
971 (CGEN_INSN): Rewrite.
972 (CGEN_{ASM,DIS}_HASH*): Delete.
973 (init_opcode_table,init_ibld_table): Declare.
974 (CGEN_INSN_ATTR): New type.
975
976Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 977
252b5132
RH
978 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
979 (x_FP, d_FP, dls_FP, sldx_FP): Define.
980 Change *Suf definitions to include x and d suffixes.
981 (movsx): Use w_Suf and b_Suf.
982 (movzx): Likewise.
983 (movs): Use bwld_Suf.
984 (fld): Change ordering. Use sld_FP.
985 (fild): Add Intel Syntax equivalent of fildq.
986 (fst): Use sld_FP.
987 (fist): Use sld_FP.
988 (fstp): Use sld_FP. Add x_FP version.
989 (fistp): LLongMem version for Intel Syntax.
990 (fcom, fcomp): Use sld_FP.
991 (fadd, fiadd, fsub): Use sld_FP.
992 (fsubr): Use sld_FP.
993 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
994
9951999-01-27 Doug Evans <devans@casey.cygnus.com>
996
997 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
998 CGEN_MODE_UINT.
999
e135f41b 10001999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
1001
1002 * hppa.h (bv): Fix mask.
1003
10041999-01-05 Doug Evans <devans@casey.cygnus.com>
1005
1006 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
1007 (CGEN_ATTR): Use it.
1008 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
1009 (CGEN_ATTR_TABLE): New member dfault.
1010
10111998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
1012
1013 * mips.h (MIPS16_INSN_BRANCH): New.
1014
1015Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
1016
1017 The following is part of a change made by Edith Epstein
d83c6548
AJ
1018 <eepstein@sophia.cygnus.com> as part of a project to merge in
1019 changes by HP; HP did not create ChangeLog entries.
252b5132
RH
1020
1021 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 1022 after.
252b5132
RH
1023
1024Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
1025
1026 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 1027 status word instructions.
252b5132
RH
1028
10291998-11-30 Doug Evans <devans@casey.cygnus.com>
1030
1031 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
1032 (struct cgen_keyword_entry): Ditto.
1033 (struct cgen_operand): Ditto.
1034 (CGEN_IFLD): New typedef, with associated access macros.
1035 (CGEN_IFMT): New typedef, with associated access macros.
1036 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
1037 (CGEN_IVALUE): New typedef.
1038 (struct cgen_insn): Delete const on syntax,attrs members.
1039 `format' now points to format data. Type of `value' is now
1040 CGEN_IVALUE.
1041 (struct cgen_opcode_table): New member ifld_table.
1042
10431998-11-18 Doug Evans <devans@casey.cygnus.com>
1044
1045 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
1046 (CGEN_OPERAND_INSTANCE): New member `attrs'.
1047 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
1048 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
1049 (cgen_opcode_table): Update type of dis_hash fn.
1050 (extract_operand): Update type of `insn_value' arg.
1051
1052Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
1053
1054 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
1055
1056Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
1057
1058 * mips.h (INSN_MULT): Added.
1059
1060Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1061
1062 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
1063
1064Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
1065
1066 * cgen.h (CGEN_INSN_INT): New typedef.
1067 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
1068 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
1069 (CGEN_INSN_BYTES_PTR): New typedef.
1070 (CGEN_EXTRACT_INFO): New typedef.
1071 (cgen_insert_fn,cgen_extract_fn): Update.
1072 (cgen_opcode_table): New member `insn_endian'.
1073 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
1074 (insert_operand,extract_operand): Update.
1075 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
1076
1077Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
1078
1079 * cgen.h (CGEN_ATTR_BOOLS): New macro.
1080 (struct CGEN_HW_ENTRY): New member `attrs'.
1081 (CGEN_HW_ATTR): New macro.
1082 (struct CGEN_OPERAND_INSTANCE): New member `name'.
1083 (CGEN_INSN_INVALID_P): New macro.
1084
1085Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
1086
1087 * hppa.h: Add "fid".
d83c6548 1088
252b5132
RH
1089Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1090
1091 From Robert Andrew Dale <rob@nb.net>
1092 * i386.h (i386_optab): Add AMD 3DNow! instructions.
1093 (AMD_3DNOW_OPCODE): Define.
1094
1095Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
1096
1097 * d30v.h (EITHER_BUT_PREFER_MU): Define.
1098
1099Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
1100
1101 * cgen.h (cgen_insn): #if 0 out element `cdx'.
1102
1103Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
1104
1105 Move all global state data into opcode table struct, and treat
1106 opcode table as something that is "opened/closed".
1107 * cgen.h (CGEN_OPCODE_DESC): New type.
1108 (all fns): New first arg of opcode table descriptor.
1109 (cgen_set_parse_operand_fn): Add prototype.
1110 (cgen_current_machine,cgen_current_endian): Delete.
1111 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
1112 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
1113 dis_hash_table,dis_hash_table_entries.
1114 (opcode_open,opcode_close): Add prototypes.
1115
1116 * cgen.h (cgen_insn): New element `cdx'.
1117
1118Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
1119
1120 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
1121
1122Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
1123
1124 * mn10300.h: Add "no_match_operands" field for instructions.
1125 (MN10300_MAX_OPERANDS): Define.
1126
1127Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
1128
1129 * cgen.h (cgen_macro_insn_count): Declare.
1130
1131Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
1132
1133 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
1134 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
1135 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
1136 set_{int,vma}_operand.
1137
1138Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
1139
1140 * mn10300.h: Add "machine" field for instructions.
1141 (MN103, AM30): Define machine types.
d83c6548 1142
252b5132
RH
1143Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1144
1145 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
1146
11471998-06-18 Ulrich Drepper <drepper@cygnus.com>
1148
1149 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
1150
1151Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1152
1153 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
1154 and ud2b.
1155 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
1156 those that happen to be implemented on pentiums.
1157
1158Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1159
1160 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
1161 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
1162 with Size16|IgnoreSize or Size32|IgnoreSize.
1163
1164Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1165
1166 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
1167 (REPE): Rename to REPE_PREFIX_OPCODE.
1168 (i386_regtab_end): Remove.
1169 (i386_prefixtab, i386_prefixtab_end): Remove.
1170 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
1171 of md_begin.
1172 (MAX_OPCODE_SIZE): Define.
1173 (i386_optab_end): Remove.
1174 (sl_Suf): Define.
1175 (sl_FP): Use sl_Suf.
1176
1177 * i386.h (i386_optab): Allow 16 bit displacement for `mov
1178 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
1179 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
1180 data32, dword, and adword prefixes.
1181 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
1182 regs.
1183
1184Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1185
1186 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
1187
1188 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
1189 register operands, because this is a common idiom. Flag them with
1190 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
1191 fdivrp because gcc erroneously generates them. Also flag with a
1192 warning.
1193
1194 * i386.h: Add suffix modifiers to most insns, and tighter operand
1195 checks in some cases. Fix a number of UnixWare compatibility
1196 issues with float insns. Merge some floating point opcodes, using
1197 new FloatMF modifier.
1198 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1199 consistency.
1200
1201 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1202 IgnoreDataSize where appropriate.
1203
1204Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1205
1206 * i386.h: (one_byte_segment_defaults): Remove.
1207 (two_byte_segment_defaults): Remove.
1208 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1209
1210Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1211
1212 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1213 (cgen_hw_lookup_by_num): Declare.
1214
1215Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1216
1217 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1218 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1219
1220Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1221
1222 * cgen.h (cgen_asm_init_parse): Delete.
1223 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1224 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1225
1226Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1227
1228 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1229 (cgen_asm_finish_insn): Update prototype.
1230 (cgen_insn): New members num, data.
1231 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1232 dis_hash, dis_hash_table_size moved to ...
1233 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1234 All uses updated. New members asm_hash_p, dis_hash_p.
1235 (CGEN_MINSN_EXPANSION): New struct.
1236 (cgen_expand_macro_insn): Declare.
1237 (cgen_macro_insn_count): Declare.
1238 (get_insn_operands): Update prototype.
1239 (lookup_get_insn_operands): Declare.
1240
1241Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1242
1243 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1244 regKludge. Add operands types for string instructions.
1245
1246Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1247
1248 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1249 table.
1250
1251Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1252
1253 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1254 for `gettext'.
1255
1256Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1257
1258 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1259 Add IsString flag to string instructions.
1260 (IS_STRING): Don't define.
1261 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1262 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1263 (SS_PREFIX_OPCODE): Define.
1264
1265Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1266
1267 * i386.h: Revert March 24 patch; no more LinearAddress.
1268
1269Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1270
1271 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1272 instructions, and instead add FWait opcode modifier. Add short
1273 form of fldenv and fstenv.
1274 (FWAIT_OPCODE): Define.
1275
1276 * i386.h (i386_optab): Change second operand constraint of `mov
1277 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1278 allow legal instructions such as `movl %gs,%esi'
1279
1280Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1281
1282 * h8300.h: Various changes to fully bracket initializers.
1283
1284Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1285
1286 * i386.h: Set LinearAddress for lidt and lgdt.
1287
1288Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1289
1290 * cgen.h (CGEN_BOOL_ATTR): New macro.
1291
1292Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1293
1294 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1295
1296Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1297
1298 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1299 (cgen_insn): Record syntax and format entries here, rather than
1300 separately.
1301
1302Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1303
1304 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1305
1306Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1307
1308 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1309 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1310 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1311
1312Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1313
1314 * cgen.h (lookup_insn): New argument alias_p.
1315
1316Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1317
1318Fix rac to accept only a0:
1319 * d10v.h (OPERAND_ACC): Split into:
1320 (OPERAND_ACC0, OPERAND_ACC1) .
1321 (OPERAND_GPR): Define.
1322
1323Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1324
1325 * cgen.h (CGEN_FIELDS): Define here.
1326 (CGEN_HW_ENTRY): New member `type'.
1327 (hw_list): Delete decl.
1328 (enum cgen_mode): Declare.
1329 (CGEN_OPERAND): New member `hw'.
1330 (enum cgen_operand_instance_type): Declare.
1331 (CGEN_OPERAND_INSTANCE): New type.
1332 (CGEN_INSN): New member `operands'.
1333 (CGEN_OPCODE_DATA): Make hw_list const.
1334 (get_insn_operands,lookup_insn): Add prototypes for.
1335
1336Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1337
1338 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1339 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1340 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1341 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1342
1343Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1344
1345 * cgen.h: Correct typo in comment end marker.
1346
1347Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1348
1349 * tic30.h: New file.
1350
5a109b67 1351Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1352
1353 * cgen.h: Add prototypes for cgen_save_fixups(),
1354 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1355 of cgen_asm_finish_insn() to return a char *.
1356
1357Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1358
1359 * cgen.h: Formatting changes to improve readability.
1360
1361Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1362
1363 * cgen.h (*): Clean up pass over `struct foo' usage.
1364 (CGEN_ATTR): Make unsigned char.
1365 (CGEN_ATTR_TYPE): Update.
1366 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1367 (cgen_base): Move member `attrs' to cgen_insn.
1368 (CGEN_KEYWORD): New member `null_entry'.
1369 (CGEN_{SYNTAX,FORMAT}): New types.
1370 (cgen_insn): Format and syntax separated from each other.
1371
1372Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1373
1374 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1375 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1376 flags_{used,set} long.
1377 (d30v_operand): Make flags field long.
1378
1379Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1380
1381 * m68k.h: Fix comment describing operand types.
1382
1383Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1384
1385 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1386 everything else after down.
1387
1388Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1389
1390 * d10v.h (OPERAND_FLAG): Split into:
1391 (OPERAND_FFLAG, OPERAND_CFLAG) .
1392
1393Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1394
1395 * mips.h (struct mips_opcode): Changed comments to reflect new
1396 field usage.
1397
1398Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1399
1400 * mips.h: Added to comments a quick-ref list of all assigned
1401 operand type characters.
1402 (OP_{MASK,SH}_PERFREG): New macros.
1403
1404Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1405
1406 * sparc.h: Add '_' and '/' for v9a asr's.
1407 Patch from David Miller <davem@vger.rutgers.edu>
1408
1409Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1410
1411 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1412 area are not available in the base model (H8/300).
1413
1414Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1415
1416 * m68k.h: Remove documentation of ` operand specifier.
1417
1418Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1419
1420 * m68k.h: Document q and v operand specifiers.
1421
1422Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1423
1424 * v850.h (struct v850_opcode): Add processors field.
1425 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1426 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1427 (PROCESSOR_V850EA): New bit constants.
1428
1429Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1430
1431 Merge changes from Martin Hunt:
1432
1433 * d30v.h: Allow up to 64 control registers. Add
1434 SHORT_A5S format.
1435
1436 * d30v.h (LONG_Db): New form for delayed branches.
1437
1438 * d30v.h: (LONG_Db): New form for repeati.
1439
1440 * d30v.h (SHORT_D2B): New form.
1441
1442 * d30v.h (SHORT_A2): New form.
1443
1444 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1445 registers are used. Needed for VLIW optimization.
1446
1447Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1448
1449 * cgen.h: Move assembler interface section
1450 up so cgen_parse_operand_result is defined for cgen_parse_address.
1451 (cgen_parse_address): Update prototype.
1452
1453Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1454
1455 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1456
1457Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1458
1459 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1460 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1461 <paubert@iram.es>.
1462
1463 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1464 <paubert@iram.es>.
1465
1466 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1467 <paubert@iram.es>.
1468
1469 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1470 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1471
1472Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1473
1474 * v850.h (V850_NOT_R0): New flag.
1475
1476Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1477
1478 * v850.h (struct v850_opcode): Remove flags field.
1479
1480Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1481
1482 * v850.h (struct v850_opcode): Add flags field.
1483 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1484 fields.
1485 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1486 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1487
1488Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1489
1490 * arc.h: New file.
1491
1492Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1493
1494 * sparc.h (sparc_opcodes): Declare as const.
1495
1496Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1497
1498 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1499 uses single or double precision floating point resources.
1500 (INSN_NO_ISA, INSN_ISA1): Define.
1501 (cpu specific INSN macros): Tweak into bitmasks outside the range
1502 of INSN_ISA field.
1503
1504Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1505
1506 * i386.h: Fix pand opcode.
1507
1508Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1509
1510 * mips.h: Widen INSN_ISA and move it to a more convenient
1511 bit position. Add INSN_3900.
1512
1513Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1514
1515 * mips.h (struct mips_opcode): added new field membership.
1516
1517Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1518
1519 * i386.h (movd): only Reg32 is allowed.
1520
1521 * i386.h: add fcomp and ud2. From Wayne Scott
1522 <wscott@ichips.intel.com>.
1523
1524Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1525
1526 * i386.h: Add MMX instructions.
1527
1528Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1529
1530 * i386.h: Remove W modifier from conditional move instructions.
1531
1532Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1533
1534 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1535 with no arguments to match that generated by the UnixWare
1536 assembler.
1537
1538Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1539
1540 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1541 (cgen_parse_operand_fn): Declare.
1542 (cgen_init_parse_operand): Declare.
1543 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1544 new argument `want'.
1545 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1546 (enum cgen_parse_operand_type): New enum.
1547
1548Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1549
1550 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1551
1552Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1553
1554 * cgen.h: New file.
1555
1556Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1557
1558 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1559 fdivrp.
1560
1561Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1562
1563 * v850.h (extract): Make unsigned.
1564
1565Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1566
1567 * i386.h: Add iclr.
1568
1569Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1570
1571 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1572 take a direction bit.
1573
1574Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1575
1576 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1577
1578Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1579
1580 * sparc.h: Include <ansidecl.h>. Update function declarations to
1581 use prototypes, and to use const when appropriate.
1582
1583Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1584
1585 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1586
1587Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1588
1589 * d10v.h: Change pre_defined_registers to
1590 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1591
1592Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1593
1594 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1595 Change mips_opcodes from const array to a pointer,
1596 and change bfd_mips_num_opcodes from const int to int,
1597 so that we can increase the size of the mips opcodes table
1598 dynamically.
1599
1600Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1601
1602 * d30v.h (FLAG_X): Remove unused flag.
1603
1604Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1605
1606 * d30v.h: New file.
1607
1608Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1609
1610 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1611 (PDS_VALUE): Macro to access value field of predefined symbols.
1612 (tic80_next_predefined_symbol): Add prototype.
1613
1614Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1615
1616 * tic80.h (tic80_symbol_to_value): Change prototype to match
1617 change in function, added class parameter.
1618
1619Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1620
1621 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1622 endmask fields, which are somewhat weird in that 0 and 32 are
1623 treated exactly the same.
1624
1625Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1626
1627 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1628 rather than a constant that is 2**X. Reorder them to put bits for
1629 operands that have symbolic names in the upper bits, so they can
1630 be packed into an int where the lower bits contain the value that
1631 corresponds to that symbolic name.
1632 (predefined_symbo): Add struct.
1633 (tic80_predefined_symbols): Declare array of translations.
1634 (tic80_num_predefined_symbols): Declare size of that array.
1635 (tic80_value_to_symbol): Declare function.
1636 (tic80_symbol_to_value): Declare function.
1637
1638Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1639
1640 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1641
1642Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1643
1644 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1645 be the destination register.
1646
1647Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1648
1649 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1650 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1651 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1652 that the opcode can have two vector instructions in a single
1653 32 bit word and we have to encode/decode both.
1654
1655Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1656
1657 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1658 TIC80_OPERAND_RELATIVE for PC relative.
1659 (TIC80_OPERAND_BASEREL): New flag bit for register
1660 base relative.
1661
1662Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1663
1664 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1665
1666Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1667
1668 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1669 ":s" modifier for scaling.
1670
1671Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1672
1673 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1674 (TIC80_OPERAND_M_LI): Ditto
1675
1676Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1677
1678 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1679 (TIC80_OPERAND_CC): New define for condition code operand.
1680 (TIC80_OPERAND_CR): New define for control register operand.
1681
1682Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1683
1684 * tic80.h (struct tic80_opcode): Name changed.
1685 (struct tic80_opcode): Remove format field.
1686 (struct tic80_operand): Add insertion and extraction functions.
1687 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1688 correct ones.
1689 (FMT_*): Ditto.
1690
1691Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1692
1693 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1694 type IV instruction offsets.
1695
1696Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1697
1698 * tic80.h: New file.
1699
1700Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1701
1702 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1703
1704Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1705
1706 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1707 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1708 * v850.h: Fix comment, v850_operand not powerpc_operand.
1709
1710Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1711
1712 * mn10200.h: Flesh out structures and definitions needed by
1713 the mn10200 assembler & disassembler.
1714
1715Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1716
1717 * mips.h: Add mips16 definitions.
1718
1719Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1720
1721 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1722
1723Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1724
1725 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1726 (MN10300_OPERAND_MEMADDR): Define.
1727
1728Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1729
1730 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1731
1732Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1733
1734 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1735
1736Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1737
1738 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1739
1740Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1741
1742 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1743
1744Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1745
1746 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ
1747 negative to minimize problems with shared libraries. Organize
1748 instruction subsets by AMASK extensions and PALcode
1749 implementation.
252b5132
RH
1750 (struct alpha_operand): Move flags slot for better packing.
1751
1752Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1753
1754 * v850.h (V850_OPERAND_RELAX): New operand flag.
1755
1756Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1757
1758 * mn10300.h (FMT_*): Move operand format definitions
1759 here.
1760
1761Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1762
1763 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1764
1765Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1766
1767 * mn10300.h (mn10300_opcode): Add "format" field.
1768 (MN10300_OPERAND_*): Define.
1769
1770Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1771
1772 * mn10x00.h: Delete.
1773 * mn10200.h, mn10300.h: New files.
1774
1775Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1776
1777 * mn10x00.h: New file.
1778
1779Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1780
1781 * v850.h: Add new flag to indicate this instruction uses a PC
1782 displacement.
1783
1784Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1785
1786 * h8300.h (stmac): Add missing instruction.
1787
1788Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1789
1790 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1791 field.
1792
1793Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1794
1795 * v850.h (V850_OPERAND_EP): Define.
1796
1797 * v850.h (v850_opcode): Add size field.
1798
1799Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1800
1801 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1802 to functions used to handle unusual operand encoding.
252b5132 1803 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1804 V850_OPERAND_SIGNED): Defined.
252b5132
RH
1805
1806Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1807
1808 * v850.h (v850_operands): Add flags field.
1809 (OPERAND_REG, OPERAND_NUM): Defined.
1810
1811Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1812
1813 * v850.h: New file.
1814
1815Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1816
1817 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ
1818 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1819 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1820 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1821 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1822 Defined.
252b5132
RH
1823
1824Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1825
1826 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1827 a 3 bit space id instead of a 2 bit space id.
1828
1829Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1830
1831 * d10v.h: Add some additional defines to support the
d83c6548 1832 assembler in determining which operations can be done in parallel.
252b5132
RH
1833
1834Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1835
1836 * h8300.h (SN): Define.
1837 (eepmov.b): Renamed from "eepmov"
1838 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1839 with them.
1840
1841Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1842
1843 * d10v.h (OPERAND_SHIFT): New operand flag.
1844
1845Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1846
1847 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1848 signed numbers.
252b5132
RH
1849
1850Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1851
1852 * d10v.h (pd_reg): Define. Putting the definition here allows
1853 the assembler and disassembler to share the same struct.
1854
1855Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1856
1857 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1858 Williams <steve@icarus.com>.
1859
1860Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1861
1862 * d10v.h: New file.
1863
1864Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1865
1866 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1867
1868Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1869
d83c6548 1870 * m68k.h (mcf5200): New macro.
252b5132
RH
1871 Document names of coldfire control registers.
1872
1873Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1874
1875 * h8300.h (SRC_IN_DST): Define.
1876
1877 * h8300.h (UNOP3): Mark the register operand in this insn
1878 as a source operand, not a destination operand.
1879 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1880 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1881 register operand with SRC_IN_DST.
1882
1883Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1884
1885 * alpha.h: New file.
1886
1887Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1888
1889 * rs6k.h: Remove obsolete file.
1890
1891Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1892
1893 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1894 fdivp, and fdivrp. Add ffreep.
1895
1896Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1897
1898 * h8300.h: Reorder various #defines for readability.
1899 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1900 (BITOP): Accept additional (unused) argument. All callers changed.
1901 (EBITOP): Likewise.
1902 (O_LAST): Bump.
1903 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1904
1905 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1906 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1907 (BITOP, EBITOP): Handle new H8/S addressing modes for
1908 bit insns.
1909 (UNOP3): Handle new shift/rotate insns on the H8/S.
1910 (insns using exr): New instructions.
1911 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1912
1913Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1914
1915 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1916 was incorrect.
1917
1918Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1919
1920 * h8300.h (START): Remove.
1921 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1922 and mov.l insns that can be relaxed.
1923
1924Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1925
1926 * i386.h: Remove Abs32 from lcall.
1927
1928Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1929
1930 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1931 (SLCPOP): New macro.
1932 Mark X,Y opcode letters as in use.
1933
1934Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1935
1936 * sparc.h (F_FLOAT, F_FBR): Define.
1937
1938Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1939
1940 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1941 from all insns.
1942 (ABS8SRC,ABS8DST): Add ABS8MEM.
1943 (add.l): Fix reg+reg variant.
1944 (eepmov.w): Renamed from eepmovw.
1945 (ldc,stc): Fix many cases.
1946
1947Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1948
1949 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1950
1951Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1952
1953 * sparc.h (O): Mark operand letter as in use.
1954
1955Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1956
1957 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1958 Mark operand letters uU as in use.
1959
1960Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1961
1962 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1963 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1964 (SPARC_OPCODE_SUPPORTED): New macro.
1965 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1966 (F_NOTV9): Delete.
1967
1968Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1969
1970 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1971 declaration consistent with return type in definition.
1972
1973Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1974
1975 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1976
1977Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1978
1979 * i386.h (i386_regtab): Add 80486 test registers.
1980
1981Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1982
1983 * i960.h (I_HX): Define.
1984 (i960_opcodes): Add HX instruction.
1985
1986Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1987
1988 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1989 and fclex.
1990
1991Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1992
1993 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1994 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1995 (bfd_* defines): Delete.
1996 (sparc_opcode_archs): Replaces architecture_pname.
1997 (sparc_opcode_lookup_arch): Declare.
1998 (NUMOPCODES): Delete.
1999
2000Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
2001
2002 * sparc.h (enum sparc_architecture): Add v9a.
2003 (ARCHITECTURES_CONFLICT_P): Update.
2004
2005Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
2006
2007 * i386.h: Added Pentium Pro instructions.
2008
2009Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
2010
2011 * m68k.h: Document new 'W' operand place.
2012
2013Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
2014
2015 * hppa.h: Add lci and syncdma instructions.
2016
2017Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2018
2019 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 2020 instructions.
252b5132
RH
2021
2022Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
2023
2024 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
2025 assembler's -mcom and -many switches.
2026
2027Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
2028
2029 * i386.h: Fix cmpxchg8b extension opcode description.
2030
2031Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
2032
2033 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
2034 and register cr4.
2035
2036Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
2037
2038 * m68k.h: Change comment: split type P into types 0, 1 and 2.
2039
2040Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
2041
2042 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
2043
2044Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
2045
2046 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
2047
2048Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
2049
2050 * m68kmri.h: Remove.
2051
2052 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
2053 declarations. Remove F_ALIAS and flag field of struct
2054 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
2055 int. Make name and args fields of struct m68k_opcode const.
2056
2057Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
2058
2059 * sparc.h (F_NOTV9): Define.
2060
2061Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
2062
2063 * mips.h (INSN_4010): Define.
2064
2065Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2066
2067 * m68k.h (TBL1): Reverse sense of "round" argument in result.
2068
2069 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
2070 * m68k.h: Fix argument descriptions of coprocessor
2071 instructions to allow only alterable operands where appropriate.
2072 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
2073 (m68k_opcode_aliases): Add more aliases.
2074
2075Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2076
2077 * m68k.h: Added explcitly short-sized conditional branches, and a
2078 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
2079 svr4-based configurations.
2080
2081Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2082
2083 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
2084 * i386.h: added missing Data16/Data32 flags to a few instructions.
2085
2086Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
2087
2088 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
2089 (OP_MASK_BCC, OP_SH_BCC): Define.
2090 (OP_MASK_PREFX, OP_SH_PREFX): Define.
2091 (OP_MASK_CCC, OP_SH_CCC): Define.
2092 (INSN_READ_FPR_R): Define.
2093 (INSN_RFE): Delete.
2094
2095Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2096
2097 * m68k.h (enum m68k_architecture): Deleted.
2098 (struct m68k_opcode_alias): New type.
2099 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
2100 matching constraints, values and flags. As a side effect of this,
2101 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
2102 as I know were never used, now may need re-examining.
2103 (numopcodes): Now const.
2104 (m68k_opcode_aliases, numaliases): New variables.
2105 (endop): Deleted.
2106 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
2107 m68k_opcode_aliases; update declaration of m68k_opcodes.
2108
2109Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
2110
2111 * hppa.h (delay_type): Delete unused enumeration.
2112 (pa_opcode): Replace unused delayed field with an architecture
2113 field.
2114 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
2115
2116Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
2117
2118 * mips.h (INSN_ISA4): Define.
2119
2120Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
2121
2122 * mips.h (M_DLA_AB, M_DLI): Define.
2123
2124Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
2125
2126 * hppa.h (fstwx): Fix single-bit error.
2127
2128Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
2129
2130 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
2131
2132Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
2133
2134 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
2135 debug registers. From Charles Hannum (mycroft@netbsd.org).
2136
2137Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2138
2139 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
2140 i386 support:
2141 * i386.h (MOV_AX_DISP32): New macro.
2142 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
2143 of several call/return instructions.
2144 (ADDR_PREFIX_OPCODE): New macro.
2145
2146Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2147
2148 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
2149
4f1d9bd8
NC
2150 * vax.h (struct vot_wot, field `args'): Make it pointer to const
2151 char.
252b5132
RH
2152 (struct vot, field `name'): ditto.
2153
2154Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
2155
2156 * vax.h: Supply and properly group all values in end sentinel.
2157
2158Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
2159
2160 * mips.h (INSN_ISA, INSN_4650): Define.
2161
2162Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
2163
2164 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
2165 systems with a separate instruction and data cache, such as the
2166 29040, these instructions take an optional argument.
2167
2168Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2169
2170 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
2171 INSN_TRAP.
2172
2173Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
2174
2175 * mips.h (INSN_STORE_MEMORY): Define.
2176
2177Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2178
2179 * sparc.h: Document new operand type 'x'.
2180
2181Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2182
2183 * i960.h (I_CX2): New instruction category. It includes
2184 instructions available on Cx and Jx processors.
2185 (I_JX): New instruction category, for JX-only instructions.
2186 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
2187 Jx-only instructions, in I_JX category.
2188
2189Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2190
2191 * ns32k.h (endop): Made pointer const too.
2192
2193Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
2194
2195 * ns32k.h: Drop Q operand type as there is no correct use
2196 for it. Add I and Z operand types which allow better checking.
2197
2198Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2199
2200 * h8300.h (xor.l) :fix bit pattern.
2201 (L_2): New size of operand.
2202 (trapa): Use it.
2203
2204Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2205
2206 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2207
2208Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2209
2210 * sparc.h: Include v9 definitions.
2211
2212Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2213
2214 * m68k.h (m68060): Defined.
2215 (m68040up, mfloat, mmmu): Include it.
2216 (struct m68k_opcode): Widen `arch' field.
2217 (m68k_opcodes): Updated for M68060. Removed comments that were
2218 instructions commented out by "JF" years ago.
2219
2220Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2221
2222 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2223 add a one-bit `flags' field.
2224 (F_ALIAS): New macro.
2225
2226Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2227
2228 * h8300.h (dec, inc): Get encoding right.
2229
2230Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2231
2232 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2233 a flag instead.
2234 (PPC_OPERAND_SIGNED): Define.
2235 (PPC_OPERAND_SIGNOPT): Define.
2236
2237Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2238
2239 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2240 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2241
2242Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2243
2244 * i386.h: Reverse last change. It'll be handled in gas instead.
2245
2246Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2247
2248 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2249 slower on the 486 and used the implicit shift count despite the
2250 explicit operand. The one-operand form is still available to get
2251 the shorter form with the implicit shift count.
2252
2253Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2254
2255 * hppa.h: Fix typo in fstws arg string.
2256
2257Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2258
2259 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2260
2261Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2262
2263 * ppc.h (PPC_OPCODE_601): Define.
2264
2265Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2266
2267 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2268 (so we can determine valid completers for both addb and addb[tf].)
2269
2270 * hppa.h (xmpyu): No floating point format specifier for the
2271 xmpyu instruction.
2272
2273Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2274
2275 * ppc.h (PPC_OPERAND_NEXT): Define.
2276 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2277 (struct powerpc_macro): Define.
2278 (powerpc_macros, powerpc_num_macros): Declare.
2279
2280Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2281
2282 * ppc.h: New file. Header file for PowerPC opcode table.
2283
2284Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2285
2286 * hppa.h: More minor template fixes for sfu and copr (to allow
2287 for easier disassembly).
2288
2289 * hppa.h: Fix templates for all the sfu and copr instructions.
2290
2291Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2292
2293 * i386.h (push): Permit Imm16 operand too.
2294
2295Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2296
2297 * h8300.h (andc): Exists in base arch.
2298
2299Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2300
2301 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2302 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2303
2304Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2305
2306 * hppa.h: Add FP quadword store instructions.
2307
2308Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2309
2310 * mips.h: (M_J_A): Added.
2311 (M_LA): Removed.
2312
2313Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2314
2315 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2316 <mellon@pepper.ncd.com>.
2317
2318Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2319
2320 * hppa.h: Immediate field in probei instructions is unsigned,
2321 not low-sign extended.
2322
2323Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2324
2325 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2326
2327Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2328
2329 * i386.h: Add "fxch" without operand.
2330
2331Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2332
2333 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2334
2335Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2336
2337 * hppa.h: Add gfw and gfr to the opcode table.
2338
2339Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2340
2341 * m88k.h: extended to handle m88110.
2342
2343Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2344
2345 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2346 addresses.
2347
2348Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2349
2350 * i960.h (i960_opcodes): Properly bracket initializers.
2351
2352Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2353
2354 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2355
2356Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2357
2358 * m68k.h (two): Protect second argument with parentheses.
2359
2360Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2361
2362 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2363 Deleted old in/out instructions in "#if 0" section.
2364
2365Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2366
2367 * i386.h (i386_optab): Properly bracket initializers.
2368
2369Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2370
2371 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2372 Jeff Law, law@cs.utah.edu).
2373
2374Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2375
2376 * i386.h (lcall): Accept Imm32 operand also.
2377
2378Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2379
2380 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2381 (M_DABS): Added.
2382
2383Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2384
2385 * mips.h (INSN_*): Changed values. Removed unused definitions.
2386 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2387 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2388 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2389 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2390 (M_*): Added new values for r6000 and r4000 macros.
2391 (ANY_DELAY): Removed.
2392
2393Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2394
2395 * mips.h: Added M_LI_S and M_LI_SS.
2396
2397Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2398
2399 * h8300.h: Get some rare mov.bs correct.
2400
2401Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2402
2403 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2404 been included.
2405
2406Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2407
2408 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2409 jump instructions, for use in disassemblers.
2410
2411Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2412
2413 * m88k.h: Make bitfields just unsigned, not unsigned long or
2414 unsigned short.
2415
2416Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2417
2418 * hppa.h: New argument type 'y'. Use in various float instructions.
2419
2420Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2421
2422 * hppa.h (break): First immediate field is unsigned.
2423
2424 * hppa.h: Add rfir instruction.
2425
2426Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2427
2428 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2429
2430Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2431
2432 * mips.h: Reworked the hazard information somewhat, and fixed some
2433 bugs in the instruction hazard descriptions.
2434
2435Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2436
2437 * m88k.h: Corrected a couple of opcodes.
2438
2439Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2440
2441 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2442 new version includes instruction hazard information, but is
2443 otherwise reasonably similar.
2444
2445Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2446
2447 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2448
2449Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2450
2451 Patches from Jeff Law, law@cs.utah.edu:
2452 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2453 Make the tables be the same for the following instructions:
2454 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2455 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2456 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2457 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2458 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2459 "fcmp", and "ftest".
2460
2461 * hppa.h: Make new and old tables the same for "break", "mtctl",
2462 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2463 Fix typo in last patch. Collapse several #ifdefs into a
2464 single #ifdef.
2465
2466 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2467 of the comments up-to-date.
2468
2469 * hppa.h: Update "free list" of letters and update
2470 comments describing each letter's function.
2471
4f1d9bd8
NC
2472Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2473
2474 * h8300.h: Lots of little fixes for the h8/300h.
2475
2476Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2477
2478 Support for H8/300-H
2479 * h8300.h: Lots of new opcodes.
2480
252b5132
RH
2481Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2482
2483 * h8300.h: checkpoint, includes H8/300-H opcodes.
2484
2485Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2486
2487 * Patches from Jeffrey Law <law@cs.utah.edu>.
2488 * hppa.h: Rework single precision FP
2489 instructions so that they correctly disassemble code
2490 PA1.1 code.
2491
2492Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2493
2494 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2495 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2496
2497Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2498
2499 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2500 gdb will define it for now.
2501
2502Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2503
2504 * sparc.h: Don't end enumerator list with comma.
2505
2506Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2507
2508 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2509 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2510 ("bc2t"): Correct typo.
2511 ("[ls]wc[023]"): Use T rather than t.
2512 ("c[0123]"): Define general coprocessor instructions.
2513
2514Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2515
2516 * m68k.h: Move split point for gcc compilation more towards
2517 middle.
2518
2519Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2520
2521 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2522 simply wrong, ics, rfi, & rfsvc were missing).
2523 Add "a" to opr_ext for "bb". Doc fix.
2524
2525Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2526
2527 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2528 * mips.h: Add casts, to suppress warnings about shifting too much.
2529 * m68k.h: Document the placement code '9'.
2530
2531Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2532
2533 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2534 allows callers to break up the large initialized struct full of
2535 opcodes into two half-sized ones. This permits GCC to compile
2536 this module, since it takes exponential space for initializers.
2537 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2538
2539Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2540
2541 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2542 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2543 initialized structs in it.
2544
2545Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2546
2547 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2548 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2549 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2550
2551Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2552
2553 * mips.h: document "i" and "j" operands correctly.
2554
2555Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2556
2557 * mips.h: Removed endianness dependency.
2558
2559Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2560
2561 * h8300.h: include info on number of cycles per instruction.
2562
2563Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2564
2565 * hppa.h: Move handy aliases to the front. Fix masks for extract
2566 and deposit instructions.
2567
2568Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2569
2570 * i386.h: accept shld and shrd both with and without the shift
2571 count argument, which is always %cl.
2572
2573Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2574
2575 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2576 (one_byte_segment_defaults, two_byte_segment_defaults,
2577 i386_prefixtab_end): Ditto.
2578
2579Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2580
2581 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2582 for operand 2; from John Carr, jfc@dsg.dec.com.
2583
2584Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2585
2586 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2587 always use 16-bit offsets. Makes calculated-size jump tables
2588 feasible.
2589
2590Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2591
2592 * i386.h: Fix one-operand forms of in* and out* patterns.
2593
2594Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2595
2596 * m68k.h: Added CPU32 support.
2597
2598Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2599
2600 * mips.h (break): Disassemble the argument. Patch from
2601 jonathan@cs.stanford.edu (Jonathan Stone).
2602
2603Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2604
2605 * m68k.h: merged Motorola and MIT syntax.
2606
2607Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2608
2609 * m68k.h (pmove): make the tests less strict, the 68k book is
2610 wrong.
2611
2612Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2613
2614 * m68k.h (m68ec030): Defined as alias for 68030.
2615 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2616 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2617 them. Tightened description of "fmovex" to distinguish it from
2618 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2619 up descriptions that claimed versions were available for chips not
2620 supporting them. Added "pmovefd".
2621
2622Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2623
2624 * m68k.h: fix where the . goes in divull
2625
2626Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2627
2628 * m68k.h: the cas2 instruction is supposed to be written with
2629 indirection on the last two operands, which can be either data or
2630 address registers. Added a new operand type 'r' which accepts
2631 either register type. Added new cases for cas2l and cas2w which
2632 use them. Corrected masks for cas2 which failed to recognize use
2633 of address register.
2634
2635Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2636
2637 * m68k.h: Merged in patches (mostly m68040-specific) from
2638 Colin Smith <colin@wrs.com>.
2639
2640 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2641 base). Also cleaned up duplicates, re-ordered instructions for
2642 the sake of dis-assembling (so aliases come after standard names).
2643 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2644
2645Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2646
2647 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2648 all missing .s
2649
2650Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2651
2652 * sparc.h: Moved tables to BFD library.
2653
2654 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2655
2656Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2657
2658 * h8300.h: Finish filling in all the holes in the opcode table,
2659 so that the Lucid C compiler can digest this as well...
2660
2661Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2662
2663 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2664 Fix opcodes on various sizes of fild/fist instructions
2665 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2666 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2667
2668Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2669
2670 * h8300.h: Fill in all the holes in the opcode table so that the
2671 losing HPUX C compiler can digest this...
2672
2673Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2674
2675 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2676 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2677
2678Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2679
2680 * sparc.h: Add new architecture variant sparclite; add its scan
2681 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2682
2683Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2684
2685 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2686 fy@lucid.com).
2687
2688Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2689
2690 * rs6k.h: New version from IBM (Metin).
2691
2692Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2693
2694 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2695 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2696
2697Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2698
2699 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2700
2701Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2702
2703 * m68k.h (one, two): Cast macro args to unsigned to suppress
2704 complaints from compiler and lint about integer overflow during
2705 shift.
2706
2707Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2708
2709 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2710
2711Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2712
2713 * mips.h: Make bitfield layout depend on the HOST compiler,
2714 not on the TARGET system.
2715
2716Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2717
2718 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2719 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2720 <TRANLE@INTELLICORP.COM>.
2721
2722Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2723
2724 * h8300.h: turned op_type enum into #define list
2725
2726Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2727
2728 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2729 similar instructions -- they've been renamed to "fitoq", etc.
2730 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2731 number of arguments.
2732 * h8300.h: Remove extra ; which produces compiler warning.
2733
2734Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2735
2736 * sparc.h: fix opcode for tsubcctv.
2737
2738Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2739
2740 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2741
2742Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2743
2744 * sparc.h (nop): Made the 'lose' field be even tighter,
2745 so only a standard 'nop' is disassembled as a nop.
2746
2747Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2748
2749 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2750 disassembled as a nop.
2751
4f1d9bd8
NC
2752Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2753
2754 * m68k.h, sparc.h: ANSIfy enums.
2755
252b5132
RH
2756Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2757
2758 * sparc.h: fix a typo.
2759
2760Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2761
2762 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2763 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2764 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2765
2766\f
2767Local Variables:
2768version-control: never
2769End: