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Eliminate ARCH_NUM_REGS.
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
80a523c2
NC
12001-02-28 Igor Shevlyakov <igor@windriver.com>
2
3 * m68k.h: new defines for Coldfire V4. Update mcf to know
4 about mcf5407.
5
e135f41b
NC
62001-02-18 lars brinkhoff <lars@nocrew.org>
7
8 * pdp11.h: New file.
9
102001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
11
12 * i386.h (i386_optab): SSE integer converison instructions have
13 64bit versions on x86-64.
14
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152001-02-10 Nick Clifton <nickc@redhat.com>
16
17 * mips.h: Remove extraneous whitespace. Formating change to allow
18 for future contribution.
19
a85d7ed0
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202001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
21
22 * s390.h: New file.
23
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242001-02-02 Patrick Macdonald <patrickm@redhat.com>
25
26 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
27 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
28 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
29
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AM
302001-01-24 Karsten Keil <kkeil@suse.de>
31
32 * i386.h (i386_optab): Fix swapgs
33
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342001-01-14 Alan Modra <alan@linuxcare.com.au>
35
36 * hppa.h: Describe new '<' and '>' operand types, and tidy
37 existing comments.
38 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
39 Remove duplicate "ldw j(s,b),x". Sort some entries.
40
e135f41b 412001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
42
43 * i386.h (i386_optab): Fix pusha and ret templates.
44
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452001-01-11 Peter Targett <peter.targett@arccores.com>
46
47 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
48 definitions for masking cpu type.
49 (arc_ext_operand_value) New structure for storing extended
50 operands.
51 (ARC_OPERAND_*) Flags for operand values.
52
532001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
54
55 * i386.h (pinsrw): Add.
56 (pshufw): Remove.
57 (cvttpd2dq): Fix operands.
58 (cvttps2dq): Likewise.
59 (movq2q): Rename to movdq2q.
60
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612001-01-10 Richard Schaal <richard.schaal@intel.com>
62
63 * i386.h: Correct movnti instruction.
64
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652001-01-09 Jeff Johnston <jjohnstn@redhat.com>
66
67 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
68 of operands (unsigned char or unsigned short).
69 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
70 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
71
0d2bcfaf 722001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
73
74 * i386.h (i386_optab): Make [sml]fence template to use immext field.
75
0d2bcfaf 762001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
77
78 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
79 introduced by Pentium4
80
0d2bcfaf 812000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
82
83 * i386.h (i386_optab): Add "rex*" instructions;
84 add swapgs; disable jmp/call far direct instructions for
85 64bit mode; add syscall and sysret; disable registers for 0xc6
86 template. Add 'q' suffixes to extendable instructions, disable
079966a8 87 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
88 (i386_regtab): Add extended registers.
89 (*Suf): Add No_qSuf.
90 (q_Suf, wlq_Suf, bwlq_Suf): New.
91
0d2bcfaf 922000-12-20 Jan Hubicka <jh@suse.cz>
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JH
93
94 * i386.h (i386_optab): Replace "Imm" with "EncImm".
95 (i386_regtab): Add flags field.
96
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972000-12-12 Nick Clifton <nickc@redhat.com>
98
99 * mips.h: Fix formatting.
100
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1012000-12-01 Chris Demetriou <cgd@sibyte.com>
102
103 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
104 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
105 OP_*_SYSCALL definitions.
106 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
107 19 bit wait codes.
108 (MIPS operand specifier comments): Remove 'm', add 'U' and
109 'J', and update the meaning of 'B' so that it's more general.
110
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111 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
112 INSN_ISA5): Renumber, redefine to mean the ISA at which the
113 instruction was added.
114 (INSN_ISA32): New constant.
115 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
116 Renumber to avoid new and/or renumbered INSN_* constants.
117 (INSN_MIPS32): Delete.
118 (ISA_UNKNOWN): New constant to indicate unknown ISA.
119 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
120 ISA_MIPS32): New constants, defined to be the mask of INSN_*
121 constants available at that ISA level.
122 (CPU_UNKNOWN): New constant to indicate unknown CPU.
123 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
124 define it with a unique value.
125 (OPCODE_IS_MEMBER): Update for new ISA membership-related
126 constant meanings.
127
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128 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
129 definitions.
130
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131 * mips.h (CPU_SB1): New constant.
132
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1332000-10-20 Jakub Jelinek <jakub@redhat.com>
134
135 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
136 Note that '3' is used for siam operand.
137
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1382000-09-22 Jim Wilson <wilson@cygnus.com>
139
140 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
141
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1422000-09-13 Anders Norlander <anorland@acc.umu.se>
143
144 * mips.h: Use defines instead of hard-coded processor numbers.
145 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
146 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
147 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
148 CPU_4KC, CPU_4KM, CPU_4KP): Define..
149 (OPCODE_IS_MEMBER): Use new defines.
150 (OP_MASK_SEL, OP_SH_SEL): Define.
151 (OP_MASK_CODE20, OP_SH_CODE20): Define.
152 Add 'P' to used characters.
153 Use 'H' for coprocessor select field.
154 Use 'm' for 20 bit breakpoint code.
155 Document new arg characters and add to used characters.
156 (INSN_MIPS32): New define for MIPS32 extensions.
157 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
158
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1592000-09-05 Alan Modra <alan@linuxcare.com.au>
160
161 * hppa.h: Mention cz completer.
162
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1632000-08-16 Jim Wilson <wilson@cygnus.com>
164
165 * ia64.h (IA64_OPCODE_POSTINC): New.
166
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1672000-08-15 H.J. Lu <hjl@gnu.org>
168
169 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
170 IgnoreSize change.
171
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DC
1722000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
173
174 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
175 Move related opcodes closer to each other.
176 Minor changes in comments, list undefined opcodes.
177
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1782000-07-26 Dave Brolley <brolley@redhat.com>
179
180 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
181
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1822000-07-20 Hans-Peter Nilsson <hp@axis.com>
183
184 cris.h: New file.
185
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1862000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
187
188 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
189 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
190 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
191 (AVR_ISA_M83): Define for ATmega83, ATmega85.
192 (espm): Remove, because ESPM removed in databook update.
193 (eicall, eijmp): Move to the end of opcode table.
194
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1952000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
196
197 * m68hc11.h: New file for support of Motorola 68hc11.
198
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199Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
200
201 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
202
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203Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
204
205 * avr.h: New file with AVR opcodes.
206
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207Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
208
209 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
210
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AM
2112000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
212
213 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
214
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2152000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
216
217 * i386.h: Use sl_FP, not sl_Suf for fild.
218
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2192000-05-16 Frank Ch. Eigler <fche@redhat.com>
220
221 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
222 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
223 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
224 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
225
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2262000-05-13 Alan Modra <alan@linuxcare.com.au>,
227
228 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
229
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2302000-05-13 Alan Modra <alan@linuxcare.com.au>,
231 Alexander Sokolov <robocop@netlink.ru>
232
233 * i386.h (i386_optab): Add cpu_flags for all instructions.
234
2352000-05-13 Alan Modra <alan@linuxcare.com.au>
236
237 From Gavin Romig-Koch <gavin@cygnus.com>
238 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
239
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2402000-05-04 Timothy Wall <twall@cygnus.com>
241
242 * tic54x.h: New.
243
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2442000-05-03 J.T. Conklin <jtc@redback.com>
245
246 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
247 (PPC_OPERAND_VR): New operand flag for vector registers.
248
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2492000-05-01 Kazu Hirata <kazu@hxi.com>
250
251 * h8300.h (EOP): Add missing initializer.
252
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253Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
254
255 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
256 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
257 New operand types l,y,&,fe,fE,fx added to support above forms.
258 (pa_opcodes): Replaced usage of 'x' as source/target for
259 floating point double-word loads/stores with 'fx'.
260
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261Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
262 David Mosberger <davidm@hpl.hp.com>
263 Timothy Wall <twall@cygnus.com>
264 Jim Wilson <wilson@cygnus.com>
265
266 * ia64.h: New file.
267
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NC
2682000-03-27 Nick Clifton <nickc@cygnus.com>
269
270 * d30v.h (SHORT_A1): Fix value.
271 (SHORT_AR): Renumber so that it is at the end of the list of short
272 instructions, not the end of the list of long instructions.
273
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2742000-03-26 Alan Modra <alan@linuxcare.com>
275
276 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
277 problem isn't really specific to Unixware.
278 (OLDGCC_COMPAT): Define.
279 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
280 destination %st(0).
281 Fix lots of comments.
282
866afedc
NC
2832000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
284
285 * d30v.h:
286 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
287 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
288 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
289 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
290 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
291 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
292 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
293
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2942000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
295
296 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
297 fistpd without suffix.
298
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2992000-02-24 Nick Clifton <nickc@cygnus.com>
300
301 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
302 'signed_overflow_ok_p'.
303 Delete prototypes for cgen_set_flags() and cgen_get_flags().
304
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AH
3052000-02-24 Andrew Haley <aph@cygnus.com>
306
307 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
308 (CGEN_CPU_TABLE): flags: new field.
309 Add prototypes for new functions.
310
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3112000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
312
313 * i386.h: Add some more UNIXWARE_COMPAT comments.
314
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3152000-02-23 Linas Vepstas <linas@linas.org>
316
317 * i370.h: New file.
318
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AH
3192000-02-22 Andrew Haley <aph@cygnus.com>
320
321 * mips.h: (OPCODE_IS_MEMBER): Add comment.
322
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3231999-12-30 Andrew Haley <aph@cygnus.com>
324
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325 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
326 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
327 insns.
367c01af 328
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3292000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
330
331 * i386.h: Qualify intel mode far call and jmp with x_Suf.
332
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3331999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
334
335 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
336 indirect jumps and calls. Add FF/3 call for intel mode.
337
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338Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
339
340 * mn10300.h: Add new operand types. Add new instruction formats.
341
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342Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
343
344 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
345 instruction.
346
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3471999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
348
349 * mips.h (INSN_ISA5): New.
350
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3511999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
352
353 * mips.h (OPCODE_IS_MEMBER): New.
354
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3551999-10-29 Nick Clifton <nickc@cygnus.com>
356
357 * d30v.h (SHORT_AR): Define.
358
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3591999-10-18 Michael Meissner <meissner@cygnus.com>
360
361 * alpha.h (alpha_num_opcodes): Convert to unsigned.
362 (alpha_num_operands): Ditto.
363
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364Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
365
366 * hppa.h (pa_opcodes): Add load and store cache control to
367 instructions. Add ordered access load and store.
368
369 * hppa.h (pa_opcode): Add new entries for addb and addib.
370
371 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
372
373 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
374
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375Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
376
377 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
378
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379Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
380
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381 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
382 and "be" using completer prefixes.
383
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384 * hppa.h (pa_opcodes): Add initializers to silence compiler.
385
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386 * hppa.h: Update comments about character usage.
387
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388Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
389
390 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
391 up the new fstw & bve instructions.
392
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393Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
394
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395 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
396 instructions.
397
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398 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
399
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400 * hppa.h (pa_opcodes): Add long offset double word load/store
401 instructions.
402
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403 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
404 stores.
405
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406 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
407
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408 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
409
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410 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
411
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412 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
413
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414 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
415
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416 * hppa.h (pa_opcodes): Add support for "b,l".
417
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418 * hppa.h (pa_opcodes): Add support for "b,gate".
419
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420Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
421
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422 * hppa.h (pa_opcodes): Use 'fX' for first register operand
423 in xmpyu.
424
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425 * hppa.h (pa_opcodes): Fix mask for probe and probei.
426
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427 * hppa.h (pa_opcodes): Fix mask for depwi.
428
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429Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
430
431 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
432 an explicit output argument.
433
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434Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
435
436 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
437 Add a few PA2.0 loads and store variants.
438
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4391999-09-04 Steve Chamberlain <sac@pobox.com>
440
441 * pj.h: New file.
442
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4431999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
444
445 * i386.h (i386_regtab): Move %st to top of table, and split off
446 other fp reg entries.
447 (i386_float_regtab): To here.
448
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449Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
450
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451 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
452 by 'f'.
453
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454 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
455 Add supporting args.
456
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457 * hppa.h: Document new completers and args.
458 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
459 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
460 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
461 pmenb and pmdis.
462
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463 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
464 hshr, hsub, mixh, mixw, permh.
465
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466 * hppa.h (pa_opcodes): Change completers in instructions to
467 use 'c' prefix.
468
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469 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
470 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
471
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472 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
473 fnegabs to use 'I' instead of 'F'.
474
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4751999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
476
477 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
478 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
479 Alphabetically sort PIII insns.
480
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481Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
482
483 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
484
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JL
485Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
486
5696871a
JL
487 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
488 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
489
7d627258
JL
490 * hppa.h: Document 64 bit condition completers.
491
c5e52916
JL
492Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
493
494 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
495
eecb386c
AM
4961999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
497
498 * i386.h (i386_optab): Add DefaultSize modifier to all insns
499 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
500 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
501
88a380f3
JL
502Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
503 Jeff Law <law@cygnus.com>
504
505 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
506
507 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL
508
509 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
510 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
511
145cf1f0
AM
5121999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
513
514 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
515
73826640
JL
516Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
517
518 * hppa.h (struct pa_opcode): Add new field "flags".
519 (FLAGS_STRICT): Define.
520
b65db252
JL
521Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
522 Jeff Law <law@cygnus.com>
523
f7fc668b
JL
524 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
525
526 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 527
10084519
AM
5281999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
529
530 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
531 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
532 flag to fcomi and friends.
533
cd8a80ba
JL
534Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
535
536 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
537 integer logical instructions.
538
1fca749b
ILT
5391999-05-28 Linus Nordberg <linus.nordberg@canit.se>
540
541 * m68k.h: Document new formats `E', `G', `H' and new places `N',
542 `n', `o'.
543
544 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
545 and new places `m', `M', `h'.
546
aa008907
JL
547Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
548
549 * hppa.h (pa_opcodes): Add several processor specific system
550 instructions.
551
e26b85f0
JL
552Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
553
554 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
555 "addb", and "addib" to be used by the disassembler.
556
c608c12e
AM
5571999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
558
559 * i386.h (ReverseModrm): Remove all occurences.
560 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
561 movmskps, pextrw, pmovmskb, maskmovq.
562 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
563 ignore the data size prefix.
564
565 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
566 Mostly stolen from Doug Ledford <dledford@redhat.com>
567
45c18104
RH
568Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
569
570 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
571
252b5132
RH
5721999-04-14 Doug Evans <devans@casey.cygnus.com>
573
574 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
575 (CGEN_ATTR_TYPE): Update.
576 (CGEN_ATTR_MASK): Number booleans starting at 0.
577 (CGEN_ATTR_VALUE): Update.
578 (CGEN_INSN_ATTR): Update.
579
580Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
581
582 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
583 instructions.
584
585Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
586
587 * hppa.h (bb, bvb): Tweak opcode/mask.
588
589
5901999-03-22 Doug Evans <devans@casey.cygnus.com>
591
592 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
593 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
594 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
595 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
596 Delete member max_insn_size.
597 (enum cgen_cpu_open_arg): New enum.
598 (cpu_open): Update prototype.
599 (cpu_open_1): Declare.
600 (cgen_set_cpu): Delete.
601
6021999-03-11 Doug Evans <devans@casey.cygnus.com>
603
604 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
605 (CGEN_OPERAND_NIL): New macro.
606 (CGEN_OPERAND): New member `type'.
607 (@arch@_cgen_operand_table): Delete decl.
608 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
609 (CGEN_OPERAND_TABLE): New struct.
610 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
611 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
612 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
613 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
614 {get,set}_{int,vma}_operand.
615 (@arch@_cgen_cpu_open): New arg `isa'.
616 (cgen_set_cpu): Ditto.
617
618Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
619
620 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
621
6221999-02-25 Doug Evans <devans@casey.cygnus.com>
623
624 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
625 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
626 enum cgen_hw_type.
627 (CGEN_HW_TABLE): New struct.
628 (hw_table): Delete declaration.
629 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
630 to table entry to enum.
631 (CGEN_OPINST): Ditto.
632 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
633
634Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
635
636 * alpha.h (AXP_OPCODE_EV6): New.
637 (AXP_OPCODE_NOPAL): Include it.
638
6391999-02-09 Doug Evans <devans@casey.cygnus.com>
640
641 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
642 All uses updated. New members int_insn_p, max_insn_size,
643 parse_operand,insert_operand,extract_operand,print_operand,
644 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
645 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
646 extract_handlers,print_handlers.
647 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
648 (CGEN_ATTR_BOOL_OFFSET): New macro.
649 (CGEN_ATTR_MASK): Subtract it to compute bit number.
650 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
651 (cgen_opcode_handler): Renamed from cgen_base.
652 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
653 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
654 all uses updated.
655 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
656 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
657 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
658 (CGEN_OPCODE,CGEN_IBASE): New types.
659 (CGEN_INSN): Rewrite.
660 (CGEN_{ASM,DIS}_HASH*): Delete.
661 (init_opcode_table,init_ibld_table): Declare.
662 (CGEN_INSN_ATTR): New type.
663
664Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
665
666 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
667 (x_FP, d_FP, dls_FP, sldx_FP): Define.
668 Change *Suf definitions to include x and d suffixes.
669 (movsx): Use w_Suf and b_Suf.
670 (movzx): Likewise.
671 (movs): Use bwld_Suf.
672 (fld): Change ordering. Use sld_FP.
673 (fild): Add Intel Syntax equivalent of fildq.
674 (fst): Use sld_FP.
675 (fist): Use sld_FP.
676 (fstp): Use sld_FP. Add x_FP version.
677 (fistp): LLongMem version for Intel Syntax.
678 (fcom, fcomp): Use sld_FP.
679 (fadd, fiadd, fsub): Use sld_FP.
680 (fsubr): Use sld_FP.
681 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
682
6831999-01-27 Doug Evans <devans@casey.cygnus.com>
684
685 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
686 CGEN_MODE_UINT.
687
e135f41b 6881999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
689
690 * hppa.h (bv): Fix mask.
691
6921999-01-05 Doug Evans <devans@casey.cygnus.com>
693
694 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
695 (CGEN_ATTR): Use it.
696 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
697 (CGEN_ATTR_TABLE): New member dfault.
698
6991998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
700
701 * mips.h (MIPS16_INSN_BRANCH): New.
702
703Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
704
705 The following is part of a change made by Edith Epstein
706 <eepstein@sophia.cygnus.com> as part of a project to merge in
707 changes by HP; HP did not create ChangeLog entries.
708
709 * hppa.h (completer_chars): list of chars to not put a space
710 after.
711
712Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
713
714 * i386.h (i386_optab): Permit w suffix on processor control and
715 status word instructions.
716
7171998-11-30 Doug Evans <devans@casey.cygnus.com>
718
719 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
720 (struct cgen_keyword_entry): Ditto.
721 (struct cgen_operand): Ditto.
722 (CGEN_IFLD): New typedef, with associated access macros.
723 (CGEN_IFMT): New typedef, with associated access macros.
724 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
725 (CGEN_IVALUE): New typedef.
726 (struct cgen_insn): Delete const on syntax,attrs members.
727 `format' now points to format data. Type of `value' is now
728 CGEN_IVALUE.
729 (struct cgen_opcode_table): New member ifld_table.
730
7311998-11-18 Doug Evans <devans@casey.cygnus.com>
732
733 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
734 (CGEN_OPERAND_INSTANCE): New member `attrs'.
735 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
736 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
737 (cgen_opcode_table): Update type of dis_hash fn.
738 (extract_operand): Update type of `insn_value' arg.
739
740Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
741
742 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
743
744Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
745
746 * mips.h (INSN_MULT): Added.
747
748Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
749
750 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
751
752Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
753
754 * cgen.h (CGEN_INSN_INT): New typedef.
755 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
756 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
757 (CGEN_INSN_BYTES_PTR): New typedef.
758 (CGEN_EXTRACT_INFO): New typedef.
759 (cgen_insert_fn,cgen_extract_fn): Update.
760 (cgen_opcode_table): New member `insn_endian'.
761 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
762 (insert_operand,extract_operand): Update.
763 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
764
765Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
766
767 * cgen.h (CGEN_ATTR_BOOLS): New macro.
768 (struct CGEN_HW_ENTRY): New member `attrs'.
769 (CGEN_HW_ATTR): New macro.
770 (struct CGEN_OPERAND_INSTANCE): New member `name'.
771 (CGEN_INSN_INVALID_P): New macro.
772
773Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
774
775 * hppa.h: Add "fid".
776
777Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
778
779 From Robert Andrew Dale <rob@nb.net>
780 * i386.h (i386_optab): Add AMD 3DNow! instructions.
781 (AMD_3DNOW_OPCODE): Define.
782
783Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
784
785 * d30v.h (EITHER_BUT_PREFER_MU): Define.
786
787Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
788
789 * cgen.h (cgen_insn): #if 0 out element `cdx'.
790
791Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
792
793 Move all global state data into opcode table struct, and treat
794 opcode table as something that is "opened/closed".
795 * cgen.h (CGEN_OPCODE_DESC): New type.
796 (all fns): New first arg of opcode table descriptor.
797 (cgen_set_parse_operand_fn): Add prototype.
798 (cgen_current_machine,cgen_current_endian): Delete.
799 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
800 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
801 dis_hash_table,dis_hash_table_entries.
802 (opcode_open,opcode_close): Add prototypes.
803
804 * cgen.h (cgen_insn): New element `cdx'.
805
806Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
807
808 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
809
810Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
811
812 * mn10300.h: Add "no_match_operands" field for instructions.
813 (MN10300_MAX_OPERANDS): Define.
814
815Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
816
817 * cgen.h (cgen_macro_insn_count): Declare.
818
819Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
820
821 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
822 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
823 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
824 set_{int,vma}_operand.
825
826Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
827
828 * mn10300.h: Add "machine" field for instructions.
829 (MN103, AM30): Define machine types.
830
831Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
832
833 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
834
8351998-06-18 Ulrich Drepper <drepper@cygnus.com>
836
837 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
838
839Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
840
841 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
842 and ud2b.
843 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
844 those that happen to be implemented on pentiums.
845
846Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
847
848 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
849 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
850 with Size16|IgnoreSize or Size32|IgnoreSize.
851
852Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
853
854 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
855 (REPE): Rename to REPE_PREFIX_OPCODE.
856 (i386_regtab_end): Remove.
857 (i386_prefixtab, i386_prefixtab_end): Remove.
858 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
859 of md_begin.
860 (MAX_OPCODE_SIZE): Define.
861 (i386_optab_end): Remove.
862 (sl_Suf): Define.
863 (sl_FP): Use sl_Suf.
864
865 * i386.h (i386_optab): Allow 16 bit displacement for `mov
866 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
867 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
868 data32, dword, and adword prefixes.
869 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
870 regs.
871
872Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
873
874 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
875
876 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
877 register operands, because this is a common idiom. Flag them with
878 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
879 fdivrp because gcc erroneously generates them. Also flag with a
880 warning.
881
882 * i386.h: Add suffix modifiers to most insns, and tighter operand
883 checks in some cases. Fix a number of UnixWare compatibility
884 issues with float insns. Merge some floating point opcodes, using
885 new FloatMF modifier.
886 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
887 consistency.
888
889 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
890 IgnoreDataSize where appropriate.
891
892Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
893
894 * i386.h: (one_byte_segment_defaults): Remove.
895 (two_byte_segment_defaults): Remove.
896 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
897
898Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
899
900 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
901 (cgen_hw_lookup_by_num): Declare.
902
903Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
904
905 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
906 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
907
908Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
909
910 * cgen.h (cgen_asm_init_parse): Delete.
911 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
912 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
913
914Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
915
916 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
917 (cgen_asm_finish_insn): Update prototype.
918 (cgen_insn): New members num, data.
919 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
920 dis_hash, dis_hash_table_size moved to ...
921 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
922 All uses updated. New members asm_hash_p, dis_hash_p.
923 (CGEN_MINSN_EXPANSION): New struct.
924 (cgen_expand_macro_insn): Declare.
925 (cgen_macro_insn_count): Declare.
926 (get_insn_operands): Update prototype.
927 (lookup_get_insn_operands): Declare.
928
929Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
930
931 * i386.h (i386_optab): Change iclrKludge and imulKludge to
932 regKludge. Add operands types for string instructions.
933
934Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
935
936 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
937 table.
938
939Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
940
941 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
942 for `gettext'.
943
944Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
945
946 * i386.h: Remove NoModrm flag from all insns: it's never checked.
947 Add IsString flag to string instructions.
948 (IS_STRING): Don't define.
949 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
950 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
951 (SS_PREFIX_OPCODE): Define.
952
953Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
954
955 * i386.h: Revert March 24 patch; no more LinearAddress.
956
957Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
958
959 * i386.h (i386_optab): Remove fwait (9b) from all floating point
960 instructions, and instead add FWait opcode modifier. Add short
961 form of fldenv and fstenv.
962 (FWAIT_OPCODE): Define.
963
964 * i386.h (i386_optab): Change second operand constraint of `mov
965 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
966 allow legal instructions such as `movl %gs,%esi'
967
968Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
969
970 * h8300.h: Various changes to fully bracket initializers.
971
972Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
973
974 * i386.h: Set LinearAddress for lidt and lgdt.
975
976Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
977
978 * cgen.h (CGEN_BOOL_ATTR): New macro.
979
980Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
981
982 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
983
984Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
985
986 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
987 (cgen_insn): Record syntax and format entries here, rather than
988 separately.
989
990Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
991
992 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
993
994Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
995
996 * cgen.h (cgen_insert_fn): Change type of result to const char *.
997 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
998 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
999
1000Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1001
1002 * cgen.h (lookup_insn): New argument alias_p.
1003
1004Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1005
1006Fix rac to accept only a0:
1007 * d10v.h (OPERAND_ACC): Split into:
1008 (OPERAND_ACC0, OPERAND_ACC1) .
1009 (OPERAND_GPR): Define.
1010
1011Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1012
1013 * cgen.h (CGEN_FIELDS): Define here.
1014 (CGEN_HW_ENTRY): New member `type'.
1015 (hw_list): Delete decl.
1016 (enum cgen_mode): Declare.
1017 (CGEN_OPERAND): New member `hw'.
1018 (enum cgen_operand_instance_type): Declare.
1019 (CGEN_OPERAND_INSTANCE): New type.
1020 (CGEN_INSN): New member `operands'.
1021 (CGEN_OPCODE_DATA): Make hw_list const.
1022 (get_insn_operands,lookup_insn): Add prototypes for.
1023
1024Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1025
1026 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1027 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1028 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1029 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1030
1031Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1032
1033 * cgen.h: Correct typo in comment end marker.
1034
1035Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1036
1037 * tic30.h: New file.
1038
e135f41b 1039Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1040
1041 * cgen.h: Add prototypes for cgen_save_fixups(),
1042 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1043 of cgen_asm_finish_insn() to return a char *.
1044
1045Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1046
1047 * cgen.h: Formatting changes to improve readability.
1048
1049Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1050
1051 * cgen.h (*): Clean up pass over `struct foo' usage.
1052 (CGEN_ATTR): Make unsigned char.
1053 (CGEN_ATTR_TYPE): Update.
1054 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1055 (cgen_base): Move member `attrs' to cgen_insn.
1056 (CGEN_KEYWORD): New member `null_entry'.
1057 (CGEN_{SYNTAX,FORMAT}): New types.
1058 (cgen_insn): Format and syntax separated from each other.
1059
1060Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1061
1062 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1063 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1064 flags_{used,set} long.
1065 (d30v_operand): Make flags field long.
1066
1067Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1068
1069 * m68k.h: Fix comment describing operand types.
1070
1071Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1072
1073 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1074 everything else after down.
1075
1076Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1077
1078 * d10v.h (OPERAND_FLAG): Split into:
1079 (OPERAND_FFLAG, OPERAND_CFLAG) .
1080
1081Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1082
1083 * mips.h (struct mips_opcode): Changed comments to reflect new
1084 field usage.
1085
1086Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1087
1088 * mips.h: Added to comments a quick-ref list of all assigned
1089 operand type characters.
1090 (OP_{MASK,SH}_PERFREG): New macros.
1091
1092Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1093
1094 * sparc.h: Add '_' and '/' for v9a asr's.
1095 Patch from David Miller <davem@vger.rutgers.edu>
1096
1097Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1098
1099 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1100 area are not available in the base model (H8/300).
1101
1102Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1103
1104 * m68k.h: Remove documentation of ` operand specifier.
1105
1106Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1107
1108 * m68k.h: Document q and v operand specifiers.
1109
1110Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1111
1112 * v850.h (struct v850_opcode): Add processors field.
1113 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1114 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1115 (PROCESSOR_V850EA): New bit constants.
1116
1117Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1118
1119 Merge changes from Martin Hunt:
1120
1121 * d30v.h: Allow up to 64 control registers. Add
1122 SHORT_A5S format.
1123
1124 * d30v.h (LONG_Db): New form for delayed branches.
1125
1126 * d30v.h: (LONG_Db): New form for repeati.
1127
1128 * d30v.h (SHORT_D2B): New form.
1129
1130 * d30v.h (SHORT_A2): New form.
1131
1132 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1133 registers are used. Needed for VLIW optimization.
1134
1135Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1136
1137 * cgen.h: Move assembler interface section
1138 up so cgen_parse_operand_result is defined for cgen_parse_address.
1139 (cgen_parse_address): Update prototype.
1140
1141Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1142
1143 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1144
1145Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1146
1147 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1148 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1149 <paubert@iram.es>.
1150
1151 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1152 <paubert@iram.es>.
1153
1154 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1155 <paubert@iram.es>.
1156
1157 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1158 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1159
1160Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1161
1162 * v850.h (V850_NOT_R0): New flag.
1163
1164Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1165
1166 * v850.h (struct v850_opcode): Remove flags field.
1167
1168Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1169
1170 * v850.h (struct v850_opcode): Add flags field.
1171 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1172 fields.
1173 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1174 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1175
1176Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1177
1178 * arc.h: New file.
1179
1180Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1181
1182 * sparc.h (sparc_opcodes): Declare as const.
1183
1184Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1185
1186 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1187 uses single or double precision floating point resources.
1188 (INSN_NO_ISA, INSN_ISA1): Define.
1189 (cpu specific INSN macros): Tweak into bitmasks outside the range
1190 of INSN_ISA field.
1191
1192Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1193
1194 * i386.h: Fix pand opcode.
1195
1196Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1197
1198 * mips.h: Widen INSN_ISA and move it to a more convenient
1199 bit position. Add INSN_3900.
1200
1201Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1202
1203 * mips.h (struct mips_opcode): added new field membership.
1204
1205Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1206
1207 * i386.h (movd): only Reg32 is allowed.
1208
1209 * i386.h: add fcomp and ud2. From Wayne Scott
1210 <wscott@ichips.intel.com>.
1211
1212Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1213
1214 * i386.h: Add MMX instructions.
1215
1216Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1217
1218 * i386.h: Remove W modifier from conditional move instructions.
1219
1220Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1221
1222 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1223 with no arguments to match that generated by the UnixWare
1224 assembler.
1225
1226Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1227
1228 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1229 (cgen_parse_operand_fn): Declare.
1230 (cgen_init_parse_operand): Declare.
1231 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1232 new argument `want'.
1233 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1234 (enum cgen_parse_operand_type): New enum.
1235
1236Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1237
1238 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1239
1240Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1241
1242 * cgen.h: New file.
1243
1244Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1245
1246 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1247 fdivrp.
1248
1249Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1250
1251 * v850.h (extract): Make unsigned.
1252
1253Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1254
1255 * i386.h: Add iclr.
1256
1257Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1258
1259 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1260 take a direction bit.
1261
1262Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1263
1264 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1265
1266Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1267
1268 * sparc.h: Include <ansidecl.h>. Update function declarations to
1269 use prototypes, and to use const when appropriate.
1270
1271Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1272
1273 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1274
1275Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1276
1277 * d10v.h: Change pre_defined_registers to
1278 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1279
1280Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1281
1282 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1283 Change mips_opcodes from const array to a pointer,
1284 and change bfd_mips_num_opcodes from const int to int,
1285 so that we can increase the size of the mips opcodes table
1286 dynamically.
1287
1288Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1289
1290 * d30v.h (FLAG_X): Remove unused flag.
1291
1292Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1293
1294 * d30v.h: New file.
1295
1296Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1297
1298 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1299 (PDS_VALUE): Macro to access value field of predefined symbols.
1300 (tic80_next_predefined_symbol): Add prototype.
1301
1302Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1303
1304 * tic80.h (tic80_symbol_to_value): Change prototype to match
1305 change in function, added class parameter.
1306
1307Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1308
1309 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1310 endmask fields, which are somewhat weird in that 0 and 32 are
1311 treated exactly the same.
1312
1313Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1314
1315 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1316 rather than a constant that is 2**X. Reorder them to put bits for
1317 operands that have symbolic names in the upper bits, so they can
1318 be packed into an int where the lower bits contain the value that
1319 corresponds to that symbolic name.
1320 (predefined_symbo): Add struct.
1321 (tic80_predefined_symbols): Declare array of translations.
1322 (tic80_num_predefined_symbols): Declare size of that array.
1323 (tic80_value_to_symbol): Declare function.
1324 (tic80_symbol_to_value): Declare function.
1325
1326Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1327
1328 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1329
1330Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1331
1332 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1333 be the destination register.
1334
1335Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1336
1337 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1338 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1339 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1340 that the opcode can have two vector instructions in a single
1341 32 bit word and we have to encode/decode both.
1342
1343Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1344
1345 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1346 TIC80_OPERAND_RELATIVE for PC relative.
1347 (TIC80_OPERAND_BASEREL): New flag bit for register
1348 base relative.
1349
1350Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1351
1352 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1353
1354Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1355
1356 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1357 ":s" modifier for scaling.
1358
1359Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1360
1361 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1362 (TIC80_OPERAND_M_LI): Ditto
1363
1364Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1365
1366 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1367 (TIC80_OPERAND_CC): New define for condition code operand.
1368 (TIC80_OPERAND_CR): New define for control register operand.
1369
1370Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1371
1372 * tic80.h (struct tic80_opcode): Name changed.
1373 (struct tic80_opcode): Remove format field.
1374 (struct tic80_operand): Add insertion and extraction functions.
1375 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1376 correct ones.
1377 (FMT_*): Ditto.
1378
1379Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1380
1381 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1382 type IV instruction offsets.
1383
1384Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1385
1386 * tic80.h: New file.
1387
1388Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1389
1390 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1391
1392Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1393
1394 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1395 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1396 * v850.h: Fix comment, v850_operand not powerpc_operand.
1397
1398Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1399
1400 * mn10200.h: Flesh out structures and definitions needed by
1401 the mn10200 assembler & disassembler.
1402
1403Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1404
1405 * mips.h: Add mips16 definitions.
1406
1407Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1408
1409 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1410
1411Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1412
1413 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1414 (MN10300_OPERAND_MEMADDR): Define.
1415
1416Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1417
1418 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1419
1420Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1421
1422 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1423
1424Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1425
1426 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1427
1428Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1429
1430 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1431
1432Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1433
1434 * alpha.h: Don't include "bfd.h"; private relocation types are now
1435 negative to minimize problems with shared libraries. Organize
1436 instruction subsets by AMASK extensions and PALcode
1437 implementation.
1438 (struct alpha_operand): Move flags slot for better packing.
1439
1440Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1441
1442 * v850.h (V850_OPERAND_RELAX): New operand flag.
1443
1444Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1445
1446 * mn10300.h (FMT_*): Move operand format definitions
1447 here.
1448
1449Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1450
1451 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1452
1453Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1454
1455 * mn10300.h (mn10300_opcode): Add "format" field.
1456 (MN10300_OPERAND_*): Define.
1457
1458Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1459
1460 * mn10x00.h: Delete.
1461 * mn10200.h, mn10300.h: New files.
1462
1463Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1464
1465 * mn10x00.h: New file.
1466
1467Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1468
1469 * v850.h: Add new flag to indicate this instruction uses a PC
1470 displacement.
1471
1472Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1473
1474 * h8300.h (stmac): Add missing instruction.
1475
1476Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1477
1478 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1479 field.
1480
1481Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1482
1483 * v850.h (V850_OPERAND_EP): Define.
1484
1485 * v850.h (v850_opcode): Add size field.
1486
1487Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1488
1489 * v850.h (v850_operands): Add insert and extract fields, pointers
1490 to functions used to handle unusual operand encoding.
1491 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1492 V850_OPERAND_SIGNED): Defined.
1493
1494Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1495
1496 * v850.h (v850_operands): Add flags field.
1497 (OPERAND_REG, OPERAND_NUM): Defined.
1498
1499Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1500
1501 * v850.h: New file.
1502
1503Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1504
1505 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1506 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1507 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1508 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1509 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1510 Defined.
1511
1512Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1513
1514 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1515 a 3 bit space id instead of a 2 bit space id.
1516
1517Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1518
1519 * d10v.h: Add some additional defines to support the
1520 assembler in determining which operations can be done in parallel.
1521
1522Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1523
1524 * h8300.h (SN): Define.
1525 (eepmov.b): Renamed from "eepmov"
1526 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1527 with them.
1528
1529Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1530
1531 * d10v.h (OPERAND_SHIFT): New operand flag.
1532
1533Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1534
1535 * d10v.h: Changes for divs, parallel-only instructions, and
1536 signed numbers.
1537
1538Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1539
1540 * d10v.h (pd_reg): Define. Putting the definition here allows
1541 the assembler and disassembler to share the same struct.
1542
1543Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1544
1545 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1546 Williams <steve@icarus.com>.
1547
1548Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1549
1550 * d10v.h: New file.
1551
1552Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1553
1554 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1555
1556Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1557
1558 * m68k.h (mcf5200): New macro.
1559 Document names of coldfire control registers.
1560
1561Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1562
1563 * h8300.h (SRC_IN_DST): Define.
1564
1565 * h8300.h (UNOP3): Mark the register operand in this insn
1566 as a source operand, not a destination operand.
1567 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1568 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1569 register operand with SRC_IN_DST.
1570
1571Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1572
1573 * alpha.h: New file.
1574
1575Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1576
1577 * rs6k.h: Remove obsolete file.
1578
1579Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1580
1581 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1582 fdivp, and fdivrp. Add ffreep.
1583
1584Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1585
1586 * h8300.h: Reorder various #defines for readability.
1587 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1588 (BITOP): Accept additional (unused) argument. All callers changed.
1589 (EBITOP): Likewise.
1590 (O_LAST): Bump.
1591 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1592
1593 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1594 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1595 (BITOP, EBITOP): Handle new H8/S addressing modes for
1596 bit insns.
1597 (UNOP3): Handle new shift/rotate insns on the H8/S.
1598 (insns using exr): New instructions.
1599 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1600
1601Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1602
1603 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1604 was incorrect.
1605
1606Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1607
1608 * h8300.h (START): Remove.
1609 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1610 and mov.l insns that can be relaxed.
1611
1612Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1613
1614 * i386.h: Remove Abs32 from lcall.
1615
1616Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1617
1618 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1619 (SLCPOP): New macro.
1620 Mark X,Y opcode letters as in use.
1621
1622Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1623
1624 * sparc.h (F_FLOAT, F_FBR): Define.
1625
1626Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1627
1628 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1629 from all insns.
1630 (ABS8SRC,ABS8DST): Add ABS8MEM.
1631 (add.l): Fix reg+reg variant.
1632 (eepmov.w): Renamed from eepmovw.
1633 (ldc,stc): Fix many cases.
1634
1635Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1636
1637 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1638
1639Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1640
1641 * sparc.h (O): Mark operand letter as in use.
1642
1643Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1644
1645 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1646 Mark operand letters uU as in use.
1647
1648Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1649
1650 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1651 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1652 (SPARC_OPCODE_SUPPORTED): New macro.
1653 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1654 (F_NOTV9): Delete.
1655
1656Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1657
1658 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1659 declaration consistent with return type in definition.
1660
1661Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1662
1663 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1664
1665Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1666
1667 * i386.h (i386_regtab): Add 80486 test registers.
1668
1669Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1670
1671 * i960.h (I_HX): Define.
1672 (i960_opcodes): Add HX instruction.
1673
1674Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1675
1676 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1677 and fclex.
1678
1679Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1680
1681 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1682 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1683 (bfd_* defines): Delete.
1684 (sparc_opcode_archs): Replaces architecture_pname.
1685 (sparc_opcode_lookup_arch): Declare.
1686 (NUMOPCODES): Delete.
1687
1688Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1689
1690 * sparc.h (enum sparc_architecture): Add v9a.
1691 (ARCHITECTURES_CONFLICT_P): Update.
1692
1693Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1694
1695 * i386.h: Added Pentium Pro instructions.
1696
1697Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1698
1699 * m68k.h: Document new 'W' operand place.
1700
1701Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1702
1703 * hppa.h: Add lci and syncdma instructions.
1704
1705Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1706
1707 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1708 instructions.
1709
1710Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1711
1712 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1713 assembler's -mcom and -many switches.
1714
1715Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1716
1717 * i386.h: Fix cmpxchg8b extension opcode description.
1718
1719Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1720
1721 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1722 and register cr4.
1723
1724Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1725
1726 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1727
1728Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1729
1730 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1731
1732Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1733
1734 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1735
1736Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1737
1738 * m68kmri.h: Remove.
1739
1740 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1741 declarations. Remove F_ALIAS and flag field of struct
1742 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1743 int. Make name and args fields of struct m68k_opcode const.
1744
1745Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1746
1747 * sparc.h (F_NOTV9): Define.
1748
1749Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1750
1751 * mips.h (INSN_4010): Define.
1752
1753Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1754
1755 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1756
1757 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1758 * m68k.h: Fix argument descriptions of coprocessor
1759 instructions to allow only alterable operands where appropriate.
1760 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1761 (m68k_opcode_aliases): Add more aliases.
1762
1763Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1764
1765 * m68k.h: Added explcitly short-sized conditional branches, and a
1766 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1767 svr4-based configurations.
1768
1769Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1770
1771 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1772 * i386.h: added missing Data16/Data32 flags to a few instructions.
1773
1774Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1775
1776 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1777 (OP_MASK_BCC, OP_SH_BCC): Define.
1778 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1779 (OP_MASK_CCC, OP_SH_CCC): Define.
1780 (INSN_READ_FPR_R): Define.
1781 (INSN_RFE): Delete.
1782
1783Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1784
1785 * m68k.h (enum m68k_architecture): Deleted.
1786 (struct m68k_opcode_alias): New type.
1787 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1788 matching constraints, values and flags. As a side effect of this,
1789 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1790 as I know were never used, now may need re-examining.
1791 (numopcodes): Now const.
1792 (m68k_opcode_aliases, numaliases): New variables.
1793 (endop): Deleted.
1794 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1795 m68k_opcode_aliases; update declaration of m68k_opcodes.
1796
1797Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1798
1799 * hppa.h (delay_type): Delete unused enumeration.
1800 (pa_opcode): Replace unused delayed field with an architecture
1801 field.
1802 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1803
1804Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1805
1806 * mips.h (INSN_ISA4): Define.
1807
1808Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1809
1810 * mips.h (M_DLA_AB, M_DLI): Define.
1811
1812Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1813
1814 * hppa.h (fstwx): Fix single-bit error.
1815
1816Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1817
1818 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1819
1820Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1821
1822 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1823 debug registers. From Charles Hannum (mycroft@netbsd.org).
1824
1825Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1826
1827 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1828 i386 support:
1829 * i386.h (MOV_AX_DISP32): New macro.
1830 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1831 of several call/return instructions.
1832 (ADDR_PREFIX_OPCODE): New macro.
1833
1834Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1835
1836 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1837
1838 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1839 it pointer to const char;
1840 (struct vot, field `name'): ditto.
1841
1842Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1843
1844 * vax.h: Supply and properly group all values in end sentinel.
1845
1846Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1847
1848 * mips.h (INSN_ISA, INSN_4650): Define.
1849
1850Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1851
1852 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1853 systems with a separate instruction and data cache, such as the
1854 29040, these instructions take an optional argument.
1855
1856Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1857
1858 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1859 INSN_TRAP.
1860
1861Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1862
1863 * mips.h (INSN_STORE_MEMORY): Define.
1864
1865Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1866
1867 * sparc.h: Document new operand type 'x'.
1868
1869Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1870
1871 * i960.h (I_CX2): New instruction category. It includes
1872 instructions available on Cx and Jx processors.
1873 (I_JX): New instruction category, for JX-only instructions.
1874 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1875 Jx-only instructions, in I_JX category.
1876
1877Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1878
1879 * ns32k.h (endop): Made pointer const too.
1880
1881Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1882
1883 * ns32k.h: Drop Q operand type as there is no correct use
1884 for it. Add I and Z operand types which allow better checking.
1885
1886Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1887
1888 * h8300.h (xor.l) :fix bit pattern.
1889 (L_2): New size of operand.
1890 (trapa): Use it.
1891
1892Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1893
1894 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1895
1896Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1897
1898 * sparc.h: Include v9 definitions.
1899
1900Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1901
1902 * m68k.h (m68060): Defined.
1903 (m68040up, mfloat, mmmu): Include it.
1904 (struct m68k_opcode): Widen `arch' field.
1905 (m68k_opcodes): Updated for M68060. Removed comments that were
1906 instructions commented out by "JF" years ago.
1907
1908Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1909
1910 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1911 add a one-bit `flags' field.
1912 (F_ALIAS): New macro.
1913
1914Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1915
1916 * h8300.h (dec, inc): Get encoding right.
1917
1918Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1919
1920 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1921 a flag instead.
1922 (PPC_OPERAND_SIGNED): Define.
1923 (PPC_OPERAND_SIGNOPT): Define.
1924
1925Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1926
1927 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1928 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1929
1930Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1931
1932 * i386.h: Reverse last change. It'll be handled in gas instead.
1933
1934Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1935
1936 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1937 slower on the 486 and used the implicit shift count despite the
1938 explicit operand. The one-operand form is still available to get
1939 the shorter form with the implicit shift count.
1940
1941Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1942
1943 * hppa.h: Fix typo in fstws arg string.
1944
1945Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1946
1947 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1948
1949Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1950
1951 * ppc.h (PPC_OPCODE_601): Define.
1952
1953Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1954
1955 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1956 (so we can determine valid completers for both addb and addb[tf].)
1957
1958 * hppa.h (xmpyu): No floating point format specifier for the
1959 xmpyu instruction.
1960
1961Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1962
1963 * ppc.h (PPC_OPERAND_NEXT): Define.
1964 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1965 (struct powerpc_macro): Define.
1966 (powerpc_macros, powerpc_num_macros): Declare.
1967
1968Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1969
1970 * ppc.h: New file. Header file for PowerPC opcode table.
1971
1972Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1973
1974 * hppa.h: More minor template fixes for sfu and copr (to allow
1975 for easier disassembly).
1976
1977 * hppa.h: Fix templates for all the sfu and copr instructions.
1978
1979Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1980
1981 * i386.h (push): Permit Imm16 operand too.
1982
1983Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1984
1985 * h8300.h (andc): Exists in base arch.
1986
1987Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1988
1989 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1990 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1991
1992Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1993
1994 * hppa.h: Add FP quadword store instructions.
1995
1996Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1997
1998 * mips.h: (M_J_A): Added.
1999 (M_LA): Removed.
2000
2001Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2002
2003 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2004 <mellon@pepper.ncd.com>.
2005
2006Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2007
2008 * hppa.h: Immediate field in probei instructions is unsigned,
2009 not low-sign extended.
2010
2011Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2012
2013 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2014
2015Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2016
2017 * i386.h: Add "fxch" without operand.
2018
2019Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2020
2021 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2022
2023Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2024
2025 * hppa.h: Add gfw and gfr to the opcode table.
2026
2027Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2028
2029 * m88k.h: extended to handle m88110.
2030
2031Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2032
2033 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2034 addresses.
2035
2036Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2037
2038 * i960.h (i960_opcodes): Properly bracket initializers.
2039
2040Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2041
2042 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2043
2044Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2045
2046 * m68k.h (two): Protect second argument with parentheses.
2047
2048Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2049
2050 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2051 Deleted old in/out instructions in "#if 0" section.
2052
2053Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2054
2055 * i386.h (i386_optab): Properly bracket initializers.
2056
2057Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2058
2059 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2060 Jeff Law, law@cs.utah.edu).
2061
2062Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2063
2064 * i386.h (lcall): Accept Imm32 operand also.
2065
2066Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2067
2068 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2069 (M_DABS): Added.
2070
2071Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2072
2073 * mips.h (INSN_*): Changed values. Removed unused definitions.
2074 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2075 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2076 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2077 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2078 (M_*): Added new values for r6000 and r4000 macros.
2079 (ANY_DELAY): Removed.
2080
2081Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2082
2083 * mips.h: Added M_LI_S and M_LI_SS.
2084
2085Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2086
2087 * h8300.h: Get some rare mov.bs correct.
2088
2089Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2090
2091 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2092 been included.
2093
2094Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2095
2096 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2097 jump instructions, for use in disassemblers.
2098
2099Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2100
2101 * m88k.h: Make bitfields just unsigned, not unsigned long or
2102 unsigned short.
2103
2104Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2105
2106 * hppa.h: New argument type 'y'. Use in various float instructions.
2107
2108Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2109
2110 * hppa.h (break): First immediate field is unsigned.
2111
2112 * hppa.h: Add rfir instruction.
2113
2114Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2115
2116 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2117
2118Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2119
2120 * mips.h: Reworked the hazard information somewhat, and fixed some
2121 bugs in the instruction hazard descriptions.
2122
2123Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2124
2125 * m88k.h: Corrected a couple of opcodes.
2126
2127Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2128
2129 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2130 new version includes instruction hazard information, but is
2131 otherwise reasonably similar.
2132
2133Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2134
2135 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2136
2137Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2138
2139 Patches from Jeff Law, law@cs.utah.edu:
2140 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2141 Make the tables be the same for the following instructions:
2142 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2143 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2144 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2145 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2146 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2147 "fcmp", and "ftest".
2148
2149 * hppa.h: Make new and old tables the same for "break", "mtctl",
2150 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2151 Fix typo in last patch. Collapse several #ifdefs into a
2152 single #ifdef.
2153
2154 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2155 of the comments up-to-date.
2156
2157 * hppa.h: Update "free list" of letters and update
2158 comments describing each letter's function.
2159
2160Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2161
2162 * h8300.h: checkpoint, includes H8/300-H opcodes.
2163
2164Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2165
2166 * Patches from Jeffrey Law <law@cs.utah.edu>.
2167 * hppa.h: Rework single precision FP
2168 instructions so that they correctly disassemble code
2169 PA1.1 code.
2170
2171Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2172
2173 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2174 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2175
2176Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2177
2178 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2179 gdb will define it for now.
2180
2181Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2182
2183 * sparc.h: Don't end enumerator list with comma.
2184
2185Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2186
2187 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2188 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2189 ("bc2t"): Correct typo.
2190 ("[ls]wc[023]"): Use T rather than t.
2191 ("c[0123]"): Define general coprocessor instructions.
2192
2193Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2194
2195 * m68k.h: Move split point for gcc compilation more towards
2196 middle.
2197
2198Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2199
2200 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2201 simply wrong, ics, rfi, & rfsvc were missing).
2202 Add "a" to opr_ext for "bb". Doc fix.
2203
2204Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2205
2206 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2207 * mips.h: Add casts, to suppress warnings about shifting too much.
2208 * m68k.h: Document the placement code '9'.
2209
2210Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2211
2212 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2213 allows callers to break up the large initialized struct full of
2214 opcodes into two half-sized ones. This permits GCC to compile
2215 this module, since it takes exponential space for initializers.
2216 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2217
2218Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2219
2220 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2221 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2222 initialized structs in it.
2223
2224Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2225
2226 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2227 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2228 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2229
2230Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2231
2232 * mips.h: document "i" and "j" operands correctly.
2233
2234Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2235
2236 * mips.h: Removed endianness dependency.
2237
2238Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2239
2240 * h8300.h: include info on number of cycles per instruction.
2241
2242Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2243
2244 * hppa.h: Move handy aliases to the front. Fix masks for extract
2245 and deposit instructions.
2246
2247Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2248
2249 * i386.h: accept shld and shrd both with and without the shift
2250 count argument, which is always %cl.
2251
2252Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2253
2254 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2255 (one_byte_segment_defaults, two_byte_segment_defaults,
2256 i386_prefixtab_end): Ditto.
2257
2258Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2259
2260 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2261 for operand 2; from John Carr, jfc@dsg.dec.com.
2262
2263Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2264
2265 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2266 always use 16-bit offsets. Makes calculated-size jump tables
2267 feasible.
2268
2269Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2270
2271 * i386.h: Fix one-operand forms of in* and out* patterns.
2272
2273Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2274
2275 * m68k.h: Added CPU32 support.
2276
2277Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2278
2279 * mips.h (break): Disassemble the argument. Patch from
2280 jonathan@cs.stanford.edu (Jonathan Stone).
2281
2282Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2283
2284 * m68k.h: merged Motorola and MIT syntax.
2285
2286Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2287
2288 * m68k.h (pmove): make the tests less strict, the 68k book is
2289 wrong.
2290
2291Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2292
2293 * m68k.h (m68ec030): Defined as alias for 68030.
2294 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2295 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2296 them. Tightened description of "fmovex" to distinguish it from
2297 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2298 up descriptions that claimed versions were available for chips not
2299 supporting them. Added "pmovefd".
2300
2301Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2302
2303 * m68k.h: fix where the . goes in divull
2304
2305Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2306
2307 * m68k.h: the cas2 instruction is supposed to be written with
2308 indirection on the last two operands, which can be either data or
2309 address registers. Added a new operand type 'r' which accepts
2310 either register type. Added new cases for cas2l and cas2w which
2311 use them. Corrected masks for cas2 which failed to recognize use
2312 of address register.
2313
2314Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2315
2316 * m68k.h: Merged in patches (mostly m68040-specific) from
2317 Colin Smith <colin@wrs.com>.
2318
2319 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2320 base). Also cleaned up duplicates, re-ordered instructions for
2321 the sake of dis-assembling (so aliases come after standard names).
2322 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2323
2324Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2325
2326 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2327 all missing .s
2328
2329Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2330
2331 * sparc.h: Moved tables to BFD library.
2332
2333 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2334
2335Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2336
2337 * h8300.h: Finish filling in all the holes in the opcode table,
2338 so that the Lucid C compiler can digest this as well...
2339
2340Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2341
2342 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2343 Fix opcodes on various sizes of fild/fist instructions
2344 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2345 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2346
2347Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2348
2349 * h8300.h: Fill in all the holes in the opcode table so that the
2350 losing HPUX C compiler can digest this...
2351
2352Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2353
2354 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2355 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2356
2357Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2358
2359 * sparc.h: Add new architecture variant sparclite; add its scan
2360 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2361
2362Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2363
2364 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2365 fy@lucid.com).
2366
2367Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2368
2369 * rs6k.h: New version from IBM (Metin).
2370
2371Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2372
2373 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2374 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2375
2376Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2377
2378 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2379
2380Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2381
2382 * m68k.h (one, two): Cast macro args to unsigned to suppress
2383 complaints from compiler and lint about integer overflow during
2384 shift.
2385
2386Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2387
2388 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2389
2390Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2391
2392 * mips.h: Make bitfield layout depend on the HOST compiler,
2393 not on the TARGET system.
2394
2395Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2396
2397 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2398 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2399 <TRANLE@INTELLICORP.COM>.
2400
2401Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2402
2403 * h8300.h: turned op_type enum into #define list
2404
2405Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2406
2407 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2408 similar instructions -- they've been renamed to "fitoq", etc.
2409 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2410 number of arguments.
2411 * h8300.h: Remove extra ; which produces compiler warning.
2412
2413Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2414
2415 * sparc.h: fix opcode for tsubcctv.
2416
2417Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2418
2419 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2420
2421Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2422
2423 * sparc.h (nop): Made the 'lose' field be even tighter,
2424 so only a standard 'nop' is disassembled as a nop.
2425
2426Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2427
2428 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2429 disassembled as a nop.
2430
2431Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2432
2433 * sparc.h: fix a typo.
2434
2435Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2436
2437 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2438 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
2439 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
2440
2441\f
2442Local Variables:
2443version-control: never
2444End: