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* ppc.h: Add relocs from the 64-bit PowerPC ELF ABI revision 1.2.
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
d83c6548
AJ		 12001-08-25 Andreas Jaeger <aj@suse.de>
2
3 * d30v.h: Fix declaration of reg_name_cnt.
4
5 * d10v.h: Fix declaration of d10v_reg_name_cnt.
6
7 * arc.h: Add prototypes from opcodes/arc-opc.c.
8
99c14723
TS		 92001-08-16 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
10
11 * mips.h (INSN_10000): Define.
12 (OPCODE_IS_MEMBER): Check for INSN_10000.
13
11b37b7b
AM		 142001-08-10 Alan Modra <amodra@one.net.au>
15
16 * ppc.h: Revert 2001-08-08.
17
0f1bac05
AM		 182001-08-08 Alan Modra <amodra@one.net.au>
19
20 1999-10-25 Torbjorn Granlund <tege@swox.com>
21 * ppc.h (struct powerpc_operand): New field `reloc'.
22
81f6038f
FCE		 232001-07-11 Frank Ch. Eigler <fche@redhat.com>
24
25 * cgen.h (CGEN_MACH): Add insn_chunk_bitsize field.
26 (cgen_cpu_desc): Ditto.
27
32cfffe3
BE		 282001-07-07 Ben Elliston <bje@redhat.com>
29
30 * m88k.h: Clean up and reformat. Remove unused code.
31
3e890047
GK		 322001-06-14 Geoffrey Keating <geoffk@redhat.com>
33
34 * cgen.h (cgen_keyword): Add nonalpha_chars field.
35
d1cf510e
NC		 362001-05-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
37
38 * mips.h (CPU_R12000): Define.
39
e281c457
JH		 402001-05-23 John Healy <jhealy@redhat.com>
41
42 * cgen.h: Increased CGEN_MAX_SYNTAX_ELEMENTS to 48.
d83c6548 43
aa5f19f2
NC		 442001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
45
46 * mips.h (INSN_ISA_MASK): Define.
47
67d6227d
AM		 482001-05-12 Alan Modra <amodra@one.net.au>
49
50 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
51 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
52 and use InvMem as these insns must have register operands.
53
992aaec9
AM		 542001-05-04 Alan Modra <amodra@one.net.au>
55
56 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
57 and pextrw to swap reg/rm assignments.
58
4ef7f0bf
HPN		 592001-04-05 Hans-Peter Nilsson <hp@axis.com>
60
61 * cris.h (enum cris_insn_version_usage): Correct comment for
62 cris_ver_v3p.
63
0f17484f
AM		 642001-03-24 Alan Modra <alan@linuxcare.com.au>
65
66 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
67 Add InvMem to first operand of "maskmovdqu".
68
7ccb5238
HPN		 692001-03-22 Hans-Peter Nilsson <hp@axis.com>
70
71 * cris.h (ADD_PC_INCR_OPCODE): New macro.
72
361bfa20
KH		 732001-03-21 Kazu Hirata <kazu@hxi.com>
74
75 * h8300.h: Fix formatting.
76
87890af0
AM		 772001-03-22 Alan Modra <alan@linuxcare.com.au>
78
79 * i386.h (i386_optab): Add paddq, psubq.
80
2e98d2de
AM		 812001-03-19 Alan Modra <alan@linuxcare.com.au>
82
83 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
84
80a523c2
NC		 852001-02-28 Igor Shevlyakov <igor@windriver.com>
86
87 * m68k.h: new defines for Coldfire V4. Update mcf to know
88 about mcf5407.
89
e135f41b
NC		 902001-02-18 lars brinkhoff <lars@nocrew.org>
91
92 * pdp11.h: New file.
93
942001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH		 95
96 * i386.h (i386_optab): SSE integer converison instructions have
97 64bit versions on x86-64.
98
8eaec934
NC		 992001-02-10 Nick Clifton <nickc@redhat.com>
100
101 * mips.h: Remove extraneous whitespace. Formating change to allow
102 for future contribution.
103
a85d7ed0
NC		 1042001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
105
106 * s390.h: New file.
107
0715dc88
PM		 1082001-02-02 Patrick Macdonald <patrickm@redhat.com>
109
110 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
111 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
112 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
113
296bc568
AM		 1142001-01-24 Karsten Keil <kkeil@suse.de>
115
116 * i386.h (i386_optab): Fix swapgs
117
1328dc98
AM		 1182001-01-14 Alan Modra <alan@linuxcare.com.au>
119
120 * hppa.h: Describe new '<' and '>' operand types, and tidy
121 existing comments.
122 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
123 Remove duplicate "ldw j(s,b),x". Sort some entries.
124
e135f41b 1252001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH		 126
127 * i386.h (i386_optab): Fix pusha and ret templates.
128
0d2bcfaf
NC		 1292001-01-11 Peter Targett <peter.targett@arccores.com>
130
131 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
132 definitions for masking cpu type.
133 (arc_ext_operand_value) New structure for storing extended
134 operands.
135 (ARC_OPERAND_*) Flags for operand values.
136
1372001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH		 138
139 * i386.h (pinsrw): Add.
140 (pshufw): Remove.
141 (cvttpd2dq): Fix operands.
142 (cvttps2dq): Likewise.
143 (movq2q): Rename to movdq2q.
144
079966a8
AM		 1452001-01-10 Richard Schaal <richard.schaal@intel.com>
146
147 * i386.h: Correct movnti instruction.
148
8c1f9e76
JJ		 1492001-01-09 Jeff Johnston <jjohnstn@redhat.com>
150
151 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
152 of operands (unsigned char or unsigned short).
153 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
154 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
155
0d2bcfaf 1562001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH		 157
158 * i386.h (i386_optab): Make [sml]fence template to use immext field.
159
0d2bcfaf 1602001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH		 161
162 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
163 introduced by Pentium4
164
0d2bcfaf 1652000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH		 166
167 * i386.h (i386_optab): Add "rex*" instructions;
168 add swapgs; disable jmp/call far direct instructions for
169 64bit mode; add syscall and sysret; disable registers for 0xc6
170 template. Add 'q' suffixes to extendable instructions, disable
079966a8 171 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH		 172 (i386_regtab): Add extended registers.
173 (*Suf): Add No_qSuf.
174 (q_Suf, wlq_Suf, bwlq_Suf): New.
175
0d2bcfaf 1762000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH		 177
178 * i386.h (i386_optab): Replace "Imm" with "EncImm".
179 (i386_regtab): Add flags field.
d83c6548 180
bf40d919
NC		 1812000-12-12 Nick Clifton <nickc@redhat.com>
182
183 * mips.h: Fix formatting.
184
4372b673
NC		 1852000-12-01 Chris Demetriou <cgd@sibyte.com>
186
187 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
188 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
189 OP_*_SYSCALL definitions.
190 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
191 19 bit wait codes.
192 (MIPS operand specifier comments): Remove 'm', add 'U' and
193 'J', and update the meaning of 'B' so that it's more general.
194
e7af610e
NC		 195 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
196 INSN_ISA5): Renumber, redefine to mean the ISA at which the
197 instruction was added.
198 (INSN_ISA32): New constant.
199 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
200 Renumber to avoid new and/or renumbered INSN_* constants.
201 (INSN_MIPS32): Delete.
202 (ISA_UNKNOWN): New constant to indicate unknown ISA.
203 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
204 ISA_MIPS32): New constants, defined to be the mask of INSN_*
d83c6548 205 constants available at that ISA level.
e7af610e
NC		 206 (CPU_UNKNOWN): New constant to indicate unknown CPU.
207 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
208 define it with a unique value.
209 (OPCODE_IS_MEMBER): Update for new ISA membership-related
210 constant meanings.
211
84ea6cf2 212 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
d83c6548 213 definitions.
84ea6cf2 214
c6c98b38
NC		 215 * mips.h (CPU_SB1): New constant.
216
19f7b010
JJ		 2172000-10-20 Jakub Jelinek <jakub@redhat.com>
218
219 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
220 Note that '3' is used for siam operand.
221
139368c9
JW		 2222000-09-22 Jim Wilson <wilson@cygnus.com>
223
224 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
225
156c2f8b 2262000-09-13 Anders Norlander <anorland@acc.umu.se>
d83c6548 227
156c2f8b
NC		 228 * mips.h: Use defines instead of hard-coded processor numbers.
229 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
d83c6548 230 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
156c2f8b
NC		 231 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
232 CPU_4KC, CPU_4KM, CPU_4KP): Define..
233 (OPCODE_IS_MEMBER): Use new defines.
d83c6548 234 (OP_MASK_SEL, OP_SH_SEL): Define.
156c2f8b 235 (OP_MASK_CODE20, OP_SH_CODE20): Define.
d83c6548
AJ		 236 Add 'P' to used characters.
237 Use 'H' for coprocessor select field.
156c2f8b 238 Use 'm' for 20 bit breakpoint code.
d83c6548
AJ		 239 Document new arg characters and add to used characters.
240 (INSN_MIPS32): New define for MIPS32 extensions.
241 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
156c2f8b 242
3c5ce02e
AM		 2432000-09-05 Alan Modra <alan@linuxcare.com.au>
244
245 * hppa.h: Mention cz completer.
246
50b81f19
JW		 2472000-08-16 Jim Wilson <wilson@cygnus.com>
248
249 * ia64.h (IA64_OPCODE_POSTINC): New.
250
fc29466d
L		 2512000-08-15 H.J. Lu <hjl@gnu.org>
252
253 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
254 IgnoreSize change.
255
4f1d9bd8
NC		 2562000-08-08 Jason Eckhardt <jle@cygnus.com>
257
258 * i860.h: Small formatting adjustments.
259
45ee1401
DC		 2602000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
261
262 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
263 Move related opcodes closer to each other.
264 Minor changes in comments, list undefined opcodes.
265
9d551405
DB		 2662000-07-26 Dave Brolley <brolley@redhat.com>
267
268 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
269
4f1d9bd8
NC		 2702000-07-22 Jason Eckhardt <jle@cygnus.com>
271
272 * i860.h (btne, bte, bla): Changed these opcodes
273 to use sbroff ('r') instead of split16 ('s').
274 (J, K, L, M): New operand types for 16-bit aligned fields.
275 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
276 use I, J, K, L, M instead of just I.
277 (T, U): New operand types for split 16-bit aligned fields.
278 (st.x): Changed these opcodes to use S, T, U instead of just S.
279 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
280 exist on the i860.
281 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
282 (pfeq.ss, pfeq.dd): New opcodes.
283 (st.s): Fixed incorrect mask bits.
284 (fmlow): Fixed incorrect mask bits.
285 (fzchkl, pfzchkl): Fixed incorrect mask bits.
286 (faddz, pfaddz): Fixed incorrect mask bits.
287 (form, pform): Fixed incorrect mask bits.
288 (pfld.l): Fixed incorrect mask bits.
289 (fst.q): Fixed incorrect mask bits.
290 (all floating point opcodes): Fixed incorrect mask bits for
291 handling of dual bit.
292
c8488617
HPN		 2932000-07-20 Hans-Peter Nilsson <hp@axis.com>
294
295 cris.h: New file.
296
65aa24b6
NC		 2972000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
298
299 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
300 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
301 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
302 (AVR_ISA_M83): Define for ATmega83, ATmega85.
303 (espm): Remove, because ESPM removed in databook update.
304 (eicall, eijmp): Move to the end of opcode table.
305
60bcf0fa
NC		 3062000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
307
308 * m68hc11.h: New file for support of Motorola 68hc11.
309
60a2978a
DC		 310Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
311
312 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
313
68ab2dd9
DC		 314Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
315
316 * avr.h: New file with AVR opcodes.
317
f0662e27
DL		 318Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
319
320 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
321
b722f2be
AM		 3222000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
323
324 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
325
f9e0cf0b
AM		 3262000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
327
328 * i386.h: Use sl_FP, not sl_Suf for fild.
329
f660ee8b
FCE		 3302000-05-16 Frank Ch. Eigler <fche@redhat.com>
331
332 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
333 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
334 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
335 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
336
558b0a60
AM		 3372000-05-13 Alan Modra <alan@linuxcare.com.au>,
338
339 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
340
e413e4e9
AM		 3412000-05-13 Alan Modra <alan@linuxcare.com.au>,
342 Alexander Sokolov <robocop@netlink.ru>
343
344 * i386.h (i386_optab): Add cpu_flags for all instructions.
345
3462000-05-13 Alan Modra <alan@linuxcare.com.au>
347
348 From Gavin Romig-Koch <gavin@cygnus.com>
349 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
350
5c84d377
TW		 3512000-05-04 Timothy Wall <twall@cygnus.com>
352
353 * tic54x.h: New.
354
966f959b
C		 3552000-05-03 J.T. Conklin <jtc@redback.com>
356
357 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
358 (PPC_OPERAND_VR): New operand flag for vector registers.
359
c5d05dbb
JL		 3602000-05-01 Kazu Hirata <kazu@hxi.com>
361
362 * h8300.h (EOP): Add missing initializer.
363
a7fba0e0
JL		 364Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
365
366 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
367 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
368 New operand types l,y,&,fe,fE,fx added to support above forms.
369 (pa_opcodes): Replaced usage of 'x' as source/target for
370 floating point double-word loads/stores with 'fx'.
371
800eeca4
JW		 372Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
373 David Mosberger <davidm@hpl.hp.com>
374 Timothy Wall <twall@cygnus.com>
375 Jim Wilson <wilson@cygnus.com>
376
377 * ia64.h: New file.
378
ba23e138
NC		 3792000-03-27 Nick Clifton <nickc@cygnus.com>
380
381 * d30v.h (SHORT_A1): Fix value.
382 (SHORT_AR): Renumber so that it is at the end of the list of short
383 instructions, not the end of the list of long instructions.
384
d0b47220
AM		 3852000-03-26 Alan Modra <alan@linuxcare.com>
386
387 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
388 problem isn't really specific to Unixware.
389 (OLDGCC_COMPAT): Define.
390 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
391 destination %st(0).
392 Fix lots of comments.
393
866afedc
NC		 3942000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
395
396 * d30v.h:
397 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
398 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
399 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
400 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
401 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
402 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
403 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
404
cc5ca5ce
AM		 4052000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
406
407 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
408 fistpd without suffix.
409
68e324a2
NC		 4102000-02-24 Nick Clifton <nickc@cygnus.com>
411
412 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
413 'signed_overflow_ok_p'.
414 Delete prototypes for cgen_set_flags() and cgen_get_flags().
415
60f036a2
AH		 4162000-02-24 Andrew Haley <aph@cygnus.com>
417
418 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
419 (CGEN_CPU_TABLE): flags: new field.
420 Add prototypes for new functions.
d83c6548 421
9b9b5cd4
AM		 4222000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
423
424 * i386.h: Add some more UNIXWARE_COMPAT comments.
425
5b93d8bb
AM		 4262000-02-23 Linas Vepstas <linas@linas.org>
427
428 * i370.h: New file.
429
4f1d9bd8
NC		 4302000-02-22 Chandra Chavva <cchavva@cygnus.com>
431
432 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
433 cannot be combined in parallel with ADD/SUBppp.
434
87f398dd
AH		 4352000-02-22 Andrew Haley <aph@cygnus.com>
436
437 * mips.h: (OPCODE_IS_MEMBER): Add comment.
438
367c01af
AH		 4391999-12-30 Andrew Haley <aph@cygnus.com>
440
9a1e79ca
AH		 441 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
442 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
443 insns.
367c01af 444
add0c677
AM		 4452000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
446
447 * i386.h: Qualify intel mode far call and jmp with x_Suf.
448
3138f287
AM		 4491999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
450
451 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
452 indirect jumps and calls. Add FF/3 call for intel mode.
453
ccecd07b
JL		 454Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
455
456 * mn10300.h: Add new operand types. Add new instruction formats.
457
b37e19e9
JL		 458Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
459
460 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
461 instruction.
462
5fce5ddf
GRK		 4631999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
464
465 * mips.h (INSN_ISA5): New.
466
2bd7f1f3
GRK		 4671999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
468
469 * mips.h (OPCODE_IS_MEMBER): New.
470
4df2b5c5
NC		 4711999-10-29 Nick Clifton <nickc@cygnus.com>
472
473 * d30v.h (SHORT_AR): Define.
474
446a06c9
MM		 4751999-10-18 Michael Meissner <meissner@cygnus.com>
476
477 * alpha.h (alpha_num_opcodes): Convert to unsigned.
478 (alpha_num_operands): Ditto.
479
eca04c6a
JL		 480Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
481
482 * hppa.h (pa_opcodes): Add load and store cache control to
483 instructions. Add ordered access load and store.
484
485 * hppa.h (pa_opcode): Add new entries for addb and addib.
486
487 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
488
489 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
490
c43185de
DN		 491Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
492
493 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
494
ec3533da
JL		 495Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
496
390f858d
JL		 497 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
498 and "be" using completer prefixes.
499
8c47ebd9
JL		 500 * hppa.h (pa_opcodes): Add initializers to silence compiler.
501
ec3533da
JL		 502 * hppa.h: Update comments about character usage.
503
18369bea
JL		 504Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
505
506 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
507 up the new fstw & bve instructions.
508
c36efdd2
JL		 509Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
510
d3ffb032
JL		 511 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
512 instructions.
513
c49ec3da
JL		 514 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
515
5d2e7ecc
JL		 516 * hppa.h (pa_opcodes): Add long offset double word load/store
517 instructions.
518
6397d1a2
JL		 519 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
520 stores.
521
142f0fe0
JL		 522 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
523
f5a68b45
JL		 524 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
525
8235801e
JL		 526 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
527
35184366
JL		 528 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
529
f0bfde5e
JL		 530 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
531
27bbbb58
JL		 532 * hppa.h (pa_opcodes): Add support for "b,l".
533
c36efdd2
JL		 534 * hppa.h (pa_opcodes): Add support for "b,gate".
535
f2727d04
JL		 536Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
537
9392fb11 538 * hppa.h (pa_opcodes): Use 'fX' for first register operand
d83c6548 539 in xmpyu.
9392fb11 540
e0c52e99
JL		 541 * hppa.h (pa_opcodes): Fix mask for probe and probei.
542
f2727d04
JL		 543 * hppa.h (pa_opcodes): Fix mask for depwi.
544
52d836e2
JL		 545Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
546
547 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
548 an explicit output argument.
549
90765e3a
JL		 550Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
551
552 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
553 Add a few PA2.0 loads and store variants.
554
8340b17f
ILT		 5551999-09-04 Steve Chamberlain <sac@pobox.com>
556
557 * pj.h: New file.
558
5f47d35b
AM		 5591999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
560
561 * i386.h (i386_regtab): Move %st to top of table, and split off
562 other fp reg entries.
563 (i386_float_regtab): To here.
564
1c143202
JL		 565Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
566
7d8fdb64
JL		 567 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
568 by 'f'.
569
90927b9c
JL		 570 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
571 Add supporting args.
572
1d16bf9c
JL		 573 * hppa.h: Document new completers and args.
574 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
575 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
576 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
577 pmenb and pmdis.
578
96226a68
JL		 579 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
580 hshr, hsub, mixh, mixw, permh.
581
5d4ba527
JL		 582 * hppa.h (pa_opcodes): Change completers in instructions to
583 use 'c' prefix.
584
e9fc28c6
JL		 585 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
586 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
587
1c143202
JL		 588 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
589 fnegabs to use 'I' instead of 'F'.
590
9e525108
AM		 5911999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
592
593 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
594 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
595 Alphabetically sort PIII insns.
596
e8da1bf1
DE		 597Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
598
599 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
600
7d627258
JL		 601Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
602
5696871a
JL		 603 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
604 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
605
7d627258
JL		 606 * hppa.h: Document 64 bit condition completers.
607
c5e52916
JL		 608Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
609
610 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
611
eecb386c
AM		 6121999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
613
614 * i386.h (i386_optab): Add DefaultSize modifier to all insns
615 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
616 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
617
88a380f3
JL		 618Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
619 Jeff Law <law@cygnus.com>
620
621 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
622
623 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca 624
d83c6548 625 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
d60e8dca
JL		 626 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
627
145cf1f0
AM		 6281999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
629
630 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
631
73826640
JL		 632Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
633
634 * hppa.h (struct pa_opcode): Add new field "flags".
635 (FLAGS_STRICT): Define.
636
b65db252
JL		 637Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
638 Jeff Law <law@cygnus.com>
639
f7fc668b
JL		 640 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
641
642 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 643
10084519
AM		 6441999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
645
646 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
647 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
648 flag to fcomi and friends.
649
cd8a80ba
JL		 650Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
651
652 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
d83c6548 653 integer logical instructions.
cd8a80ba 654
1fca749b
ILT		 6551999-05-28 Linus Nordberg <linus.nordberg@canit.se>
656
657 * m68k.h: Document new formats `E', `G', `H' and new places `N',
658 `n', `o'.
659
660 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
661 and new places `m', `M', `h'.
662
aa008907
JL		 663Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
664
665 * hppa.h (pa_opcodes): Add several processor specific system
666 instructions.
667
e26b85f0
JL		 668Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
669
d83c6548 670 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
e26b85f0
JL		 671 "addb", and "addib" to be used by the disassembler.
672
c608c12e
AM		 6731999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
674
675 * i386.h (ReverseModrm): Remove all occurences.
676 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
677 movmskps, pextrw, pmovmskb, maskmovq.
678 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
679 ignore the data size prefix.
680
681 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
682 Mostly stolen from Doug Ledford <dledford@redhat.com>
683
45c18104
RH		 684Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
685
686 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
687
252b5132
RH		 6881999-04-14 Doug Evans <devans@casey.cygnus.com>
689
690 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
691 (CGEN_ATTR_TYPE): Update.
692 (CGEN_ATTR_MASK): Number booleans starting at 0.
693 (CGEN_ATTR_VALUE): Update.
694 (CGEN_INSN_ATTR): Update.
695
696Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
697
698 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
699 instructions.
700
701Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
702
703 * hppa.h (bb, bvb): Tweak opcode/mask.
704
705
7061999-03-22 Doug Evans <devans@casey.cygnus.com>
707
708 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
709 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
710 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
711 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
712 Delete member max_insn_size.
713 (enum cgen_cpu_open_arg): New enum.
714 (cpu_open): Update prototype.
715 (cpu_open_1): Declare.
716 (cgen_set_cpu): Delete.
717
7181999-03-11 Doug Evans <devans@casey.cygnus.com>
719
720 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
721 (CGEN_OPERAND_NIL): New macro.
722 (CGEN_OPERAND): New member `type'.
723 (@arch@_cgen_operand_table): Delete decl.
724 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
725 (CGEN_OPERAND_TABLE): New struct.
726 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
727 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
728 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
729 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
730 {get,set}_{int,vma}_operand.
731 (@arch@_cgen_cpu_open): New arg `isa'.
732 (cgen_set_cpu): Ditto.
733
734Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
735
736 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
737
7381999-02-25 Doug Evans <devans@casey.cygnus.com>
739
740 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
741 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
742 enum cgen_hw_type.
743 (CGEN_HW_TABLE): New struct.
744 (hw_table): Delete declaration.
745 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
746 to table entry to enum.
747 (CGEN_OPINST): Ditto.
748 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
749
750Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
751
752 * alpha.h (AXP_OPCODE_EV6): New.
753 (AXP_OPCODE_NOPAL): Include it.
754
7551999-02-09 Doug Evans <devans@casey.cygnus.com>
756
757 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
758 All uses updated. New members int_insn_p, max_insn_size,
759 parse_operand,insert_operand,extract_operand,print_operand,
760 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
761 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
762 extract_handlers,print_handlers.
763 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
764 (CGEN_ATTR_BOOL_OFFSET): New macro.
765 (CGEN_ATTR_MASK): Subtract it to compute bit number.
766 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
767 (cgen_opcode_handler): Renamed from cgen_base.
768 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
769 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
770 all uses updated.
771 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
772 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
773 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
774 (CGEN_OPCODE,CGEN_IBASE): New types.
775 (CGEN_INSN): Rewrite.
776 (CGEN_{ASM,DIS}_HASH*): Delete.
777 (init_opcode_table,init_ibld_table): Declare.
778 (CGEN_INSN_ATTR): New type.
779
780Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
d83c6548 781
252b5132
RH		 782 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
783 (x_FP, d_FP, dls_FP, sldx_FP): Define.
784 Change *Suf definitions to include x and d suffixes.
785 (movsx): Use w_Suf and b_Suf.
786 (movzx): Likewise.
787 (movs): Use bwld_Suf.
788 (fld): Change ordering. Use sld_FP.
789 (fild): Add Intel Syntax equivalent of fildq.
790 (fst): Use sld_FP.
791 (fist): Use sld_FP.
792 (fstp): Use sld_FP. Add x_FP version.
793 (fistp): LLongMem version for Intel Syntax.
794 (fcom, fcomp): Use sld_FP.
795 (fadd, fiadd, fsub): Use sld_FP.
796 (fsubr): Use sld_FP.
797 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
798
7991999-01-27 Doug Evans <devans@casey.cygnus.com>
800
801 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
802 CGEN_MODE_UINT.
803
e135f41b 8041999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH		 805
806 * hppa.h (bv): Fix mask.
807
8081999-01-05 Doug Evans <devans@casey.cygnus.com>
809
810 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
811 (CGEN_ATTR): Use it.
812 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
813 (CGEN_ATTR_TABLE): New member dfault.
814
8151998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
816
817 * mips.h (MIPS16_INSN_BRANCH): New.
818
819Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
820
821 The following is part of a change made by Edith Epstein
d83c6548
AJ		 822 <eepstein@sophia.cygnus.com> as part of a project to merge in
823 changes by HP; HP did not create ChangeLog entries.
252b5132
RH		 824
825 * hppa.h (completer_chars): list of chars to not put a space
d83c6548 826 after.
252b5132
RH		 827
828Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
829
830 * i386.h (i386_optab): Permit w suffix on processor control and
d83c6548 831 status word instructions.
252b5132
RH		 832
8331998-11-30 Doug Evans <devans@casey.cygnus.com>
834
835 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
836 (struct cgen_keyword_entry): Ditto.
837 (struct cgen_operand): Ditto.
838 (CGEN_IFLD): New typedef, with associated access macros.
839 (CGEN_IFMT): New typedef, with associated access macros.
840 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
841 (CGEN_IVALUE): New typedef.
842 (struct cgen_insn): Delete const on syntax,attrs members.
843 `format' now points to format data. Type of `value' is now
844 CGEN_IVALUE.
845 (struct cgen_opcode_table): New member ifld_table.
846
8471998-11-18 Doug Evans <devans@casey.cygnus.com>
848
849 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
850 (CGEN_OPERAND_INSTANCE): New member `attrs'.
851 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
852 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
853 (cgen_opcode_table): Update type of dis_hash fn.
854 (extract_operand): Update type of `insn_value' arg.
855
856Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
857
858 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
859
860Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
861
862 * mips.h (INSN_MULT): Added.
863
864Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
865
866 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
867
868Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
869
870 * cgen.h (CGEN_INSN_INT): New typedef.
871 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
872 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
873 (CGEN_INSN_BYTES_PTR): New typedef.
874 (CGEN_EXTRACT_INFO): New typedef.
875 (cgen_insert_fn,cgen_extract_fn): Update.
876 (cgen_opcode_table): New member `insn_endian'.
877 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
878 (insert_operand,extract_operand): Update.
879 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
880
881Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
882
883 * cgen.h (CGEN_ATTR_BOOLS): New macro.
884 (struct CGEN_HW_ENTRY): New member `attrs'.
885 (CGEN_HW_ATTR): New macro.
886 (struct CGEN_OPERAND_INSTANCE): New member `name'.
887 (CGEN_INSN_INVALID_P): New macro.
888
889Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
890
891 * hppa.h: Add "fid".
d83c6548 892
252b5132
RH		 893Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
894
895 From Robert Andrew Dale <rob@nb.net>
896 * i386.h (i386_optab): Add AMD 3DNow! instructions.
897 (AMD_3DNOW_OPCODE): Define.
898
899Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
900
901 * d30v.h (EITHER_BUT_PREFER_MU): Define.
902
903Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
904
905 * cgen.h (cgen_insn): #if 0 out element `cdx'.
906
907Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
908
909 Move all global state data into opcode table struct, and treat
910 opcode table as something that is "opened/closed".
911 * cgen.h (CGEN_OPCODE_DESC): New type.
912 (all fns): New first arg of opcode table descriptor.
913 (cgen_set_parse_operand_fn): Add prototype.
914 (cgen_current_machine,cgen_current_endian): Delete.
915 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
916 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
917 dis_hash_table,dis_hash_table_entries.
918 (opcode_open,opcode_close): Add prototypes.
919
920 * cgen.h (cgen_insn): New element `cdx'.
921
922Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
923
924 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
925
926Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
927
928 * mn10300.h: Add "no_match_operands" field for instructions.
929 (MN10300_MAX_OPERANDS): Define.
930
931Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
932
933 * cgen.h (cgen_macro_insn_count): Declare.
934
935Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
936
937 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
938 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
939 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
940 set_{int,vma}_operand.
941
942Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
943
944 * mn10300.h: Add "machine" field for instructions.
945 (MN103, AM30): Define machine types.
d83c6548 946
252b5132
RH		 947Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
948
949 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
950
9511998-06-18 Ulrich Drepper <drepper@cygnus.com>
952
953 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
954
955Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
956
957 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
958 and ud2b.
959 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
960 those that happen to be implemented on pentiums.
961
962Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
963
964 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
965 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
966 with Size16|IgnoreSize or Size32|IgnoreSize.
967
968Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
969
970 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
971 (REPE): Rename to REPE_PREFIX_OPCODE.
972 (i386_regtab_end): Remove.
973 (i386_prefixtab, i386_prefixtab_end): Remove.
974 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
975 of md_begin.
976 (MAX_OPCODE_SIZE): Define.
977 (i386_optab_end): Remove.
978 (sl_Suf): Define.
979 (sl_FP): Use sl_Suf.
980
981 * i386.h (i386_optab): Allow 16 bit displacement for `mov
982 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
983 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
984 data32, dword, and adword prefixes.
985 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
986 regs.
987
988Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
989
990 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
991
992 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
993 register operands, because this is a common idiom. Flag them with
994 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
995 fdivrp because gcc erroneously generates them. Also flag with a
996 warning.
997
998 * i386.h: Add suffix modifiers to most insns, and tighter operand
999 checks in some cases. Fix a number of UnixWare compatibility
1000 issues with float insns. Merge some floating point opcodes, using
1001 new FloatMF modifier.
1002 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
1003 consistency.
1004
1005 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
1006 IgnoreDataSize where appropriate.
1007
1008Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1009
1010 * i386.h: (one_byte_segment_defaults): Remove.
1011 (two_byte_segment_defaults): Remove.
1012 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
1013
1014Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
1015
1016 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
1017 (cgen_hw_lookup_by_num): Declare.
1018
1019Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
1020
1021 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
1022 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
1023
1024Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
1025
1026 * cgen.h (cgen_asm_init_parse): Delete.
1027 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
1028 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
1029
1030Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
1031
1032 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
1033 (cgen_asm_finish_insn): Update prototype.
1034 (cgen_insn): New members num, data.
1035 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
1036 dis_hash, dis_hash_table_size moved to ...
1037 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
1038 All uses updated. New members asm_hash_p, dis_hash_p.
1039 (CGEN_MINSN_EXPANSION): New struct.
1040 (cgen_expand_macro_insn): Declare.
1041 (cgen_macro_insn_count): Declare.
1042 (get_insn_operands): Update prototype.
1043 (lookup_get_insn_operands): Declare.
1044
1045Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1046
1047 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1048 regKludge. Add operands types for string instructions.
1049
1050Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1051
1052 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1053 table.
1054
1055Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1056
1057 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1058 for `gettext'.
1059
1060Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1061
1062 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1063 Add IsString flag to string instructions.
1064 (IS_STRING): Don't define.
1065 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1066 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1067 (SS_PREFIX_OPCODE): Define.
1068
1069Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1070
1071 * i386.h: Revert March 24 patch; no more LinearAddress.
1072
1073Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1074
1075 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1076 instructions, and instead add FWait opcode modifier. Add short
1077 form of fldenv and fstenv.
1078 (FWAIT_OPCODE): Define.
1079
1080 * i386.h (i386_optab): Change second operand constraint of `mov
1081 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1082 allow legal instructions such as `movl %gs,%esi'
1083
1084Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1085
1086 * h8300.h: Various changes to fully bracket initializers.
1087
1088Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1089
1090 * i386.h: Set LinearAddress for lidt and lgdt.
1091
1092Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1093
1094 * cgen.h (CGEN_BOOL_ATTR): New macro.
1095
1096Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1097
1098 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1099
1100Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1101
1102 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1103 (cgen_insn): Record syntax and format entries here, rather than
1104 separately.
1105
1106Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1107
1108 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1109
1110Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1111
1112 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1113 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1114 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1115
1116Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1117
1118 * cgen.h (lookup_insn): New argument alias_p.
1119
1120Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1121
1122Fix rac to accept only a0:
1123 * d10v.h (OPERAND_ACC): Split into:
1124 (OPERAND_ACC0, OPERAND_ACC1) .
1125 (OPERAND_GPR): Define.
1126
1127Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1128
1129 * cgen.h (CGEN_FIELDS): Define here.
1130 (CGEN_HW_ENTRY): New member `type'.
1131 (hw_list): Delete decl.
1132 (enum cgen_mode): Declare.
1133 (CGEN_OPERAND): New member `hw'.
1134 (enum cgen_operand_instance_type): Declare.
1135 (CGEN_OPERAND_INSTANCE): New type.
1136 (CGEN_INSN): New member `operands'.
1137 (CGEN_OPCODE_DATA): Make hw_list const.
1138 (get_insn_operands,lookup_insn): Add prototypes for.
1139
1140Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1141
1142 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1143 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1144 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1145 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1146
1147Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1148
1149 * cgen.h: Correct typo in comment end marker.
1150
1151Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1152
1153 * tic30.h: New file.
1154
5a109b67 1155Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH		 1156
1157 * cgen.h: Add prototypes for cgen_save_fixups(),
1158 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1159 of cgen_asm_finish_insn() to return a char *.
1160
1161Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1162
1163 * cgen.h: Formatting changes to improve readability.
1164
1165Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1166
1167 * cgen.h (*): Clean up pass over `struct foo' usage.
1168 (CGEN_ATTR): Make unsigned char.
1169 (CGEN_ATTR_TYPE): Update.
1170 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1171 (cgen_base): Move member `attrs' to cgen_insn.
1172 (CGEN_KEYWORD): New member `null_entry'.
1173 (CGEN_{SYNTAX,FORMAT}): New types.
1174 (cgen_insn): Format and syntax separated from each other.
1175
1176Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1177
1178 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1179 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1180 flags_{used,set} long.
1181 (d30v_operand): Make flags field long.
1182
1183Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1184
1185 * m68k.h: Fix comment describing operand types.
1186
1187Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1188
1189 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1190 everything else after down.
1191
1192Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1193
1194 * d10v.h (OPERAND_FLAG): Split into:
1195 (OPERAND_FFLAG, OPERAND_CFLAG) .
1196
1197Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1198
1199 * mips.h (struct mips_opcode): Changed comments to reflect new
1200 field usage.
1201
1202Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1203
1204 * mips.h: Added to comments a quick-ref list of all assigned
1205 operand type characters.
1206 (OP_{MASK,SH}_PERFREG): New macros.
1207
1208Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1209
1210 * sparc.h: Add '_' and '/' for v9a asr's.
1211 Patch from David Miller <davem@vger.rutgers.edu>
1212
1213Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1214
1215 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1216 area are not available in the base model (H8/300).
1217
1218Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1219
1220 * m68k.h: Remove documentation of ` operand specifier.
1221
1222Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1223
1224 * m68k.h: Document q and v operand specifiers.
1225
1226Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1227
1228 * v850.h (struct v850_opcode): Add processors field.
1229 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1230 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1231 (PROCESSOR_V850EA): New bit constants.
1232
1233Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1234
1235 Merge changes from Martin Hunt:
1236
1237 * d30v.h: Allow up to 64 control registers. Add
1238 SHORT_A5S format.
1239
1240 * d30v.h (LONG_Db): New form for delayed branches.
1241
1242 * d30v.h: (LONG_Db): New form for repeati.
1243
1244 * d30v.h (SHORT_D2B): New form.
1245
1246 * d30v.h (SHORT_A2): New form.
1247
1248 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1249 registers are used. Needed for VLIW optimization.
1250
1251Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1252
1253 * cgen.h: Move assembler interface section
1254 up so cgen_parse_operand_result is defined for cgen_parse_address.
1255 (cgen_parse_address): Update prototype.
1256
1257Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1258
1259 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1260
1261Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1262
1263 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1264 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1265 <paubert@iram.es>.
1266
1267 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1268 <paubert@iram.es>.
1269
1270 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1271 <paubert@iram.es>.
1272
1273 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1274 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1275
1276Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1277
1278 * v850.h (V850_NOT_R0): New flag.
1279
1280Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1281
1282 * v850.h (struct v850_opcode): Remove flags field.
1283
1284Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1285
1286 * v850.h (struct v850_opcode): Add flags field.
1287 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1288 fields.
1289 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1290 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1291
1292Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1293
1294 * arc.h: New file.
1295
1296Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1297
1298 * sparc.h (sparc_opcodes): Declare as const.
1299
1300Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1301
1302 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1303 uses single or double precision floating point resources.
1304 (INSN_NO_ISA, INSN_ISA1): Define.
1305 (cpu specific INSN macros): Tweak into bitmasks outside the range
1306 of INSN_ISA field.
1307
1308Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1309
1310 * i386.h: Fix pand opcode.
1311
1312Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1313
1314 * mips.h: Widen INSN_ISA and move it to a more convenient
1315 bit position. Add INSN_3900.
1316
1317Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1318
1319 * mips.h (struct mips_opcode): added new field membership.
1320
1321Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1322
1323 * i386.h (movd): only Reg32 is allowed.
1324
1325 * i386.h: add fcomp and ud2. From Wayne Scott
1326 <wscott@ichips.intel.com>.
1327
1328Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1329
1330 * i386.h: Add MMX instructions.
1331
1332Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1333
1334 * i386.h: Remove W modifier from conditional move instructions.
1335
1336Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1337
1338 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1339 with no arguments to match that generated by the UnixWare
1340 assembler.
1341
1342Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1343
1344 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1345 (cgen_parse_operand_fn): Declare.
1346 (cgen_init_parse_operand): Declare.
1347 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1348 new argument `want'.
1349 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1350 (enum cgen_parse_operand_type): New enum.
1351
1352Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1353
1354 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1355
1356Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1357
1358 * cgen.h: New file.
1359
1360Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1361
1362 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1363 fdivrp.
1364
1365Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1366
1367 * v850.h (extract): Make unsigned.
1368
1369Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1370
1371 * i386.h: Add iclr.
1372
1373Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1374
1375 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1376 take a direction bit.
1377
1378Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1379
1380 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1381
1382Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1383
1384 * sparc.h: Include <ansidecl.h>. Update function declarations to
1385 use prototypes, and to use const when appropriate.
1386
1387Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1388
1389 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1390
1391Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1392
1393 * d10v.h: Change pre_defined_registers to
1394 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1395
1396Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1397
1398 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1399 Change mips_opcodes from const array to a pointer,
1400 and change bfd_mips_num_opcodes from const int to int,
1401 so that we can increase the size of the mips opcodes table
1402 dynamically.
1403
1404Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1405
1406 * d30v.h (FLAG_X): Remove unused flag.
1407
1408Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1409
1410 * d30v.h: New file.
1411
1412Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1413
1414 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1415 (PDS_VALUE): Macro to access value field of predefined symbols.
1416 (tic80_next_predefined_symbol): Add prototype.
1417
1418Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1419
1420 * tic80.h (tic80_symbol_to_value): Change prototype to match
1421 change in function, added class parameter.
1422
1423Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1424
1425 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1426 endmask fields, which are somewhat weird in that 0 and 32 are
1427 treated exactly the same.
1428
1429Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1430
1431 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1432 rather than a constant that is 2**X. Reorder them to put bits for
1433 operands that have symbolic names in the upper bits, so they can
1434 be packed into an int where the lower bits contain the value that
1435 corresponds to that symbolic name.
1436 (predefined_symbo): Add struct.
1437 (tic80_predefined_symbols): Declare array of translations.
1438 (tic80_num_predefined_symbols): Declare size of that array.
1439 (tic80_value_to_symbol): Declare function.
1440 (tic80_symbol_to_value): Declare function.
1441
1442Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1443
1444 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1445
1446Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1447
1448 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1449 be the destination register.
1450
1451Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1452
1453 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1454 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1455 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1456 that the opcode can have two vector instructions in a single
1457 32 bit word and we have to encode/decode both.
1458
1459Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1460
1461 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1462 TIC80_OPERAND_RELATIVE for PC relative.
1463 (TIC80_OPERAND_BASEREL): New flag bit for register
1464 base relative.
1465
1466Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1467
1468 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1469
1470Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1471
1472 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1473 ":s" modifier for scaling.
1474
1475Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1476
1477 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1478 (TIC80_OPERAND_M_LI): Ditto
1479
1480Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1481
1482 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1483 (TIC80_OPERAND_CC): New define for condition code operand.
1484 (TIC80_OPERAND_CR): New define for control register operand.
1485
1486Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1487
1488 * tic80.h (struct tic80_opcode): Name changed.
1489 (struct tic80_opcode): Remove format field.
1490 (struct tic80_operand): Add insertion and extraction functions.
1491 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1492 correct ones.
1493 (FMT_*): Ditto.
1494
1495Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1496
1497 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1498 type IV instruction offsets.
1499
1500Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1501
1502 * tic80.h: New file.
1503
1504Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1505
1506 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1507
1508Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1509
1510 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1511 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1512 * v850.h: Fix comment, v850_operand not powerpc_operand.
1513
1514Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1515
1516 * mn10200.h: Flesh out structures and definitions needed by
1517 the mn10200 assembler & disassembler.
1518
1519Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1520
1521 * mips.h: Add mips16 definitions.
1522
1523Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1524
1525 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1526
1527Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1528
1529 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1530 (MN10300_OPERAND_MEMADDR): Define.
1531
1532Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1533
1534 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1535
1536Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1537
1538 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1539
1540Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1541
1542 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1543
1544Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1545
1546 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1547
1548Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1549
1550 * alpha.h: Don't include "bfd.h"; private relocation types are now
d83c6548
AJ		 1551 negative to minimize problems with shared libraries. Organize
1552 instruction subsets by AMASK extensions and PALcode
1553 implementation.
252b5132
RH		 1554 (struct alpha_operand): Move flags slot for better packing.
1555
1556Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1557
1558 * v850.h (V850_OPERAND_RELAX): New operand flag.
1559
1560Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1561
1562 * mn10300.h (FMT_*): Move operand format definitions
1563 here.
1564
1565Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1566
1567 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1568
1569Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1570
1571 * mn10300.h (mn10300_opcode): Add "format" field.
1572 (MN10300_OPERAND_*): Define.
1573
1574Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1575
1576 * mn10x00.h: Delete.
1577 * mn10200.h, mn10300.h: New files.
1578
1579Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1580
1581 * mn10x00.h: New file.
1582
1583Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1584
1585 * v850.h: Add new flag to indicate this instruction uses a PC
1586 displacement.
1587
1588Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1589
1590 * h8300.h (stmac): Add missing instruction.
1591
1592Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1593
1594 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1595 field.
1596
1597Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1598
1599 * v850.h (V850_OPERAND_EP): Define.
1600
1601 * v850.h (v850_opcode): Add size field.
1602
1603Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1604
1605 * v850.h (v850_operands): Add insert and extract fields, pointers
d83c6548 1606 to functions used to handle unusual operand encoding.
252b5132 1607 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
d83c6548 1608 V850_OPERAND_SIGNED): Defined.
252b5132
RH		 1609
1610Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1611
1612 * v850.h (v850_operands): Add flags field.
1613 (OPERAND_REG, OPERAND_NUM): Defined.
1614
1615Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1616
1617 * v850.h: New file.
1618
1619Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1620
1621 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
d83c6548
AJ		 1622 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1623 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1624 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1625 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1626 Defined.
252b5132
RH		 1627
1628Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1629
1630 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1631 a 3 bit space id instead of a 2 bit space id.
1632
1633Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1634
1635 * d10v.h: Add some additional defines to support the
d83c6548 1636 assembler in determining which operations can be done in parallel.
252b5132
RH		 1637
1638Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1639
1640 * h8300.h (SN): Define.
1641 (eepmov.b): Renamed from "eepmov"
1642 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1643 with them.
1644
1645Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1646
1647 * d10v.h (OPERAND_SHIFT): New operand flag.
1648
1649Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1650
1651 * d10v.h: Changes for divs, parallel-only instructions, and
d83c6548 1652 signed numbers.
252b5132
RH		 1653
1654Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1655
1656 * d10v.h (pd_reg): Define. Putting the definition here allows
1657 the assembler and disassembler to share the same struct.
1658
1659Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1660
1661 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1662 Williams <steve@icarus.com>.
1663
1664Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1665
1666 * d10v.h: New file.
1667
1668Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1669
1670 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1671
1672Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1673
d83c6548 1674 * m68k.h (mcf5200): New macro.
252b5132
RH		 1675 Document names of coldfire control registers.
1676
1677Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1678
1679 * h8300.h (SRC_IN_DST): Define.
1680
1681 * h8300.h (UNOP3): Mark the register operand in this insn
1682 as a source operand, not a destination operand.
1683 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1684 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1685 register operand with SRC_IN_DST.
1686
1687Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1688
1689 * alpha.h: New file.
1690
1691Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1692
1693 * rs6k.h: Remove obsolete file.
1694
1695Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1696
1697 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1698 fdivp, and fdivrp. Add ffreep.
1699
1700Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1701
1702 * h8300.h: Reorder various #defines for readability.
1703 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1704 (BITOP): Accept additional (unused) argument. All callers changed.
1705 (EBITOP): Likewise.
1706 (O_LAST): Bump.
1707 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1708
1709 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1710 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1711 (BITOP, EBITOP): Handle new H8/S addressing modes for
1712 bit insns.
1713 (UNOP3): Handle new shift/rotate insns on the H8/S.
1714 (insns using exr): New instructions.
1715 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1716
1717Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1718
1719 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1720 was incorrect.
1721
1722Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1723
1724 * h8300.h (START): Remove.
1725 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1726 and mov.l insns that can be relaxed.
1727
1728Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1729
1730 * i386.h: Remove Abs32 from lcall.
1731
1732Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1733
1734 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1735 (SLCPOP): New macro.
1736 Mark X,Y opcode letters as in use.
1737
1738Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1739
1740 * sparc.h (F_FLOAT, F_FBR): Define.
1741
1742Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1743
1744 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1745 from all insns.
1746 (ABS8SRC,ABS8DST): Add ABS8MEM.
1747 (add.l): Fix reg+reg variant.
1748 (eepmov.w): Renamed from eepmovw.
1749 (ldc,stc): Fix many cases.
1750
1751Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1752
1753 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1754
1755Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1756
1757 * sparc.h (O): Mark operand letter as in use.
1758
1759Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1760
1761 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1762 Mark operand letters uU as in use.
1763
1764Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1765
1766 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1767 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1768 (SPARC_OPCODE_SUPPORTED): New macro.
1769 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1770 (F_NOTV9): Delete.
1771
1772Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1773
1774 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1775 declaration consistent with return type in definition.
1776
1777Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1778
1779 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1780
1781Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1782
1783 * i386.h (i386_regtab): Add 80486 test registers.
1784
1785Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1786
1787 * i960.h (I_HX): Define.
1788 (i960_opcodes): Add HX instruction.
1789
1790Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1791
1792 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1793 and fclex.
1794
1795Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1796
1797 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1798 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1799 (bfd_* defines): Delete.
1800 (sparc_opcode_archs): Replaces architecture_pname.
1801 (sparc_opcode_lookup_arch): Declare.
1802 (NUMOPCODES): Delete.
1803
1804Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1805
1806 * sparc.h (enum sparc_architecture): Add v9a.
1807 (ARCHITECTURES_CONFLICT_P): Update.
1808
1809Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1810
1811 * i386.h: Added Pentium Pro instructions.
1812
1813Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1814
1815 * m68k.h: Document new 'W' operand place.
1816
1817Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1818
1819 * hppa.h: Add lci and syncdma instructions.
1820
1821Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1822
1823 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
d83c6548 1824 instructions.
252b5132
RH		 1825
1826Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1827
1828 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1829 assembler's -mcom and -many switches.
1830
1831Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1832
1833 * i386.h: Fix cmpxchg8b extension opcode description.
1834
1835Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1836
1837 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1838 and register cr4.
1839
1840Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1841
1842 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1843
1844Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1845
1846 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1847
1848Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1849
1850 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1851
1852Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1853
1854 * m68kmri.h: Remove.
1855
1856 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1857 declarations. Remove F_ALIAS and flag field of struct
1858 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1859 int. Make name and args fields of struct m68k_opcode const.
1860
1861Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1862
1863 * sparc.h (F_NOTV9): Define.
1864
1865Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1866
1867 * mips.h (INSN_4010): Define.
1868
1869Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1870
1871 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1872
1873 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1874 * m68k.h: Fix argument descriptions of coprocessor
1875 instructions to allow only alterable operands where appropriate.
1876 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1877 (m68k_opcode_aliases): Add more aliases.
1878
1879Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1880
1881 * m68k.h: Added explcitly short-sized conditional branches, and a
1882 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1883 svr4-based configurations.
1884
1885Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1886
1887 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1888 * i386.h: added missing Data16/Data32 flags to a few instructions.
1889
1890Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1891
1892 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1893 (OP_MASK_BCC, OP_SH_BCC): Define.
1894 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1895 (OP_MASK_CCC, OP_SH_CCC): Define.
1896 (INSN_READ_FPR_R): Define.
1897 (INSN_RFE): Delete.
1898
1899Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1900
1901 * m68k.h (enum m68k_architecture): Deleted.
1902 (struct m68k_opcode_alias): New type.
1903 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1904 matching constraints, values and flags. As a side effect of this,
1905 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1906 as I know were never used, now may need re-examining.
1907 (numopcodes): Now const.
1908 (m68k_opcode_aliases, numaliases): New variables.
1909 (endop): Deleted.
1910 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1911 m68k_opcode_aliases; update declaration of m68k_opcodes.
1912
1913Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1914
1915 * hppa.h (delay_type): Delete unused enumeration.
1916 (pa_opcode): Replace unused delayed field with an architecture
1917 field.
1918 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1919
1920Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1921
1922 * mips.h (INSN_ISA4): Define.
1923
1924Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1925
1926 * mips.h (M_DLA_AB, M_DLI): Define.
1927
1928Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1929
1930 * hppa.h (fstwx): Fix single-bit error.
1931
1932Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1933
1934 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1935
1936Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1937
1938 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1939 debug registers. From Charles Hannum (mycroft@netbsd.org).
1940
1941Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1942
1943 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1944 i386 support:
1945 * i386.h (MOV_AX_DISP32): New macro.
1946 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1947 of several call/return instructions.
1948 (ADDR_PREFIX_OPCODE): New macro.
1949
1950Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1951
1952 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1953
4f1d9bd8
NC		 1954 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1955 char.
252b5132
RH		 1956 (struct vot, field `name'): ditto.
1957
1958Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1959
1960 * vax.h: Supply and properly group all values in end sentinel.
1961
1962Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1963
1964 * mips.h (INSN_ISA, INSN_4650): Define.
1965
1966Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1967
1968 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1969 systems with a separate instruction and data cache, such as the
1970 29040, these instructions take an optional argument.
1971
1972Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1973
1974 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1975 INSN_TRAP.
1976
1977Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1978
1979 * mips.h (INSN_STORE_MEMORY): Define.
1980
1981Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1982
1983 * sparc.h: Document new operand type 'x'.
1984
1985Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1986
1987 * i960.h (I_CX2): New instruction category. It includes
1988 instructions available on Cx and Jx processors.
1989 (I_JX): New instruction category, for JX-only instructions.
1990 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1991 Jx-only instructions, in I_JX category.
1992
1993Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1994
1995 * ns32k.h (endop): Made pointer const too.
1996
1997Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1998
1999 * ns32k.h: Drop Q operand type as there is no correct use
2000 for it. Add I and Z operand types which allow better checking.
2001
2002Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
2003
2004 * h8300.h (xor.l) :fix bit pattern.
2005 (L_2): New size of operand.
2006 (trapa): Use it.
2007
2008Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2009
2010 * m68k.h: Move "trap" before "tpcc" to change disassembly.
2011
2012Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2013
2014 * sparc.h: Include v9 definitions.
2015
2016Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2017
2018 * m68k.h (m68060): Defined.
2019 (m68040up, mfloat, mmmu): Include it.
2020 (struct m68k_opcode): Widen `arch' field.
2021 (m68k_opcodes): Updated for M68060. Removed comments that were
2022 instructions commented out by "JF" years ago.
2023
2024Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2025
2026 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
2027 add a one-bit `flags' field.
2028 (F_ALIAS): New macro.
2029
2030Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
2031
2032 * h8300.h (dec, inc): Get encoding right.
2033
2034Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2035
2036 * ppc.h (struct powerpc_operand): Removed signedp field; just use
2037 a flag instead.
2038 (PPC_OPERAND_SIGNED): Define.
2039 (PPC_OPERAND_SIGNOPT): Define.
2040
2041Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2042
2043 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2044 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2045
2046Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2047
2048 * i386.h: Reverse last change. It'll be handled in gas instead.
2049
2050Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2051
2052 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2053 slower on the 486 and used the implicit shift count despite the
2054 explicit operand. The one-operand form is still available to get
2055 the shorter form with the implicit shift count.
2056
2057Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2058
2059 * hppa.h: Fix typo in fstws arg string.
2060
2061Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2062
2063 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2064
2065Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2066
2067 * ppc.h (PPC_OPCODE_601): Define.
2068
2069Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2070
2071 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2072 (so we can determine valid completers for both addb and addb[tf].)
2073
2074 * hppa.h (xmpyu): No floating point format specifier for the
2075 xmpyu instruction.
2076
2077Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2078
2079 * ppc.h (PPC_OPERAND_NEXT): Define.
2080 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2081 (struct powerpc_macro): Define.
2082 (powerpc_macros, powerpc_num_macros): Declare.
2083
2084Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2085
2086 * ppc.h: New file. Header file for PowerPC opcode table.
2087
2088Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2089
2090 * hppa.h: More minor template fixes for sfu and copr (to allow
2091 for easier disassembly).
2092
2093 * hppa.h: Fix templates for all the sfu and copr instructions.
2094
2095Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2096
2097 * i386.h (push): Permit Imm16 operand too.
2098
2099Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2100
2101 * h8300.h (andc): Exists in base arch.
2102
2103Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2104
2105 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2106 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2107
2108Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2109
2110 * hppa.h: Add FP quadword store instructions.
2111
2112Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2113
2114 * mips.h: (M_J_A): Added.
2115 (M_LA): Removed.
2116
2117Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2118
2119 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2120 <mellon@pepper.ncd.com>.
2121
2122Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2123
2124 * hppa.h: Immediate field in probei instructions is unsigned,
2125 not low-sign extended.
2126
2127Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2128
2129 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2130
2131Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2132
2133 * i386.h: Add "fxch" without operand.
2134
2135Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2136
2137 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2138
2139Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2140
2141 * hppa.h: Add gfw and gfr to the opcode table.
2142
2143Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2144
2145 * m88k.h: extended to handle m88110.
2146
2147Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2148
2149 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2150 addresses.
2151
2152Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2153
2154 * i960.h (i960_opcodes): Properly bracket initializers.
2155
2156Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2157
2158 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2159
2160Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2161
2162 * m68k.h (two): Protect second argument with parentheses.
2163
2164Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2165
2166 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2167 Deleted old in/out instructions in "#if 0" section.
2168
2169Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2170
2171 * i386.h (i386_optab): Properly bracket initializers.
2172
2173Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2174
2175 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2176 Jeff Law, law@cs.utah.edu).
2177
2178Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2179
2180 * i386.h (lcall): Accept Imm32 operand also.
2181
2182Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2183
2184 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2185 (M_DABS): Added.
2186
2187Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2188
2189 * mips.h (INSN_*): Changed values. Removed unused definitions.
2190 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2191 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2192 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2193 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2194 (M_*): Added new values for r6000 and r4000 macros.
2195 (ANY_DELAY): Removed.
2196
2197Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2198
2199 * mips.h: Added M_LI_S and M_LI_SS.
2200
2201Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2202
2203 * h8300.h: Get some rare mov.bs correct.
2204
2205Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2206
2207 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2208 been included.
2209
2210Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2211
2212 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2213 jump instructions, for use in disassemblers.
2214
2215Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2216
2217 * m88k.h: Make bitfields just unsigned, not unsigned long or
2218 unsigned short.
2219
2220Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2221
2222 * hppa.h: New argument type 'y'. Use in various float instructions.
2223
2224Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2225
2226 * hppa.h (break): First immediate field is unsigned.
2227
2228 * hppa.h: Add rfir instruction.
2229
2230Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2231
2232 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2233
2234Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2235
2236 * mips.h: Reworked the hazard information somewhat, and fixed some
2237 bugs in the instruction hazard descriptions.
2238
2239Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2240
2241 * m88k.h: Corrected a couple of opcodes.
2242
2243Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2244
2245 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2246 new version includes instruction hazard information, but is
2247 otherwise reasonably similar.
2248
2249Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2250
2251 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2252
2253Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2254
2255 Patches from Jeff Law, law@cs.utah.edu:
2256 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2257 Make the tables be the same for the following instructions:
2258 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2259 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2260 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2261 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2262 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2263 "fcmp", and "ftest".
2264
2265 * hppa.h: Make new and old tables the same for "break", "mtctl",
2266 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2267 Fix typo in last patch. Collapse several #ifdefs into a
2268 single #ifdef.
2269
2270 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2271 of the comments up-to-date.
2272
2273 * hppa.h: Update "free list" of letters and update
2274 comments describing each letter's function.
2275
4f1d9bd8
NC		 2276Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2277
2278 * h8300.h: Lots of little fixes for the h8/300h.
2279
2280Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2281
2282 Support for H8/300-H
2283 * h8300.h: Lots of new opcodes.
2284
252b5132
RH		 2285Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2286
2287 * h8300.h: checkpoint, includes H8/300-H opcodes.
2288
2289Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2290
2291 * Patches from Jeffrey Law <law@cs.utah.edu>.
2292 * hppa.h: Rework single precision FP
2293 instructions so that they correctly disassemble code
2294 PA1.1 code.
2295
2296Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2297
2298 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2299 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2300
2301Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2302
2303 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2304 gdb will define it for now.
2305
2306Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2307
2308 * sparc.h: Don't end enumerator list with comma.
2309
2310Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2311
2312 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2313 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2314 ("bc2t"): Correct typo.
2315 ("[ls]wc[023]"): Use T rather than t.
2316 ("c[0123]"): Define general coprocessor instructions.
2317
2318Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2319
2320 * m68k.h: Move split point for gcc compilation more towards
2321 middle.
2322
2323Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2324
2325 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2326 simply wrong, ics, rfi, & rfsvc were missing).
2327 Add "a" to opr_ext for "bb". Doc fix.
2328
2329Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2330
2331 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2332 * mips.h: Add casts, to suppress warnings about shifting too much.
2333 * m68k.h: Document the placement code '9'.
2334
2335Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2336
2337 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2338 allows callers to break up the large initialized struct full of
2339 opcodes into two half-sized ones. This permits GCC to compile
2340 this module, since it takes exponential space for initializers.
2341 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2342
2343Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2344
2345 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2346 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2347 initialized structs in it.
2348
2349Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2350
2351 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2352 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2353 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2354
2355Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2356
2357 * mips.h: document "i" and "j" operands correctly.
2358
2359Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2360
2361 * mips.h: Removed endianness dependency.
2362
2363Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2364
2365 * h8300.h: include info on number of cycles per instruction.
2366
2367Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2368
2369 * hppa.h: Move handy aliases to the front. Fix masks for extract
2370 and deposit instructions.
2371
2372Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2373
2374 * i386.h: accept shld and shrd both with and without the shift
2375 count argument, which is always %cl.
2376
2377Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2378
2379 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2380 (one_byte_segment_defaults, two_byte_segment_defaults,
2381 i386_prefixtab_end): Ditto.
2382
2383Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2384
2385 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2386 for operand 2; from John Carr, jfc@dsg.dec.com.
2387
2388Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2389
2390 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2391 always use 16-bit offsets. Makes calculated-size jump tables
2392 feasible.
2393
2394Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2395
2396 * i386.h: Fix one-operand forms of in* and out* patterns.
2397
2398Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2399
2400 * m68k.h: Added CPU32 support.
2401
2402Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2403
2404 * mips.h (break): Disassemble the argument. Patch from
2405 jonathan@cs.stanford.edu (Jonathan Stone).
2406
2407Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2408
2409 * m68k.h: merged Motorola and MIT syntax.
2410
2411Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2412
2413 * m68k.h (pmove): make the tests less strict, the 68k book is
2414 wrong.
2415
2416Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2417
2418 * m68k.h (m68ec030): Defined as alias for 68030.
2419 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2420 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2421 them. Tightened description of "fmovex" to distinguish it from
2422 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2423 up descriptions that claimed versions were available for chips not
2424 supporting them. Added "pmovefd".
2425
2426Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2427
2428 * m68k.h: fix where the . goes in divull
2429
2430Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2431
2432 * m68k.h: the cas2 instruction is supposed to be written with
2433 indirection on the last two operands, which can be either data or
2434 address registers. Added a new operand type 'r' which accepts
2435 either register type. Added new cases for cas2l and cas2w which
2436 use them. Corrected masks for cas2 which failed to recognize use
2437 of address register.
2438
2439Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2440
2441 * m68k.h: Merged in patches (mostly m68040-specific) from
2442 Colin Smith <colin@wrs.com>.
2443
2444 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2445 base). Also cleaned up duplicates, re-ordered instructions for
2446 the sake of dis-assembling (so aliases come after standard names).
2447 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2448
2449Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2450
2451 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2452 all missing .s
2453
2454Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2455
2456 * sparc.h: Moved tables to BFD library.
2457
2458 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2459
2460Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2461
2462 * h8300.h: Finish filling in all the holes in the opcode table,
2463 so that the Lucid C compiler can digest this as well...
2464
2465Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2466
2467 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2468 Fix opcodes on various sizes of fild/fist instructions
2469 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2470 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2471
2472Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2473
2474 * h8300.h: Fill in all the holes in the opcode table so that the
2475 losing HPUX C compiler can digest this...
2476
2477Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2478
2479 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2480 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2481
2482Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2483
2484 * sparc.h: Add new architecture variant sparclite; add its scan
2485 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2486
2487Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2488
2489 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2490 fy@lucid.com).
2491
2492Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2493
2494 * rs6k.h: New version from IBM (Metin).
2495
2496Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2497
2498 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2499 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2500
2501Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2502
2503 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2504
2505Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2506
2507 * m68k.h (one, two): Cast macro args to unsigned to suppress
2508 complaints from compiler and lint about integer overflow during
2509 shift.
2510
2511Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2512
2513 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2514
2515Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2516
2517 * mips.h: Make bitfield layout depend on the HOST compiler,
2518 not on the TARGET system.
2519
2520Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2521
2522 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2523 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2524 <TRANLE@INTELLICORP.COM>.
2525
2526Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2527
2528 * h8300.h: turned op_type enum into #define list
2529
2530Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2531
2532 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2533 similar instructions -- they've been renamed to "fitoq", etc.
2534 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2535 number of arguments.
2536 * h8300.h: Remove extra ; which produces compiler warning.
2537
2538Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2539
2540 * sparc.h: fix opcode for tsubcctv.
2541
2542Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2543
2544 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2545
2546Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2547
2548 * sparc.h (nop): Made the 'lose' field be even tighter,
2549 so only a standard 'nop' is disassembled as a nop.
2550
2551Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2552
2553 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2554 disassembled as a nop.
2555
4f1d9bd8
NC		 2556Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2557
2558 * m68k.h, sparc.h: ANSIfy enums.
2559
252b5132
RH		 2560Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2561
2562 * sparc.h: fix a typo.
2563
2564Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2565
2566 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2567 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2568 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH		 2569
2570\f
2571Local Variables:
2572version-control: never
2573End:
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