]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - include/opcode/ChangeLog
1999-08-18 Donn Terry <donn@interix.com>
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
7d627258
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1Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
2
5696871a
JL
3 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
4 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
5
7d627258
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6 * hppa.h: Document 64 bit condition completers.
7
c5e52916
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8Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
9
10 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
11
eecb386c
AM
121999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
13
14 * i386.h (i386_optab): Add DefaultSize modifier to all insns
15 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
16 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
17
88a380f3
JL
18Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
19 Jeff Law <law@cygnus.com>
20
21 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
22
23 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL
24
25 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
26 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
27
145cf1f0
AM
281999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
29
30 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
31
73826640
JL
32Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
33
34 * hppa.h (struct pa_opcode): Add new field "flags".
35 (FLAGS_STRICT): Define.
36
b65db252
JL
37Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
38 Jeff Law <law@cygnus.com>
39
f7fc668b
JL
40 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
41
42 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 43
10084519
AM
441999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
45
46 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
47 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
48 flag to fcomi and friends.
49
cd8a80ba
JL
50Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
51
52 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
53 integer logical instructions.
54
1fca749b
ILT
551999-05-28 Linus Nordberg <linus.nordberg@canit.se>
56
57 * m68k.h: Document new formats `E', `G', `H' and new places `N',
58 `n', `o'.
59
60 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
61 and new places `m', `M', `h'.
62
aa008907
JL
63Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
64
65 * hppa.h (pa_opcodes): Add several processor specific system
66 instructions.
67
e26b85f0
JL
68Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
69
70 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
71 "addb", and "addib" to be used by the disassembler.
72
c608c12e
AM
731999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
74
75 * i386.h (ReverseModrm): Remove all occurences.
76 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
77 movmskps, pextrw, pmovmskb, maskmovq.
78 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
79 ignore the data size prefix.
80
81 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
82 Mostly stolen from Doug Ledford <dledford@redhat.com>
83
45c18104
RH
84Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
85
86 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
87
252b5132
RH
881999-04-14 Doug Evans <devans@casey.cygnus.com>
89
90 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
91 (CGEN_ATTR_TYPE): Update.
92 (CGEN_ATTR_MASK): Number booleans starting at 0.
93 (CGEN_ATTR_VALUE): Update.
94 (CGEN_INSN_ATTR): Update.
95
96Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
97
98 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
99 instructions.
100
101Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
102
103 * hppa.h (bb, bvb): Tweak opcode/mask.
104
105
1061999-03-22 Doug Evans <devans@casey.cygnus.com>
107
108 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
109 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
110 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
111 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
112 Delete member max_insn_size.
113 (enum cgen_cpu_open_arg): New enum.
114 (cpu_open): Update prototype.
115 (cpu_open_1): Declare.
116 (cgen_set_cpu): Delete.
117
1181999-03-11 Doug Evans <devans@casey.cygnus.com>
119
120 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
121 (CGEN_OPERAND_NIL): New macro.
122 (CGEN_OPERAND): New member `type'.
123 (@arch@_cgen_operand_table): Delete decl.
124 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
125 (CGEN_OPERAND_TABLE): New struct.
126 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
127 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
128 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
129 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
130 {get,set}_{int,vma}_operand.
131 (@arch@_cgen_cpu_open): New arg `isa'.
132 (cgen_set_cpu): Ditto.
133
134Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
135
136 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
137
1381999-02-25 Doug Evans <devans@casey.cygnus.com>
139
140 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
141 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
142 enum cgen_hw_type.
143 (CGEN_HW_TABLE): New struct.
144 (hw_table): Delete declaration.
145 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
146 to table entry to enum.
147 (CGEN_OPINST): Ditto.
148 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
149
150Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
151
152 * alpha.h (AXP_OPCODE_EV6): New.
153 (AXP_OPCODE_NOPAL): Include it.
154
1551999-02-09 Doug Evans <devans@casey.cygnus.com>
156
157 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
158 All uses updated. New members int_insn_p, max_insn_size,
159 parse_operand,insert_operand,extract_operand,print_operand,
160 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
161 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
162 extract_handlers,print_handlers.
163 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
164 (CGEN_ATTR_BOOL_OFFSET): New macro.
165 (CGEN_ATTR_MASK): Subtract it to compute bit number.
166 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
167 (cgen_opcode_handler): Renamed from cgen_base.
168 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
169 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
170 all uses updated.
171 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
172 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
173 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
174 (CGEN_OPCODE,CGEN_IBASE): New types.
175 (CGEN_INSN): Rewrite.
176 (CGEN_{ASM,DIS}_HASH*): Delete.
177 (init_opcode_table,init_ibld_table): Declare.
178 (CGEN_INSN_ATTR): New type.
179
180Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
181
182 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
183 (x_FP, d_FP, dls_FP, sldx_FP): Define.
184 Change *Suf definitions to include x and d suffixes.
185 (movsx): Use w_Suf and b_Suf.
186 (movzx): Likewise.
187 (movs): Use bwld_Suf.
188 (fld): Change ordering. Use sld_FP.
189 (fild): Add Intel Syntax equivalent of fildq.
190 (fst): Use sld_FP.
191 (fist): Use sld_FP.
192 (fstp): Use sld_FP. Add x_FP version.
193 (fistp): LLongMem version for Intel Syntax.
194 (fcom, fcomp): Use sld_FP.
195 (fadd, fiadd, fsub): Use sld_FP.
196 (fsubr): Use sld_FP.
197 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
198
1991999-01-27 Doug Evans <devans@casey.cygnus.com>
200
201 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
202 CGEN_MODE_UINT.
203
204Sat Jan 16 01:29:25 1999 Jeffrey A Law (law@cygnus.com)
205
206 * hppa.h (bv): Fix mask.
207
2081999-01-05 Doug Evans <devans@casey.cygnus.com>
209
210 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
211 (CGEN_ATTR): Use it.
212 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
213 (CGEN_ATTR_TABLE): New member dfault.
214
2151998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
216
217 * mips.h (MIPS16_INSN_BRANCH): New.
218
219Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
220
221 The following is part of a change made by Edith Epstein
222 <eepstein@sophia.cygnus.com> as part of a project to merge in
223 changes by HP; HP did not create ChangeLog entries.
224
225 * hppa.h (completer_chars): list of chars to not put a space
226 after.
227
228Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
229
230 * i386.h (i386_optab): Permit w suffix on processor control and
231 status word instructions.
232
2331998-11-30 Doug Evans <devans@casey.cygnus.com>
234
235 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
236 (struct cgen_keyword_entry): Ditto.
237 (struct cgen_operand): Ditto.
238 (CGEN_IFLD): New typedef, with associated access macros.
239 (CGEN_IFMT): New typedef, with associated access macros.
240 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
241 (CGEN_IVALUE): New typedef.
242 (struct cgen_insn): Delete const on syntax,attrs members.
243 `format' now points to format data. Type of `value' is now
244 CGEN_IVALUE.
245 (struct cgen_opcode_table): New member ifld_table.
246
2471998-11-18 Doug Evans <devans@casey.cygnus.com>
248
249 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
250 (CGEN_OPERAND_INSTANCE): New member `attrs'.
251 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
252 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
253 (cgen_opcode_table): Update type of dis_hash fn.
254 (extract_operand): Update type of `insn_value' arg.
255
256Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
257
258 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
259
260Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
261
262 * mips.h (INSN_MULT): Added.
263
264Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
265
266 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
267
268Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
269
270 * cgen.h (CGEN_INSN_INT): New typedef.
271 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
272 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
273 (CGEN_INSN_BYTES_PTR): New typedef.
274 (CGEN_EXTRACT_INFO): New typedef.
275 (cgen_insert_fn,cgen_extract_fn): Update.
276 (cgen_opcode_table): New member `insn_endian'.
277 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
278 (insert_operand,extract_operand): Update.
279 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
280
281Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
282
283 * cgen.h (CGEN_ATTR_BOOLS): New macro.
284 (struct CGEN_HW_ENTRY): New member `attrs'.
285 (CGEN_HW_ATTR): New macro.
286 (struct CGEN_OPERAND_INSTANCE): New member `name'.
287 (CGEN_INSN_INVALID_P): New macro.
288
289Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
290
291 * hppa.h: Add "fid".
292
293Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
294
295 From Robert Andrew Dale <rob@nb.net>
296 * i386.h (i386_optab): Add AMD 3DNow! instructions.
297 (AMD_3DNOW_OPCODE): Define.
298
299Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
300
301 * d30v.h (EITHER_BUT_PREFER_MU): Define.
302
303Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
304
305 * cgen.h (cgen_insn): #if 0 out element `cdx'.
306
307Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
308
309 Move all global state data into opcode table struct, and treat
310 opcode table as something that is "opened/closed".
311 * cgen.h (CGEN_OPCODE_DESC): New type.
312 (all fns): New first arg of opcode table descriptor.
313 (cgen_set_parse_operand_fn): Add prototype.
314 (cgen_current_machine,cgen_current_endian): Delete.
315 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
316 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
317 dis_hash_table,dis_hash_table_entries.
318 (opcode_open,opcode_close): Add prototypes.
319
320 * cgen.h (cgen_insn): New element `cdx'.
321
322Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
323
324 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
325
326Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
327
328 * mn10300.h: Add "no_match_operands" field for instructions.
329 (MN10300_MAX_OPERANDS): Define.
330
331Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
332
333 * cgen.h (cgen_macro_insn_count): Declare.
334
335Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
336
337 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
338 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
339 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
340 set_{int,vma}_operand.
341
342Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
343
344 * mn10300.h: Add "machine" field for instructions.
345 (MN103, AM30): Define machine types.
346
347Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
348
349 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
350
3511998-06-18 Ulrich Drepper <drepper@cygnus.com>
352
353 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
354
355Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
356
357 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
358 and ud2b.
359 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
360 those that happen to be implemented on pentiums.
361
362Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
363
364 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
365 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
366 with Size16|IgnoreSize or Size32|IgnoreSize.
367
368Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
369
370 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
371 (REPE): Rename to REPE_PREFIX_OPCODE.
372 (i386_regtab_end): Remove.
373 (i386_prefixtab, i386_prefixtab_end): Remove.
374 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
375 of md_begin.
376 (MAX_OPCODE_SIZE): Define.
377 (i386_optab_end): Remove.
378 (sl_Suf): Define.
379 (sl_FP): Use sl_Suf.
380
381 * i386.h (i386_optab): Allow 16 bit displacement for `mov
382 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
383 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
384 data32, dword, and adword prefixes.
385 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
386 regs.
387
388Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
389
390 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
391
392 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
393 register operands, because this is a common idiom. Flag them with
394 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
395 fdivrp because gcc erroneously generates them. Also flag with a
396 warning.
397
398 * i386.h: Add suffix modifiers to most insns, and tighter operand
399 checks in some cases. Fix a number of UnixWare compatibility
400 issues with float insns. Merge some floating point opcodes, using
401 new FloatMF modifier.
402 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
403 consistency.
404
405 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
406 IgnoreDataSize where appropriate.
407
408Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
409
410 * i386.h: (one_byte_segment_defaults): Remove.
411 (two_byte_segment_defaults): Remove.
412 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
413
414Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
415
416 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
417 (cgen_hw_lookup_by_num): Declare.
418
419Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
420
421 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
422 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
423
424Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
425
426 * cgen.h (cgen_asm_init_parse): Delete.
427 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
428 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
429
430Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
431
432 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
433 (cgen_asm_finish_insn): Update prototype.
434 (cgen_insn): New members num, data.
435 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
436 dis_hash, dis_hash_table_size moved to ...
437 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
438 All uses updated. New members asm_hash_p, dis_hash_p.
439 (CGEN_MINSN_EXPANSION): New struct.
440 (cgen_expand_macro_insn): Declare.
441 (cgen_macro_insn_count): Declare.
442 (get_insn_operands): Update prototype.
443 (lookup_get_insn_operands): Declare.
444
445Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
446
447 * i386.h (i386_optab): Change iclrKludge and imulKludge to
448 regKludge. Add operands types for string instructions.
449
450Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
451
452 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
453 table.
454
455Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
456
457 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
458 for `gettext'.
459
460Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
461
462 * i386.h: Remove NoModrm flag from all insns: it's never checked.
463 Add IsString flag to string instructions.
464 (IS_STRING): Don't define.
465 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
466 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
467 (SS_PREFIX_OPCODE): Define.
468
469Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
470
471 * i386.h: Revert March 24 patch; no more LinearAddress.
472
473Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
474
475 * i386.h (i386_optab): Remove fwait (9b) from all floating point
476 instructions, and instead add FWait opcode modifier. Add short
477 form of fldenv and fstenv.
478 (FWAIT_OPCODE): Define.
479
480 * i386.h (i386_optab): Change second operand constraint of `mov
481 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
482 allow legal instructions such as `movl %gs,%esi'
483
484Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
485
486 * h8300.h: Various changes to fully bracket initializers.
487
488Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
489
490 * i386.h: Set LinearAddress for lidt and lgdt.
491
492Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
493
494 * cgen.h (CGEN_BOOL_ATTR): New macro.
495
496Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
497
498 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
499
500Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
501
502 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
503 (cgen_insn): Record syntax and format entries here, rather than
504 separately.
505
506Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
507
508 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
509
510Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
511
512 * cgen.h (cgen_insert_fn): Change type of result to const char *.
513 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
514 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
515
516Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
517
518 * cgen.h (lookup_insn): New argument alias_p.
519
520Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
521
522Fix rac to accept only a0:
523 * d10v.h (OPERAND_ACC): Split into:
524 (OPERAND_ACC0, OPERAND_ACC1) .
525 (OPERAND_GPR): Define.
526
527Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
528
529 * cgen.h (CGEN_FIELDS): Define here.
530 (CGEN_HW_ENTRY): New member `type'.
531 (hw_list): Delete decl.
532 (enum cgen_mode): Declare.
533 (CGEN_OPERAND): New member `hw'.
534 (enum cgen_operand_instance_type): Declare.
535 (CGEN_OPERAND_INSTANCE): New type.
536 (CGEN_INSN): New member `operands'.
537 (CGEN_OPCODE_DATA): Make hw_list const.
538 (get_insn_operands,lookup_insn): Add prototypes for.
539
540Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
541
542 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
543 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
544 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
545 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
546
547Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
548
549 * cgen.h: Correct typo in comment end marker.
550
551Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
552
553 * tic30.h: New file.
554
555Thu Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
556
557 * cgen.h: Add prototypes for cgen_save_fixups(),
558 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
559 of cgen_asm_finish_insn() to return a char *.
560
561Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
562
563 * cgen.h: Formatting changes to improve readability.
564
565Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
566
567 * cgen.h (*): Clean up pass over `struct foo' usage.
568 (CGEN_ATTR): Make unsigned char.
569 (CGEN_ATTR_TYPE): Update.
570 (CGEN_ATTR_{ENTRY,TABLE}): New types.
571 (cgen_base): Move member `attrs' to cgen_insn.
572 (CGEN_KEYWORD): New member `null_entry'.
573 (CGEN_{SYNTAX,FORMAT}): New types.
574 (cgen_insn): Format and syntax separated from each other.
575
576Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
577
578 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
579 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
580 flags_{used,set} long.
581 (d30v_operand): Make flags field long.
582
583Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
584
585 * m68k.h: Fix comment describing operand types.
586
587Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
588
589 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
590 everything else after down.
591
592Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
593
594 * d10v.h (OPERAND_FLAG): Split into:
595 (OPERAND_FFLAG, OPERAND_CFLAG) .
596
597Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
598
599 * mips.h (struct mips_opcode): Changed comments to reflect new
600 field usage.
601
602Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
603
604 * mips.h: Added to comments a quick-ref list of all assigned
605 operand type characters.
606 (OP_{MASK,SH}_PERFREG): New macros.
607
608Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
609
610 * sparc.h: Add '_' and '/' for v9a asr's.
611 Patch from David Miller <davem@vger.rutgers.edu>
612
613Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
614
615 * h8300.h: Bit ops with absolute addresses not in the 8 bit
616 area are not available in the base model (H8/300).
617
618Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
619
620 * m68k.h: Remove documentation of ` operand specifier.
621
622Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
623
624 * m68k.h: Document q and v operand specifiers.
625
626Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
627
628 * v850.h (struct v850_opcode): Add processors field.
629 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
630 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
631 (PROCESSOR_V850EA): New bit constants.
632
633Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
634
635 Merge changes from Martin Hunt:
636
637 * d30v.h: Allow up to 64 control registers. Add
638 SHORT_A5S format.
639
640 * d30v.h (LONG_Db): New form for delayed branches.
641
642 * d30v.h: (LONG_Db): New form for repeati.
643
644 * d30v.h (SHORT_D2B): New form.
645
646 * d30v.h (SHORT_A2): New form.
647
648 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
649 registers are used. Needed for VLIW optimization.
650
651Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
652
653 * cgen.h: Move assembler interface section
654 up so cgen_parse_operand_result is defined for cgen_parse_address.
655 (cgen_parse_address): Update prototype.
656
657Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
658
659 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
660
661Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
662
663 * i386.h (two_byte_segment_defaults): Correct base register 5 in
664 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
665 <paubert@iram.es>.
666
667 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
668 <paubert@iram.es>.
669
670 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
671 <paubert@iram.es>.
672
673 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
674 (JUMP_ON_ECX_ZERO): Remove commented out macro.
675
676Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
677
678 * v850.h (V850_NOT_R0): New flag.
679
680Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
681
682 * v850.h (struct v850_opcode): Remove flags field.
683
684Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
685
686 * v850.h (struct v850_opcode): Add flags field.
687 (struct v850_operand): Extend meaning of 'bits' and 'shift'
688 fields.
689 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
690 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
691
692Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
693
694 * arc.h: New file.
695
696Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
697
698 * sparc.h (sparc_opcodes): Declare as const.
699
700Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
701
702 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
703 uses single or double precision floating point resources.
704 (INSN_NO_ISA, INSN_ISA1): Define.
705 (cpu specific INSN macros): Tweak into bitmasks outside the range
706 of INSN_ISA field.
707
708Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
709
710 * i386.h: Fix pand opcode.
711
712Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
713
714 * mips.h: Widen INSN_ISA and move it to a more convenient
715 bit position. Add INSN_3900.
716
717Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
718
719 * mips.h (struct mips_opcode): added new field membership.
720
721Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
722
723 * i386.h (movd): only Reg32 is allowed.
724
725 * i386.h: add fcomp and ud2. From Wayne Scott
726 <wscott@ichips.intel.com>.
727
728Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
729
730 * i386.h: Add MMX instructions.
731
732Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
733
734 * i386.h: Remove W modifier from conditional move instructions.
735
736Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
737
738 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
739 with no arguments to match that generated by the UnixWare
740 assembler.
741
742Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
743
744 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
745 (cgen_parse_operand_fn): Declare.
746 (cgen_init_parse_operand): Declare.
747 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
748 new argument `want'.
749 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
750 (enum cgen_parse_operand_type): New enum.
751
752Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
753
754 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
755
756Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
757
758 * cgen.h: New file.
759
760Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
761
762 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
763 fdivrp.
764
765Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
766
767 * v850.h (extract): Make unsigned.
768
769Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
770
771 * i386.h: Add iclr.
772
773Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
774
775 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
776 take a direction bit.
777
778Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
779
780 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
781
782Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
783
784 * sparc.h: Include <ansidecl.h>. Update function declarations to
785 use prototypes, and to use const when appropriate.
786
787Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
788
789 * mn10300.h (MN10300_OPERAND_RELAX): Define.
790
791Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
792
793 * d10v.h: Change pre_defined_registers to
794 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
795
796Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
797
798 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
799 Change mips_opcodes from const array to a pointer,
800 and change bfd_mips_num_opcodes from const int to int,
801 so that we can increase the size of the mips opcodes table
802 dynamically.
803
804Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
805
806 * d30v.h (FLAG_X): Remove unused flag.
807
808Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
809
810 * d30v.h: New file.
811
812Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
813
814 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
815 (PDS_VALUE): Macro to access value field of predefined symbols.
816 (tic80_next_predefined_symbol): Add prototype.
817
818Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
819
820 * tic80.h (tic80_symbol_to_value): Change prototype to match
821 change in function, added class parameter.
822
823Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
824
825 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
826 endmask fields, which are somewhat weird in that 0 and 32 are
827 treated exactly the same.
828
829Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
830
831 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
832 rather than a constant that is 2**X. Reorder them to put bits for
833 operands that have symbolic names in the upper bits, so they can
834 be packed into an int where the lower bits contain the value that
835 corresponds to that symbolic name.
836 (predefined_symbo): Add struct.
837 (tic80_predefined_symbols): Declare array of translations.
838 (tic80_num_predefined_symbols): Declare size of that array.
839 (tic80_value_to_symbol): Declare function.
840 (tic80_symbol_to_value): Declare function.
841
842Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
843
844 * mn10200.h (MN10200_OPERAND_RELAX): Define.
845
846Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
847
848 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
849 be the destination register.
850
851Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
852
853 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
854 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
855 (TIC80_VECTOR): Define a flag bit for the flags. This one means
856 that the opcode can have two vector instructions in a single
857 32 bit word and we have to encode/decode both.
858
859Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
860
861 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
862 TIC80_OPERAND_RELATIVE for PC relative.
863 (TIC80_OPERAND_BASEREL): New flag bit for register
864 base relative.
865
866Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
867
868 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
869
870Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
871
872 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
873 ":s" modifier for scaling.
874
875Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
876
877 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
878 (TIC80_OPERAND_M_LI): Ditto
879
880Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
881
882 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
883 (TIC80_OPERAND_CC): New define for condition code operand.
884 (TIC80_OPERAND_CR): New define for control register operand.
885
886Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
887
888 * tic80.h (struct tic80_opcode): Name changed.
889 (struct tic80_opcode): Remove format field.
890 (struct tic80_operand): Add insertion and extraction functions.
891 (TIC80_OPERAND_*): Remove old bogus values, start adding new
892 correct ones.
893 (FMT_*): Ditto.
894
895Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
896
897 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
898 type IV instruction offsets.
899
900Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
901
902 * tic80.h: New file.
903
904Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
905
906 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
907
908Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
909
910 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
911 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
912 * v850.h: Fix comment, v850_operand not powerpc_operand.
913
914Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
915
916 * mn10200.h: Flesh out structures and definitions needed by
917 the mn10200 assembler & disassembler.
918
919Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
920
921 * mips.h: Add mips16 definitions.
922
923Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
924
925 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
926
927Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
928
929 * mn10300.h (MN10300_OPERAND_PCREL): Define.
930 (MN10300_OPERAND_MEMADDR): Define.
931
932Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
933
934 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
935
936Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
937
938 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
939
940Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
941
942 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
943
944Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
945
946 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
947
948Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
949
950 * alpha.h: Don't include "bfd.h"; private relocation types are now
951 negative to minimize problems with shared libraries. Organize
952 instruction subsets by AMASK extensions and PALcode
953 implementation.
954 (struct alpha_operand): Move flags slot for better packing.
955
956Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
957
958 * v850.h (V850_OPERAND_RELAX): New operand flag.
959
960Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
961
962 * mn10300.h (FMT_*): Move operand format definitions
963 here.
964
965Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
966
967 * mn10300.h (MN10300_OPERAND_PAREN): Define.
968
969Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
970
971 * mn10300.h (mn10300_opcode): Add "format" field.
972 (MN10300_OPERAND_*): Define.
973
974Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
975
976 * mn10x00.h: Delete.
977 * mn10200.h, mn10300.h: New files.
978
979Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
980
981 * mn10x00.h: New file.
982
983Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
984
985 * v850.h: Add new flag to indicate this instruction uses a PC
986 displacement.
987
988Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
989
990 * h8300.h (stmac): Add missing instruction.
991
992Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
993
994 * v850.h (v850_opcode): Remove "size" field. Add "memop"
995 field.
996
997Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
998
999 * v850.h (V850_OPERAND_EP): Define.
1000
1001 * v850.h (v850_opcode): Add size field.
1002
1003Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1004
1005 * v850.h (v850_operands): Add insert and extract fields, pointers
1006 to functions used to handle unusual operand encoding.
1007 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1008 V850_OPERAND_SIGNED): Defined.
1009
1010Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1011
1012 * v850.h (v850_operands): Add flags field.
1013 (OPERAND_REG, OPERAND_NUM): Defined.
1014
1015Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1016
1017 * v850.h: New file.
1018
1019Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1020
1021 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1022 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1023 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1024 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1025 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1026 Defined.
1027
1028Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1029
1030 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1031 a 3 bit space id instead of a 2 bit space id.
1032
1033Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1034
1035 * d10v.h: Add some additional defines to support the
1036 assembler in determining which operations can be done in parallel.
1037
1038Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1039
1040 * h8300.h (SN): Define.
1041 (eepmov.b): Renamed from "eepmov"
1042 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1043 with them.
1044
1045Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1046
1047 * d10v.h (OPERAND_SHIFT): New operand flag.
1048
1049Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1050
1051 * d10v.h: Changes for divs, parallel-only instructions, and
1052 signed numbers.
1053
1054Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1055
1056 * d10v.h (pd_reg): Define. Putting the definition here allows
1057 the assembler and disassembler to share the same struct.
1058
1059Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1060
1061 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1062 Williams <steve@icarus.com>.
1063
1064Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1065
1066 * d10v.h: New file.
1067
1068Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1069
1070 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1071
1072Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1073
1074 * m68k.h (mcf5200): New macro.
1075 Document names of coldfire control registers.
1076
1077Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1078
1079 * h8300.h (SRC_IN_DST): Define.
1080
1081 * h8300.h (UNOP3): Mark the register operand in this insn
1082 as a source operand, not a destination operand.
1083 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1084 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1085 register operand with SRC_IN_DST.
1086
1087Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1088
1089 * alpha.h: New file.
1090
1091Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1092
1093 * rs6k.h: Remove obsolete file.
1094
1095Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1096
1097 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1098 fdivp, and fdivrp. Add ffreep.
1099
1100Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1101
1102 * h8300.h: Reorder various #defines for readability.
1103 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1104 (BITOP): Accept additional (unused) argument. All callers changed.
1105 (EBITOP): Likewise.
1106 (O_LAST): Bump.
1107 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1108
1109 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1110 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1111 (BITOP, EBITOP): Handle new H8/S addressing modes for
1112 bit insns.
1113 (UNOP3): Handle new shift/rotate insns on the H8/S.
1114 (insns using exr): New instructions.
1115 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1116
1117Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1118
1119 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1120 was incorrect.
1121
1122Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1123
1124 * h8300.h (START): Remove.
1125 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1126 and mov.l insns that can be relaxed.
1127
1128Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1129
1130 * i386.h: Remove Abs32 from lcall.
1131
1132Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1133
1134 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1135 (SLCPOP): New macro.
1136 Mark X,Y opcode letters as in use.
1137
1138Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1139
1140 * sparc.h (F_FLOAT, F_FBR): Define.
1141
1142Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1143
1144 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1145 from all insns.
1146 (ABS8SRC,ABS8DST): Add ABS8MEM.
1147 (add.l): Fix reg+reg variant.
1148 (eepmov.w): Renamed from eepmovw.
1149 (ldc,stc): Fix many cases.
1150
1151Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1152
1153 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1154
1155Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1156
1157 * sparc.h (O): Mark operand letter as in use.
1158
1159Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1160
1161 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1162 Mark operand letters uU as in use.
1163
1164Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1165
1166 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1167 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1168 (SPARC_OPCODE_SUPPORTED): New macro.
1169 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1170 (F_NOTV9): Delete.
1171
1172Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1173
1174 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1175 declaration consistent with return type in definition.
1176
1177Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1178
1179 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1180
1181Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1182
1183 * i386.h (i386_regtab): Add 80486 test registers.
1184
1185Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1186
1187 * i960.h (I_HX): Define.
1188 (i960_opcodes): Add HX instruction.
1189
1190Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1191
1192 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1193 and fclex.
1194
1195Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1196
1197 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1198 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1199 (bfd_* defines): Delete.
1200 (sparc_opcode_archs): Replaces architecture_pname.
1201 (sparc_opcode_lookup_arch): Declare.
1202 (NUMOPCODES): Delete.
1203
1204Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1205
1206 * sparc.h (enum sparc_architecture): Add v9a.
1207 (ARCHITECTURES_CONFLICT_P): Update.
1208
1209Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1210
1211 * i386.h: Added Pentium Pro instructions.
1212
1213Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1214
1215 * m68k.h: Document new 'W' operand place.
1216
1217Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1218
1219 * hppa.h: Add lci and syncdma instructions.
1220
1221Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1222
1223 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1224 instructions.
1225
1226Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1227
1228 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1229 assembler's -mcom and -many switches.
1230
1231Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1232
1233 * i386.h: Fix cmpxchg8b extension opcode description.
1234
1235Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1236
1237 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1238 and register cr4.
1239
1240Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1241
1242 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1243
1244Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1245
1246 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1247
1248Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1249
1250 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1251
1252Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1253
1254 * m68kmri.h: Remove.
1255
1256 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1257 declarations. Remove F_ALIAS and flag field of struct
1258 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1259 int. Make name and args fields of struct m68k_opcode const.
1260
1261Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1262
1263 * sparc.h (F_NOTV9): Define.
1264
1265Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1266
1267 * mips.h (INSN_4010): Define.
1268
1269Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1270
1271 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1272
1273 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1274 * m68k.h: Fix argument descriptions of coprocessor
1275 instructions to allow only alterable operands where appropriate.
1276 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1277 (m68k_opcode_aliases): Add more aliases.
1278
1279Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1280
1281 * m68k.h: Added explcitly short-sized conditional branches, and a
1282 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1283 svr4-based configurations.
1284
1285Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1286
1287 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1288 * i386.h: added missing Data16/Data32 flags to a few instructions.
1289
1290Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1291
1292 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1293 (OP_MASK_BCC, OP_SH_BCC): Define.
1294 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1295 (OP_MASK_CCC, OP_SH_CCC): Define.
1296 (INSN_READ_FPR_R): Define.
1297 (INSN_RFE): Delete.
1298
1299Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1300
1301 * m68k.h (enum m68k_architecture): Deleted.
1302 (struct m68k_opcode_alias): New type.
1303 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1304 matching constraints, values and flags. As a side effect of this,
1305 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1306 as I know were never used, now may need re-examining.
1307 (numopcodes): Now const.
1308 (m68k_opcode_aliases, numaliases): New variables.
1309 (endop): Deleted.
1310 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1311 m68k_opcode_aliases; update declaration of m68k_opcodes.
1312
1313Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1314
1315 * hppa.h (delay_type): Delete unused enumeration.
1316 (pa_opcode): Replace unused delayed field with an architecture
1317 field.
1318 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1319
1320Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1321
1322 * mips.h (INSN_ISA4): Define.
1323
1324Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1325
1326 * mips.h (M_DLA_AB, M_DLI): Define.
1327
1328Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1329
1330 * hppa.h (fstwx): Fix single-bit error.
1331
1332Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1333
1334 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1335
1336Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1337
1338 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1339 debug registers. From Charles Hannum (mycroft@netbsd.org).
1340
1341Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1342
1343 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1344 i386 support:
1345 * i386.h (MOV_AX_DISP32): New macro.
1346 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1347 of several call/return instructions.
1348 (ADDR_PREFIX_OPCODE): New macro.
1349
1350Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1351
1352 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1353
1354 * ../include/opcode/vax.h (struct vot_wot, field `args'): make
1355 it pointer to const char;
1356 (struct vot, field `name'): ditto.
1357
1358Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1359
1360 * vax.h: Supply and properly group all values in end sentinel.
1361
1362Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1363
1364 * mips.h (INSN_ISA, INSN_4650): Define.
1365
1366Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1367
1368 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1369 systems with a separate instruction and data cache, such as the
1370 29040, these instructions take an optional argument.
1371
1372Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1373
1374 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1375 INSN_TRAP.
1376
1377Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1378
1379 * mips.h (INSN_STORE_MEMORY): Define.
1380
1381Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1382
1383 * sparc.h: Document new operand type 'x'.
1384
1385Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1386
1387 * i960.h (I_CX2): New instruction category. It includes
1388 instructions available on Cx and Jx processors.
1389 (I_JX): New instruction category, for JX-only instructions.
1390 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1391 Jx-only instructions, in I_JX category.
1392
1393Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1394
1395 * ns32k.h (endop): Made pointer const too.
1396
1397Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1398
1399 * ns32k.h: Drop Q operand type as there is no correct use
1400 for it. Add I and Z operand types which allow better checking.
1401
1402Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1403
1404 * h8300.h (xor.l) :fix bit pattern.
1405 (L_2): New size of operand.
1406 (trapa): Use it.
1407
1408Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1409
1410 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1411
1412Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1413
1414 * sparc.h: Include v9 definitions.
1415
1416Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1417
1418 * m68k.h (m68060): Defined.
1419 (m68040up, mfloat, mmmu): Include it.
1420 (struct m68k_opcode): Widen `arch' field.
1421 (m68k_opcodes): Updated for M68060. Removed comments that were
1422 instructions commented out by "JF" years ago.
1423
1424Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1425
1426 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1427 add a one-bit `flags' field.
1428 (F_ALIAS): New macro.
1429
1430Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1431
1432 * h8300.h (dec, inc): Get encoding right.
1433
1434Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1435
1436 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1437 a flag instead.
1438 (PPC_OPERAND_SIGNED): Define.
1439 (PPC_OPERAND_SIGNOPT): Define.
1440
1441Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1442
1443 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1444 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1445
1446Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1447
1448 * i386.h: Reverse last change. It'll be handled in gas instead.
1449
1450Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1451
1452 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1453 slower on the 486 and used the implicit shift count despite the
1454 explicit operand. The one-operand form is still available to get
1455 the shorter form with the implicit shift count.
1456
1457Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1458
1459 * hppa.h: Fix typo in fstws arg string.
1460
1461Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1462
1463 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
1464
1465Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1466
1467 * ppc.h (PPC_OPCODE_601): Define.
1468
1469Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1470
1471 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
1472 (so we can determine valid completers for both addb and addb[tf].)
1473
1474 * hppa.h (xmpyu): No floating point format specifier for the
1475 xmpyu instruction.
1476
1477Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1478
1479 * ppc.h (PPC_OPERAND_NEXT): Define.
1480 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
1481 (struct powerpc_macro): Define.
1482 (powerpc_macros, powerpc_num_macros): Declare.
1483
1484Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1485
1486 * ppc.h: New file. Header file for PowerPC opcode table.
1487
1488Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
1489
1490 * hppa.h: More minor template fixes for sfu and copr (to allow
1491 for easier disassembly).
1492
1493 * hppa.h: Fix templates for all the sfu and copr instructions.
1494
1495Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
1496
1497 * i386.h (push): Permit Imm16 operand too.
1498
1499Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1500
1501 * h8300.h (andc): Exists in base arch.
1502
1503Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1504
1505 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
1506 * hppa.h: #undef NONE to avoid conflict with hiux include files.
1507
1508Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1509
1510 * hppa.h: Add FP quadword store instructions.
1511
1512Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1513
1514 * mips.h: (M_J_A): Added.
1515 (M_LA): Removed.
1516
1517Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1518
1519 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
1520 <mellon@pepper.ncd.com>.
1521
1522Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
1523
1524 * hppa.h: Immediate field in probei instructions is unsigned,
1525 not low-sign extended.
1526
1527Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1528
1529 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
1530
1531Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
1532
1533 * i386.h: Add "fxch" without operand.
1534
1535Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1536
1537 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
1538
1539Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1540
1541 * hppa.h: Add gfw and gfr to the opcode table.
1542
1543Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1544
1545 * m88k.h: extended to handle m88110.
1546
1547Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
1548
1549 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
1550 addresses.
1551
1552Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1553
1554 * i960.h (i960_opcodes): Properly bracket initializers.
1555
1556Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
1557
1558 * m88k.h (BOFLAG): rewrite to avoid nested comment.
1559
1560Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1561
1562 * m68k.h (two): Protect second argument with parentheses.
1563
1564Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1565
1566 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
1567 Deleted old in/out instructions in "#if 0" section.
1568
1569Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1570
1571 * i386.h (i386_optab): Properly bracket initializers.
1572
1573Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1574
1575 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
1576 Jeff Law, law@cs.utah.edu).
1577
1578Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1579
1580 * i386.h (lcall): Accept Imm32 operand also.
1581
1582Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1583
1584 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
1585 (M_DABS): Added.
1586
1587Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1588
1589 * mips.h (INSN_*): Changed values. Removed unused definitions.
1590 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
1591 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
1592 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
1593 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
1594 (M_*): Added new values for r6000 and r4000 macros.
1595 (ANY_DELAY): Removed.
1596
1597Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1598
1599 * mips.h: Added M_LI_S and M_LI_SS.
1600
1601Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1602
1603 * h8300.h: Get some rare mov.bs correct.
1604
1605Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
1606
1607 * sparc.h: Don't define const ourself; rely on ansidecl.h having
1608 been included.
1609
1610Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
1611
1612 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
1613 jump instructions, for use in disassemblers.
1614
1615Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
1616
1617 * m88k.h: Make bitfields just unsigned, not unsigned long or
1618 unsigned short.
1619
1620Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1621
1622 * hppa.h: New argument type 'y'. Use in various float instructions.
1623
1624Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
1625
1626 * hppa.h (break): First immediate field is unsigned.
1627
1628 * hppa.h: Add rfir instruction.
1629
1630Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
1631
1632 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
1633
1634Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
1635
1636 * mips.h: Reworked the hazard information somewhat, and fixed some
1637 bugs in the instruction hazard descriptions.
1638
1639Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1640
1641 * m88k.h: Corrected a couple of opcodes.
1642
1643Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
1644
1645 * mips.h: Replaced with version from Ralph Campbell and OSF. The
1646 new version includes instruction hazard information, but is
1647 otherwise reasonably similar.
1648
1649Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
1650
1651 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
1652
1653Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
1654
1655 Patches from Jeff Law, law@cs.utah.edu:
1656 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
1657 Make the tables be the same for the following instructions:
1658 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
1659 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
1660 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
1661 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
1662 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
1663 "fcmp", and "ftest".
1664
1665 * hppa.h: Make new and old tables the same for "break", "mtctl",
1666 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
1667 Fix typo in last patch. Collapse several #ifdefs into a
1668 single #ifdef.
1669
1670 * hppa.h: Delete remaining OLD_TABLE code. Bring some
1671 of the comments up-to-date.
1672
1673 * hppa.h: Update "free list" of letters and update
1674 comments describing each letter's function.
1675
1676Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
1677
1678 * h8300.h: checkpoint, includes H8/300-H opcodes.
1679
1680Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
1681
1682 * Patches from Jeffrey Law <law@cs.utah.edu>.
1683 * hppa.h: Rework single precision FP
1684 instructions so that they correctly disassemble code
1685 PA1.1 code.
1686
1687Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
1688
1689 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
1690 mov to allow instructions like mov ss,xyz(ecx) to assemble.
1691
1692Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
1693
1694 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
1695 gdb will define it for now.
1696
1697Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
1698
1699 * sparc.h: Don't end enumerator list with comma.
1700
1701Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
1702
1703 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
1704 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
1705 ("bc2t"): Correct typo.
1706 ("[ls]wc[023]"): Use T rather than t.
1707 ("c[0123]"): Define general coprocessor instructions.
1708
1709Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
1710
1711 * m68k.h: Move split point for gcc compilation more towards
1712 middle.
1713
1714Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
1715
1716 * rs6k.h: Clean up instructions for primary opcode 19 (many were
1717 simply wrong, ics, rfi, & rfsvc were missing).
1718 Add "a" to opr_ext for "bb". Doc fix.
1719
1720Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
1721
1722 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
1723 * mips.h: Add casts, to suppress warnings about shifting too much.
1724 * m68k.h: Document the placement code '9'.
1725
1726Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
1727
1728 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
1729 allows callers to break up the large initialized struct full of
1730 opcodes into two half-sized ones. This permits GCC to compile
1731 this module, since it takes exponential space for initializers.
1732 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
1733
1734Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
1735
1736 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
1737 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
1738 initialized structs in it.
1739
1740Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
1741
1742 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
1743 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
1744 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
1745
1746Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
1747
1748 * mips.h: document "i" and "j" operands correctly.
1749
1750Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1751
1752 * mips.h: Removed endianness dependency.
1753
1754Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
1755
1756 * h8300.h: include info on number of cycles per instruction.
1757
1758Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
1759
1760 * hppa.h: Move handy aliases to the front. Fix masks for extract
1761 and deposit instructions.
1762
1763Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
1764
1765 * i386.h: accept shld and shrd both with and without the shift
1766 count argument, which is always %cl.
1767
1768Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
1769
1770 * i386.h (i386_optab_end, i386_regtab_end): Now const.
1771 (one_byte_segment_defaults, two_byte_segment_defaults,
1772 i386_prefixtab_end): Ditto.
1773
1774Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
1775
1776 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
1777 for operand 2; from John Carr, jfc@dsg.dec.com.
1778
1779Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
1780
1781 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
1782 always use 16-bit offsets. Makes calculated-size jump tables
1783 feasible.
1784
1785Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
1786
1787 * i386.h: Fix one-operand forms of in* and out* patterns.
1788
1789Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1790
1791 * m68k.h: Added CPU32 support.
1792
1793Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
1794
1795 * mips.h (break): Disassemble the argument. Patch from
1796 jonathan@cs.stanford.edu (Jonathan Stone).
1797
1798Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
1799
1800 * m68k.h: merged Motorola and MIT syntax.
1801
1802Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1803
1804 * m68k.h (pmove): make the tests less strict, the 68k book is
1805 wrong.
1806
1807Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
1808
1809 * m68k.h (m68ec030): Defined as alias for 68030.
1810 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
1811 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
1812 them. Tightened description of "fmovex" to distinguish it from
1813 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
1814 up descriptions that claimed versions were available for chips not
1815 supporting them. Added "pmovefd".
1816
1817Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1818
1819 * m68k.h: fix where the . goes in divull
1820
1821Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
1822
1823 * m68k.h: the cas2 instruction is supposed to be written with
1824 indirection on the last two operands, which can be either data or
1825 address registers. Added a new operand type 'r' which accepts
1826 either register type. Added new cases for cas2l and cas2w which
1827 use them. Corrected masks for cas2 which failed to recognize use
1828 of address register.
1829
1830Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
1831
1832 * m68k.h: Merged in patches (mostly m68040-specific) from
1833 Colin Smith <colin@wrs.com>.
1834
1835 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
1836 base). Also cleaned up duplicates, re-ordered instructions for
1837 the sake of dis-assembling (so aliases come after standard names).
1838 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
1839
1840Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
1841
1842 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
1843 all missing .s
1844
1845Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
1846
1847 * sparc.h: Moved tables to BFD library.
1848
1849 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
1850
1851Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
1852
1853 * h8300.h: Finish filling in all the holes in the opcode table,
1854 so that the Lucid C compiler can digest this as well...
1855
1856Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
1857
1858 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
1859 Fix opcodes on various sizes of fild/fist instructions
1860 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
1861 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
1862
1863Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
1864
1865 * h8300.h: Fill in all the holes in the opcode table so that the
1866 losing HPUX C compiler can digest this...
1867
1868Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
1869
1870 * mips.h: Fix decoding of coprocessor instructions, somewhat.
1871 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
1872
1873Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
1874
1875 * sparc.h: Add new architecture variant sparclite; add its scan
1876 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
1877
1878Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
1879
1880 * mips.h: Add some more opcode synonyms (from Frank Yellin,
1881 fy@lucid.com).
1882
1883Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
1884
1885 * rs6k.h: New version from IBM (Metin).
1886
1887Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
1888
1889 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
1890 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
1891
1892Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
1893
1894 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
1895
1896Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
1897
1898 * m68k.h (one, two): Cast macro args to unsigned to suppress
1899 complaints from compiler and lint about integer overflow during
1900 shift.
1901
1902Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
1903
1904 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
1905
1906Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
1907
1908 * mips.h: Make bitfield layout depend on the HOST compiler,
1909 not on the TARGET system.
1910
1911Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
1912
1913 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
1914 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
1915 <TRANLE@INTELLICORP.COM>.
1916
1917Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
1918
1919 * h8300.h: turned op_type enum into #define list
1920
1921Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
1922
1923 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
1924 similar instructions -- they've been renamed to "fitoq", etc.
1925 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
1926 number of arguments.
1927 * h8300.h: Remove extra ; which produces compiler warning.
1928
1929Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
1930
1931 * sparc.h: fix opcode for tsubcctv.
1932
1933Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
1934
1935 * sparc.h: fba and cba are now aliases for fb and cb respectively.
1936
1937Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
1938
1939 * sparc.h (nop): Made the 'lose' field be even tighter,
1940 so only a standard 'nop' is disassembled as a nop.
1941
1942Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
1943
1944 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
1945 disassembled as a nop.
1946
1947Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
1948
1949 * sparc.h: fix a typo.
1950
1951Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
1952
1953 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
1954 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
1955 vax.h, ChangeLog: renamed from ../<foo>-opcode.h
1956
1957\f
1958Local Variables:
1959version-control: never
1960End: