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Replace sh_size/sh_entsize with NUM_SHDR_ENTRIES
[thirdparty/binutils-gdb.git] / include / opcode / ChangeLog
CommitLineData
aa5f19f2
NC
12001-05-15 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
2
3 * mips.h (INSN_ISA_MASK): Define.
4
67d6227d
AM
52001-05-12 Alan Modra <amodra@one.net.au>
6
7 * i386.h (i386_optab): Second operand of cvtps2dq is an xmm reg,
8 not an mmx reg. Swap xmm/mmx regs on both movdq2q and movq2dq,
9 and use InvMem as these insns must have register operands.
10
992aaec9
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112001-05-04 Alan Modra <amodra@one.net.au>
12
13 * i386.h (i386_optab): Move InvMem to first operand of pmovmskb
14 and pextrw to swap reg/rm assignments.
15
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HPN
162001-04-05 Hans-Peter Nilsson <hp@axis.com>
17
18 * cris.h (enum cris_insn_version_usage): Correct comment for
19 cris_ver_v3p.
20
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AM
212001-03-24 Alan Modra <alan@linuxcare.com.au>
22
23 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
24 Add InvMem to first operand of "maskmovdqu".
25
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HPN
262001-03-22 Hans-Peter Nilsson <hp@axis.com>
27
28 * cris.h (ADD_PC_INCR_OPCODE): New macro.
29
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302001-03-21 Kazu Hirata <kazu@hxi.com>
31
32 * h8300.h: Fix formatting.
33
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342001-03-22 Alan Modra <alan@linuxcare.com.au>
35
36 * i386.h (i386_optab): Add paddq, psubq.
37
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382001-03-19 Alan Modra <alan@linuxcare.com.au>
39
40 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
41
80a523c2
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422001-02-28 Igor Shevlyakov <igor@windriver.com>
43
44 * m68k.h: new defines for Coldfire V4. Update mcf to know
45 about mcf5407.
46
e135f41b
NC
472001-02-18 lars brinkhoff <lars@nocrew.org>
48
49 * pdp11.h: New file.
50
512001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
52
53 * i386.h (i386_optab): SSE integer converison instructions have
54 64bit versions on x86-64.
55
8eaec934
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562001-02-10 Nick Clifton <nickc@redhat.com>
57
58 * mips.h: Remove extraneous whitespace. Formating change to allow
59 for future contribution.
60
a85d7ed0
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612001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
62
63 * s390.h: New file.
64
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652001-02-02 Patrick Macdonald <patrickm@redhat.com>
66
67 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
68 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
69 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
70
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712001-01-24 Karsten Keil <kkeil@suse.de>
72
73 * i386.h (i386_optab): Fix swapgs
74
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752001-01-14 Alan Modra <alan@linuxcare.com.au>
76
77 * hppa.h: Describe new '<' and '>' operand types, and tidy
78 existing comments.
79 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
80 Remove duplicate "ldw j(s,b),x". Sort some entries.
81
e135f41b 822001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
83
84 * i386.h (i386_optab): Fix pusha and ret templates.
85
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862001-01-11 Peter Targett <peter.targett@arccores.com>
87
88 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
89 definitions for masking cpu type.
90 (arc_ext_operand_value) New structure for storing extended
91 operands.
92 (ARC_OPERAND_*) Flags for operand values.
93
942001-01-10 Jan Hubicka <jh@suse.cz>
7c2b079e
JH
95
96 * i386.h (pinsrw): Add.
97 (pshufw): Remove.
98 (cvttpd2dq): Fix operands.
99 (cvttps2dq): Likewise.
100 (movq2q): Rename to movdq2q.
101
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1022001-01-10 Richard Schaal <richard.schaal@intel.com>
103
104 * i386.h: Correct movnti instruction.
105
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1062001-01-09 Jeff Johnston <jjohnstn@redhat.com>
107
108 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
109 of operands (unsigned char or unsigned short).
110 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
111 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
112
0d2bcfaf 1132001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
114
115 * i386.h (i386_optab): Make [sml]fence template to use immext field.
116
0d2bcfaf 1172001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
118
119 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
120 introduced by Pentium4
121
0d2bcfaf 1222000-12-30 Jan Hubicka <jh@suse.cz>
c0d8940f
JH
123
124 * i386.h (i386_optab): Add "rex*" instructions;
125 add swapgs; disable jmp/call far direct instructions for
126 64bit mode; add syscall and sysret; disable registers for 0xc6
127 template. Add 'q' suffixes to extendable instructions, disable
079966a8 128 obsolete instructions, add new sign/zero extension ones.
c0d8940f
JH
129 (i386_regtab): Add extended registers.
130 (*Suf): Add No_qSuf.
131 (q_Suf, wlq_Suf, bwlq_Suf): New.
132
0d2bcfaf 1332000-12-20 Jan Hubicka <jh@suse.cz>
3e73aa7c
JH
134
135 * i386.h (i386_optab): Replace "Imm" with "EncImm".
136 (i386_regtab): Add flags field.
137
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1382000-12-12 Nick Clifton <nickc@redhat.com>
139
140 * mips.h: Fix formatting.
141
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1422000-12-01 Chris Demetriou <cgd@sibyte.com>
143
144 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
145 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
146 OP_*_SYSCALL definitions.
147 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
148 19 bit wait codes.
149 (MIPS operand specifier comments): Remove 'm', add 'U' and
150 'J', and update the meaning of 'B' so that it's more general.
151
e7af610e
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152 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
153 INSN_ISA5): Renumber, redefine to mean the ISA at which the
154 instruction was added.
155 (INSN_ISA32): New constant.
156 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
157 Renumber to avoid new and/or renumbered INSN_* constants.
158 (INSN_MIPS32): Delete.
159 (ISA_UNKNOWN): New constant to indicate unknown ISA.
160 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
161 ISA_MIPS32): New constants, defined to be the mask of INSN_*
162 constants available at that ISA level.
163 (CPU_UNKNOWN): New constant to indicate unknown CPU.
164 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
165 define it with a unique value.
166 (OPCODE_IS_MEMBER): Update for new ISA membership-related
167 constant meanings.
168
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169 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
170 definitions.
171
c6c98b38
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172 * mips.h (CPU_SB1): New constant.
173
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JJ
1742000-10-20 Jakub Jelinek <jakub@redhat.com>
175
176 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
177 Note that '3' is used for siam operand.
178
139368c9
JW
1792000-09-22 Jim Wilson <wilson@cygnus.com>
180
181 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
182
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1832000-09-13 Anders Norlander <anorland@acc.umu.se>
184
185 * mips.h: Use defines instead of hard-coded processor numbers.
186 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
187 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
188 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
189 CPU_4KC, CPU_4KM, CPU_4KP): Define..
190 (OPCODE_IS_MEMBER): Use new defines.
191 (OP_MASK_SEL, OP_SH_SEL): Define.
192 (OP_MASK_CODE20, OP_SH_CODE20): Define.
193 Add 'P' to used characters.
194 Use 'H' for coprocessor select field.
195 Use 'm' for 20 bit breakpoint code.
196 Document new arg characters and add to used characters.
197 (INSN_MIPS32): New define for MIPS32 extensions.
198 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
199
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2002000-09-05 Alan Modra <alan@linuxcare.com.au>
201
202 * hppa.h: Mention cz completer.
203
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2042000-08-16 Jim Wilson <wilson@cygnus.com>
205
206 * ia64.h (IA64_OPCODE_POSTINC): New.
207
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2082000-08-15 H.J. Lu <hjl@gnu.org>
209
210 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
211 IgnoreSize change.
212
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2132000-08-08 Jason Eckhardt <jle@cygnus.com>
214
215 * i860.h: Small formatting adjustments.
216
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2172000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
218
219 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
220 Move related opcodes closer to each other.
221 Minor changes in comments, list undefined opcodes.
222
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2232000-07-26 Dave Brolley <brolley@redhat.com>
224
225 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
226
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2272000-07-22 Jason Eckhardt <jle@cygnus.com>
228
229 * i860.h (btne, bte, bla): Changed these opcodes
230 to use sbroff ('r') instead of split16 ('s').
231 (J, K, L, M): New operand types for 16-bit aligned fields.
232 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
233 use I, J, K, L, M instead of just I.
234 (T, U): New operand types for split 16-bit aligned fields.
235 (st.x): Changed these opcodes to use S, T, U instead of just S.
236 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
237 exist on the i860.
238 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
239 (pfeq.ss, pfeq.dd): New opcodes.
240 (st.s): Fixed incorrect mask bits.
241 (fmlow): Fixed incorrect mask bits.
242 (fzchkl, pfzchkl): Fixed incorrect mask bits.
243 (faddz, pfaddz): Fixed incorrect mask bits.
244 (form, pform): Fixed incorrect mask bits.
245 (pfld.l): Fixed incorrect mask bits.
246 (fst.q): Fixed incorrect mask bits.
247 (all floating point opcodes): Fixed incorrect mask bits for
248 handling of dual bit.
249
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2502000-07-20 Hans-Peter Nilsson <hp@axis.com>
251
252 cris.h: New file.
253
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2542000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
255
256 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
257 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
258 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
259 (AVR_ISA_M83): Define for ATmega83, ATmega85.
260 (espm): Remove, because ESPM removed in databook update.
261 (eicall, eijmp): Move to the end of opcode table.
262
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2632000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
264
265 * m68hc11.h: New file for support of Motorola 68hc11.
266
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267Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
268
269 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
270
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271Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
272
273 * avr.h: New file with AVR opcodes.
274
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275Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
276
277 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
278
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2792000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
280
281 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
282
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2832000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
284
285 * i386.h: Use sl_FP, not sl_Suf for fild.
286
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2872000-05-16 Frank Ch. Eigler <fche@redhat.com>
288
289 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
290 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
291 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
292 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
293
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2942000-05-13 Alan Modra <alan@linuxcare.com.au>,
295
296 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
297
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2982000-05-13 Alan Modra <alan@linuxcare.com.au>,
299 Alexander Sokolov <robocop@netlink.ru>
300
301 * i386.h (i386_optab): Add cpu_flags for all instructions.
302
3032000-05-13 Alan Modra <alan@linuxcare.com.au>
304
305 From Gavin Romig-Koch <gavin@cygnus.com>
306 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
307
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3082000-05-04 Timothy Wall <twall@cygnus.com>
309
310 * tic54x.h: New.
311
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3122000-05-03 J.T. Conklin <jtc@redback.com>
313
314 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
315 (PPC_OPERAND_VR): New operand flag for vector registers.
316
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JL
3172000-05-01 Kazu Hirata <kazu@hxi.com>
318
319 * h8300.h (EOP): Add missing initializer.
320
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321Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
322
323 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
324 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
325 New operand types l,y,&,fe,fE,fx added to support above forms.
326 (pa_opcodes): Replaced usage of 'x' as source/target for
327 floating point double-word loads/stores with 'fx'.
328
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329Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
330 David Mosberger <davidm@hpl.hp.com>
331 Timothy Wall <twall@cygnus.com>
332 Jim Wilson <wilson@cygnus.com>
333
334 * ia64.h: New file.
335
ba23e138
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3362000-03-27 Nick Clifton <nickc@cygnus.com>
337
338 * d30v.h (SHORT_A1): Fix value.
339 (SHORT_AR): Renumber so that it is at the end of the list of short
340 instructions, not the end of the list of long instructions.
341
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3422000-03-26 Alan Modra <alan@linuxcare.com>
343
344 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
345 problem isn't really specific to Unixware.
346 (OLDGCC_COMPAT): Define.
347 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
348 destination %st(0).
349 Fix lots of comments.
350
866afedc
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3512000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
352
353 * d30v.h:
354 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
355 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
356 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
357 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
358 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
359 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
360 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
361
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3622000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
363
364 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
365 fistpd without suffix.
366
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3672000-02-24 Nick Clifton <nickc@cygnus.com>
368
369 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
370 'signed_overflow_ok_p'.
371 Delete prototypes for cgen_set_flags() and cgen_get_flags().
372
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AH
3732000-02-24 Andrew Haley <aph@cygnus.com>
374
375 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
376 (CGEN_CPU_TABLE): flags: new field.
377 Add prototypes for new functions.
378
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3792000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
380
381 * i386.h: Add some more UNIXWARE_COMPAT comments.
382
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3832000-02-23 Linas Vepstas <linas@linas.org>
384
385 * i370.h: New file.
386
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3872000-02-22 Chandra Chavva <cchavva@cygnus.com>
388
389 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
390 cannot be combined in parallel with ADD/SUBppp.
391
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3922000-02-22 Andrew Haley <aph@cygnus.com>
393
394 * mips.h: (OPCODE_IS_MEMBER): Add comment.
395
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3961999-12-30 Andrew Haley <aph@cygnus.com>
397
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398 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
399 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
400 insns.
367c01af 401
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4022000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
403
404 * i386.h: Qualify intel mode far call and jmp with x_Suf.
405
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4061999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
407
408 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
409 indirect jumps and calls. Add FF/3 call for intel mode.
410
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411Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
412
413 * mn10300.h: Add new operand types. Add new instruction formats.
414
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415Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
416
417 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
418 instruction.
419
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4201999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
421
422 * mips.h (INSN_ISA5): New.
423
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4241999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
425
426 * mips.h (OPCODE_IS_MEMBER): New.
427
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4281999-10-29 Nick Clifton <nickc@cygnus.com>
429
430 * d30v.h (SHORT_AR): Define.
431
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4321999-10-18 Michael Meissner <meissner@cygnus.com>
433
434 * alpha.h (alpha_num_opcodes): Convert to unsigned.
435 (alpha_num_operands): Ditto.
436
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437Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
438
439 * hppa.h (pa_opcodes): Add load and store cache control to
440 instructions. Add ordered access load and store.
441
442 * hppa.h (pa_opcode): Add new entries for addb and addib.
443
444 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
445
446 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
447
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448Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
449
450 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
451
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452Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
453
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454 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
455 and "be" using completer prefixes.
456
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457 * hppa.h (pa_opcodes): Add initializers to silence compiler.
458
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459 * hppa.h: Update comments about character usage.
460
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461Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
462
463 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
464 up the new fstw & bve instructions.
465
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466Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
467
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468 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
469 instructions.
470
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471 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
472
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473 * hppa.h (pa_opcodes): Add long offset double word load/store
474 instructions.
475
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476 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
477 stores.
478
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479 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
480
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481 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
482
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483 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
484
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485 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
486
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487 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
488
27bbbb58
JL
489 * hppa.h (pa_opcodes): Add support for "b,l".
490
c36efdd2
JL
491 * hppa.h (pa_opcodes): Add support for "b,gate".
492
f2727d04
JL
493Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
494
9392fb11
JL
495 * hppa.h (pa_opcodes): Use 'fX' for first register operand
496 in xmpyu.
497
e0c52e99
JL
498 * hppa.h (pa_opcodes): Fix mask for probe and probei.
499
f2727d04
JL
500 * hppa.h (pa_opcodes): Fix mask for depwi.
501
52d836e2
JL
502Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
503
504 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
505 an explicit output argument.
506
90765e3a
JL
507Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
508
509 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
510 Add a few PA2.0 loads and store variants.
511
8340b17f
ILT
5121999-09-04 Steve Chamberlain <sac@pobox.com>
513
514 * pj.h: New file.
515
5f47d35b
AM
5161999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
517
518 * i386.h (i386_regtab): Move %st to top of table, and split off
519 other fp reg entries.
520 (i386_float_regtab): To here.
521
1c143202
JL
522Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
523
7d8fdb64
JL
524 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
525 by 'f'.
526
90927b9c
JL
527 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
528 Add supporting args.
529
1d16bf9c
JL
530 * hppa.h: Document new completers and args.
531 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
532 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
533 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
534 pmenb and pmdis.
535
96226a68
JL
536 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
537 hshr, hsub, mixh, mixw, permh.
538
5d4ba527
JL
539 * hppa.h (pa_opcodes): Change completers in instructions to
540 use 'c' prefix.
541
e9fc28c6
JL
542 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
543 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
544
1c143202
JL
545 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
546 fnegabs to use 'I' instead of 'F'.
547
9e525108
AM
5481999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
549
550 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
551 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
552 Alphabetically sort PIII insns.
553
e8da1bf1
DE
554Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
555
556 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
557
7d627258
JL
558Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
559
5696871a
JL
560 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
561 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
562
7d627258
JL
563 * hppa.h: Document 64 bit condition completers.
564
c5e52916
JL
565Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
566
567 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
568
eecb386c
AM
5691999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
570
571 * i386.h (i386_optab): Add DefaultSize modifier to all insns
572 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
573 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
574
88a380f3
JL
575Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
576 Jeff Law <law@cygnus.com>
577
578 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
579
580 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL
581
582 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
583 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
584
145cf1f0
AM
5851999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
586
587 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
588
73826640
JL
589Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
590
591 * hppa.h (struct pa_opcode): Add new field "flags".
592 (FLAGS_STRICT): Define.
593
b65db252
JL
594Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
595 Jeff Law <law@cygnus.com>
596
f7fc668b
JL
597 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
598
599 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 600
10084519
AM
6011999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
602
603 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
604 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
605 flag to fcomi and friends.
606
cd8a80ba
JL
607Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
608
609 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
610 integer logical instructions.
611
1fca749b
ILT
6121999-05-28 Linus Nordberg <linus.nordberg@canit.se>
613
614 * m68k.h: Document new formats `E', `G', `H' and new places `N',
615 `n', `o'.
616
617 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
618 and new places `m', `M', `h'.
619
aa008907
JL
620Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
621
622 * hppa.h (pa_opcodes): Add several processor specific system
623 instructions.
624
e26b85f0
JL
625Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
626
627 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
628 "addb", and "addib" to be used by the disassembler.
629
c608c12e
AM
6301999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
631
632 * i386.h (ReverseModrm): Remove all occurences.
633 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
634 movmskps, pextrw, pmovmskb, maskmovq.
635 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
636 ignore the data size prefix.
637
638 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
639 Mostly stolen from Doug Ledford <dledford@redhat.com>
640
45c18104
RH
641Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
642
643 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
644
252b5132
RH
6451999-04-14 Doug Evans <devans@casey.cygnus.com>
646
647 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
648 (CGEN_ATTR_TYPE): Update.
649 (CGEN_ATTR_MASK): Number booleans starting at 0.
650 (CGEN_ATTR_VALUE): Update.
651 (CGEN_INSN_ATTR): Update.
652
653Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
654
655 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
656 instructions.
657
658Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
659
660 * hppa.h (bb, bvb): Tweak opcode/mask.
661
662
6631999-03-22 Doug Evans <devans@casey.cygnus.com>
664
665 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
666 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
667 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
668 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
669 Delete member max_insn_size.
670 (enum cgen_cpu_open_arg): New enum.
671 (cpu_open): Update prototype.
672 (cpu_open_1): Declare.
673 (cgen_set_cpu): Delete.
674
6751999-03-11 Doug Evans <devans@casey.cygnus.com>
676
677 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
678 (CGEN_OPERAND_NIL): New macro.
679 (CGEN_OPERAND): New member `type'.
680 (@arch@_cgen_operand_table): Delete decl.
681 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
682 (CGEN_OPERAND_TABLE): New struct.
683 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
684 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
685 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
686 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
687 {get,set}_{int,vma}_operand.
688 (@arch@_cgen_cpu_open): New arg `isa'.
689 (cgen_set_cpu): Ditto.
690
691Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
692
693 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
694
6951999-02-25 Doug Evans <devans@casey.cygnus.com>
696
697 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
698 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
699 enum cgen_hw_type.
700 (CGEN_HW_TABLE): New struct.
701 (hw_table): Delete declaration.
702 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
703 to table entry to enum.
704 (CGEN_OPINST): Ditto.
705 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
706
707Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
708
709 * alpha.h (AXP_OPCODE_EV6): New.
710 (AXP_OPCODE_NOPAL): Include it.
711
7121999-02-09 Doug Evans <devans@casey.cygnus.com>
713
714 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
715 All uses updated. New members int_insn_p, max_insn_size,
716 parse_operand,insert_operand,extract_operand,print_operand,
717 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
718 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
719 extract_handlers,print_handlers.
720 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
721 (CGEN_ATTR_BOOL_OFFSET): New macro.
722 (CGEN_ATTR_MASK): Subtract it to compute bit number.
723 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
724 (cgen_opcode_handler): Renamed from cgen_base.
725 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
726 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
727 all uses updated.
728 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
729 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
730 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
731 (CGEN_OPCODE,CGEN_IBASE): New types.
732 (CGEN_INSN): Rewrite.
733 (CGEN_{ASM,DIS}_HASH*): Delete.
734 (init_opcode_table,init_ibld_table): Declare.
735 (CGEN_INSN_ATTR): New type.
736
737Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
738
739 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
740 (x_FP, d_FP, dls_FP, sldx_FP): Define.
741 Change *Suf definitions to include x and d suffixes.
742 (movsx): Use w_Suf and b_Suf.
743 (movzx): Likewise.
744 (movs): Use bwld_Suf.
745 (fld): Change ordering. Use sld_FP.
746 (fild): Add Intel Syntax equivalent of fildq.
747 (fst): Use sld_FP.
748 (fist): Use sld_FP.
749 (fstp): Use sld_FP. Add x_FP version.
750 (fistp): LLongMem version for Intel Syntax.
751 (fcom, fcomp): Use sld_FP.
752 (fadd, fiadd, fsub): Use sld_FP.
753 (fsubr): Use sld_FP.
754 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
755
7561999-01-27 Doug Evans <devans@casey.cygnus.com>
757
758 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
759 CGEN_MODE_UINT.
760
e135f41b 7611999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
762
763 * hppa.h (bv): Fix mask.
764
7651999-01-05 Doug Evans <devans@casey.cygnus.com>
766
767 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
768 (CGEN_ATTR): Use it.
769 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
770 (CGEN_ATTR_TABLE): New member dfault.
771
7721998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
773
774 * mips.h (MIPS16_INSN_BRANCH): New.
775
776Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
777
778 The following is part of a change made by Edith Epstein
779 <eepstein@sophia.cygnus.com> as part of a project to merge in
780 changes by HP; HP did not create ChangeLog entries.
781
782 * hppa.h (completer_chars): list of chars to not put a space
783 after.
784
785Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
786
787 * i386.h (i386_optab): Permit w suffix on processor control and
788 status word instructions.
789
7901998-11-30 Doug Evans <devans@casey.cygnus.com>
791
792 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
793 (struct cgen_keyword_entry): Ditto.
794 (struct cgen_operand): Ditto.
795 (CGEN_IFLD): New typedef, with associated access macros.
796 (CGEN_IFMT): New typedef, with associated access macros.
797 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
798 (CGEN_IVALUE): New typedef.
799 (struct cgen_insn): Delete const on syntax,attrs members.
800 `format' now points to format data. Type of `value' is now
801 CGEN_IVALUE.
802 (struct cgen_opcode_table): New member ifld_table.
803
8041998-11-18 Doug Evans <devans@casey.cygnus.com>
805
806 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
807 (CGEN_OPERAND_INSTANCE): New member `attrs'.
808 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
809 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
810 (cgen_opcode_table): Update type of dis_hash fn.
811 (extract_operand): Update type of `insn_value' arg.
812
813Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
814
815 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
816
817Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
818
819 * mips.h (INSN_MULT): Added.
820
821Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
822
823 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
824
825Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
826
827 * cgen.h (CGEN_INSN_INT): New typedef.
828 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
829 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
830 (CGEN_INSN_BYTES_PTR): New typedef.
831 (CGEN_EXTRACT_INFO): New typedef.
832 (cgen_insert_fn,cgen_extract_fn): Update.
833 (cgen_opcode_table): New member `insn_endian'.
834 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
835 (insert_operand,extract_operand): Update.
836 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
837
838Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
839
840 * cgen.h (CGEN_ATTR_BOOLS): New macro.
841 (struct CGEN_HW_ENTRY): New member `attrs'.
842 (CGEN_HW_ATTR): New macro.
843 (struct CGEN_OPERAND_INSTANCE): New member `name'.
844 (CGEN_INSN_INVALID_P): New macro.
845
846Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
847
848 * hppa.h: Add "fid".
849
850Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
851
852 From Robert Andrew Dale <rob@nb.net>
853 * i386.h (i386_optab): Add AMD 3DNow! instructions.
854 (AMD_3DNOW_OPCODE): Define.
855
856Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
857
858 * d30v.h (EITHER_BUT_PREFER_MU): Define.
859
860Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
861
862 * cgen.h (cgen_insn): #if 0 out element `cdx'.
863
864Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
865
866 Move all global state data into opcode table struct, and treat
867 opcode table as something that is "opened/closed".
868 * cgen.h (CGEN_OPCODE_DESC): New type.
869 (all fns): New first arg of opcode table descriptor.
870 (cgen_set_parse_operand_fn): Add prototype.
871 (cgen_current_machine,cgen_current_endian): Delete.
872 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
873 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
874 dis_hash_table,dis_hash_table_entries.
875 (opcode_open,opcode_close): Add prototypes.
876
877 * cgen.h (cgen_insn): New element `cdx'.
878
879Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
880
881 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
882
883Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
884
885 * mn10300.h: Add "no_match_operands" field for instructions.
886 (MN10300_MAX_OPERANDS): Define.
887
888Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
889
890 * cgen.h (cgen_macro_insn_count): Declare.
891
892Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
893
894 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
895 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
896 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
897 set_{int,vma}_operand.
898
899Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
900
901 * mn10300.h: Add "machine" field for instructions.
902 (MN103, AM30): Define machine types.
903
904Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
905
906 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
907
9081998-06-18 Ulrich Drepper <drepper@cygnus.com>
909
910 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
911
912Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
913
914 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
915 and ud2b.
916 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
917 those that happen to be implemented on pentiums.
918
919Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
920
921 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
922 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
923 with Size16|IgnoreSize or Size32|IgnoreSize.
924
925Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
926
927 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
928 (REPE): Rename to REPE_PREFIX_OPCODE.
929 (i386_regtab_end): Remove.
930 (i386_prefixtab, i386_prefixtab_end): Remove.
931 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
932 of md_begin.
933 (MAX_OPCODE_SIZE): Define.
934 (i386_optab_end): Remove.
935 (sl_Suf): Define.
936 (sl_FP): Use sl_Suf.
937
938 * i386.h (i386_optab): Allow 16 bit displacement for `mov
939 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
940 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
941 data32, dword, and adword prefixes.
942 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
943 regs.
944
945Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
946
947 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
948
949 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
950 register operands, because this is a common idiom. Flag them with
951 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
952 fdivrp because gcc erroneously generates them. Also flag with a
953 warning.
954
955 * i386.h: Add suffix modifiers to most insns, and tighter operand
956 checks in some cases. Fix a number of UnixWare compatibility
957 issues with float insns. Merge some floating point opcodes, using
958 new FloatMF modifier.
959 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
960 consistency.
961
962 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
963 IgnoreDataSize where appropriate.
964
965Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
966
967 * i386.h: (one_byte_segment_defaults): Remove.
968 (two_byte_segment_defaults): Remove.
969 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
970
971Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
972
973 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
974 (cgen_hw_lookup_by_num): Declare.
975
976Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
977
978 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
979 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
980
981Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
982
983 * cgen.h (cgen_asm_init_parse): Delete.
984 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
985 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
986
987Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
988
989 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
990 (cgen_asm_finish_insn): Update prototype.
991 (cgen_insn): New members num, data.
992 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
993 dis_hash, dis_hash_table_size moved to ...
994 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
995 All uses updated. New members asm_hash_p, dis_hash_p.
996 (CGEN_MINSN_EXPANSION): New struct.
997 (cgen_expand_macro_insn): Declare.
998 (cgen_macro_insn_count): Declare.
999 (get_insn_operands): Update prototype.
1000 (lookup_get_insn_operands): Declare.
1001
1002Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1003
1004 * i386.h (i386_optab): Change iclrKludge and imulKludge to
1005 regKludge. Add operands types for string instructions.
1006
1007Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
1008
1009 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
1010 table.
1011
1012Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
1013
1014 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
1015 for `gettext'.
1016
1017Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1018
1019 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1020 Add IsString flag to string instructions.
1021 (IS_STRING): Don't define.
1022 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1023 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1024 (SS_PREFIX_OPCODE): Define.
1025
1026Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1027
1028 * i386.h: Revert March 24 patch; no more LinearAddress.
1029
1030Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1031
1032 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1033 instructions, and instead add FWait opcode modifier. Add short
1034 form of fldenv and fstenv.
1035 (FWAIT_OPCODE): Define.
1036
1037 * i386.h (i386_optab): Change second operand constraint of `mov
1038 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1039 allow legal instructions such as `movl %gs,%esi'
1040
1041Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1042
1043 * h8300.h: Various changes to fully bracket initializers.
1044
1045Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1046
1047 * i386.h: Set LinearAddress for lidt and lgdt.
1048
1049Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1050
1051 * cgen.h (CGEN_BOOL_ATTR): New macro.
1052
1053Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1054
1055 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1056
1057Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1058
1059 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1060 (cgen_insn): Record syntax and format entries here, rather than
1061 separately.
1062
1063Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1064
1065 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1066
1067Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1068
1069 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1070 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1071 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1072
1073Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1074
1075 * cgen.h (lookup_insn): New argument alias_p.
1076
1077Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1078
1079Fix rac to accept only a0:
1080 * d10v.h (OPERAND_ACC): Split into:
1081 (OPERAND_ACC0, OPERAND_ACC1) .
1082 (OPERAND_GPR): Define.
1083
1084Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1085
1086 * cgen.h (CGEN_FIELDS): Define here.
1087 (CGEN_HW_ENTRY): New member `type'.
1088 (hw_list): Delete decl.
1089 (enum cgen_mode): Declare.
1090 (CGEN_OPERAND): New member `hw'.
1091 (enum cgen_operand_instance_type): Declare.
1092 (CGEN_OPERAND_INSTANCE): New type.
1093 (CGEN_INSN): New member `operands'.
1094 (CGEN_OPCODE_DATA): Make hw_list const.
1095 (get_insn_operands,lookup_insn): Add prototypes for.
1096
1097Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1098
1099 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1100 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1101 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1102 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1103
1104Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1105
1106 * cgen.h: Correct typo in comment end marker.
1107
1108Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1109
1110 * tic30.h: New file.
1111
e135f41b 1112Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1113
1114 * cgen.h: Add prototypes for cgen_save_fixups(),
1115 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1116 of cgen_asm_finish_insn() to return a char *.
1117
1118Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1119
1120 * cgen.h: Formatting changes to improve readability.
1121
1122Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1123
1124 * cgen.h (*): Clean up pass over `struct foo' usage.
1125 (CGEN_ATTR): Make unsigned char.
1126 (CGEN_ATTR_TYPE): Update.
1127 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1128 (cgen_base): Move member `attrs' to cgen_insn.
1129 (CGEN_KEYWORD): New member `null_entry'.
1130 (CGEN_{SYNTAX,FORMAT}): New types.
1131 (cgen_insn): Format and syntax separated from each other.
1132
1133Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1134
1135 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1136 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1137 flags_{used,set} long.
1138 (d30v_operand): Make flags field long.
1139
1140Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1141
1142 * m68k.h: Fix comment describing operand types.
1143
1144Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1145
1146 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1147 everything else after down.
1148
1149Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1150
1151 * d10v.h (OPERAND_FLAG): Split into:
1152 (OPERAND_FFLAG, OPERAND_CFLAG) .
1153
1154Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1155
1156 * mips.h (struct mips_opcode): Changed comments to reflect new
1157 field usage.
1158
1159Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1160
1161 * mips.h: Added to comments a quick-ref list of all assigned
1162 operand type characters.
1163 (OP_{MASK,SH}_PERFREG): New macros.
1164
1165Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1166
1167 * sparc.h: Add '_' and '/' for v9a asr's.
1168 Patch from David Miller <davem@vger.rutgers.edu>
1169
1170Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1171
1172 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1173 area are not available in the base model (H8/300).
1174
1175Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1176
1177 * m68k.h: Remove documentation of ` operand specifier.
1178
1179Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1180
1181 * m68k.h: Document q and v operand specifiers.
1182
1183Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1184
1185 * v850.h (struct v850_opcode): Add processors field.
1186 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1187 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1188 (PROCESSOR_V850EA): New bit constants.
1189
1190Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1191
1192 Merge changes from Martin Hunt:
1193
1194 * d30v.h: Allow up to 64 control registers. Add
1195 SHORT_A5S format.
1196
1197 * d30v.h (LONG_Db): New form for delayed branches.
1198
1199 * d30v.h: (LONG_Db): New form for repeati.
1200
1201 * d30v.h (SHORT_D2B): New form.
1202
1203 * d30v.h (SHORT_A2): New form.
1204
1205 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1206 registers are used. Needed for VLIW optimization.
1207
1208Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1209
1210 * cgen.h: Move assembler interface section
1211 up so cgen_parse_operand_result is defined for cgen_parse_address.
1212 (cgen_parse_address): Update prototype.
1213
1214Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1215
1216 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1217
1218Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1219
1220 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1221 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1222 <paubert@iram.es>.
1223
1224 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1225 <paubert@iram.es>.
1226
1227 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1228 <paubert@iram.es>.
1229
1230 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1231 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1232
1233Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1234
1235 * v850.h (V850_NOT_R0): New flag.
1236
1237Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1238
1239 * v850.h (struct v850_opcode): Remove flags field.
1240
1241Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1242
1243 * v850.h (struct v850_opcode): Add flags field.
1244 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1245 fields.
1246 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1247 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1248
1249Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1250
1251 * arc.h: New file.
1252
1253Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1254
1255 * sparc.h (sparc_opcodes): Declare as const.
1256
1257Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1258
1259 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1260 uses single or double precision floating point resources.
1261 (INSN_NO_ISA, INSN_ISA1): Define.
1262 (cpu specific INSN macros): Tweak into bitmasks outside the range
1263 of INSN_ISA field.
1264
1265Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1266
1267 * i386.h: Fix pand opcode.
1268
1269Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1270
1271 * mips.h: Widen INSN_ISA and move it to a more convenient
1272 bit position. Add INSN_3900.
1273
1274Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1275
1276 * mips.h (struct mips_opcode): added new field membership.
1277
1278Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1279
1280 * i386.h (movd): only Reg32 is allowed.
1281
1282 * i386.h: add fcomp and ud2. From Wayne Scott
1283 <wscott@ichips.intel.com>.
1284
1285Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1286
1287 * i386.h: Add MMX instructions.
1288
1289Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1290
1291 * i386.h: Remove W modifier from conditional move instructions.
1292
1293Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1294
1295 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1296 with no arguments to match that generated by the UnixWare
1297 assembler.
1298
1299Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1300
1301 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1302 (cgen_parse_operand_fn): Declare.
1303 (cgen_init_parse_operand): Declare.
1304 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1305 new argument `want'.
1306 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1307 (enum cgen_parse_operand_type): New enum.
1308
1309Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1310
1311 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1312
1313Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1314
1315 * cgen.h: New file.
1316
1317Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1318
1319 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1320 fdivrp.
1321
1322Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1323
1324 * v850.h (extract): Make unsigned.
1325
1326Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1327
1328 * i386.h: Add iclr.
1329
1330Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1331
1332 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1333 take a direction bit.
1334
1335Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1336
1337 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1338
1339Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1340
1341 * sparc.h: Include <ansidecl.h>. Update function declarations to
1342 use prototypes, and to use const when appropriate.
1343
1344Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1345
1346 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1347
1348Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1349
1350 * d10v.h: Change pre_defined_registers to
1351 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1352
1353Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1354
1355 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1356 Change mips_opcodes from const array to a pointer,
1357 and change bfd_mips_num_opcodes from const int to int,
1358 so that we can increase the size of the mips opcodes table
1359 dynamically.
1360
1361Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1362
1363 * d30v.h (FLAG_X): Remove unused flag.
1364
1365Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1366
1367 * d30v.h: New file.
1368
1369Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1370
1371 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1372 (PDS_VALUE): Macro to access value field of predefined symbols.
1373 (tic80_next_predefined_symbol): Add prototype.
1374
1375Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1376
1377 * tic80.h (tic80_symbol_to_value): Change prototype to match
1378 change in function, added class parameter.
1379
1380Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1381
1382 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1383 endmask fields, which are somewhat weird in that 0 and 32 are
1384 treated exactly the same.
1385
1386Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1387
1388 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1389 rather than a constant that is 2**X. Reorder them to put bits for
1390 operands that have symbolic names in the upper bits, so they can
1391 be packed into an int where the lower bits contain the value that
1392 corresponds to that symbolic name.
1393 (predefined_symbo): Add struct.
1394 (tic80_predefined_symbols): Declare array of translations.
1395 (tic80_num_predefined_symbols): Declare size of that array.
1396 (tic80_value_to_symbol): Declare function.
1397 (tic80_symbol_to_value): Declare function.
1398
1399Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1400
1401 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1402
1403Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1404
1405 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1406 be the destination register.
1407
1408Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1409
1410 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1411 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1412 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1413 that the opcode can have two vector instructions in a single
1414 32 bit word and we have to encode/decode both.
1415
1416Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1417
1418 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1419 TIC80_OPERAND_RELATIVE for PC relative.
1420 (TIC80_OPERAND_BASEREL): New flag bit for register
1421 base relative.
1422
1423Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1424
1425 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1426
1427Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1428
1429 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1430 ":s" modifier for scaling.
1431
1432Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1433
1434 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1435 (TIC80_OPERAND_M_LI): Ditto
1436
1437Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1438
1439 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1440 (TIC80_OPERAND_CC): New define for condition code operand.
1441 (TIC80_OPERAND_CR): New define for control register operand.
1442
1443Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1444
1445 * tic80.h (struct tic80_opcode): Name changed.
1446 (struct tic80_opcode): Remove format field.
1447 (struct tic80_operand): Add insertion and extraction functions.
1448 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1449 correct ones.
1450 (FMT_*): Ditto.
1451
1452Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1453
1454 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1455 type IV instruction offsets.
1456
1457Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1458
1459 * tic80.h: New file.
1460
1461Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1462
1463 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1464
1465Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1466
1467 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1468 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1469 * v850.h: Fix comment, v850_operand not powerpc_operand.
1470
1471Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1472
1473 * mn10200.h: Flesh out structures and definitions needed by
1474 the mn10200 assembler & disassembler.
1475
1476Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1477
1478 * mips.h: Add mips16 definitions.
1479
1480Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1481
1482 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1483
1484Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1485
1486 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1487 (MN10300_OPERAND_MEMADDR): Define.
1488
1489Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1490
1491 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1492
1493Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1494
1495 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1496
1497Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1498
1499 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1500
1501Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1502
1503 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1504
1505Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1506
1507 * alpha.h: Don't include "bfd.h"; private relocation types are now
1508 negative to minimize problems with shared libraries. Organize
1509 instruction subsets by AMASK extensions and PALcode
1510 implementation.
1511 (struct alpha_operand): Move flags slot for better packing.
1512
1513Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1514
1515 * v850.h (V850_OPERAND_RELAX): New operand flag.
1516
1517Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1518
1519 * mn10300.h (FMT_*): Move operand format definitions
1520 here.
1521
1522Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1523
1524 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1525
1526Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1527
1528 * mn10300.h (mn10300_opcode): Add "format" field.
1529 (MN10300_OPERAND_*): Define.
1530
1531Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1532
1533 * mn10x00.h: Delete.
1534 * mn10200.h, mn10300.h: New files.
1535
1536Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1537
1538 * mn10x00.h: New file.
1539
1540Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1541
1542 * v850.h: Add new flag to indicate this instruction uses a PC
1543 displacement.
1544
1545Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1546
1547 * h8300.h (stmac): Add missing instruction.
1548
1549Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1550
1551 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1552 field.
1553
1554Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1555
1556 * v850.h (V850_OPERAND_EP): Define.
1557
1558 * v850.h (v850_opcode): Add size field.
1559
1560Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1561
1562 * v850.h (v850_operands): Add insert and extract fields, pointers
1563 to functions used to handle unusual operand encoding.
1564 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1565 V850_OPERAND_SIGNED): Defined.
1566
1567Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1568
1569 * v850.h (v850_operands): Add flags field.
1570 (OPERAND_REG, OPERAND_NUM): Defined.
1571
1572Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1573
1574 * v850.h: New file.
1575
1576Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1577
1578 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1579 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1580 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1581 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1582 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1583 Defined.
1584
1585Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1586
1587 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1588 a 3 bit space id instead of a 2 bit space id.
1589
1590Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1591
1592 * d10v.h: Add some additional defines to support the
1593 assembler in determining which operations can be done in parallel.
1594
1595Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1596
1597 * h8300.h (SN): Define.
1598 (eepmov.b): Renamed from "eepmov"
1599 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1600 with them.
1601
1602Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1603
1604 * d10v.h (OPERAND_SHIFT): New operand flag.
1605
1606Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1607
1608 * d10v.h: Changes for divs, parallel-only instructions, and
1609 signed numbers.
1610
1611Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1612
1613 * d10v.h (pd_reg): Define. Putting the definition here allows
1614 the assembler and disassembler to share the same struct.
1615
1616Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1617
1618 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1619 Williams <steve@icarus.com>.
1620
1621Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1622
1623 * d10v.h: New file.
1624
1625Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1626
1627 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1628
1629Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1630
1631 * m68k.h (mcf5200): New macro.
1632 Document names of coldfire control registers.
1633
1634Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1635
1636 * h8300.h (SRC_IN_DST): Define.
1637
1638 * h8300.h (UNOP3): Mark the register operand in this insn
1639 as a source operand, not a destination operand.
1640 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1641 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1642 register operand with SRC_IN_DST.
1643
1644Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1645
1646 * alpha.h: New file.
1647
1648Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1649
1650 * rs6k.h: Remove obsolete file.
1651
1652Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1653
1654 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1655 fdivp, and fdivrp. Add ffreep.
1656
1657Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1658
1659 * h8300.h: Reorder various #defines for readability.
1660 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1661 (BITOP): Accept additional (unused) argument. All callers changed.
1662 (EBITOP): Likewise.
1663 (O_LAST): Bump.
1664 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1665
1666 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1667 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1668 (BITOP, EBITOP): Handle new H8/S addressing modes for
1669 bit insns.
1670 (UNOP3): Handle new shift/rotate insns on the H8/S.
1671 (insns using exr): New instructions.
1672 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1673
1674Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1675
1676 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1677 was incorrect.
1678
1679Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1680
1681 * h8300.h (START): Remove.
1682 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1683 and mov.l insns that can be relaxed.
1684
1685Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1686
1687 * i386.h: Remove Abs32 from lcall.
1688
1689Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1690
1691 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1692 (SLCPOP): New macro.
1693 Mark X,Y opcode letters as in use.
1694
1695Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1696
1697 * sparc.h (F_FLOAT, F_FBR): Define.
1698
1699Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1700
1701 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1702 from all insns.
1703 (ABS8SRC,ABS8DST): Add ABS8MEM.
1704 (add.l): Fix reg+reg variant.
1705 (eepmov.w): Renamed from eepmovw.
1706 (ldc,stc): Fix many cases.
1707
1708Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1709
1710 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1711
1712Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1713
1714 * sparc.h (O): Mark operand letter as in use.
1715
1716Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1717
1718 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1719 Mark operand letters uU as in use.
1720
1721Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1722
1723 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1724 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1725 (SPARC_OPCODE_SUPPORTED): New macro.
1726 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1727 (F_NOTV9): Delete.
1728
1729Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1730
1731 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1732 declaration consistent with return type in definition.
1733
1734Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1735
1736 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1737
1738Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1739
1740 * i386.h (i386_regtab): Add 80486 test registers.
1741
1742Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1743
1744 * i960.h (I_HX): Define.
1745 (i960_opcodes): Add HX instruction.
1746
1747Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1748
1749 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1750 and fclex.
1751
1752Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1753
1754 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1755 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1756 (bfd_* defines): Delete.
1757 (sparc_opcode_archs): Replaces architecture_pname.
1758 (sparc_opcode_lookup_arch): Declare.
1759 (NUMOPCODES): Delete.
1760
1761Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1762
1763 * sparc.h (enum sparc_architecture): Add v9a.
1764 (ARCHITECTURES_CONFLICT_P): Update.
1765
1766Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1767
1768 * i386.h: Added Pentium Pro instructions.
1769
1770Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1771
1772 * m68k.h: Document new 'W' operand place.
1773
1774Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1775
1776 * hppa.h: Add lci and syncdma instructions.
1777
1778Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1779
1780 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1781 instructions.
1782
1783Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1784
1785 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1786 assembler's -mcom and -many switches.
1787
1788Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1789
1790 * i386.h: Fix cmpxchg8b extension opcode description.
1791
1792Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1793
1794 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1795 and register cr4.
1796
1797Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1798
1799 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1800
1801Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1802
1803 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1804
1805Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1806
1807 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1808
1809Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1810
1811 * m68kmri.h: Remove.
1812
1813 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1814 declarations. Remove F_ALIAS and flag field of struct
1815 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1816 int. Make name and args fields of struct m68k_opcode const.
1817
1818Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1819
1820 * sparc.h (F_NOTV9): Define.
1821
1822Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1823
1824 * mips.h (INSN_4010): Define.
1825
1826Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1827
1828 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1829
1830 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1831 * m68k.h: Fix argument descriptions of coprocessor
1832 instructions to allow only alterable operands where appropriate.
1833 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1834 (m68k_opcode_aliases): Add more aliases.
1835
1836Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1837
1838 * m68k.h: Added explcitly short-sized conditional branches, and a
1839 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1840 svr4-based configurations.
1841
1842Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1843
1844 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1845 * i386.h: added missing Data16/Data32 flags to a few instructions.
1846
1847Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1848
1849 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1850 (OP_MASK_BCC, OP_SH_BCC): Define.
1851 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1852 (OP_MASK_CCC, OP_SH_CCC): Define.
1853 (INSN_READ_FPR_R): Define.
1854 (INSN_RFE): Delete.
1855
1856Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1857
1858 * m68k.h (enum m68k_architecture): Deleted.
1859 (struct m68k_opcode_alias): New type.
1860 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1861 matching constraints, values and flags. As a side effect of this,
1862 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1863 as I know were never used, now may need re-examining.
1864 (numopcodes): Now const.
1865 (m68k_opcode_aliases, numaliases): New variables.
1866 (endop): Deleted.
1867 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1868 m68k_opcode_aliases; update declaration of m68k_opcodes.
1869
1870Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1871
1872 * hppa.h (delay_type): Delete unused enumeration.
1873 (pa_opcode): Replace unused delayed field with an architecture
1874 field.
1875 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1876
1877Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1878
1879 * mips.h (INSN_ISA4): Define.
1880
1881Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1882
1883 * mips.h (M_DLA_AB, M_DLI): Define.
1884
1885Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1886
1887 * hppa.h (fstwx): Fix single-bit error.
1888
1889Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1890
1891 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1892
1893Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1894
1895 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1896 debug registers. From Charles Hannum (mycroft@netbsd.org).
1897
1898Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1899
1900 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1901 i386 support:
1902 * i386.h (MOV_AX_DISP32): New macro.
1903 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1904 of several call/return instructions.
1905 (ADDR_PREFIX_OPCODE): New macro.
1906
1907Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1908
1909 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1910
4f1d9bd8
NC
1911 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1912 char.
252b5132
RH
1913 (struct vot, field `name'): ditto.
1914
1915Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1916
1917 * vax.h: Supply and properly group all values in end sentinel.
1918
1919Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1920
1921 * mips.h (INSN_ISA, INSN_4650): Define.
1922
1923Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1924
1925 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1926 systems with a separate instruction and data cache, such as the
1927 29040, these instructions take an optional argument.
1928
1929Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1930
1931 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1932 INSN_TRAP.
1933
1934Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1935
1936 * mips.h (INSN_STORE_MEMORY): Define.
1937
1938Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1939
1940 * sparc.h: Document new operand type 'x'.
1941
1942Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1943
1944 * i960.h (I_CX2): New instruction category. It includes
1945 instructions available on Cx and Jx processors.
1946 (I_JX): New instruction category, for JX-only instructions.
1947 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1948 Jx-only instructions, in I_JX category.
1949
1950Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1951
1952 * ns32k.h (endop): Made pointer const too.
1953
1954Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1955
1956 * ns32k.h: Drop Q operand type as there is no correct use
1957 for it. Add I and Z operand types which allow better checking.
1958
1959Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1960
1961 * h8300.h (xor.l) :fix bit pattern.
1962 (L_2): New size of operand.
1963 (trapa): Use it.
1964
1965Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1966
1967 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1968
1969Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1970
1971 * sparc.h: Include v9 definitions.
1972
1973Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1974
1975 * m68k.h (m68060): Defined.
1976 (m68040up, mfloat, mmmu): Include it.
1977 (struct m68k_opcode): Widen `arch' field.
1978 (m68k_opcodes): Updated for M68060. Removed comments that were
1979 instructions commented out by "JF" years ago.
1980
1981Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1982
1983 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1984 add a one-bit `flags' field.
1985 (F_ALIAS): New macro.
1986
1987Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1988
1989 * h8300.h (dec, inc): Get encoding right.
1990
1991Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1992
1993 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1994 a flag instead.
1995 (PPC_OPERAND_SIGNED): Define.
1996 (PPC_OPERAND_SIGNOPT): Define.
1997
1998Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1999
2000 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
2001 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
2002
2003Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2004
2005 * i386.h: Reverse last change. It'll be handled in gas instead.
2006
2007Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
2008
2009 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
2010 slower on the 486 and used the implicit shift count despite the
2011 explicit operand. The one-operand form is still available to get
2012 the shorter form with the implicit shift count.
2013
2014Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
2015
2016 * hppa.h: Fix typo in fstws arg string.
2017
2018Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2019
2020 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2021
2022Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2023
2024 * ppc.h (PPC_OPCODE_601): Define.
2025
2026Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2027
2028 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2029 (so we can determine valid completers for both addb and addb[tf].)
2030
2031 * hppa.h (xmpyu): No floating point format specifier for the
2032 xmpyu instruction.
2033
2034Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2035
2036 * ppc.h (PPC_OPERAND_NEXT): Define.
2037 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2038 (struct powerpc_macro): Define.
2039 (powerpc_macros, powerpc_num_macros): Declare.
2040
2041Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2042
2043 * ppc.h: New file. Header file for PowerPC opcode table.
2044
2045Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2046
2047 * hppa.h: More minor template fixes for sfu and copr (to allow
2048 for easier disassembly).
2049
2050 * hppa.h: Fix templates for all the sfu and copr instructions.
2051
2052Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2053
2054 * i386.h (push): Permit Imm16 operand too.
2055
2056Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2057
2058 * h8300.h (andc): Exists in base arch.
2059
2060Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2061
2062 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2063 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2064
2065Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2066
2067 * hppa.h: Add FP quadword store instructions.
2068
2069Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2070
2071 * mips.h: (M_J_A): Added.
2072 (M_LA): Removed.
2073
2074Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2075
2076 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2077 <mellon@pepper.ncd.com>.
2078
2079Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2080
2081 * hppa.h: Immediate field in probei instructions is unsigned,
2082 not low-sign extended.
2083
2084Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2085
2086 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2087
2088Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2089
2090 * i386.h: Add "fxch" without operand.
2091
2092Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2093
2094 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2095
2096Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2097
2098 * hppa.h: Add gfw and gfr to the opcode table.
2099
2100Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2101
2102 * m88k.h: extended to handle m88110.
2103
2104Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2105
2106 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2107 addresses.
2108
2109Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2110
2111 * i960.h (i960_opcodes): Properly bracket initializers.
2112
2113Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2114
2115 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2116
2117Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2118
2119 * m68k.h (two): Protect second argument with parentheses.
2120
2121Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2122
2123 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2124 Deleted old in/out instructions in "#if 0" section.
2125
2126Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2127
2128 * i386.h (i386_optab): Properly bracket initializers.
2129
2130Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2131
2132 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2133 Jeff Law, law@cs.utah.edu).
2134
2135Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2136
2137 * i386.h (lcall): Accept Imm32 operand also.
2138
2139Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2140
2141 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2142 (M_DABS): Added.
2143
2144Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2145
2146 * mips.h (INSN_*): Changed values. Removed unused definitions.
2147 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2148 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2149 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2150 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2151 (M_*): Added new values for r6000 and r4000 macros.
2152 (ANY_DELAY): Removed.
2153
2154Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2155
2156 * mips.h: Added M_LI_S and M_LI_SS.
2157
2158Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2159
2160 * h8300.h: Get some rare mov.bs correct.
2161
2162Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2163
2164 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2165 been included.
2166
2167Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2168
2169 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2170 jump instructions, for use in disassemblers.
2171
2172Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2173
2174 * m88k.h: Make bitfields just unsigned, not unsigned long or
2175 unsigned short.
2176
2177Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2178
2179 * hppa.h: New argument type 'y'. Use in various float instructions.
2180
2181Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2182
2183 * hppa.h (break): First immediate field is unsigned.
2184
2185 * hppa.h: Add rfir instruction.
2186
2187Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2188
2189 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2190
2191Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2192
2193 * mips.h: Reworked the hazard information somewhat, and fixed some
2194 bugs in the instruction hazard descriptions.
2195
2196Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2197
2198 * m88k.h: Corrected a couple of opcodes.
2199
2200Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2201
2202 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2203 new version includes instruction hazard information, but is
2204 otherwise reasonably similar.
2205
2206Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2207
2208 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2209
2210Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2211
2212 Patches from Jeff Law, law@cs.utah.edu:
2213 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2214 Make the tables be the same for the following instructions:
2215 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2216 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2217 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2218 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2219 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2220 "fcmp", and "ftest".
2221
2222 * hppa.h: Make new and old tables the same for "break", "mtctl",
2223 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2224 Fix typo in last patch. Collapse several #ifdefs into a
2225 single #ifdef.
2226
2227 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2228 of the comments up-to-date.
2229
2230 * hppa.h: Update "free list" of letters and update
2231 comments describing each letter's function.
2232
4f1d9bd8
NC
2233Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2234
2235 * h8300.h: Lots of little fixes for the h8/300h.
2236
2237Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2238
2239 Support for H8/300-H
2240 * h8300.h: Lots of new opcodes.
2241
252b5132
RH
2242Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2243
2244 * h8300.h: checkpoint, includes H8/300-H opcodes.
2245
2246Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2247
2248 * Patches from Jeffrey Law <law@cs.utah.edu>.
2249 * hppa.h: Rework single precision FP
2250 instructions so that they correctly disassemble code
2251 PA1.1 code.
2252
2253Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2254
2255 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2256 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2257
2258Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2259
2260 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2261 gdb will define it for now.
2262
2263Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2264
2265 * sparc.h: Don't end enumerator list with comma.
2266
2267Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2268
2269 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2270 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2271 ("bc2t"): Correct typo.
2272 ("[ls]wc[023]"): Use T rather than t.
2273 ("c[0123]"): Define general coprocessor instructions.
2274
2275Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2276
2277 * m68k.h: Move split point for gcc compilation more towards
2278 middle.
2279
2280Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2281
2282 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2283 simply wrong, ics, rfi, & rfsvc were missing).
2284 Add "a" to opr_ext for "bb". Doc fix.
2285
2286Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2287
2288 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2289 * mips.h: Add casts, to suppress warnings about shifting too much.
2290 * m68k.h: Document the placement code '9'.
2291
2292Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2293
2294 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2295 allows callers to break up the large initialized struct full of
2296 opcodes into two half-sized ones. This permits GCC to compile
2297 this module, since it takes exponential space for initializers.
2298 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2299
2300Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2301
2302 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2303 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2304 initialized structs in it.
2305
2306Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2307
2308 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2309 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2310 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2311
2312Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2313
2314 * mips.h: document "i" and "j" operands correctly.
2315
2316Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2317
2318 * mips.h: Removed endianness dependency.
2319
2320Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2321
2322 * h8300.h: include info on number of cycles per instruction.
2323
2324Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2325
2326 * hppa.h: Move handy aliases to the front. Fix masks for extract
2327 and deposit instructions.
2328
2329Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2330
2331 * i386.h: accept shld and shrd both with and without the shift
2332 count argument, which is always %cl.
2333
2334Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2335
2336 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2337 (one_byte_segment_defaults, two_byte_segment_defaults,
2338 i386_prefixtab_end): Ditto.
2339
2340Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2341
2342 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2343 for operand 2; from John Carr, jfc@dsg.dec.com.
2344
2345Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2346
2347 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2348 always use 16-bit offsets. Makes calculated-size jump tables
2349 feasible.
2350
2351Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2352
2353 * i386.h: Fix one-operand forms of in* and out* patterns.
2354
2355Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2356
2357 * m68k.h: Added CPU32 support.
2358
2359Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2360
2361 * mips.h (break): Disassemble the argument. Patch from
2362 jonathan@cs.stanford.edu (Jonathan Stone).
2363
2364Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2365
2366 * m68k.h: merged Motorola and MIT syntax.
2367
2368Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2369
2370 * m68k.h (pmove): make the tests less strict, the 68k book is
2371 wrong.
2372
2373Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2374
2375 * m68k.h (m68ec030): Defined as alias for 68030.
2376 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2377 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2378 them. Tightened description of "fmovex" to distinguish it from
2379 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2380 up descriptions that claimed versions were available for chips not
2381 supporting them. Added "pmovefd".
2382
2383Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2384
2385 * m68k.h: fix where the . goes in divull
2386
2387Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2388
2389 * m68k.h: the cas2 instruction is supposed to be written with
2390 indirection on the last two operands, which can be either data or
2391 address registers. Added a new operand type 'r' which accepts
2392 either register type. Added new cases for cas2l and cas2w which
2393 use them. Corrected masks for cas2 which failed to recognize use
2394 of address register.
2395
2396Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2397
2398 * m68k.h: Merged in patches (mostly m68040-specific) from
2399 Colin Smith <colin@wrs.com>.
2400
2401 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2402 base). Also cleaned up duplicates, re-ordered instructions for
2403 the sake of dis-assembling (so aliases come after standard names).
2404 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2405
2406Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2407
2408 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2409 all missing .s
2410
2411Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2412
2413 * sparc.h: Moved tables to BFD library.
2414
2415 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2416
2417Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2418
2419 * h8300.h: Finish filling in all the holes in the opcode table,
2420 so that the Lucid C compiler can digest this as well...
2421
2422Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2423
2424 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2425 Fix opcodes on various sizes of fild/fist instructions
2426 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2427 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2428
2429Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2430
2431 * h8300.h: Fill in all the holes in the opcode table so that the
2432 losing HPUX C compiler can digest this...
2433
2434Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2435
2436 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2437 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2438
2439Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2440
2441 * sparc.h: Add new architecture variant sparclite; add its scan
2442 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2443
2444Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2445
2446 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2447 fy@lucid.com).
2448
2449Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2450
2451 * rs6k.h: New version from IBM (Metin).
2452
2453Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2454
2455 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2456 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2457
2458Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2459
2460 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2461
2462Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2463
2464 * m68k.h (one, two): Cast macro args to unsigned to suppress
2465 complaints from compiler and lint about integer overflow during
2466 shift.
2467
2468Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2469
2470 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2471
2472Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2473
2474 * mips.h: Make bitfield layout depend on the HOST compiler,
2475 not on the TARGET system.
2476
2477Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2478
2479 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2480 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2481 <TRANLE@INTELLICORP.COM>.
2482
2483Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2484
2485 * h8300.h: turned op_type enum into #define list
2486
2487Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2488
2489 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2490 similar instructions -- they've been renamed to "fitoq", etc.
2491 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2492 number of arguments.
2493 * h8300.h: Remove extra ; which produces compiler warning.
2494
2495Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2496
2497 * sparc.h: fix opcode for tsubcctv.
2498
2499Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2500
2501 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2502
2503Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2504
2505 * sparc.h (nop): Made the 'lose' field be even tighter,
2506 so only a standard 'nop' is disassembled as a nop.
2507
2508Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2509
2510 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2511 disassembled as a nop.
2512
4f1d9bd8
NC
2513Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2514
2515 * m68k.h, sparc.h: ANSIfy enums.
2516
252b5132
RH
2517Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2518
2519 * sparc.h: fix a typo.
2520
2521Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2522
2523 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2524 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2525 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2526
2527\f
2528Local Variables:
2529version-control: never
2530End: