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0f17484f
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12001-03-24 Alan Modra <alan@linuxcare.com.au>
2
3 * i386.h (i386_optab): Correct entry for "movntdq". Add "punpcklqdq".
4 Add InvMem to first operand of "maskmovdqu".
5
7ccb5238
HPN
62001-03-22 Hans-Peter Nilsson <hp@axis.com>
7
8 * cris.h (ADD_PC_INCR_OPCODE): New macro.
9
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102001-03-21 Kazu Hirata <kazu@hxi.com>
11
12 * h8300.h: Fix formatting.
13
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142001-03-22 Alan Modra <alan@linuxcare.com.au>
15
16 * i386.h (i386_optab): Add paddq, psubq.
17
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182001-03-19 Alan Modra <alan@linuxcare.com.au>
19
20 * i386.h (REGNAM_AL, REGNAM_AX, REGNAM_EAX): Define.
21
80a523c2
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222001-02-28 Igor Shevlyakov <igor@windriver.com>
23
24 * m68k.h: new defines for Coldfire V4. Update mcf to know
25 about mcf5407.
26
e135f41b
NC
272001-02-18 lars brinkhoff <lars@nocrew.org>
28
29 * pdp11.h: New file.
30
312001-02-12 Jan Hubicka <jh@suse.cz>
76f227a5
JH
32
33 * i386.h (i386_optab): SSE integer converison instructions have
34 64bit versions on x86-64.
35
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362001-02-10 Nick Clifton <nickc@redhat.com>
37
38 * mips.h: Remove extraneous whitespace. Formating change to allow
39 for future contribution.
40
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412001-02-09 Martin Schwidefsky <schwidefsky@de.ibm.com>
42
43 * s390.h: New file.
44
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452001-02-02 Patrick Macdonald <patrickm@redhat.com>
46
47 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
48 (CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
49 (CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
50
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512001-01-24 Karsten Keil <kkeil@suse.de>
52
53 * i386.h (i386_optab): Fix swapgs
54
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552001-01-14 Alan Modra <alan@linuxcare.com.au>
56
57 * hppa.h: Describe new '<' and '>' operand types, and tidy
58 existing comments.
59 (pa_opcodes): Add entries for missing wide mode ldi,ldo,ldw,stw.
60 Remove duplicate "ldw j(s,b),x". Sort some entries.
61
e135f41b 622001-01-13 Jan Hubicka <jh@suse.cz>
e2914f48
JH
63
64 * i386.h (i386_optab): Fix pusha and ret templates.
65
0d2bcfaf
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662001-01-11 Peter Targett <peter.targett@arccores.com>
67
68 * arc.h (ARC_MACH_5, ARC_MACH_6, ARC_MACH_7, ARC_MACH_8): New
69 definitions for masking cpu type.
70 (arc_ext_operand_value) New structure for storing extended
71 operands.
72 (ARC_OPERAND_*) Flags for operand values.
73
742001-01-10 Jan Hubicka <jh@suse.cz>
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JH
75
76 * i386.h (pinsrw): Add.
77 (pshufw): Remove.
78 (cvttpd2dq): Fix operands.
79 (cvttps2dq): Likewise.
80 (movq2q): Rename to movdq2q.
81
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822001-01-10 Richard Schaal <richard.schaal@intel.com>
83
84 * i386.h: Correct movnti instruction.
85
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862001-01-09 Jeff Johnston <jjohnstn@redhat.com>
87
88 * cgen.h (CGEN_SYNTAX_CHAR_TYPE): New typedef based on max number
89 of operands (unsigned char or unsigned short).
90 (CGEN_SYNTAX): Changed to make array CGEN_SYNTAX_CHAR_TYPE.
91 (CGEN_SYNTAX_CHAR): Changed to cast to unsigned char.
92
0d2bcfaf 932001-01-05 Jan Hubicka <jh@suse.cz>
7bc70a8e
JH
94
95 * i386.h (i386_optab): Make [sml]fence template to use immext field.
96
0d2bcfaf 972001-01-03 Jan Hubicka <jh@suse.cz>
6f8c0c4c
JH
98
99 * i386.h (i386_optab): Fix 64bit pushf template; Add instructions
100 introduced by Pentium4
101
0d2bcfaf 1022000-12-30 Jan Hubicka <jh@suse.cz>
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103
104 * i386.h (i386_optab): Add "rex*" instructions;
105 add swapgs; disable jmp/call far direct instructions for
106 64bit mode; add syscall and sysret; disable registers for 0xc6
107 template. Add 'q' suffixes to extendable instructions, disable
079966a8 108 obsolete instructions, add new sign/zero extension ones.
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109 (i386_regtab): Add extended registers.
110 (*Suf): Add No_qSuf.
111 (q_Suf, wlq_Suf, bwlq_Suf): New.
112
0d2bcfaf 1132000-12-20 Jan Hubicka <jh@suse.cz>
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114
115 * i386.h (i386_optab): Replace "Imm" with "EncImm".
116 (i386_regtab): Add flags field.
117
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1182000-12-12 Nick Clifton <nickc@redhat.com>
119
120 * mips.h: Fix formatting.
121
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1222000-12-01 Chris Demetriou <cgd@sibyte.com>
123
124 mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
125 (OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
126 OP_*_SYSCALL definitions.
127 (OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
128 19 bit wait codes.
129 (MIPS operand specifier comments): Remove 'm', add 'U' and
130 'J', and update the meaning of 'B' so that it's more general.
131
e7af610e
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132 * mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
133 INSN_ISA5): Renumber, redefine to mean the ISA at which the
134 instruction was added.
135 (INSN_ISA32): New constant.
136 (INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
137 Renumber to avoid new and/or renumbered INSN_* constants.
138 (INSN_MIPS32): Delete.
139 (ISA_UNKNOWN): New constant to indicate unknown ISA.
140 (ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
141 ISA_MIPS32): New constants, defined to be the mask of INSN_*
142 constants available at that ISA level.
143 (CPU_UNKNOWN): New constant to indicate unknown CPU.
144 (CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
145 define it with a unique value.
146 (OPCODE_IS_MEMBER): Update for new ISA membership-related
147 constant meanings.
148
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149 * mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
150 definitions.
151
c6c98b38
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152 * mips.h (CPU_SB1): New constant.
153
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1542000-10-20 Jakub Jelinek <jakub@redhat.com>
155
156 * sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
157 Note that '3' is used for siam operand.
158
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1592000-09-22 Jim Wilson <wilson@cygnus.com>
160
161 * ia64.h (enum ia64_dependency_semantics): Add IA64_DVS_STOP.
162
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1632000-09-13 Anders Norlander <anorland@acc.umu.se>
164
165 * mips.h: Use defines instead of hard-coded processor numbers.
166 (CPU_R2000, CPU_R3000, CPU_R3900, CPU_R4000, CPU_R4010,
167 CPU_VR4100, CPU_R4111, CPU_R4300, CPU_R4400, CPU_R4600, CPU_R4650,
168 CPU_R5000, CPU_R6000, CPU_R8000, CPU_R10000, CPU_MIPS32, CPU_4K,
169 CPU_4KC, CPU_4KM, CPU_4KP): Define..
170 (OPCODE_IS_MEMBER): Use new defines.
171 (OP_MASK_SEL, OP_SH_SEL): Define.
172 (OP_MASK_CODE20, OP_SH_CODE20): Define.
173 Add 'P' to used characters.
174 Use 'H' for coprocessor select field.
175 Use 'm' for 20 bit breakpoint code.
176 Document new arg characters and add to used characters.
177 (INSN_MIPS32): New define for MIPS32 extensions.
178 (OPCODE_IS_MEMBER): Recognize MIPS32 instructions.
179
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1802000-09-05 Alan Modra <alan@linuxcare.com.au>
181
182 * hppa.h: Mention cz completer.
183
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1842000-08-16 Jim Wilson <wilson@cygnus.com>
185
186 * ia64.h (IA64_OPCODE_POSTINC): New.
187
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1882000-08-15 H.J. Lu <hjl@gnu.org>
189
190 * i386.h: Swap the Intel syntax "movsx"/"movzx" due to the
191 IgnoreSize change.
192
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1932000-08-08 Jason Eckhardt <jle@cygnus.com>
194
195 * i860.h: Small formatting adjustments.
196
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1972000-07-29 Marek Michalkiewicz <marekm@linux.org.pl>
198
199 * avr.h (AVR_UNDEF_P, AVR_SKIP_P, AVR_DISP0_P): New macros.
200 Move related opcodes closer to each other.
201 Minor changes in comments, list undefined opcodes.
202
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2032000-07-26 Dave Brolley <brolley@redhat.com>
204
205 * cgen.h (cgen_hw_lookup_by_num): Second parameter is unsigned.
206
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2072000-07-22 Jason Eckhardt <jle@cygnus.com>
208
209 * i860.h (btne, bte, bla): Changed these opcodes
210 to use sbroff ('r') instead of split16 ('s').
211 (J, K, L, M): New operand types for 16-bit aligned fields.
212 (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
213 use I, J, K, L, M instead of just I.
214 (T, U): New operand types for split 16-bit aligned fields.
215 (st.x): Changed these opcodes to use S, T, U instead of just S.
216 (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
217 exist on the i860.
218 (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
219 (pfeq.ss, pfeq.dd): New opcodes.
220 (st.s): Fixed incorrect mask bits.
221 (fmlow): Fixed incorrect mask bits.
222 (fzchkl, pfzchkl): Fixed incorrect mask bits.
223 (faddz, pfaddz): Fixed incorrect mask bits.
224 (form, pform): Fixed incorrect mask bits.
225 (pfld.l): Fixed incorrect mask bits.
226 (fst.q): Fixed incorrect mask bits.
227 (all floating point opcodes): Fixed incorrect mask bits for
228 handling of dual bit.
229
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2302000-07-20 Hans-Peter Nilsson <hp@axis.com>
231
232 cris.h: New file.
233
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2342000-06-26 Marek Michalkiewicz <marekm@linux.org.pl>
235
236 * avr.h (AVR_ISA_WRAP): Remove, now assumed if not AVR_ISA_MEGA.
237 (AVR_ISA_ESPM): Remove, because ESPM removed in databook update.
238 (AVR_ISA_85xx): Remove, all uses changed back to AVR_ISA_2xxx.
239 (AVR_ISA_M83): Define for ATmega83, ATmega85.
240 (espm): Remove, because ESPM removed in databook update.
241 (eicall, eijmp): Move to the end of opcode table.
242
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2432000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
244
245 * m68hc11.h: New file for support of Motorola 68hc11.
246
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247Fri Jun 9 21:51:50 2000 Denis Chertykov <denisc@overta.ru>
248
249 * avr.h: clr,lsl,rol, ... moved after add,adc, ...
250
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251Wed Jun 7 21:39:54 2000 Denis Chertykov <denisc@overta.ru>
252
253 * avr.h: New file with AVR opcodes.
254
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255Wed Apr 12 17:11:20 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
256
257 * d10v.h: added ALONE attribute for d10v_opcode.exec_type.
258
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2592000-05-23 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
260
261 * i386.h: Allow d suffix on iret, and add DefaultSize modifier.
262
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2632000-05-17 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
264
265 * i386.h: Use sl_FP, not sl_Suf for fild.
266
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2672000-05-16 Frank Ch. Eigler <fche@redhat.com>
268
269 * cgen.h (CGEN_MAX_SYNTAX_BYTES): Increase to 32. Check that
270 it exceeds CGEN_ACTUAL_MAX_SYNTAX_BYTES, if set.
271 (CGEN_MAX_IFMT_OPERANDS): Increase to 16. Check that it exceeds
272 CGEN_ACTUAL_MAX_IFMT_OPERANDS, if set.
273
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2742000-05-13 Alan Modra <alan@linuxcare.com.au>,
275
276 * i386.h (i386_optab): Cpu686 for sysenter,sysexit,fxsave,fxrestore.
277
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2782000-05-13 Alan Modra <alan@linuxcare.com.au>,
279 Alexander Sokolov <robocop@netlink.ru>
280
281 * i386.h (i386_optab): Add cpu_flags for all instructions.
282
2832000-05-13 Alan Modra <alan@linuxcare.com.au>
284
285 From Gavin Romig-Koch <gavin@cygnus.com>
286 * i386.h (wld_Suf): Define. Use on pushf, popf, pusha, popa.
287
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2882000-05-04 Timothy Wall <twall@cygnus.com>
289
290 * tic54x.h: New.
291
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2922000-05-03 J.T. Conklin <jtc@redback.com>
293
294 * ppc.h (PPC_OPCODE_ALTIVEC): New opcode flag for vector unit.
295 (PPC_OPERAND_VR): New operand flag for vector registers.
296
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2972000-05-01 Kazu Hirata <kazu@hxi.com>
298
299 * h8300.h (EOP): Add missing initializer.
300
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301Fri Apr 21 15:03:37 2000 Jason Eckhardt <jle@cygnus.com>
302
303 * hppa.h (pa_opcodes): New opcodes for PA2.0 wide mode
304 forms of ld/st{b,h,w,d} and fld/fst{w,d} (16-bit displacements).
305 New operand types l,y,&,fe,fE,fx added to support above forms.
306 (pa_opcodes): Replaced usage of 'x' as source/target for
307 floating point double-word loads/stores with 'fx'.
308
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309Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
310 David Mosberger <davidm@hpl.hp.com>
311 Timothy Wall <twall@cygnus.com>
312 Jim Wilson <wilson@cygnus.com>
313
314 * ia64.h: New file.
315
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3162000-03-27 Nick Clifton <nickc@cygnus.com>
317
318 * d30v.h (SHORT_A1): Fix value.
319 (SHORT_AR): Renumber so that it is at the end of the list of short
320 instructions, not the end of the list of long instructions.
321
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3222000-03-26 Alan Modra <alan@linuxcare.com>
323
324 * i386.h: (UNIXWARE_COMPAT): Rename to SYSV386_COMPAT as the
325 problem isn't really specific to Unixware.
326 (OLDGCC_COMPAT): Define.
327 (i386_optab): If !OLDGCC_COMPAT, don't handle fsubp etc. with
328 destination %st(0).
329 Fix lots of comments.
330
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3312000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
332
333 * d30v.h:
334 (SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
335 (SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
336 (SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
337 (SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
338 (SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
339 (LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
340 (LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
341
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3422000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
343
344 * i386.h (fild, fistp): Change intel d_Suf form to fildd and
345 fistpd without suffix.
346
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3472000-02-24 Nick Clifton <nickc@cygnus.com>
348
349 * cgen.h (cgen_cpu_desc): Rename field 'flags' to
350 'signed_overflow_ok_p'.
351 Delete prototypes for cgen_set_flags() and cgen_get_flags().
352
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3532000-02-24 Andrew Haley <aph@cygnus.com>
354
355 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
356 (CGEN_CPU_TABLE): flags: new field.
357 Add prototypes for new functions.
358
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3592000-02-24 Alan Modra <alan@spri.levels.unisa.edu.au>
360
361 * i386.h: Add some more UNIXWARE_COMPAT comments.
362
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3632000-02-23 Linas Vepstas <linas@linas.org>
364
365 * i370.h: New file.
366
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3672000-02-22 Chandra Chavva <cchavva@cygnus.com>
368
369 * d30v.h (FLAG_NOT_WITH_ADDSUBppp): Redefined as operation
370 cannot be combined in parallel with ADD/SUBppp.
371
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3722000-02-22 Andrew Haley <aph@cygnus.com>
373
374 * mips.h: (OPCODE_IS_MEMBER): Add comment.
375
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3761999-12-30 Andrew Haley <aph@cygnus.com>
377
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378 * mips.h (OPCODE_IS_MEMBER): Add gp32 arg, which determines
379 whether synthetic opcodes (e.g. move) generate 32-bit or 64-bit
380 insns.
367c01af 381
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3822000-01-15 Alan Modra <alan@spri.levels.unisa.edu.au>
383
384 * i386.h: Qualify intel mode far call and jmp with x_Suf.
385
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3861999-12-27 Alan Modra <alan@spri.levels.unisa.edu.au>
387
388 * i386.h: Add JumpAbsolute qualifier to all non-intel mode
389 indirect jumps and calls. Add FF/3 call for intel mode.
390
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391Wed Dec 1 03:05:25 1999 Jeffrey A Law (law@cygnus.com)
392
393 * mn10300.h: Add new operand types. Add new instruction formats.
394
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395Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
396
397 * hppa.h (pa_opcodes): Correctly handle immediate for PA2.0 "bb"
398 instruction.
399
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4001999-11-18 Gavin Romig-Koch <gavin@cygnus.com>
401
402 * mips.h (INSN_ISA5): New.
403
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4041999-11-01 Gavin Romig-Koch <gavin@cygnus.com>
405
406 * mips.h (OPCODE_IS_MEMBER): New.
407
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4081999-10-29 Nick Clifton <nickc@cygnus.com>
409
410 * d30v.h (SHORT_AR): Define.
411
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4121999-10-18 Michael Meissner <meissner@cygnus.com>
413
414 * alpha.h (alpha_num_opcodes): Convert to unsigned.
415 (alpha_num_operands): Ditto.
416
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417Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
418
419 * hppa.h (pa_opcodes): Add load and store cache control to
420 instructions. Add ordered access load and store.
421
422 * hppa.h (pa_opcode): Add new entries for addb and addib.
423
424 * hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
425
426 * hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
427
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428Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
429
430 * d10v.h: Add flag RESTRICTED_NUM3 for imm3 operands.
431
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432Thu Sep 23 07:08:38 1999 Jerry Quinn <jquinn@nortelnetworks.com>
433
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434 * hppa.h (pa_opcodes): Add "call" and "ret". Clean up "b", "bve"
435 and "be" using completer prefixes.
436
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437 * hppa.h (pa_opcodes): Add initializers to silence compiler.
438
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439 * hppa.h: Update comments about character usage.
440
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441Mon Sep 20 03:55:31 1999 Jeffrey A Law (law@cygnus.com)
442
443 * hppa.h (pa_opcodes): Fix minor thinkos introduced while cleaning
444 up the new fstw & bve instructions.
445
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446Sun Sep 19 10:40:59 1999 Jeffrey A Law (law@cygnus.com)
447
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448 * hppa.h (pa_opcodes): Add remaining PA2.0 integer load/store
449 instructions.
450
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451 * hppa.h (pa_opcodes): Add remaining PA2.0 FP load/store instructions.
452
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453 * hppa.h (pa_opcodes): Add long offset double word load/store
454 instructions.
455
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456 * hppa.h (pa_opcodes): Add FLAG_STRICT variants of FP loads and
457 stores.
458
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459 * hppa.h (pa_opcodes): Handle PA2.0 fcnv, fcmp and ftest insns.
460
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461 * hppa.h (pa_opcodes): Finish support for PA2.0 "b" instructions.
462
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463 * hppa.h (pa_opcodes): Handle PA2.0 "bve" instructions.
464
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465 * hppa.h (pa_opcodes): Add new syntax "be" instructions.
466
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467 * hppa.h (pa_opcodes): Note use of 'M' and 'L'.
468
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469 * hppa.h (pa_opcodes): Add support for "b,l".
470
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471 * hppa.h (pa_opcodes): Add support for "b,gate".
472
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473Sat Sep 18 11:41:16 1999 Jeffrey A Law (law@cygnus.com)
474
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475 * hppa.h (pa_opcodes): Use 'fX' for first register operand
476 in xmpyu.
477
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478 * hppa.h (pa_opcodes): Fix mask for probe and probei.
479
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480 * hppa.h (pa_opcodes): Fix mask for depwi.
481
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482Tue Sep 7 13:44:25 1999 Jeffrey A Law (law@cygnus.com)
483
484 * hppa.h (pa_opcodes): Add "addil" variant which has the %r1 as
485 an explicit output argument.
486
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487Mon Sep 6 04:41:42 1999 Jeffrey A Law (law@cygnus.com)
488
489 * hppa.h: Add strict variants of PA1.0/PA1.1 loads and stores.
490 Add a few PA2.0 loads and store variants.
491
8340b17f
ILT
4921999-09-04 Steve Chamberlain <sac@pobox.com>
493
494 * pj.h: New file.
495
5f47d35b
AM
4961999-08-29 Alan Modra <alan@spri.levels.unisa.edu.au>
497
498 * i386.h (i386_regtab): Move %st to top of table, and split off
499 other fp reg entries.
500 (i386_float_regtab): To here.
501
1c143202
JL
502Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
503
7d8fdb64
JL
504 * hppa.h (pa_opcodes): Replace 'f' by 'v'. Prefix float register args
505 by 'f'.
506
90927b9c
JL
507 * hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
508 Add supporting args.
509
1d16bf9c
JL
510 * hppa.h: Document new completers and args.
511 * hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
512 uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
513 extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
514 pmenb and pmdis.
515
96226a68
JL
516 * hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
517 hshr, hsub, mixh, mixw, permh.
518
5d4ba527
JL
519 * hppa.h (pa_opcodes): Change completers in instructions to
520 use 'c' prefix.
521
e9fc28c6
JL
522 * hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
523 hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
524
1c143202
JL
525 * hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
526 fnegabs to use 'I' instead of 'F'.
527
9e525108
AM
5281999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
529
530 * i386.h: Add AMD athlon instructions, pfnacc, pfpnacc, pswapd.
531 Document pf2iw and pi2fw as athlon insns. Remove pswapw.
532 Alphabetically sort PIII insns.
533
e8da1bf1
DE
534Wed Aug 18 18:14:40 1999 Doug Evans <devans@canuck.cygnus.com>
535
536 * cgen.h (CGEN_INSN_MACH_HAS_P): New macro.
537
7d627258
JL
538Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
539
5696871a
JL
540 * hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
541 and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
542
7d627258
JL
543 * hppa.h: Document 64 bit condition completers.
544
c5e52916
JL
545Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
546
547 * hppa.h (pa_opcodes): Change condition args to use '?' prefix.
548
eecb386c
AM
5491999-08-04 Alan Modra <alan@spri.levels.unisa.edu.au>
550
551 * i386.h (i386_optab): Add DefaultSize modifier to all insns
552 that implicitly modify %esp. #undef d_Suf, x_suf, sld_suf,
553 sldx_suf, bwld_Suf, d_FP, x_FP, sld_FP, sldx_FP at end of table.
554
88a380f3
JL
555Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
556 Jeff Law <law@cygnus.com>
557
558 * hppa.h (pa_opcodes): Add "pushnom" and "pushbts".
559
560 * hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
d60e8dca
JL
561
562 * hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
563 and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
564
145cf1f0
AM
5651999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
566
567 * i386.h: Add "undocumented" AMD 3DNow! pf2iw, pi2fw, pswapw insns.
568
73826640
JL
569Thu Jul 1 00:17:24 1999 Jeffrey A Law (law@cygnus.com)
570
571 * hppa.h (struct pa_opcode): Add new field "flags".
572 (FLAGS_STRICT): Define.
573
b65db252
JL
574Fri Jun 25 04:22:04 1999 Jerry Quinn <jquinn@nortelnetworks.com>
575 Jeff Law <law@cygnus.com>
576
f7fc668b
JL
577 * hppa.h (pa_opcodes): Add pa2.0 clrbts instruction.
578
579 * hppa.h (pa_opcodes): Add entries for mfia and mtsarcm instructions.
b65db252 580
10084519
AM
5811999-06-23 Alan Modra <alan@spri.levels.unisa.edu.au>
582
583 * i386.h: Allow `l' suffix on bswap. Allow `w' suffix on arpl,
584 lldt, lmsw, ltr, str, verr, verw. Add FP flag to fcmov*. Add FP
585 flag to fcomi and friends.
586
cd8a80ba
JL
587Fri May 28 15:26:11 1999 Jeffrey A Law (law@cygnus.com)
588
589 * hppa.h (pa_opcodes): Move integer arithmetic instructions after
590 integer logical instructions.
591
1fca749b
ILT
5921999-05-28 Linus Nordberg <linus.nordberg@canit.se>
593
594 * m68k.h: Document new formats `E', `G', `H' and new places `N',
595 `n', `o'.
596
597 * m68k.h: Define mcf5206e, mcf5307, mcf. Document new format `u'
598 and new places `m', `M', `h'.
599
aa008907
JL
600Thu May 27 04:13:54 1999 Joel Sherrill (joel@OARcorp.com
601
602 * hppa.h (pa_opcodes): Add several processor specific system
603 instructions.
604
e26b85f0
JL
605Wed May 26 16:57:44 1999 Jeffrey A Law (law@cygnus.com)
606
607 * hppa.h (pa_opcodes): Add second entry for "comb", "comib",
608 "addb", and "addib" to be used by the disassembler.
609
c608c12e
AM
6101999-05-12 Alan Modra <alan@apri.levels.unisa.edu.au>
611
612 * i386.h (ReverseModrm): Remove all occurences.
613 (InvMem): Add to control/debug/test mov insns, movhlps, movlhps,
614 movmskps, pextrw, pmovmskb, maskmovq.
615 Change NoSuf to FP on all MMX, XMM and AMD insns as these all
616 ignore the data size prefix.
617
618 * i386.h (i386_optab, i386_regtab): Add support for PIII SIMD.
619 Mostly stolen from Doug Ledford <dledford@redhat.com>
620
45c18104
RH
621Sat May 8 23:27:35 1999 Richard Henderson <rth@cygnus.com>
622
623 * ppc.h (PPC_OPCODE_64_BRIDGE): New.
624
252b5132
RH
6251999-04-14 Doug Evans <devans@casey.cygnus.com>
626
627 * cgen.h (CGEN_ATTR): Delete member num_nonbools.
628 (CGEN_ATTR_TYPE): Update.
629 (CGEN_ATTR_MASK): Number booleans starting at 0.
630 (CGEN_ATTR_VALUE): Update.
631 (CGEN_INSN_ATTR): Update.
632
633Mon Apr 12 23:43:27 1999 Jeffrey A Law (law@cygnus.com)
634
635 * hppa.h (fmpyfadd, fmpynfadd, fneg, fnegabs): New PA2.0
636 instructions.
637
638Tue Mar 23 11:24:38 1999 Jeffrey A Law (law@cygnus.com)
639
640 * hppa.h (bb, bvb): Tweak opcode/mask.
641
642
6431999-03-22 Doug Evans <devans@casey.cygnus.com>
644
645 * cgen.h (CGEN_ISA,CGEN_MACH): New typedefs.
646 (struct cgen_cpu_desc): Rename member mach to machs. New member isas.
647 New members word_bitsize,default_insn_bitsize,base_insn-bitsize,
648 min_insn_bitsize,max_insn_bitsize,isa_table,mach_table,rebuild_tables.
649 Delete member max_insn_size.
650 (enum cgen_cpu_open_arg): New enum.
651 (cpu_open): Update prototype.
652 (cpu_open_1): Declare.
653 (cgen_set_cpu): Delete.
654
6551999-03-11 Doug Evans <devans@casey.cygnus.com>
656
657 * cgen.h (CGEN_HW_TABLE): Delete `num_init_entries' member.
658 (CGEN_OPERAND_NIL): New macro.
659 (CGEN_OPERAND): New member `type'.
660 (@arch@_cgen_operand_table): Delete decl.
661 (CGEN_OPERAND_INDEX,CGEN_OPERAND_TYPE,CGEN_OPERAND_ENTRY): Delete.
662 (CGEN_OPERAND_TABLE): New struct.
663 (cgen_operand_lookup_by_name,cgen_operand_lookup_by_num): Declare.
664 (CGEN_OPINST): Pointer to operand table entry replaced with enum.
665 (CGEN_CPU_TABLE): New member `isa'. Change member `operand_table',
666 now a CGEN_OPERAND_TABLE. Add CGEN_CPU_DESC arg to
667 {get,set}_{int,vma}_operand.
668 (@arch@_cgen_cpu_open): New arg `isa'.
669 (cgen_set_cpu): Ditto.
670
671Fri Feb 26 02:36:45 1999 Richard Henderson <rth@cygnus.com>
672
673 * i386.h: Fill in cmov and fcmov alternates. Add fcomi short forms.
674
6751999-02-25 Doug Evans <devans@casey.cygnus.com>
676
677 * cgen.h (enum cgen_asm_type): Add CGEN_ASM_NONE.
678 (CGEN_HW_ENTRY): Delete member `next'. Change type of `type' to
679 enum cgen_hw_type.
680 (CGEN_HW_TABLE): New struct.
681 (hw_table): Delete declaration.
682 (CGEN_OPERAND): Change member hw to hw_type, change type from pointer
683 to table entry to enum.
684 (CGEN_OPINST): Ditto.
685 (CGEN_CPU_TABLE): Change member hw_list to hw_table.
686
687Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
688
689 * alpha.h (AXP_OPCODE_EV6): New.
690 (AXP_OPCODE_NOPAL): Include it.
691
6921999-02-09 Doug Evans <devans@casey.cygnus.com>
693
694 * cgen.h (CGEN_CPU_DESC): Renamed from CGEN_OPCODE_DESC.
695 All uses updated. New members int_insn_p, max_insn_size,
696 parse_operand,insert_operand,extract_operand,print_operand,
697 sizeof_fields,set_fields_bitsize,get_int_operand,set_int_operand,
698 get_vma_operand,set_vma_operand,parse_handlers,insert_handlers,
699 extract_handlers,print_handlers.
700 (CGEN_ATTR): Change type of num_nonbools to unsigned int.
701 (CGEN_ATTR_BOOL_OFFSET): New macro.
702 (CGEN_ATTR_MASK): Subtract it to compute bit number.
703 (CGEN_ATTR_VALUE): Redo bool/nonbool attr calculation.
704 (cgen_opcode_handler): Renamed from cgen_base.
705 (CGEN_HW_ATTR_VALUE): Renamed from CGEN_HW_ATTR, all uses updated.
706 (CGEN_OPERAND_ATTR_VALUE): Renamed from CGEN_OPERAND_ATTR,
707 all uses updated.
708 (CGEN_OPERAND_INDEX): Rewrite to use table entry, not global.
709 (enum cgen_opinst_type): Renamed from cgen_operand_instance_type.
710 (CGEN_IFLD_ATTR_VALUE): Renamed from CGEN_IFLD_ATTR, all uses updated.
711 (CGEN_OPCODE,CGEN_IBASE): New types.
712 (CGEN_INSN): Rewrite.
713 (CGEN_{ASM,DIS}_HASH*): Delete.
714 (init_opcode_table,init_ibld_table): Declare.
715 (CGEN_INSN_ATTR): New type.
716
717Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
718
719 * i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
720 (x_FP, d_FP, dls_FP, sldx_FP): Define.
721 Change *Suf definitions to include x and d suffixes.
722 (movsx): Use w_Suf and b_Suf.
723 (movzx): Likewise.
724 (movs): Use bwld_Suf.
725 (fld): Change ordering. Use sld_FP.
726 (fild): Add Intel Syntax equivalent of fildq.
727 (fst): Use sld_FP.
728 (fist): Use sld_FP.
729 (fstp): Use sld_FP. Add x_FP version.
730 (fistp): LLongMem version for Intel Syntax.
731 (fcom, fcomp): Use sld_FP.
732 (fadd, fiadd, fsub): Use sld_FP.
733 (fsubr): Use sld_FP.
734 (fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
735
7361999-01-27 Doug Evans <devans@casey.cygnus.com>
737
738 * cgen.h (enum cgen_mode): Add CGEN_MODE_TARGET_MAX, CGEN_MODE_INT,
739 CGEN_MODE_UINT.
740
e135f41b 7411999-01-16 Jeffrey A Law (law@cygnus.com)
252b5132
RH
742
743 * hppa.h (bv): Fix mask.
744
7451999-01-05 Doug Evans <devans@casey.cygnus.com>
746
747 * cgen.h (CGEN_ATTR_VALUE_TYPE): New typedef.
748 (CGEN_ATTR): Use it.
749 (CGEN_ATTR_TYPE,CGEN_ATTR_ENTRY): Ditto.
750 (CGEN_ATTR_TABLE): New member dfault.
751
7521998-12-30 Gavin Romig-Koch <gavin@cygnus.com>
753
754 * mips.h (MIPS16_INSN_BRANCH): New.
755
756Wed Dec 9 10:38:48 1998 David Taylor <taylor@texas.cygnus.com>
757
758 The following is part of a change made by Edith Epstein
759 <eepstein@sophia.cygnus.com> as part of a project to merge in
760 changes by HP; HP did not create ChangeLog entries.
761
762 * hppa.h (completer_chars): list of chars to not put a space
763 after.
764
765Sun Dec 6 13:21:34 1998 Ian Lance Taylor <ian@cygnus.com>
766
767 * i386.h (i386_optab): Permit w suffix on processor control and
768 status word instructions.
769
7701998-11-30 Doug Evans <devans@casey.cygnus.com>
771
772 * cgen.h (struct cgen_hw_entry): Delete const on attrs member.
773 (struct cgen_keyword_entry): Ditto.
774 (struct cgen_operand): Ditto.
775 (CGEN_IFLD): New typedef, with associated access macros.
776 (CGEN_IFMT): New typedef, with associated access macros.
777 (CGEN_IFMT): Renamed from CGEN_FORMAT. New member `iflds'.
778 (CGEN_IVALUE): New typedef.
779 (struct cgen_insn): Delete const on syntax,attrs members.
780 `format' now points to format data. Type of `value' is now
781 CGEN_IVALUE.
782 (struct cgen_opcode_table): New member ifld_table.
783
7841998-11-18 Doug Evans <devans@casey.cygnus.com>
785
786 * cgen.h (cgen_extract_fn): Update type of `base_insn' arg.
787 (CGEN_OPERAND_INSTANCE): New member `attrs'.
788 (CGEN_OPERAND_INSTANCE_{ATTRS,ATTR}): New macros.
789 (cgen_dis_lookup_insn): Update type of `base_insn' arg.
790 (cgen_opcode_table): Update type of dis_hash fn.
791 (extract_operand): Update type of `insn_value' arg.
792
793Thu Oct 29 11:38:36 1998 Doug Evans <devans@canuck.cygnus.com>
794
795 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Delete.
796
797Tue Oct 27 08:57:59 1998 Gavin Romig-Koch <gavin@cygnus.com>
798
799 * mips.h (INSN_MULT): Added.
800
801Tue Oct 20 11:31:34 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
802
803 * i386.h (MAX_MNEM_SIZE): Rename from MAX_OPCODE_SIZE.
804
805Mon Oct 19 12:50:00 1998 Doug Evans <devans@seba.cygnus.com>
806
807 * cgen.h (CGEN_INSN_INT): New typedef.
808 (CGEN_INT_INSN_P): Renamed from CGEN_INT_INSN.
809 (CGEN_INSN_BYTES): Renamed from cgen_insn_t.
810 (CGEN_INSN_BYTES_PTR): New typedef.
811 (CGEN_EXTRACT_INFO): New typedef.
812 (cgen_insert_fn,cgen_extract_fn): Update.
813 (cgen_opcode_table): New member `insn_endian'.
814 (assemble_insn,lookup_insn,lookup_get_insn_operands): Update.
815 (insert_operand,extract_operand): Update.
816 (cgen_get_insn_value,cgen_put_insn_value): Add prototypes.
817
818Fri Oct 9 13:38:13 1998 Doug Evans <devans@seba.cygnus.com>
819
820 * cgen.h (CGEN_ATTR_BOOLS): New macro.
821 (struct CGEN_HW_ENTRY): New member `attrs'.
822 (CGEN_HW_ATTR): New macro.
823 (struct CGEN_OPERAND_INSTANCE): New member `name'.
824 (CGEN_INSN_INVALID_P): New macro.
825
826Mon Oct 5 00:21:07 1998 Jeffrey A Law (law@cygnus.com)
827
828 * hppa.h: Add "fid".
829
830Sun Oct 4 21:00:00 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
831
832 From Robert Andrew Dale <rob@nb.net>
833 * i386.h (i386_optab): Add AMD 3DNow! instructions.
834 (AMD_3DNOW_OPCODE): Define.
835
836Tue Sep 22 17:53:47 1998 Nick Clifton <nickc@cygnus.com>
837
838 * d30v.h (EITHER_BUT_PREFER_MU): Define.
839
840Mon Aug 10 14:09:38 1998 Doug Evans <devans@canuck.cygnus.com>
841
842 * cgen.h (cgen_insn): #if 0 out element `cdx'.
843
844Mon Aug 3 12:21:57 1998 Doug Evans <devans@seba.cygnus.com>
845
846 Move all global state data into opcode table struct, and treat
847 opcode table as something that is "opened/closed".
848 * cgen.h (CGEN_OPCODE_DESC): New type.
849 (all fns): New first arg of opcode table descriptor.
850 (cgen_set_parse_operand_fn): Add prototype.
851 (cgen_current_machine,cgen_current_endian): Delete.
852 (CGEN_OPCODE_TABLE): New members mach,endian,operand_table,
853 parse_operand_fn,asm_hash_table,asm_hash_table_entries,
854 dis_hash_table,dis_hash_table_entries.
855 (opcode_open,opcode_close): Add prototypes.
856
857 * cgen.h (cgen_insn): New element `cdx'.
858
859Thu Jul 30 21:44:25 1998 Frank Ch. Eigler <fche@cygnus.com>
860
861 * d30v.h (FLAG_LKR): New flag for "left-kills-right" instructions.
862
863Tue Jul 28 10:59:07 1998 Jeffrey A Law (law@cygnus.com)
864
865 * mn10300.h: Add "no_match_operands" field for instructions.
866 (MN10300_MAX_OPERANDS): Define.
867
868Fri Jul 24 11:44:24 1998 Doug Evans <devans@canuck.cygnus.com>
869
870 * cgen.h (cgen_macro_insn_count): Declare.
871
872Tue Jul 21 13:12:13 1998 Doug Evans <devans@seba.cygnus.com>
873
874 * cgen.h (CGEN_VERSION_{MAJOR,MINOR,FIXLEVEL}): Define.
875 (cgen_insert_fn,cgen_extract_fn): New arg `pc'.
876 (get_operand,put_operand): Replaced with get_{int,vma}_operand,
877 set_{int,vma}_operand.
878
879Fri Jun 26 11:09:06 1998 Jeffrey A Law (law@cygnus.com)
880
881 * mn10300.h: Add "machine" field for instructions.
882 (MN103, AM30): Define machine types.
883
884Fri Jun 19 16:09:09 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
885
886 * i386.h: Use FP, not sl_Suf, for fxsave and fxrstor.
887
8881998-06-18 Ulrich Drepper <drepper@cygnus.com>
889
890 * i386.h: Add support for fxsave, fxrstor, sysenter and sysexit.
891
892Sat Jun 13 11:31:35 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
893
894 * i386.h (i386_optab): Add general form of aad and aam. Add ud2a
895 and ud2b.
896 (i386_regtab): Allow cr0..7, db0..7, dr0..7, tr0..7, not just
897 those that happen to be implemented on pentiums.
898
899Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
900
901 * i386.h: Change occurences of Data16 to Size16, Data32 to Size32,
902 IgnoreDataSize to IgnoreSize. Flag address and data size prefixes
903 with Size16|IgnoreSize or Size32|IgnoreSize.
904
905Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
906
907 * i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE.
908 (REPE): Rename to REPE_PREFIX_OPCODE.
909 (i386_regtab_end): Remove.
910 (i386_prefixtab, i386_prefixtab_end): Remove.
911 (i386_optab): Use NULL as sentinel rather than "" to suit rewrite
912 of md_begin.
913 (MAX_OPCODE_SIZE): Define.
914 (i386_optab_end): Remove.
915 (sl_Suf): Define.
916 (sl_FP): Use sl_Suf.
917
918 * i386.h (i386_optab): Allow 16 bit displacement for `mov
919 mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16
920 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32,
921 data32, dword, and adword prefixes.
922 (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index
923 regs.
924
925Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
926
927 * i386.h (i386_regtab): Remove BaseIndex modifier from esp.
928
929 * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with
930 register operands, because this is a common idiom. Flag them with
931 a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp,
932 fdivrp because gcc erroneously generates them. Also flag with a
933 warning.
934
935 * i386.h: Add suffix modifiers to most insns, and tighter operand
936 checks in some cases. Fix a number of UnixWare compatibility
937 issues with float insns. Merge some floating point opcodes, using
938 new FloatMF modifier.
939 (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for
940 consistency.
941
942 * i386.h: Change occurence of ShortformW to W|ShortForm. Add
943 IgnoreDataSize where appropriate.
944
945Wed Jun 3 18:28:45 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
946
947 * i386.h: (one_byte_segment_defaults): Remove.
948 (two_byte_segment_defaults): Remove.
949 (i386_regtab): Add BaseIndex to 32 bit regs reg_type.
950
951Fri May 15 15:59:04 1998 Doug Evans <devans@seba.cygnus.com>
952
953 * cgen.h (cgen_hw_lookup_by_name): Renamed from cgen_hw_lookup.
954 (cgen_hw_lookup_by_num): Declare.
955
956Thu May 7 09:27:58 1998 Frank Ch. Eigler <fche@cygnus.com>
957
958 * mips.h (OP_{SH,MASK}_CODE2): Added "q" operand format for lower
959 ten bits of MIPS ISA1 "break" instruction, and for "sdbbp"
960
961Thu May 7 02:14:08 1998 Doug Evans <devans@charmed.cygnus.com>
962
963 * cgen.h (cgen_asm_init_parse): Delete.
964 (cgen_save_fixups,cgen_restore_fixups,cgen_swap_fixups): Delete.
965 (cgen_asm_record_register,cgen_asm_finish_insn): Delete.
966
967Mon Apr 27 10:13:11 1998 Doug Evans <devans@seba.cygnus.com>
968
969 * cgen.h (CGEN_ATTR_TYPE): Delete `const', moved to uses.
970 (cgen_asm_finish_insn): Update prototype.
971 (cgen_insn): New members num, data.
972 (CGEN_INSN_TABLE): Members asm_hash, asm_hash_table_size,
973 dis_hash, dis_hash_table_size moved to ...
974 (CGEN_OPCODE_TABLE). Here. Renamed from CGEN_OPCODE_DATA.
975 All uses updated. New members asm_hash_p, dis_hash_p.
976 (CGEN_MINSN_EXPANSION): New struct.
977 (cgen_expand_macro_insn): Declare.
978 (cgen_macro_insn_count): Declare.
979 (get_insn_operands): Update prototype.
980 (lookup_get_insn_operands): Declare.
981
982Tue Apr 21 17:11:32 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
983
984 * i386.h (i386_optab): Change iclrKludge and imulKludge to
985 regKludge. Add operands types for string instructions.
986
987Mon Apr 20 14:40:29 1998 Tom Tromey <tromey@cygnus.com>
988
989 * i386.h (X): Renamed from `Z_' to preserve formatting of opcode
990 table.
991
992Sun Apr 19 13:54:06 1998 Tom Tromey <tromey@cygnus.com>
993
994 * i386.h (Z_): Renamed from `_' to avoid clash with common alias
995 for `gettext'.
996
997Fri Apr 3 12:04:48 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
998
999 * i386.h: Remove NoModrm flag from all insns: it's never checked.
1000 Add IsString flag to string instructions.
1001 (IS_STRING): Don't define.
1002 (LOCK_PREFIX_OPCODE, CS_PREFIX_OPCODE, DS_PREFIX_OPCODE): Define.
1003 (ES_PREFIX_OPCODE, FS_PREFIX_OPCODE, GS_PREFIX_OPCODE): Define.
1004 (SS_PREFIX_OPCODE): Define.
1005
1006Mon Mar 30 21:31:56 1998 Ian Lance Taylor <ian@cygnus.com>
1007
1008 * i386.h: Revert March 24 patch; no more LinearAddress.
1009
1010Mon Mar 30 10:25:54 1998 Alan Modra <alan@spri.levels.unisa.edu.au>
1011
1012 * i386.h (i386_optab): Remove fwait (9b) from all floating point
1013 instructions, and instead add FWait opcode modifier. Add short
1014 form of fldenv and fstenv.
1015 (FWAIT_OPCODE): Define.
1016
1017 * i386.h (i386_optab): Change second operand constraint of `mov
1018 sreg,reg|mem' instruction from Reg16|Mem to WordReg|WordMem to
1019 allow legal instructions such as `movl %gs,%esi'
1020
1021Fri Mar 27 18:30:52 1998 Ian Lance Taylor <ian@cygnus.com>
1022
1023 * h8300.h: Various changes to fully bracket initializers.
1024
1025Tue Mar 24 18:32:47 1998 H.J. Lu <hjl@gnu.org>
1026
1027 * i386.h: Set LinearAddress for lidt and lgdt.
1028
1029Mon Mar 2 10:44:07 1998 Doug Evans <devans@seba.cygnus.com>
1030
1031 * cgen.h (CGEN_BOOL_ATTR): New macro.
1032
1033Thu Feb 26 15:54:31 1998 Michael Meissner <meissner@cygnus.com>
1034
1035 * d30v.h (FLAG_DELAY): New flag for delayed branches/jumps.
1036
1037Mon Feb 23 10:38:21 1998 Doug Evans <devans@seba.cygnus.com>
1038
1039 * cgen.h (CGEN_CAT3): Delete. Use CONCAT3 now.
1040 (cgen_insn): Record syntax and format entries here, rather than
1041 separately.
1042
1043Tue Feb 17 21:42:56 1998 Nick Clifton <nickc@cygnus.com>
1044
1045 * cgen.h (CGEN_SYNTAX_MAKE_FIELD): New macro.
1046
1047Tue Feb 17 16:00:56 1998 Doug Evans <devans@seba.cygnus.com>
1048
1049 * cgen.h (cgen_insert_fn): Change type of result to const char *.
1050 (cgen_parse_{signed,unsigned}_integer): Delete min,max arguments.
1051 (CGEN_{INSN,KEYWORD,OPERAND}_NBOOL_ATTRS): Renamed from ..._MAX_ATTRS.
1052
1053Thu Feb 12 18:30:41 1998 Doug Evans <devans@canuck.cygnus.com>
1054
1055 * cgen.h (lookup_insn): New argument alias_p.
1056
1057Thu Feb 12 03:41:00 1998 J"orn Rennecke <amylaar@cygnus.co.uk>
1058
1059Fix rac to accept only a0:
1060 * d10v.h (OPERAND_ACC): Split into:
1061 (OPERAND_ACC0, OPERAND_ACC1) .
1062 (OPERAND_GPR): Define.
1063
1064Wed Feb 11 17:31:53 1998 Doug Evans <devans@seba.cygnus.com>
1065
1066 * cgen.h (CGEN_FIELDS): Define here.
1067 (CGEN_HW_ENTRY): New member `type'.
1068 (hw_list): Delete decl.
1069 (enum cgen_mode): Declare.
1070 (CGEN_OPERAND): New member `hw'.
1071 (enum cgen_operand_instance_type): Declare.
1072 (CGEN_OPERAND_INSTANCE): New type.
1073 (CGEN_INSN): New member `operands'.
1074 (CGEN_OPCODE_DATA): Make hw_list const.
1075 (get_insn_operands,lookup_insn): Add prototypes for.
1076
1077Tue Feb 3 17:11:23 1998 Doug Evans <devans@seba.cygnus.com>
1078
1079 * cgen.h (CGEN_INSN_MAX_ATTRS): Renamed from CGEN_MAX_INSN_ATTRS.
1080 (CGEN_HW_ENTRY): Move `next' entry to end of struct.
1081 (CGEN_KEYWORD_MAX_ATTRS): Renamed from CGEN_MAX_KEYWORD_ATTRS.
1082 (CGEN_OPERAND_MAX_ATTRS): Renamed from CGEN_MAX_OPERAND_ATTRS.
1083
1084Mon Feb 2 19:19:15 1998 Ian Lance Taylor <ian@cygnus.com>
1085
1086 * cgen.h: Correct typo in comment end marker.
1087
1088Mon Feb 2 17:10:38 1998 Steve Haworth <steve@pm.cse.rmit.EDU.AU>
1089
1090 * tic30.h: New file.
1091
e135f41b 1092Jan 22 17:54:56 1998 Nick Clifton <nickc@cygnus.com>
252b5132
RH
1093
1094 * cgen.h: Add prototypes for cgen_save_fixups(),
1095 cgen_restore_fixups(), and cgen_swap_fixups(). Change prototype
1096 of cgen_asm_finish_insn() to return a char *.
1097
1098Wed Jan 14 17:21:43 1998 Nick Clifton <nickc@cygnus.com>
1099
1100 * cgen.h: Formatting changes to improve readability.
1101
1102Mon Jan 12 11:37:36 1998 Doug Evans <devans@seba.cygnus.com>
1103
1104 * cgen.h (*): Clean up pass over `struct foo' usage.
1105 (CGEN_ATTR): Make unsigned char.
1106 (CGEN_ATTR_TYPE): Update.
1107 (CGEN_ATTR_{ENTRY,TABLE}): New types.
1108 (cgen_base): Move member `attrs' to cgen_insn.
1109 (CGEN_KEYWORD): New member `null_entry'.
1110 (CGEN_{SYNTAX,FORMAT}): New types.
1111 (cgen_insn): Format and syntax separated from each other.
1112
1113Tue Dec 16 15:15:52 1997 Michael Meissner <meissner@cygnus.com>
1114
1115 * d30v.h (d30v_opcode): Reorder flags somewhat, add new flags for
1116 2 word load/store, ADDppp/SUBppp, 16/32 bit multiply. Make
1117 flags_{used,set} long.
1118 (d30v_operand): Make flags field long.
1119
1120Mon Dec 1 12:24:44 1997 Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>
1121
1122 * m68k.h: Fix comment describing operand types.
1123
1124Sun Nov 23 22:31:27 1997 Michael Meissner <meissner@cygnus.com>
1125
1126 * d30v.h (SHORT_CMPU): Add case for cmpu instruction, and move
1127 everything else after down.
1128
1129Tue Nov 18 18:45:14 1997 J"orn Rennecke <amylaar@cygnus.co.uk>
1130
1131 * d10v.h (OPERAND_FLAG): Split into:
1132 (OPERAND_FFLAG, OPERAND_CFLAG) .
1133
1134Thu Nov 13 11:04:24 1997 Gavin Koch <gavin@cygnus.com>
1135
1136 * mips.h (struct mips_opcode): Changed comments to reflect new
1137 field usage.
1138
1139Fri Oct 24 22:36:20 1997 Ken Raeburn <raeburn@cygnus.com>
1140
1141 * mips.h: Added to comments a quick-ref list of all assigned
1142 operand type characters.
1143 (OP_{MASK,SH}_PERFREG): New macros.
1144
1145Wed Oct 22 17:28:33 1997 Richard Henderson <rth@cygnus.com>
1146
1147 * sparc.h: Add '_' and '/' for v9a asr's.
1148 Patch from David Miller <davem@vger.rutgers.edu>
1149
1150Tue Oct 14 13:22:29 1997 Jeffrey A Law (law@cygnus.com)
1151
1152 * h8300.h: Bit ops with absolute addresses not in the 8 bit
1153 area are not available in the base model (H8/300).
1154
1155Thu Sep 25 13:03:41 1997 Ian Lance Taylor <ian@cygnus.com>
1156
1157 * m68k.h: Remove documentation of ` operand specifier.
1158
1159Wed Sep 24 19:00:34 1997 Ian Lance Taylor <ian@cygnus.com>
1160
1161 * m68k.h: Document q and v operand specifiers.
1162
1163Mon Sep 15 18:28:37 1997 Nick Clifton <nickc@cygnus.com>
1164
1165 * v850.h (struct v850_opcode): Add processors field.
1166 (PROCESSOR_V850, PROCESSOR_ALL): New bit constants.
1167 (PROCESSOR_V850E, PROCESSOR_NOT_V850): New bit constants.
1168 (PROCESSOR_V850EA): New bit constants.
1169
1170Mon Sep 15 11:29:43 1997 Ken Raeburn <raeburn@cygnus.com>
1171
1172 Merge changes from Martin Hunt:
1173
1174 * d30v.h: Allow up to 64 control registers. Add
1175 SHORT_A5S format.
1176
1177 * d30v.h (LONG_Db): New form for delayed branches.
1178
1179 * d30v.h: (LONG_Db): New form for repeati.
1180
1181 * d30v.h (SHORT_D2B): New form.
1182
1183 * d30v.h (SHORT_A2): New form.
1184
1185 * d30v.h (OPERAND_2REG): Add new operand to indicate 2
1186 registers are used. Needed for VLIW optimization.
1187
1188Mon Sep 8 14:05:45 1997 Doug Evans <dje@canuck.cygnus.com>
1189
1190 * cgen.h: Move assembler interface section
1191 up so cgen_parse_operand_result is defined for cgen_parse_address.
1192 (cgen_parse_address): Update prototype.
1193
1194Tue Sep 2 15:32:32 1997 Nick Clifton <nickc@cygnus.com>
1195
1196 * v850.h (V850_OPREAND_ADJUST_SHORT_MEMORY): Removed.
1197
1198Tue Aug 26 12:21:52 1997 Ian Lance Taylor <ian@cygnus.com>
1199
1200 * i386.h (two_byte_segment_defaults): Correct base register 5 in
1201 modes 1 and 2 to be ss rather than ds. From Gabriel Paubert
1202 <paubert@iram.es>.
1203
1204 * i386.h: Set ud2 to 0x0f0b. From Gabriel Paubert
1205 <paubert@iram.es>.
1206
1207 * i386.h: Comment fixes for ficom[p]?{s,l} from Gabriel Paubert
1208 <paubert@iram.es>.
1209
1210 * i386.h (JUMP_ON_CX_ZERO): Uncomment (define again).
1211 (JUMP_ON_ECX_ZERO): Remove commented out macro.
1212
1213Fri Aug 22 10:38:29 1997 Nick Clifton <nickc@cygnus.com>
1214
1215 * v850.h (V850_NOT_R0): New flag.
1216
1217Mon Aug 18 11:05:58 1997 Nick Clifton <nickc@cygnus.com>
1218
1219 * v850.h (struct v850_opcode): Remove flags field.
1220
1221Wed Aug 13 18:45:48 1997 Nick Clifton <nickc@cygnus.com>
1222
1223 * v850.h (struct v850_opcode): Add flags field.
1224 (struct v850_operand): Extend meaning of 'bits' and 'shift'
1225 fields.
1226 (V850E_INSTRUCTION, V850EA_INSTRUCTION): New flags.
1227 (V850E_PUSH_POP, V850E_IMMEDIATE16, V850E_IMMEDIATE32): New flags.
1228
1229Fri Aug 8 16:58:42 1997 Doug Evans <dje@canuck.cygnus.com>
1230
1231 * arc.h: New file.
1232
1233Thu Jul 24 21:16:58 1997 Doug Evans <dje@canuck.cygnus.com>
1234
1235 * sparc.h (sparc_opcodes): Declare as const.
1236
1237Thu Jul 10 12:53:25 1997 Jeffrey A Law (law@cygnus.com)
1238
1239 * mips.h (FP_S, FP_D): Define. Bitmasks indicating if an insn
1240 uses single or double precision floating point resources.
1241 (INSN_NO_ISA, INSN_ISA1): Define.
1242 (cpu specific INSN macros): Tweak into bitmasks outside the range
1243 of INSN_ISA field.
1244
1245Mon Jun 16 14:10:00 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1246
1247 * i386.h: Fix pand opcode.
1248
1249Mon Jun 2 11:35:09 1997 Gavin Koch <gavin@cygnus.com>
1250
1251 * mips.h: Widen INSN_ISA and move it to a more convenient
1252 bit position. Add INSN_3900.
1253
1254Tue May 20 11:25:29 1997 Gavin Koch <gavin@cygnus.com>
1255
1256 * mips.h (struct mips_opcode): added new field membership.
1257
1258Mon May 12 16:26:50 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1259
1260 * i386.h (movd): only Reg32 is allowed.
1261
1262 * i386.h: add fcomp and ud2. From Wayne Scott
1263 <wscott@ichips.intel.com>.
1264
1265Mon May 5 17:16:21 1997 Ian Lance Taylor <ian@cygnus.com>
1266
1267 * i386.h: Add MMX instructions.
1268
1269Mon May 5 12:45:19 1997 H.J. Lu <hjl@gnu.ai.mit.edu>
1270
1271 * i386.h: Remove W modifier from conditional move instructions.
1272
1273Mon Apr 14 14:56:58 1997 Ian Lance Taylor <ian@cygnus.com>
1274
1275 * i386.h: Change the opcodes for fsubp, fsubrp, fdivp, and fdivrp
1276 with no arguments to match that generated by the UnixWare
1277 assembler.
1278
1279Thu Apr 10 14:35:00 1997 Doug Evans <dje@canuck.cygnus.com>
1280
1281 * cgen.h (<cpu>_cgen_assemble_insn): New arg for errmsg.
1282 (cgen_parse_operand_fn): Declare.
1283 (cgen_init_parse_operand): Declare.
1284 (cgen_parse_operand): Renamed from cgen_asm_parse_operand,
1285 new argument `want'.
1286 (enum cgen_parse_operand_result): Renamed from cgen_asm_result.
1287 (enum cgen_parse_operand_type): New enum.
1288
1289Sat Apr 5 13:14:05 1997 Ian Lance Taylor <ian@cygnus.com>
1290
1291 * i386.h: Revert last patch for the NON_BROKEN_OPCODES cases.
1292
1293Fri Apr 4 11:46:11 1997 Doug Evans <dje@canuck.cygnus.com>
1294
1295 * cgen.h: New file.
1296
1297Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
1298
1299 * i386.h: Correct opcode values for fsubp, fsubrp, fdivp, and
1300 fdivrp.
1301
1302Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
1303
1304 * v850.h (extract): Make unsigned.
1305
1306Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
1307
1308 * i386.h: Add iclr.
1309
1310Thu Mar 20 19:49:10 1997 Ian Lance Taylor <ian@cygnus.com>
1311
1312 * i386.h: Change DW to W for cmpxchg and xadd, since they don't
1313 take a direction bit.
1314
1315Sat Mar 15 19:03:29 1997 H.J. Lu <hjl@lucon.org>
1316
1317 * sparc.h (sparc_opcode_lookup_arch): Use full prototype.
1318
1319Fri Mar 14 15:22:01 1997 Ian Lance Taylor <ian@cygnus.com>
1320
1321 * sparc.h: Include <ansidecl.h>. Update function declarations to
1322 use prototypes, and to use const when appropriate.
1323
1324Thu Mar 6 14:18:30 1997 Jeffrey A Law (law@cygnus.com)
1325
1326 * mn10300.h (MN10300_OPERAND_RELAX): Define.
1327
1328Mon Feb 24 15:15:56 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1329
1330 * d10v.h: Change pre_defined_registers to
1331 d10v_predefined_registers and reg_name_cnt to d10v_reg_name_cnt.
1332
1333Sat Feb 22 21:25:00 1997 Dawn Perchik <dawn@cygnus.com>
1334
1335 * mips.h: Add macros for cop0, cop1 cop2 and cop3.
1336 Change mips_opcodes from const array to a pointer,
1337 and change bfd_mips_num_opcodes from const int to int,
1338 so that we can increase the size of the mips opcodes table
1339 dynamically.
1340
1341Fri Feb 21 16:34:18 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1342
1343 * d30v.h (FLAG_X): Remove unused flag.
1344
1345Tue Feb 18 17:37:20 1997 Martin M. Hunt <hunt@pizza.cygnus.com>
1346
1347 * d30v.h: New file.
1348
1349Fri Feb 14 13:16:15 1997 Fred Fish <fnf@cygnus.com>
1350
1351 * tic80.h (PDS_NAME): Macro to access name field of predefined symbols.
1352 (PDS_VALUE): Macro to access value field of predefined symbols.
1353 (tic80_next_predefined_symbol): Add prototype.
1354
1355Mon Feb 10 10:32:17 1997 Fred Fish <fnf@cygnus.com>
1356
1357 * tic80.h (tic80_symbol_to_value): Change prototype to match
1358 change in function, added class parameter.
1359
1360Thu Feb 6 17:30:15 1997 Fred Fish <fnf@cygnus.com>
1361
1362 * tic80.h (TIC80_OPERAND_ENDMASK): Add for flagging TIc80
1363 endmask fields, which are somewhat weird in that 0 and 32 are
1364 treated exactly the same.
1365
1366Thu Jan 30 13:46:18 1997 Fred Fish <fnf@cygnus.com>
1367
1368 * tic80.h: Change all the OPERAND defines to use the form (1 << X)
1369 rather than a constant that is 2**X. Reorder them to put bits for
1370 operands that have symbolic names in the upper bits, so they can
1371 be packed into an int where the lower bits contain the value that
1372 corresponds to that symbolic name.
1373 (predefined_symbo): Add struct.
1374 (tic80_predefined_symbols): Declare array of translations.
1375 (tic80_num_predefined_symbols): Declare size of that array.
1376 (tic80_value_to_symbol): Declare function.
1377 (tic80_symbol_to_value): Declare function.
1378
1379Wed Jan 29 09:37:25 1997 Jeffrey A Law (law@cygnus.com)
1380
1381 * mn10200.h (MN10200_OPERAND_RELAX): Define.
1382
1383Sat Jan 18 15:18:59 1997 Fred Fish <fnf@cygnus.com>
1384
1385 * tic80.h (TIC80_NO_R0_DEST): Add for opcodes where r0 cannot
1386 be the destination register.
1387
1388Thu Jan 16 20:48:55 1997 Fred Fish <fnf@cygnus.com>
1389
1390 * tic80.h (struct tic80_opcode): Change "format" field to "flags".
1391 (FMT_UNUSED, FMT_SI, FMT_LI, FMT_REG): Delete.
1392 (TIC80_VECTOR): Define a flag bit for the flags. This one means
1393 that the opcode can have two vector instructions in a single
1394 32 bit word and we have to encode/decode both.
1395
1396Tue Jan 14 19:37:09 1997 Fred Fish <fnf@cygnus.com>
1397
1398 * tic80.h (TIC80_OPERAND_PCREL): Renamed from
1399 TIC80_OPERAND_RELATIVE for PC relative.
1400 (TIC80_OPERAND_BASEREL): New flag bit for register
1401 base relative.
1402
1403Mon Jan 13 15:56:38 1997 Fred Fish <fnf@cygnus.com>
1404
1405 * tic80.h (TIC80_OPERAND_FLOAT): Add for floating point operands.
1406
1407Mon Jan 6 10:51:15 1997 Fred Fish <fnf@cygnus.com>
1408
1409 * tic80.h (TIC80_OPERAND_SCALED): Operand may have optional
1410 ":s" modifier for scaling.
1411
1412Sun Jan 5 12:12:19 1997 Fred Fish <fnf@cygnus.com>
1413
1414 * tic80.h (TIC80_OPERAND_M_SI): Add operand modifier for ":m".
1415 (TIC80_OPERAND_M_LI): Ditto
1416
1417Sat Jan 4 19:02:44 1997 Fred Fish <fnf@cygnus.com>
1418
1419 * tic80.h (TIC80_OPERAND_BITNUM): Renamed from TIC80_OPERAND_CC_SZ.
1420 (TIC80_OPERAND_CC): New define for condition code operand.
1421 (TIC80_OPERAND_CR): New define for control register operand.
1422
1423Fri Jan 3 16:22:23 1997 Fred Fish <fnf@cygnus.com>
1424
1425 * tic80.h (struct tic80_opcode): Name changed.
1426 (struct tic80_opcode): Remove format field.
1427 (struct tic80_operand): Add insertion and extraction functions.
1428 (TIC80_OPERAND_*): Remove old bogus values, start adding new
1429 correct ones.
1430 (FMT_*): Ditto.
1431
1432Tue Dec 31 15:05:41 1996 Michael Meissner <meissner@tiktok.cygnus.com>
1433
1434 * v850.h (V850_OPERAND_ADJUST_SHORT_MEMORY): New flag to adjust
1435 type IV instruction offsets.
1436
1437Fri Dec 27 22:23:10 1996 Fred Fish <fnf@cygnus.com>
1438
1439 * tic80.h: New file.
1440
1441Wed Dec 18 10:06:31 1996 Jeffrey A Law (law@cygnus.com)
1442
1443 * mn10200.h (MN10200_OPERAND_NOCHECK): Define.
1444
1445Sat Dec 14 10:48:31 1996 Fred Fish <fnf@ninemoons.com>
1446
1447 * mn10200.h: Fix comment, mn10200_operand not powerpc_operand.
1448 * mn10300.h: Fix comment, mn10300_operand not powerpc_operand.
1449 * v850.h: Fix comment, v850_operand not powerpc_operand.
1450
1451Mon Dec 9 16:45:39 1996 Jeffrey A Law (law@cygnus.com)
1452
1453 * mn10200.h: Flesh out structures and definitions needed by
1454 the mn10200 assembler & disassembler.
1455
1456Tue Nov 26 10:46:56 1996 Ian Lance Taylor <ian@cygnus.com>
1457
1458 * mips.h: Add mips16 definitions.
1459
1460Mon Nov 25 17:56:54 1996 J.T. Conklin <jtc@cygnus.com>
1461
1462 * m68k.h: Document new <, >, m, n, o and p operand specifiers.
1463
1464Wed Nov 20 10:59:41 1996 Jeffrey A Law (law@cygnus.com)
1465
1466 * mn10300.h (MN10300_OPERAND_PCREL): Define.
1467 (MN10300_OPERAND_MEMADDR): Define.
1468
1469Tue Nov 19 13:30:40 1996 Jeffrey A Law (law@cygnus.com)
1470
1471 * mn10300.h (MN10300_OPERAND_REG_LIST): Define.
1472
1473Wed Nov 6 13:41:08 1996 Jeffrey A Law (law@cygnus.com)
1474
1475 * mn10300.h (MN10300_OPERAND_SPLIT): Define.
1476
1477Tue Nov 5 13:26:12 1996 Jeffrey A Law (law@cygnus.com)
1478
1479 * mn10300.h (MN10300_OPERAND_EXTENDED): Define.
1480
1481Mon Nov 4 12:52:48 1996 Jeffrey A Law (law@cygnus.com)
1482
1483 * mn10300.h (MN10300_OPERAND_REPEATED): Define.
1484
1485Fri Nov 1 10:31:02 1996 Richard Henderson <rth@tamu.edu>
1486
1487 * alpha.h: Don't include "bfd.h"; private relocation types are now
1488 negative to minimize problems with shared libraries. Organize
1489 instruction subsets by AMASK extensions and PALcode
1490 implementation.
1491 (struct alpha_operand): Move flags slot for better packing.
1492
1493Tue Oct 29 12:19:10 1996 Jeffrey A Law (law@cygnus.com)
1494
1495 * v850.h (V850_OPERAND_RELAX): New operand flag.
1496
1497Thu Oct 10 14:29:11 1996 Jeffrey A Law (law@cygnus.com)
1498
1499 * mn10300.h (FMT_*): Move operand format definitions
1500 here.
1501
1502Tue Oct 8 14:48:07 1996 Jeffrey A Law (law@cygnus.com)
1503
1504 * mn10300.h (MN10300_OPERAND_PAREN): Define.
1505
1506Mon Oct 7 16:52:11 1996 Jeffrey A Law (law@cygnus.com)
1507
1508 * mn10300.h (mn10300_opcode): Add "format" field.
1509 (MN10300_OPERAND_*): Define.
1510
1511Thu Oct 3 10:33:46 1996 Jeffrey A Law (law@cygnus.com)
1512
1513 * mn10x00.h: Delete.
1514 * mn10200.h, mn10300.h: New files.
1515
1516Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
1517
1518 * mn10x00.h: New file.
1519
1520Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
1521
1522 * v850.h: Add new flag to indicate this instruction uses a PC
1523 displacement.
1524
1525Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
1526
1527 * h8300.h (stmac): Add missing instruction.
1528
1529Sat Aug 31 16:02:03 1996 Jeffrey A Law (law@cygnus.com)
1530
1531 * v850.h (v850_opcode): Remove "size" field. Add "memop"
1532 field.
1533
1534Fri Aug 23 10:39:08 1996 Jeffrey A Law (law@cygnus.com)
1535
1536 * v850.h (V850_OPERAND_EP): Define.
1537
1538 * v850.h (v850_opcode): Add size field.
1539
1540Thu Aug 22 16:51:25 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1541
1542 * v850.h (v850_operands): Add insert and extract fields, pointers
1543 to functions used to handle unusual operand encoding.
1544 (V850_OPERAND_REG, V850_OPERAND_SRG, V850_OPERAND_CC,
1545 V850_OPERAND_SIGNED): Defined.
1546
1547Wed Aug 21 17:45:10 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1548
1549 * v850.h (v850_operands): Add flags field.
1550 (OPERAND_REG, OPERAND_NUM): Defined.
1551
1552Tue Aug 20 14:52:02 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1553
1554 * v850.h: New file.
1555
1556Fri Aug 16 14:44:15 1996 James G. Smith <jsmith@cygnus.co.uk>
1557
1558 * mips.h (OP_SH_LOCC, OP_SH_HICC, OP_MASK_CC, OP_SH_COP1NORM,
1559 OP_MASK_COP1NORM, OP_SH_COP1SPEC, OP_MASK_COP1SPEC,
1560 OP_MASK_COP1SCLR, OP_MASK_COP1CMP, OP_SH_COP1CMP, OP_SH_FORMAT,
1561 OP_MASK_FORMAT, OP_SH_TRUE, OP_MASK_TRUE, OP_SH_GE, OP_MASK_GE,
1562 OP_SH_UNSIGNED, OP_MASK_UNSIGNED, OP_SH_HINT, OP_MASK_HINT):
1563 Defined.
1564
1565Fri Aug 16 00:15:15 1996 Jeffrey A Law (law@cygnus.com)
1566
1567 * hppa.h (pitlb, pitlbe, iitlba, iitlbp, fic, fice): Accept
1568 a 3 bit space id instead of a 2 bit space id.
1569
1570Thu Aug 15 13:11:46 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1571
1572 * d10v.h: Add some additional defines to support the
1573 assembler in determining which operations can be done in parallel.
1574
1575Tue Aug 6 11:13:22 1996 Jeffrey A Law (law@cygnus.com)
1576
1577 * h8300.h (SN): Define.
1578 (eepmov.b): Renamed from "eepmov"
1579 (nop, bpt, rte, rts, sleep, clrmac): These have no size associated
1580 with them.
1581
1582Fri Jul 26 11:47:10 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1583
1584 * d10v.h (OPERAND_SHIFT): New operand flag.
1585
1586Thu Jul 25 12:06:22 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1587
1588 * d10v.h: Changes for divs, parallel-only instructions, and
1589 signed numbers.
1590
1591Mon Jul 22 11:21:15 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1592
1593 * d10v.h (pd_reg): Define. Putting the definition here allows
1594 the assembler and disassembler to share the same struct.
1595
1596Mon Jul 22 12:15:25 1996 Ian Lance Taylor <ian@cygnus.com>
1597
1598 * i960.h (i960_opcodes): "halt" takes an argument. From Stephen
1599 Williams <steve@icarus.com>.
1600
1601Wed Jul 17 14:46:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
1602
1603 * d10v.h: New file.
1604
1605Thu Jul 11 12:09:15 1996 Jeffrey A Law (law@cygnus.com)
1606
1607 * h8300.h (band, bclr): Force high bit of immediate nibble to zero.
1608
1609Wed Jul 3 14:30:12 1996 J.T. Conklin <jtc@rtl.cygnus.com>
1610
1611 * m68k.h (mcf5200): New macro.
1612 Document names of coldfire control registers.
1613
1614Tue Jul 2 23:05:45 1996 Jeffrey A Law (law@cygnus.com)
1615
1616 * h8300.h (SRC_IN_DST): Define.
1617
1618 * h8300.h (UNOP3): Mark the register operand in this insn
1619 as a source operand, not a destination operand.
1620 (SHIFT_2, SHIFT_IMM): Remove. Eliminate all references.
1621 (UNOP3): Change SHIFT_IMM to IMM for H8/S bitops. Mark
1622 register operand with SRC_IN_DST.
1623
1624Fri Jun 21 13:52:17 1996 Richard Henderson <rth@tamu.edu>
1625
1626 * alpha.h: New file.
1627
1628Thu Jun 20 15:02:57 1996 Ian Lance Taylor <ian@cygnus.com>
1629
1630 * rs6k.h: Remove obsolete file.
1631
1632Wed Jun 19 15:29:38 1996 Ian Lance Taylor <ian@cygnus.com>
1633
1634 * i386.h: Correct opcode values for faddp, fsubp, fsubrp, fmulp,
1635 fdivp, and fdivrp. Add ffreep.
1636
1637Tue Jun 18 16:06:00 1996 Jeffrey A. Law <law@rtl.cygnus.com>
1638
1639 * h8300.h: Reorder various #defines for readability.
1640 (ABS32SRC, ABS32DST, DSP32LIST, ABS32LIST, A32LIST): Define.
1641 (BITOP): Accept additional (unused) argument. All callers changed.
1642 (EBITOP): Likewise.
1643 (O_LAST): Bump.
1644 (ldc, stc, movb, movw, movl): Use 32bit offsets and absolutes.
1645
1646 * h8300.h (EXR, SHIFT_2, MACREG, SHIFT_IMM, RDINC): Define.
1647 (O_TAS, O_CLRMAC, O_LDMAC, O_MAC, O_LDM, O_STM): Define.
1648 (BITOP, EBITOP): Handle new H8/S addressing modes for
1649 bit insns.
1650 (UNOP3): Handle new shift/rotate insns on the H8/S.
1651 (insns using exr): New instructions.
1652 (tas, mac, ldmac, clrmac, ldm, stm): New instructions.
1653
1654Thu May 23 16:56:48 1996 Jeffrey A Law (law@cygnus.com)
1655
1656 * h8300.h (add.l): Undo Apr 5th change. The manual I had
1657 was incorrect.
1658
1659Mon May 6 23:38:22 1996 Jeffrey A Law (law@cygnus.com)
1660
1661 * h8300.h (START): Remove.
1662 (MEMRELAX): Define. Mark absolute memory operands in mov.b, mov.w
1663 and mov.l insns that can be relaxed.
1664
1665Tue Apr 30 18:30:58 1996 Ian Lance Taylor <ian@cygnus.com>
1666
1667 * i386.h: Remove Abs32 from lcall.
1668
1669Mon Apr 22 17:09:23 1996 Doug Evans <dje@blues.cygnus.com>
1670
1671 * sparc.h (SPARC_OPCODE_ARCH_V9_P): New macro.
1672 (SLCPOP): New macro.
1673 Mark X,Y opcode letters as in use.
1674
1675Thu Apr 11 17:28:18 1996 Ian Lance Taylor <ian@cygnus.com>
1676
1677 * sparc.h (F_FLOAT, F_FBR): Define.
1678
1679Fri Apr 5 16:55:34 1996 Jeffrey A Law (law@cygnus.com)
1680
1681 * h8300.h (ABS8MEM): Renamed from ABSMOV. Remove ABSMOV
1682 from all insns.
1683 (ABS8SRC,ABS8DST): Add ABS8MEM.
1684 (add.l): Fix reg+reg variant.
1685 (eepmov.w): Renamed from eepmovw.
1686 (ldc,stc): Fix many cases.
1687
1688Sun Mar 31 13:30:03 1996 Doug Evans <dje@canuck.cygnus.com>
1689
1690 * sparc.h (SPARC_OPCODE_ARCH_MASK): New macro.
1691
1692Thu Mar 7 15:08:23 1996 Doug Evans <dje@charmed.cygnus.com>
1693
1694 * sparc.h (O): Mark operand letter as in use.
1695
1696Tue Feb 20 20:46:21 1996 Doug Evans <dje@charmed.cygnus.com>
1697
1698 * sparc.h (sparc_{encode,decode}_sparclet_cpreg): Declare.
1699 Mark operand letters uU as in use.
1700
1701Mon Feb 19 01:59:08 1996 Doug Evans <dje@charmed.cygnus.com>
1702
1703 * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_SPARCLET.
1704 (sparc_opcode_arch): Delete member `conflicts'. Add `supported'.
1705 (SPARC_OPCODE_SUPPORTED): New macro.
1706 (SPARC_OPCODE_CONFLICT_P): Rewrite.
1707 (F_NOTV9): Delete.
1708
1709Fri Feb 16 12:23:34 1996 Jeffrey A Law (law@cygnus.com)
1710
1711 * sparc.h (sparc_opcode_lookup_arch) Make return type in
1712 declaration consistent with return type in definition.
1713
1714Wed Feb 14 18:14:11 1996 Alan Modra <alan@spri.levels.unisa.edu.au>
1715
1716 * i386.h (i386_optab): Remove Data32 from pushf and popf.
1717
1718Thu Feb 8 14:27:21 1996 James Carlson <carlson@xylogics.com>
1719
1720 * i386.h (i386_regtab): Add 80486 test registers.
1721
1722Mon Feb 5 18:35:46 1996 Ian Lance Taylor <ian@cygnus.com>
1723
1724 * i960.h (I_HX): Define.
1725 (i960_opcodes): Add HX instruction.
1726
1727Mon Jan 29 12:43:39 1996 Ken Raeburn <raeburn@cygnus.com>
1728
1729 * i386.h: Fix waiting forms of finit, fstenv, fsave, fstsw, fstcw,
1730 and fclex.
1731
1732Wed Jan 24 22:36:59 1996 Doug Evans <dje@charmed.cygnus.com>
1733
1734 * sparc.h (enum sparc_opcode_arch_val): Replaces sparc_architecture.
1735 (SPARC_OPCODE_CONFLICT_P): Renamed from ARCHITECTURES_CONFLICT_P.
1736 (bfd_* defines): Delete.
1737 (sparc_opcode_archs): Replaces architecture_pname.
1738 (sparc_opcode_lookup_arch): Declare.
1739 (NUMOPCODES): Delete.
1740
1741Mon Jan 22 08:24:32 1996 Doug Evans <dje@charmed.cygnus.com>
1742
1743 * sparc.h (enum sparc_architecture): Add v9a.
1744 (ARCHITECTURES_CONFLICT_P): Update.
1745
1746Thu Dec 28 13:27:53 1995 John Hassey <hassey@rtp.dg.com>
1747
1748 * i386.h: Added Pentium Pro instructions.
1749
1750Thu Nov 2 22:59:22 1995 Ian Lance Taylor <ian@cygnus.com>
1751
1752 * m68k.h: Document new 'W' operand place.
1753
1754Tue Oct 24 10:49:10 1995 Jeffrey A Law (law@cygnus.com)
1755
1756 * hppa.h: Add lci and syncdma instructions.
1757
1758Mon Oct 23 11:09:16 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1759
1760 * mips.h: Added INSN_4100 flag to mark NEC VR4100 specific
1761 instructions.
1762
1763Mon Oct 16 10:28:15 1995 Michael Meissner <meissner@tiktok.cygnus.com>
1764
1765 * ppc.h (PPC_OPCODE_{COMMON,ANY}): New opcode flags for
1766 assembler's -mcom and -many switches.
1767
1768Wed Oct 11 16:56:33 1995 Ken Raeburn <raeburn@cygnus.com>
1769
1770 * i386.h: Fix cmpxchg8b extension opcode description.
1771
1772Thu Oct 5 18:03:36 1995 Ken Raeburn <raeburn@cygnus.com>
1773
1774 * i386.h: Add Pentium instructions wrmsr, rdtsc, rdmsr, cmpxchg8b,
1775 and register cr4.
1776
1777Tue Sep 19 15:26:43 1995 Ian Lance Taylor <ian@cygnus.com>
1778
1779 * m68k.h: Change comment: split type P into types 0, 1 and 2.
1780
1781Wed Aug 30 13:50:55 1995 Doug Evans <dje@canuck.cygnus.com>
1782
1783 * sparc.h (sparc_{encode,decode}_prefetch): Declare.
1784
1785Tue Aug 29 15:34:58 1995 Doug Evans <dje@canuck.cygnus.com>
1786
1787 * sparc.h (sparc_{encode,decode}_{asi,membar}): Declare.
1788
1789Wed Aug 2 18:32:19 1995 Ian Lance Taylor <ian@cygnus.com>
1790
1791 * m68kmri.h: Remove.
1792
1793 * m68k.h: Move tables into opcodes/m68k-opc.c, leaving just the
1794 declarations. Remove F_ALIAS and flag field of struct
1795 m68k_opcode. Change arch field of struct m68k_opcode to unsigned
1796 int. Make name and args fields of struct m68k_opcode const.
1797
1798Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com>
1799
1800 * sparc.h (F_NOTV9): Define.
1801
1802Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com>
1803
1804 * mips.h (INSN_4010): Define.
1805
1806Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1807
1808 * m68k.h (TBL1): Reverse sense of "round" argument in result.
1809
1810 Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>:
1811 * m68k.h: Fix argument descriptions of coprocessor
1812 instructions to allow only alterable operands where appropriate.
1813 [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'.
1814 (m68k_opcode_aliases): Add more aliases.
1815
1816Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1817
1818 * m68k.h: Added explcitly short-sized conditional branches, and a
1819 bunch of aliases (fmov*, ftest*, tdivul) to support gcc's
1820 svr4-based configurations.
1821
1822Mon Mar 13 21:30:01 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1823
1824 Mon Feb 27 08:36:39 1995 Bryan Ford <baford@cs.utah.edu>
1825 * i386.h: added missing Data16/Data32 flags to a few instructions.
1826
1827Wed Mar 8 15:19:53 1995 Ian Lance Taylor <ian@cygnus.com>
1828
1829 * mips.h (OP_MASK_FR, OP_SH_FR): Define.
1830 (OP_MASK_BCC, OP_SH_BCC): Define.
1831 (OP_MASK_PREFX, OP_SH_PREFX): Define.
1832 (OP_MASK_CCC, OP_SH_CCC): Define.
1833 (INSN_READ_FPR_R): Define.
1834 (INSN_RFE): Delete.
1835
1836Wed Mar 8 03:13:23 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1837
1838 * m68k.h (enum m68k_architecture): Deleted.
1839 (struct m68k_opcode_alias): New type.
1840 (m68k_opcodes): Now const. Deleted opcode aliases with exactly
1841 matching constraints, values and flags. As a side effect of this,
1842 the MOTOROLA_SYNTAX_ONLY and MIT_SYNTAX_ONLY macros, which so far
1843 as I know were never used, now may need re-examining.
1844 (numopcodes): Now const.
1845 (m68k_opcode_aliases, numaliases): New variables.
1846 (endop): Deleted.
1847 [DONT_DEFINE_TABLE]: Declare numopcodes, numaliases, and
1848 m68k_opcode_aliases; update declaration of m68k_opcodes.
1849
1850Mon Mar 6 10:02:00 1995 Jeff Law (law@snake.cs.utah.edu)
1851
1852 * hppa.h (delay_type): Delete unused enumeration.
1853 (pa_opcode): Replace unused delayed field with an architecture
1854 field.
1855 (pa_opcodes): Mark each instruction as either PA1.0 or PA1.1.
1856
1857Fri Mar 3 16:10:24 1995 Ian Lance Taylor <ian@cygnus.com>
1858
1859 * mips.h (INSN_ISA4): Define.
1860
1861Fri Feb 24 19:13:37 1995 Ian Lance Taylor <ian@cygnus.com>
1862
1863 * mips.h (M_DLA_AB, M_DLI): Define.
1864
1865Thu Feb 23 17:33:09 1995 Jeff Law (law@snake.cs.utah.edu)
1866
1867 * hppa.h (fstwx): Fix single-bit error.
1868
1869Wed Feb 15 12:19:52 1995 Ian Lance Taylor <ian@cygnus.com>
1870
1871 * mips.h (M_ULD, M_ULD_A, M_USD, M_USD_A): Define.
1872
1873Mon Feb 6 10:35:23 1995 J.T. Conklin <jtc@rtl.cygnus.com>
1874
1875 * i386.h: added cpuid instruction , and dr[0-7] aliases for the
1876 debug registers. From Charles Hannum (mycroft@netbsd.org).
1877
1878Mon Feb 6 03:31:54 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1879
1880 Changes from Bryan Ford <baford@schirf.cs.utah.edu> for 16-bit
1881 i386 support:
1882 * i386.h (MOV_AX_DISP32): New macro.
1883 (i386_optab): Added Data16 and Data32 as needed. Added "w" forms
1884 of several call/return instructions.
1885 (ADDR_PREFIX_OPCODE): New macro.
1886
1887Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1888
1889 Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
1890
4f1d9bd8
NC
1891 * vax.h (struct vot_wot, field `args'): Make it pointer to const
1892 char.
252b5132
RH
1893 (struct vot, field `name'): ditto.
1894
1895Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
1896
1897 * vax.h: Supply and properly group all values in end sentinel.
1898
1899Tue Jan 17 10:55:30 1995 Ian Lance Taylor <ian@sanguine.cygnus.com>
1900
1901 * mips.h (INSN_ISA, INSN_4650): Define.
1902
1903Wed Oct 19 13:34:17 1994 Ian Lance Taylor <ian@sanguine.cygnus.com>
1904
1905 * a29k.h: Add operand type 'I' for `inv' and `iretinv'. On
1906 systems with a separate instruction and data cache, such as the
1907 29040, these instructions take an optional argument.
1908
1909Wed Sep 14 17:44:20 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1910
1911 * mips.h (INSN_STORE_MEMORY): Correct value to not conflict with
1912 INSN_TRAP.
1913
1914Tue Sep 6 11:39:08 1994 Ian Lance Taylor (ian@sanguine.cygnus.com)
1915
1916 * mips.h (INSN_STORE_MEMORY): Define.
1917
1918Thu Jul 28 19:28:07 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1919
1920 * sparc.h: Document new operand type 'x'.
1921
1922Tue Jul 26 17:48:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1923
1924 * i960.h (I_CX2): New instruction category. It includes
1925 instructions available on Cx and Jx processors.
1926 (I_JX): New instruction category, for JX-only instructions.
1927 (i960_opcodes): Put eshro and sysctl in I_CX2 category. Added
1928 Jx-only instructions, in I_JX category.
1929
1930Wed Jul 13 18:43:47 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1931
1932 * ns32k.h (endop): Made pointer const too.
1933
1934Sun Jul 10 11:01:09 1994 Ian Dall (dall@hfrd.dsto.gov.au)
1935
1936 * ns32k.h: Drop Q operand type as there is no correct use
1937 for it. Add I and Z operand types which allow better checking.
1938
1939Thu Jul 7 12:34:48 1994 Steve Chamberlain (sac@jonny.cygnus.com)
1940
1941 * h8300.h (xor.l) :fix bit pattern.
1942 (L_2): New size of operand.
1943 (trapa): Use it.
1944
1945Fri Jun 10 16:38:11 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1946
1947 * m68k.h: Move "trap" before "tpcc" to change disassembly.
1948
1949Fri Jun 3 15:57:36 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1950
1951 * sparc.h: Include v9 definitions.
1952
1953Thu Jun 2 12:23:17 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1954
1955 * m68k.h (m68060): Defined.
1956 (m68040up, mfloat, mmmu): Include it.
1957 (struct m68k_opcode): Widen `arch' field.
1958 (m68k_opcodes): Updated for M68060. Removed comments that were
1959 instructions commented out by "JF" years ago.
1960
1961Thu Apr 28 18:31:14 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1962
1963 * m68k.h (struct m68k_opcode): Shorten `arch' field to 8 bits, and
1964 add a one-bit `flags' field.
1965 (F_ALIAS): New macro.
1966
1967Wed Apr 27 11:29:52 1994 Steve Chamberlain (sac@cygnus.com)
1968
1969 * h8300.h (dec, inc): Get encoding right.
1970
1971Mon Apr 4 13:12:43 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1972
1973 * ppc.h (struct powerpc_operand): Removed signedp field; just use
1974 a flag instead.
1975 (PPC_OPERAND_SIGNED): Define.
1976 (PPC_OPERAND_SIGNOPT): Define.
1977
1978Thu Mar 31 19:34:08 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1979
1980 * i386.h (IS_JUMP_ON_ECX_ZERO, "jcxz" pattern): Operand size
1981 prefix is 0x66, not 0x67. Patch from H.J. Lu (hlu@nynexst.com).
1982
1983Thu Mar 3 15:51:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1984
1985 * i386.h: Reverse last change. It'll be handled in gas instead.
1986
1987Thu Feb 24 15:29:05 1994 Ken Raeburn (raeburn@cujo.cygnus.com)
1988
1989 * i386.h (sar): Disabled the two-operand Imm1 form, since it was
1990 slower on the 486 and used the implicit shift count despite the
1991 explicit operand. The one-operand form is still available to get
1992 the shorter form with the implicit shift count.
1993
1994Thu Feb 17 12:27:52 1994 Torbjorn Granlund (tege@mexican.cygnus.com)
1995
1996 * hppa.h: Fix typo in fstws arg string.
1997
1998Wed Feb 9 21:23:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
1999
2000 * ppc.h (struct powerpc_opcode): Make operands field unsigned.
2001
2002Mon Feb 7 19:14:58 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2003
2004 * ppc.h (PPC_OPCODE_601): Define.
2005
2006Fri Feb 4 23:43:50 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2007
2008 * hppa.h (addb): Use '@' for addb and addib pseudo ops.
2009 (so we can determine valid completers for both addb and addb[tf].)
2010
2011 * hppa.h (xmpyu): No floating point format specifier for the
2012 xmpyu instruction.
2013
2014Fri Feb 4 23:36:52 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2015
2016 * ppc.h (PPC_OPERAND_NEXT): Define.
2017 (PPC_OPERAND_NEGATIVE): Change value to make room for above.
2018 (struct powerpc_macro): Define.
2019 (powerpc_macros, powerpc_num_macros): Declare.
2020
2021Fri Jan 21 19:13:50 1994 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2022
2023 * ppc.h: New file. Header file for PowerPC opcode table.
2024
2025Mon Jan 17 00:14:23 1994 Jeffrey A. Law (law@snake.cs.utah.edu)
2026
2027 * hppa.h: More minor template fixes for sfu and copr (to allow
2028 for easier disassembly).
2029
2030 * hppa.h: Fix templates for all the sfu and copr instructions.
2031
2032Wed Dec 15 15:12:42 1993 Ken Raeburn (raeburn@cujo.cygnus.com)
2033
2034 * i386.h (push): Permit Imm16 operand too.
2035
2036Sat Dec 11 16:14:06 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2037
2038 * h8300.h (andc): Exists in base arch.
2039
2040Wed Dec 1 12:15:32 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2041
2042 * From Hisashi MINAMINO <minamino@sramhc.sra.co.jp>
2043 * hppa.h: #undef NONE to avoid conflict with hiux include files.
2044
2045Sun Nov 21 22:06:57 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2046
2047 * hppa.h: Add FP quadword store instructions.
2048
2049Wed Nov 17 17:13:16 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2050
2051 * mips.h: (M_J_A): Added.
2052 (M_LA): Removed.
2053
2054Mon Nov 8 12:12:47 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2055
2056 * mips.h (OP_MASK_CACHE, OP_SH_CACHE): Define. From Ted Lemon
2057 <mellon@pepper.ncd.com>.
2058
2059Sun Nov 7 00:30:11 1993 Jeffrey A. Law (law@snake.cs.utah.edu)
2060
2061 * hppa.h: Immediate field in probei instructions is unsigned,
2062 not low-sign extended.
2063
2064Wed Nov 3 10:30:00 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2065
2066 * m88k.h (RRI10MASK): Change from 0xfc00ffe0 to 0xfc00fc00.
2067
2068Tue Nov 2 12:41:30 1993 Ken Raeburn (raeburn@rover.cygnus.com)
2069
2070 * i386.h: Add "fxch" without operand.
2071
2072Mon Nov 1 18:13:03 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2073
2074 * mips.h (M_JAL_1, M_JAL_2, M_JAL_A): Added.
2075
2076Sat Oct 2 22:26:11 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2077
2078 * hppa.h: Add gfw and gfr to the opcode table.
2079
2080Wed Sep 29 16:23:00 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2081
2082 * m88k.h: extended to handle m88110.
2083
2084Tue Sep 28 19:19:08 1993 Jeffrey A Law (law@snake.cs.utah.edu)
2085
2086 * hppa.h (be, ble): Use operand type 'z' to denote absolute branch
2087 addresses.
2088
2089Tue Sep 14 14:04:35 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2090
2091 * i960.h (i960_opcodes): Properly bracket initializers.
2092
2093Mon Sep 13 12:50:52 1993 K. Richard Pixley (rich@sendai.cygnus.com)
2094
2095 * m88k.h (BOFLAG): rewrite to avoid nested comment.
2096
2097Mon Sep 13 15:46:06 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2098
2099 * m68k.h (two): Protect second argument with parentheses.
2100
2101Fri Sep 10 16:29:47 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2102
2103 * i386.h (i386_optab): Added new instruction "rsm" (for i386sl).
2104 Deleted old in/out instructions in "#if 0" section.
2105
2106Thu Sep 9 17:42:19 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2107
2108 * i386.h (i386_optab): Properly bracket initializers.
2109
2110Wed Aug 25 13:50:56 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2111
2112 * hppa.h (pa_opcode): Use '|' for movb and movib insns. (From
2113 Jeff Law, law@cs.utah.edu).
2114
2115Mon Aug 23 16:55:03 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2116
2117 * i386.h (lcall): Accept Imm32 operand also.
2118
2119Mon Aug 23 12:43:11 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2120
2121 * mips.h (M_ABSU): Removed (absolute value of unsigned number??).
2122 (M_DABS): Added.
2123
2124Thu Aug 19 15:08:37 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2125
2126 * mips.h (INSN_*): Changed values. Removed unused definitions.
2127 Added INSN_COND_BRANCH_LIKELY, INSN_ISA2 and INSN_ISA3. Split
2128 INSN_LOAD_DELAY into INSN_LOAD_MEMORY_DELAY and
2129 INSN_LOAD_COPROC_DELAY. Split INSN_COPROC_DELAY into
2130 INSN_COPROC_MOVE_DELAY and INSN_COPROC_MEMORY_DELAY.
2131 (M_*): Added new values for r6000 and r4000 macros.
2132 (ANY_DELAY): Removed.
2133
2134Wed Aug 18 15:37:48 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2135
2136 * mips.h: Added M_LI_S and M_LI_SS.
2137
2138Tue Aug 17 07:08:08 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2139
2140 * h8300.h: Get some rare mov.bs correct.
2141
2142Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
2143
2144 * sparc.h: Don't define const ourself; rely on ansidecl.h having
2145 been included.
2146
2147Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
2148
2149 * sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
2150 jump instructions, for use in disassemblers.
2151
2152Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
2153
2154 * m88k.h: Make bitfields just unsigned, not unsigned long or
2155 unsigned short.
2156
2157Wed Jul 21 11:55:31 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2158
2159 * hppa.h: New argument type 'y'. Use in various float instructions.
2160
2161Mon Jul 19 17:17:03 1993 Jim Kingdon (kingdon@deneb.cygnus.com)
2162
2163 * hppa.h (break): First immediate field is unsigned.
2164
2165 * hppa.h: Add rfir instruction.
2166
2167Sun Jul 18 16:28:08 1993 Jim Kingdon (kingdon@rtl.cygnus.com)
2168
2169 * mips.h: Split the actual table out into ../../opcodes/mips-opc.c.
2170
2171Fri Jul 16 09:59:29 1993 Ian Lance Taylor (ian@cygnus.com)
2172
2173 * mips.h: Reworked the hazard information somewhat, and fixed some
2174 bugs in the instruction hazard descriptions.
2175
2176Thu Jul 15 12:42:01 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2177
2178 * m88k.h: Corrected a couple of opcodes.
2179
2180Tue Jul 6 15:17:35 1993 Ian Lance Taylor (ian@cygnus.com)
2181
2182 * mips.h: Replaced with version from Ralph Campbell and OSF. The
2183 new version includes instruction hazard information, but is
2184 otherwise reasonably similar.
2185
2186Thu Jul 1 20:36:17 1993 Doug Evans (dje@canuck.cygnus.com)
2187
2188 * h8300.h: Fix typo in UNOP3 (affected sh[al][lr].l).
2189
2190Fri Jun 11 18:38:44 1993 Ken Raeburn (raeburn@cygnus.com)
2191
2192 Patches from Jeff Law, law@cs.utah.edu:
2193 * hppa.h: Clean up some of the OLD_TABLE, non-OLD_TABLE braindamage.
2194 Make the tables be the same for the following instructions:
2195 "bb", "addb[tf]", "addib[tf]", "add", "add[loc]", "addco",
2196 "sh[123]add", "sh[123]add[lo]", "sub", "sub[obt]", "sub[bt]o",
2197 "ds", "comclr", "addi", "addi[ot]", "addito", "subi", "subio",
2198 "comiclr", "fadd", "fsub", "fmpy", "fdiv", "fsqrt", "fabs",
2199 "frnd", "fcpy", "fcnvff", "fcnvxf", "fcnvfx", "fcnvfxt",
2200 "fcmp", and "ftest".
2201
2202 * hppa.h: Make new and old tables the same for "break", "mtctl",
2203 "mfctl", "bb", "ssm", "rsm", "xmpyu", "fmpyadd", "fmpysub".
2204 Fix typo in last patch. Collapse several #ifdefs into a
2205 single #ifdef.
2206
2207 * hppa.h: Delete remaining OLD_TABLE code. Bring some
2208 of the comments up-to-date.
2209
2210 * hppa.h: Update "free list" of letters and update
2211 comments describing each letter's function.
2212
4f1d9bd8
NC
2213Thu Jul 8 09:05:26 1993 Doug Evans (dje@canuck.cygnus.com)
2214
2215 * h8300.h: Lots of little fixes for the h8/300h.
2216
2217Tue Jun 8 12:16:03 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2218
2219 Support for H8/300-H
2220 * h8300.h: Lots of new opcodes.
2221
252b5132
RH
2222Fri Jun 4 15:41:37 1993 Steve Chamberlain (sac@phydeaux.cygnus.com)
2223
2224 * h8300.h: checkpoint, includes H8/300-H opcodes.
2225
2226Thu Jun 3 15:42:59 1993 Stu Grossman (grossman@cygnus.com)
2227
2228 * Patches from Jeffrey Law <law@cs.utah.edu>.
2229 * hppa.h: Rework single precision FP
2230 instructions so that they correctly disassemble code
2231 PA1.1 code.
2232
2233Thu May 27 19:21:22 1993 Bruce Bauman (boot@osf.org)
2234
2235 * i386.h (i386_optab, mov pattern): Remove Mem16 restriction from
2236 mov to allow instructions like mov ss,xyz(ecx) to assemble.
2237
2238Tue May 25 00:39:40 1993 Ken Raeburn (raeburn@cygnus.com)
2239
2240 * hppa.h: Use new version from Utah if OLD_TABLE isn't defined;
2241 gdb will define it for now.
2242
2243Mon May 24 15:20:06 1993 Ken Raeburn (raeburn@cambridge.cygnus.com)
2244
2245 * sparc.h: Don't end enumerator list with comma.
2246
2247Fri May 14 15:15:50 1993 Ian Lance Taylor (ian@cygnus.com)
2248
2249 * Based on patches from davidj@ICSI.Berkeley.EDU (David Johnson):
2250 * mips.h (OP_MASK_COPZ, OP_SH_COPZ): Define.
2251 ("bc2t"): Correct typo.
2252 ("[ls]wc[023]"): Use T rather than t.
2253 ("c[0123]"): Define general coprocessor instructions.
2254
2255Mon May 10 06:02:25 1993 Ken Raeburn (raeburn@kr-pc.cygnus.com)
2256
2257 * m68k.h: Move split point for gcc compilation more towards
2258 middle.
2259
2260Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
2261
2262 * rs6k.h: Clean up instructions for primary opcode 19 (many were
2263 simply wrong, ics, rfi, & rfsvc were missing).
2264 Add "a" to opr_ext for "bb". Doc fix.
2265
2266Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
2267
2268 * i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
2269 * mips.h: Add casts, to suppress warnings about shifting too much.
2270 * m68k.h: Document the placement code '9'.
2271
2272Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
2273
2274 * m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
2275 allows callers to break up the large initialized struct full of
2276 opcodes into two half-sized ones. This permits GCC to compile
2277 this module, since it takes exponential space for initializers.
2278 (numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
2279
2280Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
2281
2282 * a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
2283 * convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
2284 initialized structs in it.
2285
2286Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
2287
2288 Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
2289 * m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
2290 (AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
2291
2292Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
2293
2294 * mips.h: document "i" and "j" operands correctly.
2295
2296Thu Jan 7 15:58:13 1993 Ian Lance Taylor (ian@tweedledumb.cygnus.com)
2297
2298 * mips.h: Removed endianness dependency.
2299
2300Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
2301
2302 * h8300.h: include info on number of cycles per instruction.
2303
2304Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
2305
2306 * hppa.h: Move handy aliases to the front. Fix masks for extract
2307 and deposit instructions.
2308
2309Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
2310
2311 * i386.h: accept shld and shrd both with and without the shift
2312 count argument, which is always %cl.
2313
2314Fri Nov 27 17:13:18 1992 Ken Raeburn (raeburn at cygnus.com)
2315
2316 * i386.h (i386_optab_end, i386_regtab_end): Now const.
2317 (one_byte_segment_defaults, two_byte_segment_defaults,
2318 i386_prefixtab_end): Ditto.
2319
2320Mon Nov 23 10:47:25 1992 Ken Raeburn (raeburn@cygnus.com)
2321
2322 * vax.h (bb*): Use "v" (bitfield type), not "a" (address operand)
2323 for operand 2; from John Carr, jfc@dsg.dec.com.
2324
2325Wed Nov 4 07:36:49 1992 Ken Raeburn (raeburn@cygnus.com)
2326
2327 * m68k.h: Define FIXED_SIZE_BRANCH, so bsr and bra instructions
2328 always use 16-bit offsets. Makes calculated-size jump tables
2329 feasible.
2330
2331Fri Oct 16 22:52:43 1992 Ken Raeburn (raeburn@cygnus.com)
2332
2333 * i386.h: Fix one-operand forms of in* and out* patterns.
2334
2335Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2336
2337 * m68k.h: Added CPU32 support.
2338
2339Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
2340
2341 * mips.h (break): Disassemble the argument. Patch from
2342 jonathan@cs.stanford.edu (Jonathan Stone).
2343
2344Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
2345
2346 * m68k.h: merged Motorola and MIT syntax.
2347
2348Thu Sep 3 09:33:22 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2349
2350 * m68k.h (pmove): make the tests less strict, the 68k book is
2351 wrong.
2352
2353Tue Aug 25 23:25:19 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
2354
2355 * m68k.h (m68ec030): Defined as alias for 68030.
2356 (m68k_opcodes): New type characters "3" for 68030 MMU regs and "t"
2357 for immediate 0-7 added. Set up some opcodes (ptest, bkpt) to use
2358 them. Tightened description of "fmovex" to distinguish it from
2359 some "pmove" encodings. Added "pmove" for 68030 MMU regs, cleaned
2360 up descriptions that claimed versions were available for chips not
2361 supporting them. Added "pmovefd".
2362
2363Mon Aug 24 12:04:51 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2364
2365 * m68k.h: fix where the . goes in divull
2366
2367Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
2368
2369 * m68k.h: the cas2 instruction is supposed to be written with
2370 indirection on the last two operands, which can be either data or
2371 address registers. Added a new operand type 'r' which accepts
2372 either register type. Added new cases for cas2l and cas2w which
2373 use them. Corrected masks for cas2 which failed to recognize use
2374 of address register.
2375
2376Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
2377
2378 * m68k.h: Merged in patches (mostly m68040-specific) from
2379 Colin Smith <colin@wrs.com>.
2380
2381 * m68k.h: Merged m68kmri.h and m68k.h (using the former as a
2382 base). Also cleaned up duplicates, re-ordered instructions for
2383 the sake of dis-assembling (so aliases come after standard names).
2384 * m68kmri.h: Now just defines some macros, and #includes m68k.h.
2385
2386Wed Aug 12 16:38:15 1992 Steve Chamberlain (sac@thepub.cygnus.com)
2387
2388 * m68kmri.h: added various opcodes. Moved jbxx to bxxes. Filled in
2389 all missing .s
2390
2391Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
2392
2393 * sparc.h: Moved tables to BFD library.
2394
2395 * i386.h (i386_optab): Add fildq, fistpq aliases used by gcc.
2396
2397Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
2398
2399 * h8300.h: Finish filling in all the holes in the opcode table,
2400 so that the Lucid C compiler can digest this as well...
2401
2402Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
2403
2404 * i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
2405 Fix opcodes on various sizes of fild/fist instructions
2406 (16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
2407 Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
2408
2409Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
2410
2411 * h8300.h: Fill in all the holes in the opcode table so that the
2412 losing HPUX C compiler can digest this...
2413
2414Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
2415
2416 * mips.h: Fix decoding of coprocessor instructions, somewhat.
2417 (Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
2418
2419Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
2420
2421 * sparc.h: Add new architecture variant sparclite; add its scan
2422 and divscc opcodes. Define ARCHITECTURES_CONFLICT_P macro.
2423
2424Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
2425
2426 * mips.h: Add some more opcode synonyms (from Frank Yellin,
2427 fy@lucid.com).
2428
2429Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
2430
2431 * rs6k.h: New version from IBM (Metin).
2432
2433Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
2434
2435 * rs6k.h: Fix incorrect extended opcode for instructions `fm'
2436 and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
2437
2438Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
2439
2440 * rs6k.h: Move from ../../gdb/rs6k-opcode.h.
2441
2442Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
2443
2444 * m68k.h (one, two): Cast macro args to unsigned to suppress
2445 complaints from compiler and lint about integer overflow during
2446 shift.
2447
2448Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
2449
2450 * sparc.h (OP): Avoid signed overflow when shifting to high order bit.
2451
2452Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
2453
2454 * mips.h: Make bitfield layout depend on the HOST compiler,
2455 not on the TARGET system.
2456
2457Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
2458
2459 * i386.h: added inb, inw, outb, outw opcodes, added att syntax for
2460 scmp, slod, smov, ssca, ssto. Curtesy Minh Tran-Le
2461 <TRANLE@INTELLICORP.COM>.
2462
2463Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
2464
2465 * h8300.h: turned op_type enum into #define list
2466
2467Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
2468
2469 * sparc.h: Remove "cypress" architecture. Remove "fitox" and
2470 similar instructions -- they've been renamed to "fitoq", etc.
2471 REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
2472 number of arguments.
2473 * h8300.h: Remove extra ; which produces compiler warning.
2474
2475Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
2476
2477 * sparc.h: fix opcode for tsubcctv.
2478
2479Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
2480
2481 * sparc.h: fba and cba are now aliases for fb and cb respectively.
2482
2483Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
2484
2485 * sparc.h (nop): Made the 'lose' field be even tighter,
2486 so only a standard 'nop' is disassembled as a nop.
2487
2488Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
2489
2490 * sparc.h (nop): Add RD_GO to `lose' so that only %g0 in dest is
2491 disassembled as a nop.
2492
4f1d9bd8
NC
2493Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
2494
2495 * m68k.h, sparc.h: ANSIfy enums.
2496
252b5132
RH
2497Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
2498
2499 * sparc.h: fix a typo.
2500
2501Sat Nov 30 20:40:51 1991 Steve Chamberlain (sac at rtl.cygnus.com)
2502
2503 * a29k.h, arm.h, h8300.h, i386.h, i860.h, i960.h , m68k.h,
2504 m88k.h, mips.h , np1.h, ns32k.h, pn.h, pyr.h, sparc.h, tahoe.h,
4f1d9bd8 2505 vax.h: Renamed from ../<foo>-opcode.h.
252b5132
RH
2506
2507\f
2508Local Variables:
2509version-control: never
2510End: