[thirdparty/binutils-gdb.git] / ld / scripttempl / elfm68hc11.sc

#
# Unusual variables checked by this code:
#	NOP - four byte opcode for no-op (defaults to 0)
#	DATA_ADDR - if end-of-text-plus-one-page isn't right for data start
#	OTHER_READWRITE_SECTIONS - other than .data .bss .ctors .sdata ...
#		(e.g., .PARISC.global)
#	OTHER_SECTIONS - at the end
#	EXECUTABLE_SYMBOLS - symbols that must be defined for an
#		executable (e.g., _DYNAMIC_LINK)
#	TEXT_START_SYMBOLS - symbols that appear at the start of the
#		.text section.
#	DATA_START_SYMBOLS - symbols that appear at the start of the
#		.data section.
#	OTHER_BSS_SYMBOLS - symbols that appear at the start of the
#		.bss section besides __bss_start.
#	EMBEDDED - whether this is for an embedded system. 
#
# When adding sections, do note that the names of some sections are used
# when specifying the start address of the next.
#
test -z "$ENTRY" && ENTRY=_start
test -z "${BIG_OUTPUT_FORMAT}" && BIG_OUTPUT_FORMAT=${OUTPUT_FORMAT}
test -z "${LITTLE_OUTPUT_FORMAT}" && LITTLE_OUTPUT_FORMAT=${OUTPUT_FORMAT}
if [ -z "$MACHINE" ]; then OUTPUT_ARCH=${ARCH}; else OUTPUT_ARCH=${ARCH}:${MACHINE}; fi
test "$LD_FLAG" = "N" && DATA_ADDR=.

CTOR=".ctors  : 
  {
    ${CONSTRUCTING+ PROVIDE (__CTOR_LIST__ = .); }
    ${CONSTRUCTING+${CTOR_START}}
    KEEP (*(.ctors))

    ${CONSTRUCTING+${CTOR_END}}
    ${CONSTRUCTING+ PROVIDE(__CTOR_END__ = .); }
  } ${RELOCATING+ > ${TEXT_MEMORY}}"

DTOR="  .dtors	 :
  {
    ${CONSTRUCTING+ PROVIDE(__DTOR_LIST__ = .); }
    KEEP (*(.dtors))
    ${CONSTRUCTING+ PROVIDE(__DTOR_END__ = .); }
  } ${RELOCATING+ > ${TEXT_MEMORY}}"


VECTORS="
  /* If the 'vectors_addr' symbol is defined, it indicates the start address
     of interrupt vectors.  This depends on the 68HC11 operating mode:

			Addr
     Single chip	0xffc0
     Extended mode	0xffc0
     Bootstrap		0x00c0
     Test		0xbfc0

     In general, the vectors address is 0xffc0.  This can be overriden 
     with the '-defsym vectors_addr=0xbfc0' ld option.

     Note: for the bootstrap mode, the interrupt vectors are at 0xbfc0 but
     they are redirected to 0x00c0 by the internal PROM.  Application's vectors
     must also consist of jump instructions (see Motorola's manual).  */

  PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xffc0);
  .vectors DEFINED (vectors_addr) ? vectors_addr : 0xffc0 :
  {
    KEEP (*(.vectors))
  }"

#
# We provide two emulations: a fixed on that defines some memory banks
# and a configurable one that includes a user provided memory definition.
#
case $GENERIC_BOARD in
  yes|1|YES)
	MEMORY_DEF="
/* Get memory banks definition from some user configuration file.
   This file must be located in some linker directory (search path
   with -L<dir>). See fixed memory banks emulation script.  */
INCLUDE memory.x;
"
	;;
  *)
MEMORY_DEF="
/* Fixed definition of the available memory banks.
   See generic emulation script for a user defined configuration.  */
MEMORY
{
  page0 (rwx) : ORIGIN = 0x0, LENGTH = 256
  text  (rx)  : ORIGIN = ${ROM_START_ADDR}, LENGTH = ${ROM_SIZE}
  data        : ORIGIN = ${RAM_START_ADDR}, LENGTH = ${RAM_SIZE}
  eeprom      : ORIGIN = ${EEPROM_START_ADDR}, LENGTH = ${EEPROM_SIZE}
}

/* Setup the stack on the top of the data memory bank.  */
PROVIDE (_stack = ${RAM_START_ADDR} + ${RAM_SIZE} - 1);
"
	;;
esac

STARTUP_CODE="
    /* Startup code.  */
    KEEP (*(.install0))	/* Section should setup the stack pointer.  */
    KEEP (*(.install1))	/* Place holder for applications.  */
    KEEP (*(.install2))	/* Optional installation of data sections in RAM.  */
    KEEP (*(.install3))	/* Place holder for applications.  */
    KEEP (*(.install4))	/* Section that calls the main.  */
"

FINISH_CODE="
    /* Finish code.  */
    KEEP (*(.fini0))	/* Beginning of finish code (_exit symbol).  */
    KEEP (*(.fini1))	/* Place holder for applications.  */
    KEEP (*(.fini2))	/* C++ destructors.  */
    KEEP (*(.fini3))	/* Place holder for applications.  */
    KEEP (*(.fini4))	/* Runtime exit.  */
"

PRE_COMPUTE_DATA_SIZE="
/* SCz: this does not work yet... This is supposed to force the loading
   of _map_data.o (from libgcc.a) when the .data section is not empty.
   By doing so, this should bring the code that copies the .data section
   from ROM to RAM at init time.

  ___pre_comp_data_size = SIZEOF(.data);
  __install_data_sections = ___pre_comp_data_size > 0 ?
		__map_data_sections : 0;
*/
"

INSTALL_RELOC="
  .install0  : { *(.install0) }
  .install1  : { *(.install1) }
  .install2  : { *(.install2) }
  .install3  : { *(.install3) }
  .install4  : { *(.install4) }
"

FINISH_RELOC="
  .fini0  : { *(.fini0) }
  .fini1  : { *(.fini1) }
  .fini2  : { *(.fini2) }
  .fini3  : { *(.fini3) }
  .fini4  : { *(.fini4) }
"

BSS_DATA_RELOC="
  .data1  : { *(.data1) }

  /* We want the small data sections together, so single-instruction offsets
     can access them all, and initialized data all before uninitialized, so
     we can shorten the on-disk segment size.  */
  .sdata    : { *(.sdata) }
  .sbss     : { *(.sbss) }
  .scommon  : { *(.scommon) }
"

SOFT_REGS_RELOC="
  .softregs  : { *(.softregs) }
"

cat <<EOF
${RELOCATING+/* Linker script for 68HC11 executable (PROM).  */}
${RELOCATING-/* Linker script for 68HC11 object file (ld -r).  */}

OUTPUT_FORMAT("${OUTPUT_FORMAT}", "${BIG_OUTPUT_FORMAT}",
	      "${LITTLE_OUTPUT_FORMAT}")
OUTPUT_ARCH(${OUTPUT_ARCH})
${RELOCATING+ENTRY(${ENTRY})}

${RELOCATING+${LIB_SEARCH_DIRS}}
${RELOCATING+${EXECUTABLE_SYMBOLS}}
${RELOCATING+${MEMORY_DEF}}

SECTIONS
{
  .hash         : { *(.hash)		}
  .dynsym       : { *(.dynsym)		}
  .dynstr       : { *(.dynstr)		}
  .gnu.version		 : { *(.gnu.version) }
  .gnu.version_d	 : { *(.gnu.version_d) }
  .gnu.version_r	 : { *(.gnu.version_r) }

  .rel.text     :
    {
      *(.rel.text)
      ${RELOCATING+*(.rel.text.*)}
      ${RELOCATING+*(.rel.gnu.linkonce.t.*)}
    }
  .rela.text    :
    {
      *(.rela.text)
      ${RELOCATING+*(.rela.text.*)}
      ${RELOCATING+*(.rela.gnu.linkonce.t.*)}
    }
  .rel.data     :
    {
      *(.rel.data)
      ${RELOCATING+*(.rel.data.*)}
      ${RELOCATING+*(.rel.gnu.linkonce.d.*)}
    }
  .rela.data    :
    {
      *(.rela.data)
      ${RELOCATING+*(.rela.data.*)}
      ${RELOCATING+*(.rela.gnu.linkonce.d.*)}
    }
  .rel.rodata   :
    {
      *(.rel.rodata)
      ${RELOCATING+*(.rel.rodata.*)}
      ${RELOCATING+*(.rel.gnu.linkonce.r.*)}
    }
  .rela.rodata  :
    {
      *(.rela.rodata)
      ${RELOCATING+*(.rela.rodata.*)}
      ${RELOCATING+*(.rela.gnu.linkonce.r.*)}
    }
  .rel.sdata    :
    {
      *(.rel.sdata)
      ${RELOCATING+*(.rel.sdata.*)}
      ${RELOCATING+*(.rel.gnu.linkonce.s.*)}
    }
  .rela.sdata    :
    {
      *(.rela.sdata)
      ${RELOCATING+*(.rela.sdata.*)}
      ${RELOCATING+*(.rela.gnu.linkonce.s.*)}
    }
  .rel.sbss     :
    { 
      *(.rel.sbss)
      ${RELOCATING+*(.rel.sbss.*)}
      ${RELOCATING+*(.rel.gnu.linkonce.sb.*)}
    }
  .rela.sbss    :
    {
      *(.rela.sbss)
      ${RELOCATING+*(.rela.sbss.*)}
      ${RELOCATING+*(.rel.gnu.linkonce.sb.*)}
    }
  .rel.bss      : 
    { 
      *(.rel.bss)
      ${RELOCATING+*(.rel.bss.*)}
      ${RELOCATING+*(.rel.gnu.linkonce.b.*)}
    }
  .rela.bss     : 
    { 
      *(.rela.bss)
      ${RELOCATING+*(.rela.bss.*)}
      ${RELOCATING+*(.rela.gnu.linkonce.b.*)}
    }
  .rel.stext		 : { *(.rel.stest) }
  .rela.stext		 : { *(.rela.stest) }
  .rel.etext		 : { *(.rel.etest) }
  .rela.etext		 : { *(.rela.etest) }
  .rel.sdata		 : { *(.rel.sdata) }
  .rela.sdata		 : { *(.rela.sdata) }
  .rel.edata		 : { *(.rel.edata) }
  .rela.edata		 : { *(.rela.edata) }
  .rel.eit_v		 : { *(.rel.eit_v) }
  .rela.eit_v		 : { *(.rela.eit_v) }
  .rel.ebss		 : { *(.rel.ebss) }
  .rela.ebss		 : { *(.rela.ebss) }
  .rel.srodata		 : { *(.rel.srodata) }
  .rela.srodata		 : { *(.rela.srodata) }
  .rel.erodata		 : { *(.rel.erodata) }
  .rela.erodata		 : { *(.rela.erodata) }
  .rel.got		 : { *(.rel.got) }
  .rela.got		 : { *(.rela.got) }
  .rel.ctors		 : { *(.rel.ctors) }
  .rela.ctors		 : { *(.rela.ctors) }
  .rel.dtors		 : { *(.rel.dtors) }
  .rela.dtors		 : { *(.rela.dtors) }
  .rel.init		 : { *(.rel.init) }
  .rela.init		 : { *(.rela.init) }
  .rel.fini		 : { *(.rel.fini) }
  .rela.fini		 : { *(.rela.fini) }
  .rel.plt		 : { *(.rel.plt) }
  .rela.plt		 : { *(.rela.plt) }

  /* Concatenate .page0 sections.  Put them in the page0 memory bank
     unless we are creating a relocatable file.  */
  .page0 :
  {
    *(.page0)
    ${RELOCATING+*(.softregs)}
  } ${RELOCATING+ > page0}

  /* Start of text section.  */
  .stext  : 
  {
    *(.stext)
  } ${RELOCATING+ > ${TEXT_MEMORY}}

  .init	 :
  {
    *(.init) 
  } ${RELOCATING+=${NOP-0}}

  ${RELOCATING-${INSTALL_RELOC}}
  ${RELOCATING-${FINISH_RELOC}}

  .text :
  {
    /* Put startup code at beginning so that _start keeps same address.  */
    ${RELOCATING+${STARTUP_CODE}}

    ${RELOCATING+*(.init)}
    *(.text)
    ${RELOCATING+*(.text.*)}
    /* .gnu.warning sections are handled specially by elf32.em.  */
    *(.gnu.warning)
    ${RELOCATING+*(.gnu.linkonce.t.*)}
    ${RELOCATING+*(.tramp)}
    ${RELOCATING+*(.tramp.*)}

    ${RELOCATING+${FINISH_CODE}}

    ${RELOCATING+_etext = .;}
    ${RELOCATING+PROVIDE (etext = .);}

  } ${RELOCATING+ > ${TEXT_MEMORY}}

  .eh_frame  :
  {
    KEEP (*(.eh_frame))
  } ${RELOCATING+ > ${TEXT_MEMORY}}

  .gcc_except_table  :
  {
    *(.gcc_except_table)
  } ${RELOCATING+ > ${TEXT_MEMORY}}

  .rodata   :
  {
    *(.rodata)
    ${RELOCATING+*(.rodata.*)}
    ${RELOCATING+*(.gnu.linkonce.r*)}
  } ${RELOCATING+ > ${TEXT_MEMORY}}

  .rodata1  :
  {
    *(.rodata1)
  } ${RELOCATING+ > ${TEXT_MEMORY}}

  /* Constructor and destructor tables are in ROM.  */
  ${RELOCATING+${CTOR}}
  ${RELOCATING+${DTOR}}

  .jcr  :
  {
    KEEP (*(.jcr))
  } ${RELOCATING+ > ${TEXT_MEMORY}}

  /* Start of the data section image in ROM.  */
  ${RELOCATING+__data_image = .;}
  ${RELOCATING+PROVIDE (__data_image = .);}

  /* All read-only sections that normally go in PROM must be above.
     We construct the DATA image section in PROM at end of all these
     read-only sections.  The data image must be copied at init time.
     Refer to GNU ld, Section 3.6.8.2 Output Section LMA.  */
  .data   : ${RELOCATING+AT (__data_image)}
  {
    ${RELOCATING+__data_section_start = .;}
    ${RELOCATING+PROVIDE (__data_section_start = .);}

    ${RELOCATING+${DATA_START_SYMBOLS}}
    ${RELOCATING+*(.sdata)}
    *(.data)
    ${RELOCATING+*(.data.*)}
    ${RELOCATING+*(.data1)}
    ${RELOCATING+*(.gnu.linkonce.d.*)}
    ${CONSTRUCTING+CONSTRUCTORS}

    ${RELOCATING+_edata  =  .;}
    ${RELOCATING+PROVIDE (edata = .);}
  } ${RELOCATING+ > ${DATA_MEMORY}}

  ${RELOCATING+__data_section_size = SIZEOF(.data);}
  ${RELOCATING+PROVIDE (__data_section_size = SIZEOF(.data));}
  ${RELOCATING+__data_image_end = __data_image + __data_section_size;}

  ${RELOCATING+${PRE_COMPUTE_DATA_SIZE}}

  /* .install :
  {
    . = _data_image_end;
  } ${RELOCATING+ > ${TEXT_MEMORY}} */

  /* Relocation for some bss and data sections.  */
  ${RELOCATING-${BSS_DATA_RELOC}}
  ${RELOCATING-${SOFT_REGS_RELOC}}

  .bss  :
  {
    ${RELOCATING+__bss_start = .;}
    ${RELOCATING+*(.sbss)}
    ${RELOCATING+*(.scommon)}

    *(.dynbss)
    *(.bss)
    ${RELOCATING+*(.bss.*)}
    ${RELOCATING+*(.gnu.linkonce.b.*)}
    *(COMMON)
    ${RELOCATING+PROVIDE (_end = .);}
  } ${RELOCATING+ > ${DATA_MEMORY}}
  ${RELOCATING+__bss_size = SIZEOF(.bss);}
  ${RELOCATING+PROVIDE (__bss_size = SIZEOF(.bss));}

  .eeprom  :
  {
    *(.eeprom)
    *(.eeprom.*)
  } ${RELOCATING+ > ${EEPROM_MEMORY}}

  ${RELOCATING+${VECTORS}}

  /* Stabs debugging sections.  */
  .stab		 0 : { *(.stab) }
  .stabstr	 0 : { *(.stabstr) }
  .stab.excl	 0 : { *(.stab.excl) }
  .stab.exclstr	 0 : { *(.stab.exclstr) }
  .stab.index	 0 : { *(.stab.index) }
  .stab.indexstr 0 : { *(.stab.indexstr) }

  .comment	 0 : { *(.comment) }

  /* DWARF debug sections.
     Symbols in the DWARF debugging sections are relative to the beginning
     of the section so we begin them at 0.
     Treatment of DWARF debug section must be at end of the linker
     script to avoid problems when there are undefined symbols. It's necessary
     to avoid that the DWARF section is relocated before such undefined
     symbols are found.  */

  /* DWARF 1 */
  .debug	 0 : { *(.debug) }
  .line		 0 : { *(.line) }

  /* GNU DWARF 1 extensions */
  .debug_srcinfo 0 : { *(.debug_srcinfo) }
  .debug_sfnames 0 : { *(.debug_sfnames) }

  /* DWARF 1.1 and DWARF 2 */
  .debug_aranges  0 : { *(.debug_aranges) }
  .debug_pubnames 0 : { *(.debug_pubnames) }

  /* DWARF 2 */
  .debug_info     0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
  .debug_abbrev   0 : { *(.debug_abbrev) }
  .debug_line     0 : { *(.debug_line) }
  .debug_frame    0 : { *(.debug_frame) }
  .debug_str      0 : { *(.debug_str) }
  .debug_loc      0 : { *(.debug_loc) }
  .debug_macinfo  0 : { *(.debug_macinfo) }
}
EOF
Commit	Line	Data
60bcf0fa NC	1	#
60bcf0fa NC	2	# Unusual variables checked by this code:
563e308f	3	# NOP - four byte opcode for no-op (defaults to 0)
60bcf0fa NC	4	# DATA_ADDR - if end-of-text-plus-one-page isn't right for data start
	5	# OTHER_READWRITE_SECTIONS - other than .data .bss .ctors .sdata ...
	6	# (e.g., .PARISC.global)
	7	# OTHER_SECTIONS - at the end
	8	# EXECUTABLE_SYMBOLS - symbols that must be defined for an
	9	# executable (e.g., _DYNAMIC_LINK)
	10	# TEXT_START_SYMBOLS - symbols that appear at the start of the
	11	# .text section.
	12	# DATA_START_SYMBOLS - symbols that appear at the start of the
	13	# .data section.
	14	# OTHER_BSS_SYMBOLS - symbols that appear at the start of the
	15	# .bss section besides __bss_start.
	16	# EMBEDDED - whether this is for an embedded system.
	17	#
	18	# When adding sections, do note that the names of some sections are used
	19	# when specifying the start address of the next.
	20	#
	21	test -z "$ENTRY" && ENTRY=_start
	22	test -z "${BIG_OUTPUT_FORMAT}" && BIG_OUTPUT_FORMAT=${OUTPUT_FORMAT}
	23	test -z "${LITTLE_OUTPUT_FORMAT}" && LITTLE_OUTPUT_FORMAT=${OUTPUT_FORMAT}
	24	if [ -z "$MACHINE" ]; then OUTPUT_ARCH=${ARCH}; else OUTPUT_ARCH=${ARCH}:${MACHINE}; fi
	25	test "$LD_FLAG" = "N" && DATA_ADDR=.
	26
df381c72	27	CTOR=".ctors :
60bcf0fa	28	{
de0b1853	29	${CONSTRUCTING+ PROVIDE (__CTOR_LIST__ = .); }
60bcf0fa	30	${CONSTRUCTING+${CTOR_START}}
494fee87	31	KEEP (*(.ctors))
60bcf0fa NC	32
60bcf0fa NC	33	${CONSTRUCTING+${CTOR_END}}
de0b1853	34	${CONSTRUCTING+ PROVIDE(__CTOR_END__ = .); }
ecfdd20c	35	} ${RELOCATING+ > ${TEXT_MEMORY}}"
60bcf0fa	36
df381c72	37	DTOR=" .dtors :
60bcf0fa	38	{
de0b1853	39	${CONSTRUCTING+ PROVIDE(__DTOR_LIST__ = .); }
494fee87	40	KEEP (*(.dtors))
de0b1853	41	${CONSTRUCTING+ PROVIDE(__DTOR_END__ = .); }
ecfdd20c	42	} ${RELOCATING+ > ${TEXT_MEMORY}}"
60bcf0fa NC	43
	44
	45	VECTORS="
	46	/* If the 'vectors_addr' symbol is defined, it indicates the start address
	47	of interrupt vectors. This depends on the 68HC11 operating mode:
	48
	49	Addr
	50	Single chip 0xffc0
	51	Extended mode 0xffc0
	52	Bootstrap 0x00c0
	53	Test 0xbfc0
	54
	55	In general, the vectors address is 0xffc0. This can be overriden
	56	with the '-defsym vectors_addr=0xbfc0' ld option.
	57
	58	Note: for the bootstrap mode, the interrupt vectors are at 0xbfc0 but
	59	they are redirected to 0x00c0 by the internal PROM. Application's vectors
	60	must also consist of jump instructions (see Motorola's manual). */
	61
	62	PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xffc0);
	63	.vectors DEFINED (vectors_addr) ? vectors_addr : 0xffc0 :
	64	{
e1026ffb	65	KEEP (*(.vectors))
60bcf0fa NC	66	}"
	67
	68	#
	69	# We provide two emulations: a fixed on that defines some memory banks
	70	# and a configurable one that includes a user provided memory definition.
	71	#
	72	case $GENERIC_BOARD in
	73	yes\|1\|YES)
	74	MEMORY_DEF="
	75	/* Get memory banks definition from some user configuration file.
	76	This file must be located in some linker directory (search path
	77	with -L<dir>). See fixed memory banks emulation script. */
	78	INCLUDE memory.x;
	79	"
	80	;;
	81	*)
	82	MEMORY_DEF="
	83	/* Fixed definition of the available memory banks.
	84	See generic emulation script for a user defined configuration. */
	85	MEMORY
	86	{
	87	page0 (rwx) : ORIGIN = 0x0, LENGTH = 256
	88	text (rx) : ORIGIN = ${ROM_START_ADDR}, LENGTH = ${ROM_SIZE}
	89	data : ORIGIN = ${RAM_START_ADDR}, LENGTH = ${RAM_SIZE}
a66c0f2c	90	eeprom : ORIGIN = ${EEPROM_START_ADDR}, LENGTH = ${EEPROM_SIZE}
60bcf0fa NC	91	}
	92
	93	/* Setup the stack on the top of the data memory bank. */
	94	PROVIDE (_stack = ${RAM_START_ADDR} + ${RAM_SIZE} - 1);
	95	"
	96	;;
	97	esac
	98
	99	STARTUP_CODE="
	100	/* Startup code. */
e1026ffb SC	101	KEEP ((.install0)) / Section should setup the stack pointer. */
	102	KEEP ((.install1)) / Place holder for applications. */
	103	KEEP ((.install2)) / Optional installation of data sections in RAM. */
	104	KEEP ((.install3)) / Place holder for applications. */
	105	KEEP ((.install4)) / Section that calls the main. */
60bcf0fa NC	106	"
60bcf0fa NC	107
de0b1853 SC	108	FINISH_CODE="
de0b1853 SC	109	/* Finish code. */
e1026ffb SC	110	KEEP ((.fini0)) / Beginning of finish code (_exit symbol). */
	111	KEEP ((.fini1)) / Place holder for applications. */
	112	KEEP ((.fini2)) / C++ destructors. */
	113	KEEP ((.fini3)) / Place holder for applications. */
	114	KEEP ((.fini4)) / Runtime exit. */
de0b1853 SC	115	"
de0b1853 SC	116
60bcf0fa NC	117	PRE_COMPUTE_DATA_SIZE="
	118	/* SCz: this does not work yet... This is supposed to force the loading
	119	of _map_data.o (from libgcc.a) when the .data section is not empty.
	120	By doing so, this should bring the code that copies the .data section
	121	from ROM to RAM at init time.
	122
	123	___pre_comp_data_size = SIZEOF(.data);
	124	__install_data_sections = ___pre_comp_data_size > 0 ?
	125	__map_data_sections : 0;
	126	*/
	127	"
	128
	129	INSTALL_RELOC="
df381c72 AM	130	.install0 : { *(.install0) }
	131	.install1 : { *(.install1) }
	132	.install2 : { *(.install2) }
	133	.install3 : { *(.install3) }
	134	.install4 : { *(.install4) }
60bcf0fa NC	135	"
60bcf0fa NC	136
de0b1853	137	FINISH_RELOC="
df381c72 AM	138	.fini0 : { *(.fini0) }
	139	.fini1 : { *(.fini1) }
	140	.fini2 : { *(.fini2) }
	141	.fini3 : { *(.fini3) }
	142	.fini4 : { *(.fini4) }
de0b1853 SC	143	"
de0b1853 SC	144
60bcf0fa	145	BSS_DATA_RELOC="
df381c72	146	.data1 : { *(.data1) }
60bcf0fa NC	147
	148	/* We want the small data sections together, so single-instruction offsets
	149	can access them all, and initialized data all before uninitialized, so
	150	we can shorten the on-disk segment size. */
df381c72 AM	151	.sdata : { *(.sdata) }
	152	.sbss : { *(.sbss) }
	153	.scommon : { *(.scommon) }
60bcf0fa NC	154	"
60bcf0fa NC	155
a66c0f2c	156	SOFT_REGS_RELOC="
df381c72	157	.softregs : { *(.softregs) }
a66c0f2c SC	158	"
a66c0f2c SC	159
60bcf0fa NC	160	cat <<EOF
	161	${RELOCATING+/* Linker script for 68HC11 executable (PROM). */}
	162	${RELOCATING-/* Linker script for 68HC11 object file (ld -r). */}
	163
	164	OUTPUT_FORMAT("${OUTPUT_FORMAT}", "${BIG_OUTPUT_FORMAT}",
	165	"${LITTLE_OUTPUT_FORMAT}")
	166	OUTPUT_ARCH(${OUTPUT_ARCH})
b34c1498	167	${RELOCATING+ENTRY(${ENTRY})}
60bcf0fa NC	168
	169	${RELOCATING+${LIB_SEARCH_DIRS}}
	170	${RELOCATING+${EXECUTABLE_SYMBOLS}}
	171	${RELOCATING+${MEMORY_DEF}}
	172
	173	SECTIONS
	174	{
df381c72 AM	175	.hash : { *(.hash) }
	176	.dynsym : { *(.dynsym) }
	177	.dynstr : { *(.dynstr) }
	178	.gnu.version : { *(.gnu.version) }
	179	.gnu.version_d : { *(.gnu.version_d) }
	180	.gnu.version_r : { *(.gnu.version_r) }
	181
	182	.rel.text :
de0b1853 SC	183	{
	184	*(.rel.text)
	185	${RELOCATING+(.rel.text.)}
	186	${RELOCATING+(.rel.gnu.linkonce.t.)}
	187	}
df381c72	188	.rela.text :
de0b1853 SC	189	{
	190	*(.rela.text)
	191	${RELOCATING+(.rela.text.)}
	192	${RELOCATING+(.rela.gnu.linkonce.t.)}
	193	}
df381c72	194	.rel.data :
de0b1853 SC	195	{
	196	*(.rel.data)
	197	${RELOCATING+(.rel.data.)}
	198	${RELOCATING+(.rel.gnu.linkonce.d.)}
	199	}
df381c72	200	.rela.data :
de0b1853 SC	201	{
	202	*(.rela.data)
	203	${RELOCATING+(.rela.data.)}
	204	${RELOCATING+(.rela.gnu.linkonce.d.)}
	205	}
df381c72	206	.rel.rodata :
de0b1853 SC	207	{
	208	*(.rel.rodata)
	209	${RELOCATING+(.rel.rodata.)}
	210	${RELOCATING+(.rel.gnu.linkonce.r.)}
	211	}
df381c72	212	.rela.rodata :
de0b1853 SC	213	{
	214	*(.rela.rodata)
	215	${RELOCATING+(.rela.rodata.)}
	216	${RELOCATING+(.rela.gnu.linkonce.r.)}
	217	}
df381c72	218	.rel.sdata :
de0b1853 SC	219	{
	220	*(.rel.sdata)
	221	${RELOCATING+(.rel.sdata.)}
	222	${RELOCATING+(.rel.gnu.linkonce.s.)}
	223	}
df381c72	224	.rela.sdata :
de0b1853 SC	225	{
	226	*(.rela.sdata)
	227	${RELOCATING+(.rela.sdata.)}
	228	${RELOCATING+(.rela.gnu.linkonce.s.)}
	229	}
df381c72	230	.rel.sbss :
de0b1853 SC	231	{
	232	*(.rel.sbss)
	233	${RELOCATING+(.rel.sbss.)}
	234	${RELOCATING+(.rel.gnu.linkonce.sb.)}
	235	}
df381c72	236	.rela.sbss :
de0b1853 SC	237	{
	238	*(.rela.sbss)
	239	${RELOCATING+(.rela.sbss.)}
	240	${RELOCATING+(.rel.gnu.linkonce.sb.)}
	241	}
df381c72	242	.rel.bss :
de0b1853 SC	243	{
	244	*(.rel.bss)
	245	${RELOCATING+(.rel.bss.)}
	246	${RELOCATING+(.rel.gnu.linkonce.b.)}
	247	}
df381c72	248	.rela.bss :
de0b1853 SC	249	{
	250	*(.rela.bss)
	251	${RELOCATING+(.rela.bss.)}
	252	${RELOCATING+(.rela.gnu.linkonce.b.)}
	253	}
df381c72 AM	254	.rel.stext : { *(.rel.stest) }
	255	.rela.stext : { *(.rela.stest) }
	256	.rel.etext : { *(.rel.etest) }
	257	.rela.etext : { *(.rela.etest) }
	258	.rel.sdata : { *(.rel.sdata) }
	259	.rela.sdata : { *(.rela.sdata) }
	260	.rel.edata : { *(.rel.edata) }
	261	.rela.edata : { *(.rela.edata) }
	262	.rel.eit_v : { *(.rel.eit_v) }
	263	.rela.eit_v : { *(.rela.eit_v) }
	264	.rel.ebss : { *(.rel.ebss) }
	265	.rela.ebss : { *(.rela.ebss) }
	266	.rel.srodata : { *(.rel.srodata) }
	267	.rela.srodata : { *(.rela.srodata) }
	268	.rel.erodata : { *(.rel.erodata) }
	269	.rela.erodata : { *(.rela.erodata) }
	270	.rel.got : { *(.rel.got) }
	271	.rela.got : { *(.rela.got) }
	272	.rel.ctors : { *(.rel.ctors) }
	273	.rela.ctors : { *(.rela.ctors) }
	274	.rel.dtors : { *(.rel.dtors) }
	275	.rela.dtors : { *(.rela.dtors) }
	276	.rel.init : { *(.rel.init) }
	277	.rela.init : { *(.rela.init) }
	278	.rel.fini : { *(.rel.fini) }
	279	.rela.fini : { *(.rela.fini) }
	280	.rel.plt : { *(.rel.plt) }
	281	.rela.plt : { *(.rela.plt) }
60bcf0fa NC	282
	283	/* Concatenate .page0 sections. Put them in the page0 memory bank
	284	unless we are creating a relocatable file. */
	285	.page0 :
	286	{
	287	*(.page0)
a66c0f2c	288	${RELOCATING+*(.softregs)}
60bcf0fa NC	289	} ${RELOCATING+ > page0}
	290
	291	/* Start of text section. */
df381c72	292	.stext :
60bcf0fa NC	293	{
	294	*(.stext)
	295	} ${RELOCATING+ > ${TEXT_MEMORY}}
	296
df381c72	297	.init :
60bcf0fa NC	298	{
	299	*(.init)
	300	} ${RELOCATING+=${NOP-0}}
	301
	302	${RELOCATING-${INSTALL_RELOC}}
de0b1853	303	${RELOCATING-${FINISH_RELOC}}
60bcf0fa	304
df381c72	305	.text :
60bcf0fa NC	306	{
	307	/* Put startup code at beginning so that _start keeps same address. */
	308	${RELOCATING+${STARTUP_CODE}}
	309
	310	${RELOCATING+*(.init)}
	311	*(.text)
de0b1853	312	${RELOCATING+(.text.)}
60bcf0fa NC	313	/* .gnu.warning sections are handled specially by elf32.em. */
60bcf0fa NC	314	*(.gnu.warning)
de0b1853	315	${RELOCATING+(.gnu.linkonce.t.)}
494fee87 SC	316	${RELOCATING+*(.tramp)}
494fee87 SC	317	${RELOCATING+(.tramp.)}
de0b1853 SC	318
de0b1853 SC	319	${RELOCATING+${FINISH_CODE}}
60bcf0fa NC	320
	321	${RELOCATING+_etext = .;}
	322	${RELOCATING+PROVIDE (etext = .);}
	323
	324	} ${RELOCATING+ > ${TEXT_MEMORY}}
	325
df381c72	326	.eh_frame :
60bcf0fa	327	{
24098abb	328	KEEP (*(.eh_frame))
60bcf0fa NC	329	} ${RELOCATING+ > ${TEXT_MEMORY}}
60bcf0fa NC	330
df381c72	331	.gcc_except_table :
83a27a96 SC	332	{
	333	*(.gcc_except_table)
	334	} ${RELOCATING+ > ${TEXT_MEMORY}}
	335
df381c72	336	.rodata :
60bcf0fa NC	337	{
60bcf0fa NC	338	*(.rodata)
de0b1853 SC	339	${RELOCATING+(.rodata.)}
de0b1853 SC	340	${RELOCATING+(.gnu.linkonce.r)}
60bcf0fa NC	341	} ${RELOCATING+ > ${TEXT_MEMORY}}
60bcf0fa NC	342
df381c72	343	.rodata1 :
60bcf0fa NC	344	{
	345	*(.rodata1)
	346	} ${RELOCATING+ > ${TEXT_MEMORY}}
	347
de0b1853 SC	348	/* Constructor and destructor tables are in ROM. */
	349	${RELOCATING+${CTOR}}
	350	${RELOCATING+${DTOR}}
	351
df381c72	352	.jcr :
24098abb RH	353	{
	354	KEEP (*(.jcr))
	355	} ${RELOCATING+ > ${TEXT_MEMORY}}
	356
60bcf0fa NC	357	/* Start of the data section image in ROM. */
	358	${RELOCATING+__data_image = .;}
	359	${RELOCATING+PROVIDE (__data_image = .);}
	360
	361	/* All read-only sections that normally go in PROM must be above.
	362	We construct the DATA image section in PROM at end of all these
	363	read-only sections. The data image must be copied at init time.
	364	Refer to GNU ld, Section 3.6.8.2 Output Section LMA. */
df381c72	365	.data : ${RELOCATING+AT (__data_image)}
60bcf0fa NC	366	{
	367	${RELOCATING+__data_section_start = .;}
	368	${RELOCATING+PROVIDE (__data_section_start = .);}
	369
	370	${RELOCATING+${DATA_START_SYMBOLS}}
	371	${RELOCATING+*(.sdata)}
	372	*(.data)
de0b1853	373	${RELOCATING+(.data.)}
60bcf0fa	374	${RELOCATING+*(.data1)}
de0b1853	375	${RELOCATING+(.gnu.linkonce.d.)}
60bcf0fa NC	376	${CONSTRUCTING+CONSTRUCTORS}
	377
	378	${RELOCATING+_edata = .;}
	379	${RELOCATING+PROVIDE (edata = .);}
	380	} ${RELOCATING+ > ${DATA_MEMORY}}
	381
	382	${RELOCATING+__data_section_size = SIZEOF(.data);}
	383	${RELOCATING+PROVIDE (__data_section_size = SIZEOF(.data));}
	384	${RELOCATING+__data_image_end = __data_image + __data_section_size;}
	385
	386	${RELOCATING+${PRE_COMPUTE_DATA_SIZE}}
	387
df381c72	388	/* .install :
60bcf0fa NC	389	{
	390	. = _data_image_end;
	391	} ${RELOCATING+ > ${TEXT_MEMORY}} */
	392
	393	/* Relocation for some bss and data sections. */
	394	${RELOCATING-${BSS_DATA_RELOC}}
a66c0f2c	395	${RELOCATING-${SOFT_REGS_RELOC}}
60bcf0fa	396
df381c72	397	.bss :
60bcf0fa NC	398	{
	399	${RELOCATING+__bss_start = .;}
	400	${RELOCATING+*(.sbss)}
	401	${RELOCATING+*(.scommon)}
	402
	403	*(.dynbss)
	404	*(.bss)
de0b1853 SC	405	${RELOCATING+(.bss.)}
de0b1853 SC	406	${RELOCATING+(.gnu.linkonce.b.)}
60bcf0fa NC	407	*(COMMON)
	408	${RELOCATING+PROVIDE (_end = .);}
	409	} ${RELOCATING+ > ${DATA_MEMORY}}
236d5abf NC	410	${RELOCATING+__bss_size = SIZEOF(.bss);}
236d5abf NC	411	${RELOCATING+PROVIDE (__bss_size = SIZEOF(.bss));}
60bcf0fa	412
df381c72	413	.eeprom :
a66c0f2c SC	414	{
	415	*(.eeprom)
	416	(.eeprom.)
	417	} ${RELOCATING+ > ${EEPROM_MEMORY}}
	418
60bcf0fa NC	419	${RELOCATING+${VECTORS}}
	420
	421	/* Stabs debugging sections. */
	422	.stab 0 : { *(.stab) }
	423	.stabstr 0 : { *(.stabstr) }
	424	.stab.excl 0 : { *(.stab.excl) }
	425	.stab.exclstr 0 : { *(.stab.exclstr) }
	426	.stab.index 0 : { *(.stab.index) }
	427	.stab.indexstr 0 : { *(.stab.indexstr) }
	428
	429	.comment 0 : { *(.comment) }
	430
	431	/* DWARF debug sections.
	432	Symbols in the DWARF debugging sections are relative to the beginning
	433	of the section so we begin them at 0.
	434	Treatment of DWARF debug section must be at end of the linker
	435	script to avoid problems when there are undefined symbols. It's necessary
	436	to avoid that the DWARF section is relocated before such undefined
	437	symbols are found. */
	438
	439	/* DWARF 1 */
	440	.debug 0 : { *(.debug) }
	441	.line 0 : { *(.line) }
	442
	443	/* GNU DWARF 1 extensions */
	444	.debug_srcinfo 0 : { *(.debug_srcinfo) }
	445	.debug_sfnames 0 : { *(.debug_sfnames) }
	446
	447	/* DWARF 1.1 and DWARF 2 */
	448	.debug_aranges 0 : { *(.debug_aranges) }
	449	.debug_pubnames 0 : { *(.debug_pubnames) }
	450
	451	/* DWARF 2 */
3a9d486c	452	.debug_info 0 : { (.debug_info) (.gnu.linkonce.wi.*) }
60bcf0fa NC	453	.debug_abbrev 0 : { *(.debug_abbrev) }
	454	.debug_line 0 : { *(.debug_line) }
	455	.debug_frame 0 : { *(.debug_frame) }
	456	.debug_str 0 : { *(.debug_str) }
	457	.debug_loc 0 : { *(.debug_loc) }
	458	.debug_macinfo 0 : { *(.debug_macinfo) }
	459	}
	460	EOF