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hw/elf_ops: Rename elf_ops.h -> elf_ops.h.inc
[thirdparty/qemu.git] / linux-user / elfload.c
CommitLineData
31e31b8a 1/* This is the Linux kernel elf-loading code, ported into user space */
d39594e9 2#include "qemu/osdep.h"
edf8e2af 3#include <sys/param.h>
31e31b8a 4
0ea731db 5#include <sys/prctl.h>
edf8e2af 6#include <sys/resource.h>
30ab9ef2 7#include <sys/shm.h>
31e31b8a 8
3ef693a0 9#include "qemu.h"
3b249d26 10#include "user-internals.h"
db2af69d 11#include "signal-common.h"
3ad0a769 12#include "loader.h"
5423e6d3 13#include "user-mmap.h"
76cad711 14#include "disas/disas.h"
ce543844 15#include "qemu/bitops.h"
f348b6d1 16#include "qemu/path.h"
dc5e9ac7 17#include "qemu/queue.h"
c6a2377f 18#include "qemu/guest-random.h"
6fd59449 19#include "qemu/units.h"
ee947430 20#include "qemu/selfmap.h"
370ed600 21#include "qemu/lockable.h"
c7f17e7b 22#include "qapi/error.h"
cc37d98b 23#include "qemu/error-report.h"
db2af69d 24#include "target_signal.h"
327b75a4 25#include "tcg/debuginfo.h"
31e31b8a 26
5a534314
PM		 27#ifdef TARGET_ARM
28#include "target/arm/cpu-features.h"
29#endif
30
e58ffeb3 31#ifdef _ARCH_PPC64
a6cc84f4 32#undef ARCH_DLINFO
33#undef ELF_PLATFORM
34#undef ELF_HWCAP
ad6919dc 35#undef ELF_HWCAP2
a6cc84f4 36#undef ELF_CLASS
37#undef ELF_DATA
38#undef ELF_ARCH
39#endif
40
c40f621a
RH		 41#ifndef TARGET_ARCH_HAS_SIGTRAMP_PAGE
42#define TARGET_ARCH_HAS_SIGTRAMP_PAGE 0
43#endif
44
45typedef struct {
46 const uint8_t *image;
47 const uint32_t *relocs;
48 unsigned image_size;
49 unsigned reloc_count;
50 unsigned sigreturn_ofs;
51 unsigned rt_sigreturn_ofs;
52} VdsoImageInfo;
53
edf8e2af
MW		 54#define ELF_OSABI ELFOSABI_SYSV
55
cb33da57
BS		 56/* from personality.h */
57
58/*
59 * Flags for bug emulation.
60 *
61 * These occupy the top three bytes.
62 */
63enum {
d97ef72e
RH		 64 ADDR_NO_RANDOMIZE = 0x0040000, /* disable randomization of VA space */
65 FDPIC_FUNCPTRS = 0x0080000, /* userspace function ptrs point to
66 descriptors (signal handling) */
67 MMAP_PAGE_ZERO = 0x0100000,
68 ADDR_COMPAT_LAYOUT = 0x0200000,
69 READ_IMPLIES_EXEC = 0x0400000,
70 ADDR_LIMIT_32BIT = 0x0800000,
71 SHORT_INODE = 0x1000000,
72 WHOLE_SECONDS = 0x2000000,
73 STICKY_TIMEOUTS = 0x4000000,
74 ADDR_LIMIT_3GB = 0x8000000,
cb33da57
BS		 75};
76
77/*
78 * Personality types.
79 *
80 * These go in the low byte. Avoid using the top bit, it will
81 * conflict with error returns.
82 */
83enum {
d97ef72e
RH		 84 PER_LINUX = 0x0000,
85 PER_LINUX_32BIT = 0x0000 | ADDR_LIMIT_32BIT,
86 PER_LINUX_FDPIC = 0x0000 | FDPIC_FUNCPTRS,
87 PER_SVR4 = 0x0001 | STICKY_TIMEOUTS | MMAP_PAGE_ZERO,
88 PER_SVR3 = 0x0002 | STICKY_TIMEOUTS | SHORT_INODE,
89 PER_SCOSVR3 = 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS | SHORT_INODE,
90 PER_OSR5 = 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS,
91 PER_WYSEV386 = 0x0004 | STICKY_TIMEOUTS | SHORT_INODE,
92 PER_ISCR4 = 0x0005 | STICKY_TIMEOUTS,
93 PER_BSD = 0x0006,
94 PER_SUNOS = 0x0006 | STICKY_TIMEOUTS,
95 PER_XENIX = 0x0007 | STICKY_TIMEOUTS | SHORT_INODE,
96 PER_LINUX32 = 0x0008,
97 PER_LINUX32_3GB = 0x0008 | ADDR_LIMIT_3GB,
98 PER_IRIX32 = 0x0009 | STICKY_TIMEOUTS,/* IRIX5 32-bit */
99 PER_IRIXN32 = 0x000a | STICKY_TIMEOUTS,/* IRIX6 new 32-bit */
100 PER_IRIX64 = 0x000b | STICKY_TIMEOUTS,/* IRIX6 64-bit */
101 PER_RISCOS = 0x000c,
102 PER_SOLARIS = 0x000d | STICKY_TIMEOUTS,
103 PER_UW7 = 0x000e | STICKY_TIMEOUTS | MMAP_PAGE_ZERO,
104 PER_OSF4 = 0x000f, /* OSF/1 v4 */
105 PER_HPUX = 0x0010,
106 PER_MASK = 0x00ff,
cb33da57
BS		 107};
108
109/*
110 * Return the base personality without flags.
111 */
d97ef72e 112#define personality(pers) (pers & PER_MASK)
cb33da57 113
3cb10cfa
CL		 114int info_is_fdpic(struct image_info *info)
115{
116 return info->personality == PER_LINUX_FDPIC;
117}
118
83fb7adf
FB		 119/* this flag is uneffective under linux too, should be deleted */
120#ifndef MAP_DENYWRITE
121#define MAP_DENYWRITE 0
122#endif
123
124/* should probably go in elf.h */
125#ifndef ELIBBAD
126#define ELIBBAD 80
127#endif
128
ee3eb3a7 129#if TARGET_BIG_ENDIAN
28490231
RH		 130#define ELF_DATA ELFDATA2MSB
131#else
132#define ELF_DATA ELFDATA2LSB
133#endif
134
a29f998d 135#ifdef TARGET_ABI_MIPSN32
918fc54c
PB		 136typedef abi_ullong target_elf_greg_t;
137#define tswapreg(ptr) tswap64(ptr)
a29f998d
PB		 138#else
139typedef abi_ulong target_elf_greg_t;
140#define tswapreg(ptr) tswapal(ptr)
141#endif
142
21e807fa 143#ifdef USE_UID16
1ddd592f
PB		 144typedef abi_ushort target_uid_t;
145typedef abi_ushort target_gid_t;
21e807fa 146#else
f8fd4fc4
PB		 147typedef abi_uint target_uid_t;
148typedef abi_uint target_gid_t;
21e807fa 149#endif
f8fd4fc4 150typedef abi_int target_pid_t;
21e807fa 151
30ac07d4
FB		 152#ifdef TARGET_I386
153
15338fd7
FB		 154#define ELF_HWCAP get_elf_hwcap()
155
156static uint32_t get_elf_hwcap(void)
157{
a2247f8e
AF		 158 X86CPU *cpu = X86_CPU(thread_cpu);
159
160 return cpu->env.features[FEAT_1_EDX];
15338fd7
FB		 161}
162
84409ddb 163#ifdef TARGET_X86_64
84409ddb 164#define ELF_CLASS ELFCLASS64
84409ddb
JM		 165#define ELF_ARCH EM_X86_64
166
9263ba84
RH		 167#define ELF_PLATFORM "x86_64"
168
84409ddb
JM		 169static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
170{
171 regs->rax = 0;
172 regs->rsp = infop->start_stack;
173 regs->rip = infop->entry;
174}
175
9edc5d79 176#define ELF_NREG 27
c227f099 177typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
9edc5d79
MW		 178
179/*
180 * Note that ELF_NREG should be 29 as there should be place for
181 * TRAPNO and ERR "registers" as well but linux doesn't dump
182 * those.
183 *
184 * See linux kernel: arch/x86/include/asm/elf.h
185 */
05390248 186static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State *env)
9edc5d79 187{
030912e0
IL		 188 (*regs)[0] = tswapreg(env->regs[15]);
189 (*regs)[1] = tswapreg(env->regs[14]);
190 (*regs)[2] = tswapreg(env->regs[13]);
191 (*regs)[3] = tswapreg(env->regs[12]);
192 (*regs)[4] = tswapreg(env->regs[R_EBP]);
193 (*regs)[5] = tswapreg(env->regs[R_EBX]);
194 (*regs)[6] = tswapreg(env->regs[11]);
195 (*regs)[7] = tswapreg(env->regs[10]);
196 (*regs)[8] = tswapreg(env->regs[9]);
197 (*regs)[9] = tswapreg(env->regs[8]);
198 (*regs)[10] = tswapreg(env->regs[R_EAX]);
199 (*regs)[11] = tswapreg(env->regs[R_ECX]);
200 (*regs)[12] = tswapreg(env->regs[R_EDX]);
201 (*regs)[13] = tswapreg(env->regs[R_ESI]);
202 (*regs)[14] = tswapreg(env->regs[R_EDI]);
203 (*regs)[15] = tswapreg(env->regs[R_EAX]); /* XXX */
204 (*regs)[16] = tswapreg(env->eip);
205 (*regs)[17] = tswapreg(env->segs[R_CS].selector & 0xffff);
206 (*regs)[18] = tswapreg(env->eflags);
207 (*regs)[19] = tswapreg(env->regs[R_ESP]);
208 (*regs)[20] = tswapreg(env->segs[R_SS].selector & 0xffff);
209 (*regs)[21] = tswapreg(env->segs[R_FS].selector & 0xffff);
210 (*regs)[22] = tswapreg(env->segs[R_GS].selector & 0xffff);
211 (*regs)[23] = tswapreg(env->segs[R_DS].selector & 0xffff);
212 (*regs)[24] = tswapreg(env->segs[R_ES].selector & 0xffff);
213 (*regs)[25] = tswapreg(env->segs[R_FS].selector & 0xffff);
214 (*regs)[26] = tswapreg(env->segs[R_GS].selector & 0xffff);
9edc5d79
MW		 215}
216
d461b73e
RH		 217#if ULONG_MAX > UINT32_MAX
218#define INIT_GUEST_COMMPAGE
219static bool init_guest_commpage(void)
220{
221 /*
222 * The vsyscall page is at a high negative address aka kernel space,
223 * which means that we cannot actually allocate it with target_mmap.
224 * We still should be able to use page_set_flags, unless the user
225 * has specified -R reserved_va, which would trigger an assert().
226 */
227 if (reserved_va != 0 &&
95059f9c 228 TARGET_VSYSCALL_PAGE + TARGET_PAGE_SIZE - 1 > reserved_va) {
d461b73e
RH		 229 error_report("Cannot allocate vsyscall page");
230 exit(EXIT_FAILURE);
231 }
232 page_set_flags(TARGET_VSYSCALL_PAGE,
49840a4a 233 TARGET_VSYSCALL_PAGE | ~TARGET_PAGE_MASK,
d461b73e
RH		 234 PAGE_EXEC | PAGE_VALID);
235 return true;
236}
237#endif
84409ddb
JM		 238#else
239
30ac07d4
FB		 240/*
241 * This is used to ensure we don't load something for the wrong architecture.
242 */
243#define elf_check_arch(x) ( ((x) == EM_386) || ((x) == EM_486) )
244
245/*
246 * These are used to set parameters in the core dumps.
247 */
d97ef72e 248#define ELF_CLASS ELFCLASS32
d97ef72e 249#define ELF_ARCH EM_386
30ac07d4 250
9263ba84 251#define ELF_PLATFORM get_elf_platform()
872f3d04 252#define EXSTACK_DEFAULT true
9263ba84
RH		 253
254static const char *get_elf_platform(void)
255{
256 static char elf_platform[] = "i386";
257 int family = object_property_get_int(OBJECT(thread_cpu), "family", NULL);
258 if (family > 6) {
259 family = 6;
260 }
261 if (family >= 3) {
262 elf_platform[1] = '0' + family;
263 }
264 return elf_platform;
265}
266
d97ef72e
RH		 267static inline void init_thread(struct target_pt_regs *regs,
268 struct image_info *infop)
b346ff46
FB		 269{
270 regs->esp = infop->start_stack;
271 regs->eip = infop->entry;
e5fe0c52
PB		 272
273 /* SVR4/i386 ABI (pages 3-31, 3-32) says that when the program
274 starts %edx contains a pointer to a function which might be
275 registered using `atexit'. This provides a mean for the
276 dynamic linker to call DT_FINI functions for shared libraries
277 that have been loaded before the code runs.
278
279 A value of 0 tells we have no such handler. */
280 regs->edx = 0;
b346ff46 281}
9edc5d79 282
9edc5d79 283#define ELF_NREG 17
c227f099 284typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
9edc5d79
MW		 285
286/*
287 * Note that ELF_NREG should be 19 as there should be place for
288 * TRAPNO and ERR "registers" as well but linux doesn't dump
289 * those.
290 *
291 * See linux kernel: arch/x86/include/asm/elf.h
292 */
05390248 293static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUX86State *env)
9edc5d79 294{
030912e0
IL		 295 (*regs)[0] = tswapreg(env->regs[R_EBX]);
296 (*regs)[1] = tswapreg(env->regs[R_ECX]);
297 (*regs)[2] = tswapreg(env->regs[R_EDX]);
298 (*regs)[3] = tswapreg(env->regs[R_ESI]);
299 (*regs)[4] = tswapreg(env->regs[R_EDI]);
300 (*regs)[5] = tswapreg(env->regs[R_EBP]);
301 (*regs)[6] = tswapreg(env->regs[R_EAX]);
302 (*regs)[7] = tswapreg(env->segs[R_DS].selector & 0xffff);
303 (*regs)[8] = tswapreg(env->segs[R_ES].selector & 0xffff);
304 (*regs)[9] = tswapreg(env->segs[R_FS].selector & 0xffff);
305 (*regs)[10] = tswapreg(env->segs[R_GS].selector & 0xffff);
306 (*regs)[11] = tswapreg(env->regs[R_EAX]); /* XXX */
307 (*regs)[12] = tswapreg(env->eip);
308 (*regs)[13] = tswapreg(env->segs[R_CS].selector & 0xffff);
309 (*regs)[14] = tswapreg(env->eflags);
310 (*regs)[15] = tswapreg(env->regs[R_ESP]);
311 (*regs)[16] = tswapreg(env->segs[R_SS].selector & 0xffff);
9edc5d79 312}
a1367443
RH		 313
314/*
315 * i386 is the only target which supplies AT_SYSINFO for the vdso.
316 * All others only supply AT_SYSINFO_EHDR.
317 */
318#define DLINFO_ARCH_ITEMS (vdso_info != NULL)
319#define ARCH_DLINFO \
320 do { \
321 if (vdso_info) { \
322 NEW_AUX_ENT(AT_SYSINFO, vdso_info->entry); \
323 } \
324 } while (0)
325
a1367443 326#endif /* TARGET_X86_64 */
b346ff46 327
6b1a9d38 328#define VDSO_HEADER "vdso.c.inc"
b346ff46 329
9edc5d79 330#define USE_ELF_CORE_DUMP
d97ef72e 331#define ELF_EXEC_PAGESIZE 4096
b346ff46 332
a1367443 333#endif /* TARGET_I386 */
b346ff46
FB		 334
335#ifdef TARGET_ARM
336
24e76ff0
PM		 337#ifndef TARGET_AARCH64
338/* 32 bit ARM definitions */
339
b597c3f7 340#define ELF_ARCH EM_ARM
d97ef72e 341#define ELF_CLASS ELFCLASS32
872f3d04 342#define EXSTACK_DEFAULT true
b346ff46 343
d97ef72e
RH		 344static inline void init_thread(struct target_pt_regs *regs,
345 struct image_info *infop)
b346ff46 346{
992f48a0 347 abi_long stack = infop->start_stack;
b346ff46 348 memset(regs, 0, sizeof(*regs));
99033cae 349
167e4cdc
PM		 350 regs->uregs[16] = ARM_CPU_MODE_USR;
351 if (infop->entry & 1) {
352 regs->uregs[16] |= CPSR_T;
353 }
354 regs->uregs[15] = infop->entry & 0xfffffffe;
355 regs->uregs[13] = infop->start_stack;
2f619698 356 /* FIXME - what to for failure of get_user()? */
167e4cdc
PM		 357 get_user_ual(regs->uregs[2], stack + 8); /* envp */
358 get_user_ual(regs->uregs[1], stack + 4); /* envp */
a1516e92 359 /* XXX: it seems that r0 is zeroed after ! */
167e4cdc 360 regs->uregs[0] = 0;
e5fe0c52 361 /* For uClinux PIC binaries. */
863cf0b7 362 /* XXX: Linux does this only on ARM with no MMU (do we care ?) */
167e4cdc 363 regs->uregs[10] = infop->start_data;
3cb10cfa
CL		 364
365 /* Support ARM FDPIC. */
366 if (info_is_fdpic(infop)) {
367 /* As described in the ABI document, r7 points to the loadmap info
368 * prepared by the kernel. If an interpreter is needed, r8 points
369 * to the interpreter loadmap and r9 points to the interpreter
370 * PT_DYNAMIC info. If no interpreter is needed, r8 is zero, and
371 * r9 points to the main program PT_DYNAMIC info.
372 */
373 regs->uregs[7] = infop->loadmap_addr;
374 if (infop->interpreter_loadmap_addr) {
375 /* Executable is dynamically loaded. */
376 regs->uregs[8] = infop->interpreter_loadmap_addr;
377 regs->uregs[9] = infop->interpreter_pt_dynamic_addr;
378 } else {
379 regs->uregs[8] = 0;
380 regs->uregs[9] = infop->pt_dynamic_addr;
381 }
382 }
b346ff46
FB		 383}
384
edf8e2af 385#define ELF_NREG 18
c227f099 386typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
edf8e2af 387
05390248 388static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUARMState *env)
edf8e2af 389{
86cd7b2d
PB		 390 (*regs)[0] = tswapreg(env->regs[0]);
391 (*regs)[1] = tswapreg(env->regs[1]);
392 (*regs)[2] = tswapreg(env->regs[2]);
393 (*regs)[3] = tswapreg(env->regs[3]);
394 (*regs)[4] = tswapreg(env->regs[4]);
395 (*regs)[5] = tswapreg(env->regs[5]);
396 (*regs)[6] = tswapreg(env->regs[6]);
397 (*regs)[7] = tswapreg(env->regs[7]);
398 (*regs)[8] = tswapreg(env->regs[8]);
399 (*regs)[9] = tswapreg(env->regs[9]);
400 (*regs)[10] = tswapreg(env->regs[10]);
401 (*regs)[11] = tswapreg(env->regs[11]);
402 (*regs)[12] = tswapreg(env->regs[12]);
403 (*regs)[13] = tswapreg(env->regs[13]);
404 (*regs)[14] = tswapreg(env->regs[14]);
405 (*regs)[15] = tswapreg(env->regs[15]);
406
407 (*regs)[16] = tswapreg(cpsr_read((CPUARMState *)env));
408 (*regs)[17] = tswapreg(env->regs[0]); /* XXX */
edf8e2af
MW		 409}
410
30ac07d4 411#define USE_ELF_CORE_DUMP
d97ef72e 412#define ELF_EXEC_PAGESIZE 4096
30ac07d4 413
afce2927
FB		 414enum
415{
d97ef72e
RH		 416 ARM_HWCAP_ARM_SWP = 1 << 0,
417 ARM_HWCAP_ARM_HALF = 1 << 1,
418 ARM_HWCAP_ARM_THUMB = 1 << 2,
419 ARM_HWCAP_ARM_26BIT = 1 << 3,
420 ARM_HWCAP_ARM_FAST_MULT = 1 << 4,
421 ARM_HWCAP_ARM_FPA = 1 << 5,
422 ARM_HWCAP_ARM_VFP = 1 << 6,
423 ARM_HWCAP_ARM_EDSP = 1 << 7,
424 ARM_HWCAP_ARM_JAVA = 1 << 8,
425 ARM_HWCAP_ARM_IWMMXT = 1 << 9,
43ce393e
PM		 426 ARM_HWCAP_ARM_CRUNCH = 1 << 10,
427 ARM_HWCAP_ARM_THUMBEE = 1 << 11,
428 ARM_HWCAP_ARM_NEON = 1 << 12,
429 ARM_HWCAP_ARM_VFPv3 = 1 << 13,
430 ARM_HWCAP_ARM_VFPv3D16 = 1 << 14,
24682654
PM		 431 ARM_HWCAP_ARM_TLS = 1 << 15,
432 ARM_HWCAP_ARM_VFPv4 = 1 << 16,
433 ARM_HWCAP_ARM_IDIVA = 1 << 17,
434 ARM_HWCAP_ARM_IDIVT = 1 << 18,
435 ARM_HWCAP_ARM_VFPD32 = 1 << 19,
436 ARM_HWCAP_ARM_LPAE = 1 << 20,
437 ARM_HWCAP_ARM_EVTSTRM = 1 << 21,
23d7f14d
PM		 438 ARM_HWCAP_ARM_FPHP = 1 << 22,
439 ARM_HWCAP_ARM_ASIMDHP = 1 << 23,
440 ARM_HWCAP_ARM_ASIMDDP = 1 << 24,
441 ARM_HWCAP_ARM_ASIMDFHM = 1 << 25,
442 ARM_HWCAP_ARM_ASIMDBF16 = 1 << 26,
443 ARM_HWCAP_ARM_I8MM = 1 << 27,
afce2927
FB		 444};
445
ad6919dc
PM		 446enum {
447 ARM_HWCAP2_ARM_AES = 1 << 0,
448 ARM_HWCAP2_ARM_PMULL = 1 << 1,
449 ARM_HWCAP2_ARM_SHA1 = 1 << 2,
450 ARM_HWCAP2_ARM_SHA2 = 1 << 3,
451 ARM_HWCAP2_ARM_CRC32 = 1 << 4,
23d7f14d
PM		 452 ARM_HWCAP2_ARM_SB = 1 << 5,
453 ARM_HWCAP2_ARM_SSBS = 1 << 6,
ad6919dc
PM		 454};
455
6b1275ff
PM		 456/* The commpage only exists for 32 bit kernels */
457
66346faf 458#define HI_COMMPAGE (intptr_t)0xffff0f00u
806d1021 459
ee947430
AB		 460static bool init_guest_commpage(void)
461{
d713cf4d 462 ARMCPU *cpu = ARM_CPU(thread_cpu);
2cd71515 463 int host_page_size = qemu_real_host_page_size();
d713cf4d
PMD		 464 abi_ptr commpage;
465 void *want;
466 void *addr;
467
468 /*
469 * M-profile allocates maximum of 2GB address space, so can never
470 * allocate the commpage. Skip it.
471 */
472 if (arm_feature(&cpu->env, ARM_FEATURE_M)) {
473 return true;
474 }
475
2cd71515 476 commpage = HI_COMMPAGE & -host_page_size;
d713cf4d 477 want = g2h_untagged(commpage);
2cd71515
RH		 478 addr = mmap(want, host_page_size, PROT_READ | PROT_WRITE,
479 MAP_ANONYMOUS | MAP_PRIVATE |
480 (commpage < reserved_va ? MAP_FIXED : MAP_FIXED_NOREPLACE),
481 -1, 0);
97cc7560 482
6cda41da 483 if (addr == MAP_FAILED) {
ee947430
AB		 484 perror("Allocating guest commpage");
485 exit(EXIT_FAILURE);
97cc7560 486 }
ee947430
AB		 487 if (addr != want) {
488 return false;
97cc7560
DDAG		 489 }
490
ee947430 491 /* Set kernel helper versions; rest of page is 0. */
6cda41da 492 __put_user(5, (uint32_t *)g2h_untagged(0xffff0ffcu));
97cc7560 493
2cd71515 494 if (mprotect(addr, host_page_size, PROT_READ)) {
97cc7560 495 perror("Protecting guest commpage");
ee947430 496 exit(EXIT_FAILURE);
97cc7560 497 }
6cda41da 498
2cd71515 499 page_set_flags(commpage, commpage | (host_page_size - 1),
6cda41da 500 PAGE_READ | PAGE_EXEC | PAGE_VALID);
ee947430 501 return true;
97cc7560 502}
adf050b1
BC		 503
504#define ELF_HWCAP get_elf_hwcap()
ad6919dc 505#define ELF_HWCAP2 get_elf_hwcap2()
adf050b1 506
a55b9e72 507uint32_t get_elf_hwcap(void)
adf050b1 508{
a2247f8e 509 ARMCPU *cpu = ARM_CPU(thread_cpu);
adf050b1
BC		 510 uint32_t hwcaps = 0;
511
512 hwcaps |= ARM_HWCAP_ARM_SWP;
513 hwcaps |= ARM_HWCAP_ARM_HALF;
514 hwcaps |= ARM_HWCAP_ARM_THUMB;
515 hwcaps |= ARM_HWCAP_ARM_FAST_MULT;
adf050b1
BC		 516
517 /* probe for the extra features */
518#define GET_FEATURE(feat, hwcap) \
a2247f8e 519 do { if (arm_feature(&cpu->env, feat)) { hwcaps |= hwcap; } } while (0)
962fcbf2
RH		 520
521#define GET_FEATURE_ID(feat, hwcap) \
522 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
523
24682654
PM		 524 /* EDSP is in v5TE and above, but all our v5 CPUs are v5TE */
525 GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP);
adf050b1
BC		 526 GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT);
527 GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE);
528 GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON);
24682654 529 GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS);
bfa8a370 530 GET_FEATURE(ARM_FEATURE_LPAE, ARM_HWCAP_ARM_LPAE);
873b73c0
PM		 531 GET_FEATURE_ID(aa32_arm_div, ARM_HWCAP_ARM_IDIVA);
532 GET_FEATURE_ID(aa32_thumb_div, ARM_HWCAP_ARM_IDIVT);
bfa8a370
RH		 533 GET_FEATURE_ID(aa32_vfp, ARM_HWCAP_ARM_VFP);
534
535 if (cpu_isar_feature(aa32_fpsp_v3, cpu) ||
536 cpu_isar_feature(aa32_fpdp_v3, cpu)) {
537 hwcaps |= ARM_HWCAP_ARM_VFPv3;
538 if (cpu_isar_feature(aa32_simd_r32, cpu)) {
539 hwcaps |= ARM_HWCAP_ARM_VFPD32;
540 } else {
541 hwcaps |= ARM_HWCAP_ARM_VFPv3D16;
542 }
543 }
544 GET_FEATURE_ID(aa32_simdfmac, ARM_HWCAP_ARM_VFPv4);
429b7e01
PM		 545 /*
546 * MVFR1.FPHP and .SIMDHP must be in sync, and QEMU uses the same
547 * isar_feature function for both. The kernel reports them as two hwcaps.
548 */
549 GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_FPHP);
550 GET_FEATURE_ID(aa32_fp16_arith, ARM_HWCAP_ARM_ASIMDHP);
551 GET_FEATURE_ID(aa32_dp, ARM_HWCAP_ARM_ASIMDDP);
552 GET_FEATURE_ID(aa32_fhm, ARM_HWCAP_ARM_ASIMDFHM);
553 GET_FEATURE_ID(aa32_bf16, ARM_HWCAP_ARM_ASIMDBF16);
554 GET_FEATURE_ID(aa32_i8mm, ARM_HWCAP_ARM_I8MM);
adf050b1
BC		 555
556 return hwcaps;
557}
afce2927 558
63c1b7de 559uint64_t get_elf_hwcap2(void)
ad6919dc
PM		 560{
561 ARMCPU *cpu = ARM_CPU(thread_cpu);
63c1b7de 562 uint64_t hwcaps = 0;
ad6919dc 563
962fcbf2
RH		 564 GET_FEATURE_ID(aa32_aes, ARM_HWCAP2_ARM_AES);
565 GET_FEATURE_ID(aa32_pmull, ARM_HWCAP2_ARM_PMULL);
566 GET_FEATURE_ID(aa32_sha1, ARM_HWCAP2_ARM_SHA1);
567 GET_FEATURE_ID(aa32_sha2, ARM_HWCAP2_ARM_SHA2);
568 GET_FEATURE_ID(aa32_crc32, ARM_HWCAP2_ARM_CRC32);
429b7e01
PM		 569 GET_FEATURE_ID(aa32_sb, ARM_HWCAP2_ARM_SB);
570 GET_FEATURE_ID(aa32_ssbs, ARM_HWCAP2_ARM_SSBS);
ad6919dc
PM		 571 return hwcaps;
572}
573
a55b9e72
HD		 574const char *elf_hwcap_str(uint32_t bit)
575{
576 static const char *hwcap_str[] = {
577 [__builtin_ctz(ARM_HWCAP_ARM_SWP )] = "swp",
578 [__builtin_ctz(ARM_HWCAP_ARM_HALF )] = "half",
579 [__builtin_ctz(ARM_HWCAP_ARM_THUMB )] = "thumb",
580 [__builtin_ctz(ARM_HWCAP_ARM_26BIT )] = "26bit",
581 [__builtin_ctz(ARM_HWCAP_ARM_FAST_MULT)] = "fast_mult",
582 [__builtin_ctz(ARM_HWCAP_ARM_FPA )] = "fpa",
583 [__builtin_ctz(ARM_HWCAP_ARM_VFP )] = "vfp",
584 [__builtin_ctz(ARM_HWCAP_ARM_EDSP )] = "edsp",
585 [__builtin_ctz(ARM_HWCAP_ARM_JAVA )] = "java",
586 [__builtin_ctz(ARM_HWCAP_ARM_IWMMXT )] = "iwmmxt",
587 [__builtin_ctz(ARM_HWCAP_ARM_CRUNCH )] = "crunch",
588 [__builtin_ctz(ARM_HWCAP_ARM_THUMBEE )] = "thumbee",
589 [__builtin_ctz(ARM_HWCAP_ARM_NEON )] = "neon",
590 [__builtin_ctz(ARM_HWCAP_ARM_VFPv3 )] = "vfpv3",
591 [__builtin_ctz(ARM_HWCAP_ARM_VFPv3D16 )] = "vfpv3d16",
592 [__builtin_ctz(ARM_HWCAP_ARM_TLS )] = "tls",
593 [__builtin_ctz(ARM_HWCAP_ARM_VFPv4 )] = "vfpv4",
594 [__builtin_ctz(ARM_HWCAP_ARM_IDIVA )] = "idiva",
595 [__builtin_ctz(ARM_HWCAP_ARM_IDIVT )] = "idivt",
596 [__builtin_ctz(ARM_HWCAP_ARM_VFPD32 )] = "vfpd32",
597 [__builtin_ctz(ARM_HWCAP_ARM_LPAE )] = "lpae",
598 [__builtin_ctz(ARM_HWCAP_ARM_EVTSTRM )] = "evtstrm",
23d7f14d
PM		 599 [__builtin_ctz(ARM_HWCAP_ARM_FPHP )] = "fphp",
600 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDHP )] = "asimdhp",
601 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDDP )] = "asimddp",
602 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDFHM )] = "asimdfhm",
603 [__builtin_ctz(ARM_HWCAP_ARM_ASIMDBF16)] = "asimdbf16",
604 [__builtin_ctz(ARM_HWCAP_ARM_I8MM )] = "i8mm",
a55b9e72
HD		 605 };
606
607 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
608}
609
610const char *elf_hwcap2_str(uint32_t bit)
611{
612 static const char *hwcap_str[] = {
613 [__builtin_ctz(ARM_HWCAP2_ARM_AES )] = "aes",
614 [__builtin_ctz(ARM_HWCAP2_ARM_PMULL)] = "pmull",
615 [__builtin_ctz(ARM_HWCAP2_ARM_SHA1 )] = "sha1",
616 [__builtin_ctz(ARM_HWCAP2_ARM_SHA2 )] = "sha2",
617 [__builtin_ctz(ARM_HWCAP2_ARM_CRC32)] = "crc32",
23d7f14d
PM		 618 [__builtin_ctz(ARM_HWCAP2_ARM_SB )] = "sb",
619 [__builtin_ctz(ARM_HWCAP2_ARM_SSBS )] = "ssbs",
a55b9e72
HD		 620 };
621
622 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
623}
624
ad6919dc 625#undef GET_FEATURE
962fcbf2 626#undef GET_FEATURE_ID
ad6919dc 627
13ec4ec3
RH		 628#define ELF_PLATFORM get_elf_platform()
629
630static const char *get_elf_platform(void)
631{
b77af26e 632 CPUARMState *env = cpu_env(thread_cpu);
13ec4ec3 633
ee3eb3a7 634#if TARGET_BIG_ENDIAN
13ec4ec3
RH		 635# define END "b"
636#else
637# define END "l"
638#endif
639
640 if (arm_feature(env, ARM_FEATURE_V8)) {
641 return "v8" END;
642 } else if (arm_feature(env, ARM_FEATURE_V7)) {
643 if (arm_feature(env, ARM_FEATURE_M)) {
644 return "v7m" END;
645 } else {
646 return "v7" END;
647 }
648 } else if (arm_feature(env, ARM_FEATURE_V6)) {
649 return "v6" END;
650 } else if (arm_feature(env, ARM_FEATURE_V5)) {
651 return "v5" END;
652 } else {
653 return "v4" END;
654 }
655
656#undef END
657}
658
24e76ff0
PM		 659#else
660/* 64 bit ARM definitions */
24e76ff0 661
b597c3f7 662#define ELF_ARCH EM_AARCH64
24e76ff0 663#define ELF_CLASS ELFCLASS64
ee3eb3a7 664#if TARGET_BIG_ENDIAN
e20e3ec9
RH		 665# define ELF_PLATFORM "aarch64_be"
666#else
667# define ELF_PLATFORM "aarch64"
668#endif
24e76ff0
PM		 669
670static inline void init_thread(struct target_pt_regs *regs,
671 struct image_info *infop)
672{
673 abi_long stack = infop->start_stack;
674 memset(regs, 0, sizeof(*regs));
675
676 regs->pc = infop->entry & ~0x3ULL;
677 regs->sp = stack;
678}
679
680#define ELF_NREG 34
681typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
682
683static void elf_core_copy_regs(target_elf_gregset_t *regs,
684 const CPUARMState *env)
685{
686 int i;
687
688 for (i = 0; i < 32; i++) {
689 (*regs)[i] = tswapreg(env->xregs[i]);
690 }
691 (*regs)[32] = tswapreg(env->pc);
692 (*regs)[33] = tswapreg(pstate_read((CPUARMState *)env));
693}
694
695#define USE_ELF_CORE_DUMP
696#define ELF_EXEC_PAGESIZE 4096
697
698enum {
699 ARM_HWCAP_A64_FP = 1 << 0,
700 ARM_HWCAP_A64_ASIMD = 1 << 1,
701 ARM_HWCAP_A64_EVTSTRM = 1 << 2,
702 ARM_HWCAP_A64_AES = 1 << 3,
703 ARM_HWCAP_A64_PMULL = 1 << 4,
704 ARM_HWCAP_A64_SHA1 = 1 << 5,
705 ARM_HWCAP_A64_SHA2 = 1 << 6,
706 ARM_HWCAP_A64_CRC32 = 1 << 7,
955f56d4
AB		 707 ARM_HWCAP_A64_ATOMICS = 1 << 8,
708 ARM_HWCAP_A64_FPHP = 1 << 9,
709 ARM_HWCAP_A64_ASIMDHP = 1 << 10,
710 ARM_HWCAP_A64_CPUID = 1 << 11,
711 ARM_HWCAP_A64_ASIMDRDM = 1 << 12,
712 ARM_HWCAP_A64_JSCVT = 1 << 13,
713 ARM_HWCAP_A64_FCMA = 1 << 14,
714 ARM_HWCAP_A64_LRCPC = 1 << 15,
715 ARM_HWCAP_A64_DCPOP = 1 << 16,
716 ARM_HWCAP_A64_SHA3 = 1 << 17,
717 ARM_HWCAP_A64_SM3 = 1 << 18,
718 ARM_HWCAP_A64_SM4 = 1 << 19,
719 ARM_HWCAP_A64_ASIMDDP = 1 << 20,
720 ARM_HWCAP_A64_SHA512 = 1 << 21,
721 ARM_HWCAP_A64_SVE = 1 << 22,
0083a1fa
RH		 722 ARM_HWCAP_A64_ASIMDFHM = 1 << 23,
723 ARM_HWCAP_A64_DIT = 1 << 24,
724 ARM_HWCAP_A64_USCAT = 1 << 25,
725 ARM_HWCAP_A64_ILRCPC = 1 << 26,
726 ARM_HWCAP_A64_FLAGM = 1 << 27,
727 ARM_HWCAP_A64_SSBS = 1 << 28,
728 ARM_HWCAP_A64_SB = 1 << 29,
729 ARM_HWCAP_A64_PACA = 1 << 30,
730 ARM_HWCAP_A64_PACG = 1UL << 31,
2041df4a
RH		 731
732 ARM_HWCAP2_A64_DCPODP = 1 << 0,
733 ARM_HWCAP2_A64_SVE2 = 1 << 1,
734 ARM_HWCAP2_A64_SVEAES = 1 << 2,
735 ARM_HWCAP2_A64_SVEPMULL = 1 << 3,
736 ARM_HWCAP2_A64_SVEBITPERM = 1 << 4,
737 ARM_HWCAP2_A64_SVESHA3 = 1 << 5,
738 ARM_HWCAP2_A64_SVESM4 = 1 << 6,
739 ARM_HWCAP2_A64_FLAGM2 = 1 << 7,
740 ARM_HWCAP2_A64_FRINT = 1 << 8,
68948d18
RH		 741 ARM_HWCAP2_A64_SVEI8MM = 1 << 9,
742 ARM_HWCAP2_A64_SVEF32MM = 1 << 10,
743 ARM_HWCAP2_A64_SVEF64MM = 1 << 11,
744 ARM_HWCAP2_A64_SVEBF16 = 1 << 12,
745 ARM_HWCAP2_A64_I8MM = 1 << 13,
746 ARM_HWCAP2_A64_BF16 = 1 << 14,
747 ARM_HWCAP2_A64_DGH = 1 << 15,
748 ARM_HWCAP2_A64_RNG = 1 << 16,
749 ARM_HWCAP2_A64_BTI = 1 << 17,
750 ARM_HWCAP2_A64_MTE = 1 << 18,
f9982cea
RH		 751 ARM_HWCAP2_A64_ECV = 1 << 19,
752 ARM_HWCAP2_A64_AFP = 1 << 20,
753 ARM_HWCAP2_A64_RPRES = 1 << 21,
754 ARM_HWCAP2_A64_MTE3 = 1 << 22,
755 ARM_HWCAP2_A64_SME = 1 << 23,
756 ARM_HWCAP2_A64_SME_I16I64 = 1 << 24,
757 ARM_HWCAP2_A64_SME_F64F64 = 1 << 25,
758 ARM_HWCAP2_A64_SME_I8I32 = 1 << 26,
759 ARM_HWCAP2_A64_SME_F16F32 = 1 << 27,
760 ARM_HWCAP2_A64_SME_B16F32 = 1 << 28,
761 ARM_HWCAP2_A64_SME_F32F32 = 1 << 29,
762 ARM_HWCAP2_A64_SME_FA64 = 1 << 30,
23d7f14d
PM		 763 ARM_HWCAP2_A64_WFXT = 1ULL << 31,
764 ARM_HWCAP2_A64_EBF16 = 1ULL << 32,
765 ARM_HWCAP2_A64_SVE_EBF16 = 1ULL << 33,
766 ARM_HWCAP2_A64_CSSC = 1ULL << 34,
767 ARM_HWCAP2_A64_RPRFM = 1ULL << 35,
768 ARM_HWCAP2_A64_SVE2P1 = 1ULL << 36,
769 ARM_HWCAP2_A64_SME2 = 1ULL << 37,
770 ARM_HWCAP2_A64_SME2P1 = 1ULL << 38,
771 ARM_HWCAP2_A64_SME_I16I32 = 1ULL << 39,
772 ARM_HWCAP2_A64_SME_BI32I32 = 1ULL << 40,
773 ARM_HWCAP2_A64_SME_B16B16 = 1ULL << 41,
774 ARM_HWCAP2_A64_SME_F16F16 = 1ULL << 42,
775 ARM_HWCAP2_A64_MOPS = 1ULL << 43,
776 ARM_HWCAP2_A64_HBC = 1ULL << 44,
24e76ff0
PM		 777};
778
2041df4a
RH		 779#define ELF_HWCAP get_elf_hwcap()
780#define ELF_HWCAP2 get_elf_hwcap2()
781
782#define GET_FEATURE_ID(feat, hwcap) \
783 do { if (cpu_isar_feature(feat, cpu)) { hwcaps |= hwcap; } } while (0)
24e76ff0 784
a55b9e72 785uint32_t get_elf_hwcap(void)
24e76ff0
PM		 786{
787 ARMCPU *cpu = ARM_CPU(thread_cpu);
788 uint32_t hwcaps = 0;
789
790 hwcaps |= ARM_HWCAP_A64_FP;
791 hwcaps |= ARM_HWCAP_A64_ASIMD;
37020ff1 792 hwcaps |= ARM_HWCAP_A64_CPUID;
24e76ff0
PM		 793
794 /* probe for the extra features */
962fcbf2
RH		 795
796 GET_FEATURE_ID(aa64_aes, ARM_HWCAP_A64_AES);
797 GET_FEATURE_ID(aa64_pmull, ARM_HWCAP_A64_PMULL);
798 GET_FEATURE_ID(aa64_sha1, ARM_HWCAP_A64_SHA1);
799 GET_FEATURE_ID(aa64_sha256, ARM_HWCAP_A64_SHA2);
800 GET_FEATURE_ID(aa64_sha512, ARM_HWCAP_A64_SHA512);
801 GET_FEATURE_ID(aa64_crc32, ARM_HWCAP_A64_CRC32);
802 GET_FEATURE_ID(aa64_sha3, ARM_HWCAP_A64_SHA3);
803 GET_FEATURE_ID(aa64_sm3, ARM_HWCAP_A64_SM3);
804 GET_FEATURE_ID(aa64_sm4, ARM_HWCAP_A64_SM4);
5763190f 805 GET_FEATURE_ID(aa64_fp16, ARM_HWCAP_A64_FPHP | ARM_HWCAP_A64_ASIMDHP);
962fcbf2 806 GET_FEATURE_ID(aa64_atomics, ARM_HWCAP_A64_ATOMICS);
5cfea248 807 GET_FEATURE_ID(aa64_lse2, ARM_HWCAP_A64_USCAT);
962fcbf2
RH		 808 GET_FEATURE_ID(aa64_rdm, ARM_HWCAP_A64_ASIMDRDM);
809 GET_FEATURE_ID(aa64_dp, ARM_HWCAP_A64_ASIMDDP);
810 GET_FEATURE_ID(aa64_fcma, ARM_HWCAP_A64_FCMA);
cd208a1c 811 GET_FEATURE_ID(aa64_sve, ARM_HWCAP_A64_SVE);
29d26ab2 812 GET_FEATURE_ID(aa64_pauth, ARM_HWCAP_A64_PACA | ARM_HWCAP_A64_PACG);
1c9af3a9 813 GET_FEATURE_ID(aa64_fhm, ARM_HWCAP_A64_ASIMDFHM);
5cfea248 814 GET_FEATURE_ID(aa64_dit, ARM_HWCAP_A64_DIT);
1c9af3a9 815 GET_FEATURE_ID(aa64_jscvt, ARM_HWCAP_A64_JSCVT);
9888bd1e 816 GET_FEATURE_ID(aa64_sb, ARM_HWCAP_A64_SB);
b89d9c98 817 GET_FEATURE_ID(aa64_condm_4, ARM_HWCAP_A64_FLAGM);
0d57b499 818 GET_FEATURE_ID(aa64_dcpop, ARM_HWCAP_A64_DCPOP);
2677cf9f 819 GET_FEATURE_ID(aa64_rcpc_8_3, ARM_HWCAP_A64_LRCPC);
a1229109 820 GET_FEATURE_ID(aa64_rcpc_8_4, ARM_HWCAP_A64_ILRCPC);
962fcbf2 821
2041df4a
RH		 822 return hwcaps;
823}
824
63c1b7de 825uint64_t get_elf_hwcap2(void)
2041df4a
RH		 826{
827 ARMCPU *cpu = ARM_CPU(thread_cpu);
63c1b7de 828 uint64_t hwcaps = 0;
2041df4a 829
0d57b499 830 GET_FEATURE_ID(aa64_dcpodp, ARM_HWCAP2_A64_DCPODP);
cdc8d8b2
RH		 831 GET_FEATURE_ID(aa64_sve2, ARM_HWCAP2_A64_SVE2);
832 GET_FEATURE_ID(aa64_sve2_aes, ARM_HWCAP2_A64_SVEAES);
833 GET_FEATURE_ID(aa64_sve2_pmull128, ARM_HWCAP2_A64_SVEPMULL);
834 GET_FEATURE_ID(aa64_sve2_bitperm, ARM_HWCAP2_A64_SVEBITPERM);
835 GET_FEATURE_ID(aa64_sve2_sha3, ARM_HWCAP2_A64_SVESHA3);
836 GET_FEATURE_ID(aa64_sve2_sm4, ARM_HWCAP2_A64_SVESM4);
2041df4a
RH		 837 GET_FEATURE_ID(aa64_condm_5, ARM_HWCAP2_A64_FLAGM2);
838 GET_FEATURE_ID(aa64_frint, ARM_HWCAP2_A64_FRINT);
cdc8d8b2
RH		 839 GET_FEATURE_ID(aa64_sve_i8mm, ARM_HWCAP2_A64_SVEI8MM);
840 GET_FEATURE_ID(aa64_sve_f32mm, ARM_HWCAP2_A64_SVEF32MM);
841 GET_FEATURE_ID(aa64_sve_f64mm, ARM_HWCAP2_A64_SVEF64MM);
6c47a905 842 GET_FEATURE_ID(aa64_sve_bf16, ARM_HWCAP2_A64_SVEBF16);
cdc8d8b2 843 GET_FEATURE_ID(aa64_i8mm, ARM_HWCAP2_A64_I8MM);
6c47a905 844 GET_FEATURE_ID(aa64_bf16, ARM_HWCAP2_A64_BF16);
68948d18
RH		 845 GET_FEATURE_ID(aa64_rndr, ARM_HWCAP2_A64_RNG);
846 GET_FEATURE_ID(aa64_bti, ARM_HWCAP2_A64_BTI);
847 GET_FEATURE_ID(aa64_mte, ARM_HWCAP2_A64_MTE);
5cfea248 848 GET_FEATURE_ID(aa64_mte3, ARM_HWCAP2_A64_MTE3);
f9982cea
RH		 849 GET_FEATURE_ID(aa64_sme, (ARM_HWCAP2_A64_SME |
850 ARM_HWCAP2_A64_SME_F32F32 |
851 ARM_HWCAP2_A64_SME_B16F32 |
852 ARM_HWCAP2_A64_SME_F16F32 |
853 ARM_HWCAP2_A64_SME_I8I32));
854 GET_FEATURE_ID(aa64_sme_f64f64, ARM_HWCAP2_A64_SME_F64F64);
855 GET_FEATURE_ID(aa64_sme_i16i64, ARM_HWCAP2_A64_SME_I16I64);
856 GET_FEATURE_ID(aa64_sme_fa64, ARM_HWCAP2_A64_SME_FA64);
3039b090 857 GET_FEATURE_ID(aa64_hbc, ARM_HWCAP2_A64_HBC);
706a92fb 858 GET_FEATURE_ID(aa64_mops, ARM_HWCAP2_A64_MOPS);
24e76ff0
PM		 859
860 return hwcaps;
861}
862
a55b9e72
HD		 863const char *elf_hwcap_str(uint32_t bit)
864{
865 static const char *hwcap_str[] = {
866 [__builtin_ctz(ARM_HWCAP_A64_FP )] = "fp",
867 [__builtin_ctz(ARM_HWCAP_A64_ASIMD )] = "asimd",
868 [__builtin_ctz(ARM_HWCAP_A64_EVTSTRM )] = "evtstrm",
869 [__builtin_ctz(ARM_HWCAP_A64_AES )] = "aes",
870 [__builtin_ctz(ARM_HWCAP_A64_PMULL )] = "pmull",
871 [__builtin_ctz(ARM_HWCAP_A64_SHA1 )] = "sha1",
872 [__builtin_ctz(ARM_HWCAP_A64_SHA2 )] = "sha2",
873 [__builtin_ctz(ARM_HWCAP_A64_CRC32 )] = "crc32",
874 [__builtin_ctz(ARM_HWCAP_A64_ATOMICS )] = "atomics",
875 [__builtin_ctz(ARM_HWCAP_A64_FPHP )] = "fphp",
876 [__builtin_ctz(ARM_HWCAP_A64_ASIMDHP )] = "asimdhp",
877 [__builtin_ctz(ARM_HWCAP_A64_CPUID )] = "cpuid",
878 [__builtin_ctz(ARM_HWCAP_A64_ASIMDRDM)] = "asimdrdm",
879 [__builtin_ctz(ARM_HWCAP_A64_JSCVT )] = "jscvt",
880 [__builtin_ctz(ARM_HWCAP_A64_FCMA )] = "fcma",
881 [__builtin_ctz(ARM_HWCAP_A64_LRCPC )] = "lrcpc",
882 [__builtin_ctz(ARM_HWCAP_A64_DCPOP )] = "dcpop",
883 [__builtin_ctz(ARM_HWCAP_A64_SHA3 )] = "sha3",
884 [__builtin_ctz(ARM_HWCAP_A64_SM3 )] = "sm3",
885 [__builtin_ctz(ARM_HWCAP_A64_SM4 )] = "sm4",
886 [__builtin_ctz(ARM_HWCAP_A64_ASIMDDP )] = "asimddp",
887 [__builtin_ctz(ARM_HWCAP_A64_SHA512 )] = "sha512",
888 [__builtin_ctz(ARM_HWCAP_A64_SVE )] = "sve",
889 [__builtin_ctz(ARM_HWCAP_A64_ASIMDFHM)] = "asimdfhm",
890 [__builtin_ctz(ARM_HWCAP_A64_DIT )] = "dit",
891 [__builtin_ctz(ARM_HWCAP_A64_USCAT )] = "uscat",
892 [__builtin_ctz(ARM_HWCAP_A64_ILRCPC )] = "ilrcpc",
893 [__builtin_ctz(ARM_HWCAP_A64_FLAGM )] = "flagm",
894 [__builtin_ctz(ARM_HWCAP_A64_SSBS )] = "ssbs",
895 [__builtin_ctz(ARM_HWCAP_A64_SB )] = "sb",
896 [__builtin_ctz(ARM_HWCAP_A64_PACA )] = "paca",
897 [__builtin_ctz(ARM_HWCAP_A64_PACG )] = "pacg",
898 };
899
900 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
901}
902
903const char *elf_hwcap2_str(uint32_t bit)
904{
905 static const char *hwcap_str[] = {
906 [__builtin_ctz(ARM_HWCAP2_A64_DCPODP )] = "dcpodp",
907 [__builtin_ctz(ARM_HWCAP2_A64_SVE2 )] = "sve2",
908 [__builtin_ctz(ARM_HWCAP2_A64_SVEAES )] = "sveaes",
909 [__builtin_ctz(ARM_HWCAP2_A64_SVEPMULL )] = "svepmull",
910 [__builtin_ctz(ARM_HWCAP2_A64_SVEBITPERM )] = "svebitperm",
911 [__builtin_ctz(ARM_HWCAP2_A64_SVESHA3 )] = "svesha3",
912 [__builtin_ctz(ARM_HWCAP2_A64_SVESM4 )] = "svesm4",
913 [__builtin_ctz(ARM_HWCAP2_A64_FLAGM2 )] = "flagm2",
914 [__builtin_ctz(ARM_HWCAP2_A64_FRINT )] = "frint",
915 [__builtin_ctz(ARM_HWCAP2_A64_SVEI8MM )] = "svei8mm",
916 [__builtin_ctz(ARM_HWCAP2_A64_SVEF32MM )] = "svef32mm",
917 [__builtin_ctz(ARM_HWCAP2_A64_SVEF64MM )] = "svef64mm",
918 [__builtin_ctz(ARM_HWCAP2_A64_SVEBF16 )] = "svebf16",
919 [__builtin_ctz(ARM_HWCAP2_A64_I8MM )] = "i8mm",
920 [__builtin_ctz(ARM_HWCAP2_A64_BF16 )] = "bf16",
921 [__builtin_ctz(ARM_HWCAP2_A64_DGH )] = "dgh",
922 [__builtin_ctz(ARM_HWCAP2_A64_RNG )] = "rng",
923 [__builtin_ctz(ARM_HWCAP2_A64_BTI )] = "bti",
924 [__builtin_ctz(ARM_HWCAP2_A64_MTE )] = "mte",
925 [__builtin_ctz(ARM_HWCAP2_A64_ECV )] = "ecv",
926 [__builtin_ctz(ARM_HWCAP2_A64_AFP )] = "afp",
927 [__builtin_ctz(ARM_HWCAP2_A64_RPRES )] = "rpres",
928 [__builtin_ctz(ARM_HWCAP2_A64_MTE3 )] = "mte3",
929 [__builtin_ctz(ARM_HWCAP2_A64_SME )] = "sme",
e2e40a77
PM		 930 [__builtin_ctz(ARM_HWCAP2_A64_SME_I16I64 )] = "smei16i64",
931 [__builtin_ctz(ARM_HWCAP2_A64_SME_F64F64 )] = "smef64f64",
932 [__builtin_ctz(ARM_HWCAP2_A64_SME_I8I32 )] = "smei8i32",
933 [__builtin_ctz(ARM_HWCAP2_A64_SME_F16F32 )] = "smef16f32",
934 [__builtin_ctz(ARM_HWCAP2_A64_SME_B16F32 )] = "smeb16f32",
935 [__builtin_ctz(ARM_HWCAP2_A64_SME_F32F32 )] = "smef32f32",
936 [__builtin_ctz(ARM_HWCAP2_A64_SME_FA64 )] = "smefa64",
23d7f14d
PM		 937 [__builtin_ctz(ARM_HWCAP2_A64_WFXT )] = "wfxt",
938 [__builtin_ctzll(ARM_HWCAP2_A64_EBF16 )] = "ebf16",
939 [__builtin_ctzll(ARM_HWCAP2_A64_SVE_EBF16 )] = "sveebf16",
940 [__builtin_ctzll(ARM_HWCAP2_A64_CSSC )] = "cssc",
941 [__builtin_ctzll(ARM_HWCAP2_A64_RPRFM )] = "rprfm",
942 [__builtin_ctzll(ARM_HWCAP2_A64_SVE2P1 )] = "sve2p1",
943 [__builtin_ctzll(ARM_HWCAP2_A64_SME2 )] = "sme2",
944 [__builtin_ctzll(ARM_HWCAP2_A64_SME2P1 )] = "sme2p1",
945 [__builtin_ctzll(ARM_HWCAP2_A64_SME_I16I32 )] = "smei16i32",
946 [__builtin_ctzll(ARM_HWCAP2_A64_SME_BI32I32)] = "smebi32i32",
947 [__builtin_ctzll(ARM_HWCAP2_A64_SME_B16B16 )] = "smeb16b16",
948 [__builtin_ctzll(ARM_HWCAP2_A64_SME_F16F16 )] = "smef16f16",
949 [__builtin_ctzll(ARM_HWCAP2_A64_MOPS )] = "mops",
950 [__builtin_ctzll(ARM_HWCAP2_A64_HBC )] = "hbc",
a55b9e72
HD		 951 };
952
953 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
954}
955
2041df4a
RH		 956#undef GET_FEATURE_ID
957
24e76ff0 958#endif /* not TARGET_AARCH64 */
a9f495b9 959
ee95fae0
RH		 960#if TARGET_BIG_ENDIAN
961# define VDSO_HEADER "vdso-be.c.inc"
962#else
963# define VDSO_HEADER "vdso-le.c.inc"
964#endif
965
24e76ff0 966#endif /* TARGET_ARM */
30ac07d4 967
853d6f7a 968#ifdef TARGET_SPARC
a315a145 969#ifdef TARGET_SPARC64
853d6f7a 970
cf973e46
AT		 971#define ELF_HWCAP (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | HWCAP_SPARC_SWAP \
972 | HWCAP_SPARC_MULDIV | HWCAP_SPARC_V9)
992f48a0 973#ifndef TARGET_ABI32
cb33da57 974#define elf_check_arch(x) ( (x) == EM_SPARCV9 || (x) == EM_SPARC32PLUS )
992f48a0
BS		 975#else
976#define elf_check_arch(x) ( (x) == EM_SPARC32PLUS || (x) == EM_SPARC )
977#endif
853d6f7a 978
a315a145 979#define ELF_CLASS ELFCLASS64
5ef54116 980#define ELF_ARCH EM_SPARCV9
a315a145 981#else
cf973e46
AT		 982#define ELF_HWCAP (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | HWCAP_SPARC_SWAP \
983 | HWCAP_SPARC_MULDIV)
853d6f7a 984#define ELF_CLASS ELFCLASS32
853d6f7a 985#define ELF_ARCH EM_SPARC
089a2256 986#endif /* TARGET_SPARC64 */
853d6f7a 987
d97ef72e
RH		 988static inline void init_thread(struct target_pt_regs *regs,
989 struct image_info *infop)
853d6f7a 990{
089a2256 991 /* Note that target_cpu_copy_regs does not read psr/tstate. */
f5155289
FB		 992 regs->pc = infop->entry;
993 regs->npc = regs->pc + 4;
994 regs->y = 0;
089a2256
RH		 995 regs->u_regs[14] = (infop->start_stack - 16 * sizeof(abi_ulong)
996 - TARGET_STACK_BIAS);
853d6f7a 997}
089a2256 998#endif /* TARGET_SPARC */
853d6f7a 999
67867308
FB		 1000#ifdef TARGET_PPC
1001
4ecd4d16 1002#define ELF_MACHINE PPC_ELF_MACHINE
67867308 1003
74154d7e 1004#if defined(TARGET_PPC64)
84409ddb
JM		 1005
1006#define elf_check_arch(x) ( (x) == EM_PPC64 )
1007
d97ef72e 1008#define ELF_CLASS ELFCLASS64
84409ddb
JM		 1009
1010#else
1011
d97ef72e 1012#define ELF_CLASS ELFCLASS32
872f3d04 1013#define EXSTACK_DEFAULT true
84409ddb
JM		 1014
1015#endif
1016
d97ef72e 1017#define ELF_ARCH EM_PPC
67867308 1018
df84e4f3
NF		 1019/* Feature masks for the Aux Vector Hardware Capabilities (AT_HWCAP).
1020 See arch/powerpc/include/asm/cputable.h. */
1021enum {
3efa9a67 1022 QEMU_PPC_FEATURE_32 = 0x80000000,
1023 QEMU_PPC_FEATURE_64 = 0x40000000,
1024 QEMU_PPC_FEATURE_601_INSTR = 0x20000000,
1025 QEMU_PPC_FEATURE_HAS_ALTIVEC = 0x10000000,
1026 QEMU_PPC_FEATURE_HAS_FPU = 0x08000000,
1027 QEMU_PPC_FEATURE_HAS_MMU = 0x04000000,
1028 QEMU_PPC_FEATURE_HAS_4xxMAC = 0x02000000,
1029 QEMU_PPC_FEATURE_UNIFIED_CACHE = 0x01000000,
1030 QEMU_PPC_FEATURE_HAS_SPE = 0x00800000,
1031 QEMU_PPC_FEATURE_HAS_EFP_SINGLE = 0x00400000,
1032 QEMU_PPC_FEATURE_HAS_EFP_DOUBLE = 0x00200000,
1033 QEMU_PPC_FEATURE_NO_TB = 0x00100000,
1034 QEMU_PPC_FEATURE_POWER4 = 0x00080000,
1035 QEMU_PPC_FEATURE_POWER5 = 0x00040000,
1036 QEMU_PPC_FEATURE_POWER5_PLUS = 0x00020000,
1037 QEMU_PPC_FEATURE_CELL = 0x00010000,
1038 QEMU_PPC_FEATURE_BOOKE = 0x00008000,
1039 QEMU_PPC_FEATURE_SMT = 0x00004000,
1040 QEMU_PPC_FEATURE_ICACHE_SNOOP = 0x00002000,
1041 QEMU_PPC_FEATURE_ARCH_2_05 = 0x00001000,
1042 QEMU_PPC_FEATURE_PA6T = 0x00000800,
1043 QEMU_PPC_FEATURE_HAS_DFP = 0x00000400,
1044 QEMU_PPC_FEATURE_POWER6_EXT = 0x00000200,
1045 QEMU_PPC_FEATURE_ARCH_2_06 = 0x00000100,
1046 QEMU_PPC_FEATURE_HAS_VSX = 0x00000080,
1047 QEMU_PPC_FEATURE_PSERIES_PERFMON_COMPAT = 0x00000040,
1048
1049 QEMU_PPC_FEATURE_TRUE_LE = 0x00000002,
1050 QEMU_PPC_FEATURE_PPC_LE = 0x00000001,
a60438dd
TM		 1051
1052 /* Feature definitions in AT_HWCAP2. */
1053 QEMU_PPC_FEATURE2_ARCH_2_07 = 0x80000000, /* ISA 2.07 */
1054 QEMU_PPC_FEATURE2_HAS_HTM = 0x40000000, /* Hardware Transactional Memory */
1055 QEMU_PPC_FEATURE2_HAS_DSCR = 0x20000000, /* Data Stream Control Register */
1056 QEMU_PPC_FEATURE2_HAS_EBB = 0x10000000, /* Event Base Branching */
1057 QEMU_PPC_FEATURE2_HAS_ISEL = 0x08000000, /* Integer Select */
1058 QEMU_PPC_FEATURE2_HAS_TAR = 0x04000000, /* Target Address Register */
24c373ec
LV		 1059 QEMU_PPC_FEATURE2_VEC_CRYPTO = 0x02000000,
1060 QEMU_PPC_FEATURE2_HTM_NOSC = 0x01000000,
be0c46d4 1061 QEMU_PPC_FEATURE2_ARCH_3_00 = 0x00800000, /* ISA 3.00 */
24c373ec
LV		 1062 QEMU_PPC_FEATURE2_HAS_IEEE128 = 0x00400000, /* VSX IEEE Bin Float 128-bit */
1063 QEMU_PPC_FEATURE2_DARN = 0x00200000, /* darn random number insn */
1064 QEMU_PPC_FEATURE2_SCV = 0x00100000, /* scv syscall */
1065 QEMU_PPC_FEATURE2_HTM_NO_SUSPEND = 0x00080000, /* TM w/o suspended state */
96c343cc
JS		 1066 QEMU_PPC_FEATURE2_ARCH_3_1 = 0x00040000, /* ISA 3.1 */
1067 QEMU_PPC_FEATURE2_MMA = 0x00020000, /* Matrix-Multiply Assist */
df84e4f3
NF		 1068};
1069
1070#define ELF_HWCAP get_elf_hwcap()
1071
1072static uint32_t get_elf_hwcap(void)
1073{
a2247f8e 1074 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
df84e4f3
NF		 1075 uint32_t features = 0;
1076
1077 /* We don't have to be terribly complete here; the high points are
1078 Altivec/FP/SPE support. Anything else is just a bonus. */
d97ef72e 1079#define GET_FEATURE(flag, feature) \
a2247f8e 1080 do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
58eb5308
MW		 1081#define GET_FEATURE2(flags, feature) \
1082 do { \
1083 if ((cpu->env.insns_flags2 & flags) == flags) { \
1084 features |= feature; \
1085 } \
1086 } while (0)
3efa9a67 1087 GET_FEATURE(PPC_64B, QEMU_PPC_FEATURE_64);
1088 GET_FEATURE(PPC_FLOAT, QEMU_PPC_FEATURE_HAS_FPU);
1089 GET_FEATURE(PPC_ALTIVEC, QEMU_PPC_FEATURE_HAS_ALTIVEC);
1090 GET_FEATURE(PPC_SPE, QEMU_PPC_FEATURE_HAS_SPE);
1091 GET_FEATURE(PPC_SPE_SINGLE, QEMU_PPC_FEATURE_HAS_EFP_SINGLE);
1092 GET_FEATURE(PPC_SPE_DOUBLE, QEMU_PPC_FEATURE_HAS_EFP_DOUBLE);
1093 GET_FEATURE(PPC_BOOKE, QEMU_PPC_FEATURE_BOOKE);
1094 GET_FEATURE(PPC_405_MAC, QEMU_PPC_FEATURE_HAS_4xxMAC);
0e019746
TM		 1095 GET_FEATURE2(PPC2_DFP, QEMU_PPC_FEATURE_HAS_DFP);
1096 GET_FEATURE2(PPC2_VSX, QEMU_PPC_FEATURE_HAS_VSX);
1097 GET_FEATURE2((PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 |
1098 PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206),
1099 QEMU_PPC_FEATURE_ARCH_2_06);
df84e4f3 1100#undef GET_FEATURE
0e019746 1101#undef GET_FEATURE2
df84e4f3
NF		 1102
1103 return features;
1104}
1105
a60438dd
TM		 1106#define ELF_HWCAP2 get_elf_hwcap2()
1107
1108static uint32_t get_elf_hwcap2(void)
1109{
1110 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu);
1111 uint32_t features = 0;
1112
1113#define GET_FEATURE(flag, feature) \
1114 do { if (cpu->env.insns_flags & flag) { features |= feature; } } while (0)
1115#define GET_FEATURE2(flag, feature) \
1116 do { if (cpu->env.insns_flags2 & flag) { features |= feature; } } while (0)
1117
1118 GET_FEATURE(PPC_ISEL, QEMU_PPC_FEATURE2_HAS_ISEL);
1119 GET_FEATURE2(PPC2_BCTAR_ISA207, QEMU_PPC_FEATURE2_HAS_TAR);
1120 GET_FEATURE2((PPC2_BCTAR_ISA207 | PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207 |
24c373ec
LV		 1121 PPC2_ISA207S), QEMU_PPC_FEATURE2_ARCH_2_07 |
1122 QEMU_PPC_FEATURE2_VEC_CRYPTO);
1123 GET_FEATURE2(PPC2_ISA300, QEMU_PPC_FEATURE2_ARCH_3_00 |
8a589aeb 1124 QEMU_PPC_FEATURE2_DARN | QEMU_PPC_FEATURE2_HAS_IEEE128);
96c343cc
JS		 1125 GET_FEATURE2(PPC2_ISA310, QEMU_PPC_FEATURE2_ARCH_3_1 |
1126 QEMU_PPC_FEATURE2_MMA);
a60438dd
TM		 1127
1128#undef GET_FEATURE
1129#undef GET_FEATURE2
1130
1131 return features;
1132}
1133
f5155289
FB		 1134/*
1135 * The requirements here are:
1136 * - keep the final alignment of sp (sp & 0xf)
1137 * - make sure the 32-bit value at the first 16 byte aligned position of
1138 * AUXV is greater than 16 for glibc compatibility.
1139 * AT_IGNOREPPC is used for that.
1140 * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
1141 * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
1142 */
0bccf03d 1143#define DLINFO_ARCH_ITEMS 5
d97ef72e
RH		 1144#define ARCH_DLINFO \
1145 do { \
623e250a 1146 PowerPCCPU *cpu = POWERPC_CPU(thread_cpu); \
d97ef72e 1147 /* \
82991bed
PM		 1148 * Handle glibc compatibility: these magic entries must \
1149 * be at the lowest addresses in the final auxv. \
d97ef72e
RH		 1150 */ \
1151 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
1152 NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
82991bed
PM		 1153 NEW_AUX_ENT(AT_DCACHEBSIZE, cpu->env.dcache_line_size); \
1154 NEW_AUX_ENT(AT_ICACHEBSIZE, cpu->env.icache_line_size); \
1155 NEW_AUX_ENT(AT_UCACHEBSIZE, 0); \
d97ef72e 1156 } while (0)
f5155289 1157
67867308
FB		 1158static inline void init_thread(struct target_pt_regs *_regs, struct image_info *infop)
1159{
67867308 1160 _regs->gpr[1] = infop->start_stack;
74154d7e 1161#if defined(TARGET_PPC64)
d90b94cd 1162 if (get_ppc64_abi(infop) < 2) {
2ccf97ec
PM		 1163 uint64_t val;
1164 get_user_u64(val, infop->entry + 8);
1165 _regs->gpr[2] = val + infop->load_bias;
1166 get_user_u64(val, infop->entry);
1167 infop->entry = val + infop->load_bias;
d90b94cd
DK		 1168 } else {
1169 _regs->gpr[12] = infop->entry; /* r12 set to global entry address */
1170 }
84409ddb 1171#endif
67867308
FB		 1172 _regs->nip = infop->entry;
1173}
1174
e2f3e741
NF		 1175/* See linux kernel: arch/powerpc/include/asm/elf.h. */
1176#define ELF_NREG 48
1177typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1178
05390248 1179static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUPPCState *env)
e2f3e741
NF		 1180{
1181 int i;
1182 target_ulong ccr = 0;
1183
1184 for (i = 0; i < ARRAY_SIZE(env->gpr); i++) {
86cd7b2d 1185 (*regs)[i] = tswapreg(env->gpr[i]);
e2f3e741
NF		 1186 }
1187
86cd7b2d
PB		 1188 (*regs)[32] = tswapreg(env->nip);
1189 (*regs)[33] = tswapreg(env->msr);
1190 (*regs)[35] = tswapreg(env->ctr);
1191 (*regs)[36] = tswapreg(env->lr);
10de0521 1192 (*regs)[37] = tswapreg(cpu_read_xer(env));
e2f3e741 1193
2060436a 1194 ccr = ppc_get_cr(env);
86cd7b2d 1195 (*regs)[38] = tswapreg(ccr);
e2f3e741
NF		 1196}
1197
1198#define USE_ELF_CORE_DUMP
d97ef72e 1199#define ELF_EXEC_PAGESIZE 4096
67867308 1200
e34136d9
RH		 1201#ifndef TARGET_PPC64
1202# define VDSO_HEADER "vdso-32.c.inc"
1203#elif TARGET_BIG_ENDIAN
1204# define VDSO_HEADER "vdso-64.c.inc"
1205#else
1206# define VDSO_HEADER "vdso-64le.c.inc"
1207#endif
1208
67867308
FB		 1209#endif
1210
3418fe25
SG		 1211#ifdef TARGET_LOONGARCH64
1212
3418fe25
SG		 1213#define ELF_CLASS ELFCLASS64
1214#define ELF_ARCH EM_LOONGARCH
872f3d04 1215#define EXSTACK_DEFAULT true
3418fe25
SG		 1216
1217#define elf_check_arch(x) ((x) == EM_LOONGARCH)
1218
00cc2934
RH		 1219#define VDSO_HEADER "vdso.c.inc"
1220
3418fe25
SG		 1221static inline void init_thread(struct target_pt_regs *regs,
1222 struct image_info *infop)
1223{
1224 /*Set crmd PG,DA = 1,0 */
1225 regs->csr.crmd = 2 << 3;
1226 regs->csr.era = infop->entry;
1227 regs->regs[3] = infop->start_stack;
1228}
1229
1230/* See linux kernel: arch/loongarch/include/asm/elf.h */
1231#define ELF_NREG 45
1232typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1233
1234enum {
1235 TARGET_EF_R0 = 0,
1236 TARGET_EF_CSR_ERA = TARGET_EF_R0 + 33,
1237 TARGET_EF_CSR_BADV = TARGET_EF_R0 + 34,
1238};
1239
1240static void elf_core_copy_regs(target_elf_gregset_t *regs,
1241 const CPULoongArchState *env)
1242{
1243 int i;
1244
1245 (*regs)[TARGET_EF_R0] = 0;
1246
1247 for (i = 1; i < ARRAY_SIZE(env->gpr); i++) {
1248 (*regs)[TARGET_EF_R0 + i] = tswapreg(env->gpr[i]);
1249 }
1250
1251 (*regs)[TARGET_EF_CSR_ERA] = tswapreg(env->pc);
1252 (*regs)[TARGET_EF_CSR_BADV] = tswapreg(env->CSR_BADV);
1253}
1254
1255#define USE_ELF_CORE_DUMP
1256#define ELF_EXEC_PAGESIZE 4096
1257
1258#define ELF_HWCAP get_elf_hwcap()
1259
1260/* See arch/loongarch/include/uapi/asm/hwcap.h */
1261enum {
1262 HWCAP_LOONGARCH_CPUCFG = (1 << 0),
1263 HWCAP_LOONGARCH_LAM = (1 << 1),
1264 HWCAP_LOONGARCH_UAL = (1 << 2),
1265 HWCAP_LOONGARCH_FPU = (1 << 3),
1266 HWCAP_LOONGARCH_LSX = (1 << 4),
1267 HWCAP_LOONGARCH_LASX = (1 << 5),
1268 HWCAP_LOONGARCH_CRC32 = (1 << 6),
1269 HWCAP_LOONGARCH_COMPLEX = (1 << 7),
1270 HWCAP_LOONGARCH_CRYPTO = (1 << 8),
1271 HWCAP_LOONGARCH_LVZ = (1 << 9),
1272 HWCAP_LOONGARCH_LBT_X86 = (1 << 10),
1273 HWCAP_LOONGARCH_LBT_ARM = (1 << 11),
1274 HWCAP_LOONGARCH_LBT_MIPS = (1 << 12),
1275};
1276
1277static uint32_t get_elf_hwcap(void)
1278{
1279 LoongArchCPU *cpu = LOONGARCH_CPU(thread_cpu);
1280 uint32_t hwcaps = 0;
1281
1282 hwcaps |= HWCAP_LOONGARCH_CRC32;
1283
1284 if (FIELD_EX32(cpu->env.cpucfg[1], CPUCFG1, UAL)) {
1285 hwcaps |= HWCAP_LOONGARCH_UAL;
1286 }
1287
1288 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, FP)) {
1289 hwcaps |= HWCAP_LOONGARCH_FPU;
1290 }
1291
1292 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LAM)) {
1293 hwcaps |= HWCAP_LOONGARCH_LAM;
1294 }
1295
a9f6004f
JC		 1296 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LSX)) {
1297 hwcaps |= HWCAP_LOONGARCH_LSX;
1298 }
1299
1300 if (FIELD_EX32(cpu->env.cpucfg[2], CPUCFG2, LASX)) {
1301 hwcaps |= HWCAP_LOONGARCH_LASX;
1302 }
1303
3418fe25
SG		 1304 return hwcaps;
1305}
1306
1307#define ELF_PLATFORM "loongarch"
1308
1309#endif /* TARGET_LOONGARCH64 */
1310
048f6b4d
FB		 1311#ifdef TARGET_MIPS
1312
388bb21a
TS		 1313#ifdef TARGET_MIPS64
1314#define ELF_CLASS ELFCLASS64
1315#else
048f6b4d 1316#define ELF_CLASS ELFCLASS32
388bb21a 1317#endif
048f6b4d 1318#define ELF_ARCH EM_MIPS
872f3d04 1319#define EXSTACK_DEFAULT true
048f6b4d 1320
ace3d654
CMAB		 1321#ifdef TARGET_ABI_MIPSN32
1322#define elf_check_abi(x) ((x) & EF_MIPS_ABI2)
1323#else
1324#define elf_check_abi(x) (!((x) & EF_MIPS_ABI2))
1325#endif
1326
fbf47c18
JY		 1327#define ELF_BASE_PLATFORM get_elf_base_platform()
1328
1329#define MATCH_PLATFORM_INSN(_flags, _base_platform) \
1330 do { if ((cpu->env.insn_flags & (_flags)) == _flags) \
1331 { return _base_platform; } } while (0)
1332
1333static const char *get_elf_base_platform(void)
1334{
1335 MIPSCPU *cpu = MIPS_CPU(thread_cpu);
1336
1337 /* 64 bit ISAs goes first */
1338 MATCH_PLATFORM_INSN(CPU_MIPS64R6, "mips64r6");
1339 MATCH_PLATFORM_INSN(CPU_MIPS64R5, "mips64r5");
1340 MATCH_PLATFORM_INSN(CPU_MIPS64R2, "mips64r2");
1341 MATCH_PLATFORM_INSN(CPU_MIPS64R1, "mips64");
1342 MATCH_PLATFORM_INSN(CPU_MIPS5, "mips5");
1343 MATCH_PLATFORM_INSN(CPU_MIPS4, "mips4");
1344 MATCH_PLATFORM_INSN(CPU_MIPS3, "mips3");
1345
1346 /* 32 bit ISAs */
1347 MATCH_PLATFORM_INSN(CPU_MIPS32R6, "mips32r6");
1348 MATCH_PLATFORM_INSN(CPU_MIPS32R5, "mips32r5");
1349 MATCH_PLATFORM_INSN(CPU_MIPS32R2, "mips32r2");
1350 MATCH_PLATFORM_INSN(CPU_MIPS32R1, "mips32");
1351 MATCH_PLATFORM_INSN(CPU_MIPS2, "mips2");
1352
1353 /* Fallback */
1354 return "mips";
1355}
1356#undef MATCH_PLATFORM_INSN
1357
d97ef72e
RH		 1358static inline void init_thread(struct target_pt_regs *regs,
1359 struct image_info *infop)
048f6b4d 1360{
623a930e 1361 regs->cp0_status = 2 << CP0St_KSU;
048f6b4d
FB		 1362 regs->cp0_epc = infop->entry;
1363 regs->regs[29] = infop->start_stack;
1364}
1365
51e52606
NF		 1366/* See linux kernel: arch/mips/include/asm/elf.h. */
1367#define ELF_NREG 45
1368typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1369
1370/* See linux kernel: arch/mips/include/asm/reg.h. */
1371enum {
1372#ifdef TARGET_MIPS64
1373 TARGET_EF_R0 = 0,
1374#else
1375 TARGET_EF_R0 = 6,
1376#endif
1377 TARGET_EF_R26 = TARGET_EF_R0 + 26,
1378 TARGET_EF_R27 = TARGET_EF_R0 + 27,
1379 TARGET_EF_LO = TARGET_EF_R0 + 32,
1380 TARGET_EF_HI = TARGET_EF_R0 + 33,
1381 TARGET_EF_CP0_EPC = TARGET_EF_R0 + 34,
1382 TARGET_EF_CP0_BADVADDR = TARGET_EF_R0 + 35,
1383 TARGET_EF_CP0_STATUS = TARGET_EF_R0 + 36,
1384 TARGET_EF_CP0_CAUSE = TARGET_EF_R0 + 37
1385};
1386
1387/* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
05390248 1388static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMIPSState *env)
51e52606
NF		 1389{
1390 int i;
1391
1392 for (i = 0; i < TARGET_EF_R0; i++) {
1393 (*regs)[i] = 0;
1394 }
1395 (*regs)[TARGET_EF_R0] = 0;
1396
1397 for (i = 1; i < ARRAY_SIZE(env->active_tc.gpr); i++) {
a29f998d 1398 (*regs)[TARGET_EF_R0 + i] = tswapreg(env->active_tc.gpr[i]);
51e52606
NF		 1399 }
1400
1401 (*regs)[TARGET_EF_R26] = 0;
1402 (*regs)[TARGET_EF_R27] = 0;
a29f998d
PB		 1403 (*regs)[TARGET_EF_LO] = tswapreg(env->active_tc.LO[0]);
1404 (*regs)[TARGET_EF_HI] = tswapreg(env->active_tc.HI[0]);
1405 (*regs)[TARGET_EF_CP0_EPC] = tswapreg(env->active_tc.PC);
1406 (*regs)[TARGET_EF_CP0_BADVADDR] = tswapreg(env->CP0_BadVAddr);
1407 (*regs)[TARGET_EF_CP0_STATUS] = tswapreg(env->CP0_Status);
1408 (*regs)[TARGET_EF_CP0_CAUSE] = tswapreg(env->CP0_Cause);
51e52606
NF		 1409}
1410
1411#define USE_ELF_CORE_DUMP
388bb21a
TS		 1412#define ELF_EXEC_PAGESIZE 4096
1413
46a1ee4f
JC		 1414/* See arch/mips/include/uapi/asm/hwcap.h. */
1415enum {
1416 HWCAP_MIPS_R6 = (1 << 0),
1417 HWCAP_MIPS_MSA = (1 << 1),
9ea313ba
PMD		 1418 HWCAP_MIPS_CRC32 = (1 << 2),
1419 HWCAP_MIPS_MIPS16 = (1 << 3),
1420 HWCAP_MIPS_MDMX = (1 << 4),
1421 HWCAP_MIPS_MIPS3D = (1 << 5),
1422 HWCAP_MIPS_SMARTMIPS = (1 << 6),
1423 HWCAP_MIPS_DSP = (1 << 7),
1424 HWCAP_MIPS_DSP2 = (1 << 8),
1425 HWCAP_MIPS_DSP3 = (1 << 9),
1426 HWCAP_MIPS_MIPS16E2 = (1 << 10),
1427 HWCAP_LOONGSON_MMI = (1 << 11),
1428 HWCAP_LOONGSON_EXT = (1 << 12),
1429 HWCAP_LOONGSON_EXT2 = (1 << 13),
1430 HWCAP_LOONGSON_CPUCFG = (1 << 14),
46a1ee4f
JC		 1431};
1432
1433#define ELF_HWCAP get_elf_hwcap()
1434
7d9a3d96 1435#define GET_FEATURE_INSN(_flag, _hwcap) \
6dd97bfc
PMD		 1436 do { if (cpu->env.insn_flags & (_flag)) { hwcaps |= _hwcap; } } while (0)
1437
388765a0
PMD		 1438#define GET_FEATURE_REG_SET(_reg, _mask, _hwcap) \
1439 do { if (cpu->env._reg & (_mask)) { hwcaps |= _hwcap; } } while (0)
1440
ce543844
PMD		 1441#define GET_FEATURE_REG_EQU(_reg, _start, _length, _val, _hwcap) \
1442 do { \
1443 if (extract32(cpu->env._reg, (_start), (_length)) == (_val)) { \
1444 hwcaps |= _hwcap; \
1445 } \
1446 } while (0)
1447
46a1ee4f
JC		 1448static uint32_t get_elf_hwcap(void)
1449{
1450 MIPSCPU *cpu = MIPS_CPU(thread_cpu);
1451 uint32_t hwcaps = 0;
1452
ce543844
PMD		 1453 GET_FEATURE_REG_EQU(CP0_Config0, CP0C0_AR, CP0C0_AR_LENGTH,
1454 2, HWCAP_MIPS_R6);
388765a0 1455 GET_FEATURE_REG_SET(CP0_Config3, 1 << CP0C3_MSAP, HWCAP_MIPS_MSA);
53673d0f
PMD		 1456 GET_FEATURE_INSN(ASE_LMMI, HWCAP_LOONGSON_MMI);
1457 GET_FEATURE_INSN(ASE_LEXT, HWCAP_LOONGSON_EXT);
46a1ee4f 1458
46a1ee4f
JC		 1459 return hwcaps;
1460}
1461
ce543844 1462#undef GET_FEATURE_REG_EQU
388765a0 1463#undef GET_FEATURE_REG_SET
7d9a3d96 1464#undef GET_FEATURE_INSN
6dd97bfc 1465
048f6b4d
FB		 1466#endif /* TARGET_MIPS */
1467
b779e29e
EI		 1468#ifdef TARGET_MICROBLAZE
1469
0d5d4699 1470#define elf_check_arch(x) ( (x) == EM_MICROBLAZE || (x) == EM_MICROBLAZE_OLD)
b779e29e
EI		 1471
1472#define ELF_CLASS ELFCLASS32
0d5d4699 1473#define ELF_ARCH EM_MICROBLAZE
b779e29e 1474
d97ef72e
RH		 1475static inline void init_thread(struct target_pt_regs *regs,
1476 struct image_info *infop)
b779e29e
EI		 1477{
1478 regs->pc = infop->entry;
1479 regs->r1 = infop->start_stack;
1480
1481}
1482
b779e29e
EI		 1483#define ELF_EXEC_PAGESIZE 4096
1484
e4cbd44d
EI		 1485#define USE_ELF_CORE_DUMP
1486#define ELF_NREG 38
1487typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1488
1489/* See linux kernel: arch/mips/kernel/process.c:elf_dump_regs. */
05390248 1490static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMBState *env)
e4cbd44d
EI		 1491{
1492 int i, pos = 0;
1493
1494 for (i = 0; i < 32; i++) {
86cd7b2d 1495 (*regs)[pos++] = tswapreg(env->regs[i]);
e4cbd44d
EI		 1496 }
1497
af20a93a 1498 (*regs)[pos++] = tswapreg(env->pc);
1074c0fb 1499 (*regs)[pos++] = tswapreg(mb_cpu_read_msr(env));
af20a93a
RH		 1500 (*regs)[pos++] = 0;
1501 (*regs)[pos++] = tswapreg(env->ear);
1502 (*regs)[pos++] = 0;
1503 (*regs)[pos++] = tswapreg(env->esr);
e4cbd44d
EI		 1504}
1505
b779e29e
EI		 1506#endif /* TARGET_MICROBLAZE */
1507
d962783e
JL		 1508#ifdef TARGET_OPENRISC
1509
d962783e
JL		 1510#define ELF_ARCH EM_OPENRISC
1511#define ELF_CLASS ELFCLASS32
1512#define ELF_DATA ELFDATA2MSB
1513
1514static inline void init_thread(struct target_pt_regs *regs,
1515 struct image_info *infop)
1516{
1517 regs->pc = infop->entry;
1518 regs->gpr[1] = infop->start_stack;
1519}
1520
1521#define USE_ELF_CORE_DUMP
1522#define ELF_EXEC_PAGESIZE 8192
1523
1524/* See linux kernel arch/openrisc/include/asm/elf.h. */
1525#define ELF_NREG 34 /* gprs and pc, sr */
1526typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1527
1528static void elf_core_copy_regs(target_elf_gregset_t *regs,
1529 const CPUOpenRISCState *env)
1530{
1531 int i;
1532
1533 for (i = 0; i < 32; i++) {
d89e71e8 1534 (*regs)[i] = tswapreg(cpu_get_gpr(env, i));
d962783e 1535 }
86cd7b2d 1536 (*regs)[32] = tswapreg(env->pc);
84775c43 1537 (*regs)[33] = tswapreg(cpu_get_sr(env));
d962783e
JL		 1538}
1539#define ELF_HWCAP 0
1540#define ELF_PLATFORM NULL
1541
1542#endif /* TARGET_OPENRISC */
1543
fdf9b3e8
FB		 1544#ifdef TARGET_SH4
1545
fdf9b3e8 1546#define ELF_CLASS ELFCLASS32
fdf9b3e8
FB		 1547#define ELF_ARCH EM_SH
1548
d97ef72e
RH		 1549static inline void init_thread(struct target_pt_regs *regs,
1550 struct image_info *infop)
fdf9b3e8 1551{
d97ef72e
RH		 1552 /* Check other registers XXXXX */
1553 regs->pc = infop->entry;
1554 regs->regs[15] = infop->start_stack;
fdf9b3e8
FB		 1555}
1556
7631c97e
NF		 1557/* See linux kernel: arch/sh/include/asm/elf.h. */
1558#define ELF_NREG 23
1559typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1560
1561/* See linux kernel: arch/sh/include/asm/ptrace.h. */
1562enum {
1563 TARGET_REG_PC = 16,
1564 TARGET_REG_PR = 17,
1565 TARGET_REG_SR = 18,
1566 TARGET_REG_GBR = 19,
1567 TARGET_REG_MACH = 20,
1568 TARGET_REG_MACL = 21,
1569 TARGET_REG_SYSCALL = 22
1570};
1571
d97ef72e 1572static inline void elf_core_copy_regs(target_elf_gregset_t *regs,
05390248 1573 const CPUSH4State *env)
7631c97e
NF		 1574{
1575 int i;
1576
1577 for (i = 0; i < 16; i++) {
72cd500b 1578 (*regs)[i] = tswapreg(env->gregs[i]);
7631c97e
NF		 1579 }
1580
86cd7b2d
PB		 1581 (*regs)[TARGET_REG_PC] = tswapreg(env->pc);
1582 (*regs)[TARGET_REG_PR] = tswapreg(env->pr);
1583 (*regs)[TARGET_REG_SR] = tswapreg(env->sr);
1584 (*regs)[TARGET_REG_GBR] = tswapreg(env->gbr);
1585 (*regs)[TARGET_REG_MACH] = tswapreg(env->mach);
1586 (*regs)[TARGET_REG_MACL] = tswapreg(env->macl);
7631c97e
NF		 1587 (*regs)[TARGET_REG_SYSCALL] = 0; /* FIXME */
1588}
1589
1590#define USE_ELF_CORE_DUMP
fdf9b3e8
FB		 1591#define ELF_EXEC_PAGESIZE 4096
1592
e42fd944
RH		 1593enum {
1594 SH_CPU_HAS_FPU = 0x0001, /* Hardware FPU support */
1595 SH_CPU_HAS_P2_FLUSH_BUG = 0x0002, /* Need to flush the cache in P2 area */
1596 SH_CPU_HAS_MMU_PAGE_ASSOC = 0x0004, /* SH3: TLB way selection bit support */
1597 SH_CPU_HAS_DSP = 0x0008, /* SH-DSP: DSP support */
1598 SH_CPU_HAS_PERF_COUNTER = 0x0010, /* Hardware performance counters */
1599 SH_CPU_HAS_PTEA = 0x0020, /* PTEA register */
1600 SH_CPU_HAS_LLSC = 0x0040, /* movli.l/movco.l */
1601 SH_CPU_HAS_L2_CACHE = 0x0080, /* Secondary cache / URAM */
1602 SH_CPU_HAS_OP32 = 0x0100, /* 32-bit instruction support */
1603 SH_CPU_HAS_PTEAEX = 0x0200, /* PTE ASID Extension support */
1604};
1605
1606#define ELF_HWCAP get_elf_hwcap()
1607
1608static uint32_t get_elf_hwcap(void)
1609{
1610 SuperHCPU *cpu = SUPERH_CPU(thread_cpu);
1611 uint32_t hwcap = 0;
1612
1613 hwcap |= SH_CPU_HAS_FPU;
1614
1615 if (cpu->env.features & SH_FEATURE_SH4A) {
1616 hwcap |= SH_CPU_HAS_LLSC;
1617 }
1618
1619 return hwcap;
1620}
1621
fdf9b3e8
FB		 1622#endif
1623
48733d19
TS		 1624#ifdef TARGET_CRIS
1625
48733d19 1626#define ELF_CLASS ELFCLASS32
48733d19
TS		 1627#define ELF_ARCH EM_CRIS
1628
d97ef72e
RH		 1629static inline void init_thread(struct target_pt_regs *regs,
1630 struct image_info *infop)
48733d19 1631{
d97ef72e 1632 regs->erp = infop->entry;
48733d19
TS		 1633}
1634
48733d19
TS		 1635#define ELF_EXEC_PAGESIZE 8192
1636
1637#endif
1638
e6e5906b
PB		 1639#ifdef TARGET_M68K
1640
d97ef72e 1641#define ELF_CLASS ELFCLASS32
d97ef72e 1642#define ELF_ARCH EM_68K
e6e5906b
PB		 1643
1644/* ??? Does this need to do anything?
d97ef72e 1645 #define ELF_PLAT_INIT(_r) */
e6e5906b 1646
d97ef72e
RH		 1647static inline void init_thread(struct target_pt_regs *regs,
1648 struct image_info *infop)
e6e5906b
PB		 1649{
1650 regs->usp = infop->start_stack;
1651 regs->sr = 0;
1652 regs->pc = infop->entry;
1653}
1654
7a93cc55
NF		 1655/* See linux kernel: arch/m68k/include/asm/elf.h. */
1656#define ELF_NREG 20
1657typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1658
05390248 1659static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUM68KState *env)
7a93cc55 1660{
86cd7b2d
PB		 1661 (*regs)[0] = tswapreg(env->dregs[1]);
1662 (*regs)[1] = tswapreg(env->dregs[2]);
1663 (*regs)[2] = tswapreg(env->dregs[3]);
1664 (*regs)[3] = tswapreg(env->dregs[4]);
1665 (*regs)[4] = tswapreg(env->dregs[5]);
1666 (*regs)[5] = tswapreg(env->dregs[6]);
1667 (*regs)[6] = tswapreg(env->dregs[7]);
1668 (*regs)[7] = tswapreg(env->aregs[0]);
1669 (*regs)[8] = tswapreg(env->aregs[1]);
1670 (*regs)[9] = tswapreg(env->aregs[2]);
1671 (*regs)[10] = tswapreg(env->aregs[3]);
1672 (*regs)[11] = tswapreg(env->aregs[4]);
1673 (*regs)[12] = tswapreg(env->aregs[5]);
1674 (*regs)[13] = tswapreg(env->aregs[6]);
1675 (*regs)[14] = tswapreg(env->dregs[0]);
1676 (*regs)[15] = tswapreg(env->aregs[7]);
1677 (*regs)[16] = tswapreg(env->dregs[0]); /* FIXME: orig_d0 */
1678 (*regs)[17] = tswapreg(env->sr);
1679 (*regs)[18] = tswapreg(env->pc);
7a93cc55
NF		 1680 (*regs)[19] = 0; /* FIXME: regs->format | regs->vector */
1681}
1682
1683#define USE_ELF_CORE_DUMP
d97ef72e 1684#define ELF_EXEC_PAGESIZE 8192
e6e5906b
PB		 1685
1686#endif
1687
7a3148a9
JM		 1688#ifdef TARGET_ALPHA
1689
7a3148a9 1690#define ELF_CLASS ELFCLASS64
7a3148a9
JM		 1691#define ELF_ARCH EM_ALPHA
1692
d97ef72e
RH		 1693static inline void init_thread(struct target_pt_regs *regs,
1694 struct image_info *infop)
7a3148a9
JM		 1695{
1696 regs->pc = infop->entry;
1697 regs->ps = 8;
1698 regs->usp = infop->start_stack;
7a3148a9
JM		 1699}
1700
7a3148a9
JM		 1701#define ELF_EXEC_PAGESIZE 8192
1702
1703#endif /* TARGET_ALPHA */
1704
a4c075f1
UH		 1705#ifdef TARGET_S390X
1706
a4c075f1
UH		 1707#define ELF_CLASS ELFCLASS64
1708#define ELF_DATA ELFDATA2MSB
1709#define ELF_ARCH EM_S390
1710
6d88baf1
DH		 1711#include "elf.h"
1712
1713#define ELF_HWCAP get_elf_hwcap()
1714
1715#define GET_FEATURE(_feat, _hwcap) \
1716 do { if (s390_has_feat(_feat)) { hwcap |= _hwcap; } } while (0)
1717
e1b819c8 1718uint32_t get_elf_hwcap(void)
6d88baf1
DH		 1719{
1720 /*
1721 * Let's assume we always have esan3 and zarch.
1722 * 31-bit processes can use 64-bit registers (high gprs).
1723 */
1724 uint32_t hwcap = HWCAP_S390_ESAN3 | HWCAP_S390_ZARCH | HWCAP_S390_HIGH_GPRS;
1725
1726 GET_FEATURE(S390_FEAT_STFLE, HWCAP_S390_STFLE);
1727 GET_FEATURE(S390_FEAT_MSA, HWCAP_S390_MSA);
1728 GET_FEATURE(S390_FEAT_LONG_DISPLACEMENT, HWCAP_S390_LDISP);
1729 GET_FEATURE(S390_FEAT_EXTENDED_IMMEDIATE, HWCAP_S390_EIMM);
1730 if (s390_has_feat(S390_FEAT_EXTENDED_TRANSLATION_3) &&
1731 s390_has_feat(S390_FEAT_ETF3_ENH)) {
1732 hwcap |= HWCAP_S390_ETF3EH;
1733 }
1734 GET_FEATURE(S390_FEAT_VECTOR, HWCAP_S390_VXRS);
da215c23 1735 GET_FEATURE(S390_FEAT_VECTOR_ENH, HWCAP_S390_VXRS_EXT);
ffc8453b 1736 GET_FEATURE(S390_FEAT_VECTOR_ENH2, HWCAP_S390_VXRS_EXT2);
6d88baf1
DH		 1737
1738 return hwcap;
1739}
1740
e19807be
IL		 1741const char *elf_hwcap_str(uint32_t bit)
1742{
1743 static const char *hwcap_str[] = {
7f114a58
IL		 1744 [HWCAP_S390_NR_ESAN3] = "esan3",
1745 [HWCAP_S390_NR_ZARCH] = "zarch",
1746 [HWCAP_S390_NR_STFLE] = "stfle",
1747 [HWCAP_S390_NR_MSA] = "msa",
1748 [HWCAP_S390_NR_LDISP] = "ldisp",
1749 [HWCAP_S390_NR_EIMM] = "eimm",
1750 [HWCAP_S390_NR_DFP] = "dfp",
1751 [HWCAP_S390_NR_HPAGE] = "edat",
1752 [HWCAP_S390_NR_ETF3EH] = "etf3eh",
1753 [HWCAP_S390_NR_HIGH_GPRS] = "highgprs",
1754 [HWCAP_S390_NR_TE] = "te",
1755 [HWCAP_S390_NR_VXRS] = "vx",
1756 [HWCAP_S390_NR_VXRS_BCD] = "vxd",
1757 [HWCAP_S390_NR_VXRS_EXT] = "vxe",
1758 [HWCAP_S390_NR_GS] = "gs",
1759 [HWCAP_S390_NR_VXRS_EXT2] = "vxe2",
1760 [HWCAP_S390_NR_VXRS_PDE] = "vxp",
1761 [HWCAP_S390_NR_SORT] = "sort",
1762 [HWCAP_S390_NR_DFLT] = "dflt",
1763 [HWCAP_S390_NR_NNPA] = "nnpa",
1764 [HWCAP_S390_NR_PCI_MIO] = "pcimio",
1765 [HWCAP_S390_NR_SIE] = "sie",
e19807be
IL		 1766 };
1767
1768 return bit < ARRAY_SIZE(hwcap_str) ? hwcap_str[bit] : NULL;
1769}
1770
a4c075f1
UH		 1771static inline void init_thread(struct target_pt_regs *regs, struct image_info *infop)
1772{
1773 regs->psw.addr = infop->entry;
78a1e153
IL		 1774 regs->psw.mask = PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
1775 PSW_MASK_MCHECK | PSW_MASK_PSTATE | PSW_MASK_64 | \
1776 PSW_MASK_32;
a4c075f1
UH		 1777 regs->gprs[15] = infop->start_stack;
1778}
1779
4a1e8931
IL		 1780/* See linux kernel: arch/s390/include/uapi/asm/ptrace.h (s390_regs). */
1781#define ELF_NREG 27
1782typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1783
1784enum {
1785 TARGET_REG_PSWM = 0,
1786 TARGET_REG_PSWA = 1,
1787 TARGET_REG_GPRS = 2,
1788 TARGET_REG_ARS = 18,
1789 TARGET_REG_ORIG_R2 = 26,
1790};
1791
1792static void elf_core_copy_regs(target_elf_gregset_t *regs,
1793 const CPUS390XState *env)
1794{
1795 int i;
1796 uint32_t *aregs;
1797
1798 (*regs)[TARGET_REG_PSWM] = tswapreg(env->psw.mask);
1799 (*regs)[TARGET_REG_PSWA] = tswapreg(env->psw.addr);
1800 for (i = 0; i < 16; i++) {
1801 (*regs)[TARGET_REG_GPRS + i] = tswapreg(env->regs[i]);
1802 }
1803 aregs = (uint32_t *)&((*regs)[TARGET_REG_ARS]);
1804 for (i = 0; i < 16; i++) {
1805 aregs[i] = tswap32(env->aregs[i]);
1806 }
1807 (*regs)[TARGET_REG_ORIG_R2] = 0;
1808}
1809
1810#define USE_ELF_CORE_DUMP
1811#define ELF_EXEC_PAGESIZE 4096
1812
b63c6b97
RH		 1813#define VDSO_HEADER "vdso.c.inc"
1814
a4c075f1
UH		 1815#endif /* TARGET_S390X */
1816
47ae93cd
MC		 1817#ifdef TARGET_RISCV
1818
47ae93cd
MC		 1819#define ELF_ARCH EM_RISCV
1820
1821#ifdef TARGET_RISCV32
1822#define ELF_CLASS ELFCLASS32
468c1bb5 1823#define VDSO_HEADER "vdso-32.c.inc"
47ae93cd
MC		 1824#else
1825#define ELF_CLASS ELFCLASS64
468c1bb5 1826#define VDSO_HEADER "vdso-64.c.inc"
47ae93cd
MC		 1827#endif
1828
cb46938c
KC		 1829#define ELF_HWCAP get_elf_hwcap()
1830
1831static uint32_t get_elf_hwcap(void)
1832{
1833#define MISA_BIT(EXT) (1 << (EXT - 'A'))
1834 RISCVCPU *cpu = RISCV_CPU(thread_cpu);
1835 uint32_t mask = MISA_BIT('I') | MISA_BIT('M') | MISA_BIT('A')
4333f092
NE		 1836 | MISA_BIT('F') | MISA_BIT('D') | MISA_BIT('C')
1837 | MISA_BIT('V');
cb46938c 1838
e91a7227 1839 return cpu->env.misa_ext & mask;
cb46938c
KC		 1840#undef MISA_BIT
1841}
1842
47ae93cd
MC		 1843static inline void init_thread(struct target_pt_regs *regs,
1844 struct image_info *infop)
1845{
1846 regs->sepc = infop->entry;
1847 regs->sp = infop->start_stack;
1848}
1849
1850#define ELF_EXEC_PAGESIZE 4096
1851
1852#endif /* TARGET_RISCV */
1853
7c248bcd
RH		 1854#ifdef TARGET_HPPA
1855
7c248bcd
RH		 1856#define ELF_CLASS ELFCLASS32
1857#define ELF_ARCH EM_PARISC
1858#define ELF_PLATFORM "PARISC"
1859#define STACK_GROWS_DOWN 0
1860#define STACK_ALIGNMENT 64
1861
c7bc2a8f
RH		 1862#define VDSO_HEADER "vdso.c.inc"
1863
7c248bcd
RH		 1864static inline void init_thread(struct target_pt_regs *regs,
1865 struct image_info *infop)
1866{
1867 regs->iaoq[0] = infop->entry;
1868 regs->iaoq[1] = infop->entry + 4;
1869 regs->gr[23] = 0;
60f1c801
RH		 1870 regs->gr[24] = infop->argv;
1871 regs->gr[25] = infop->argc;
7c248bcd
RH		 1872 /* The top-of-stack contains a linkage buffer. */
1873 regs->gr[30] = infop->start_stack + 64;
1874 regs->gr[31] = infop->entry;
1875}
1876
eee816c0
RH		 1877#define LO_COMMPAGE 0
1878
1879static bool init_guest_commpage(void)
1880{
d1fc6230
RH		 1881 /* If reserved_va, then we have already mapped 0 page on the host. */
1882 if (!reserved_va) {
1883 void *want, *addr;
1884
1885 want = g2h_untagged(LO_COMMPAGE);
1886 addr = mmap(want, TARGET_PAGE_SIZE, PROT_NONE,
1887 MAP_ANONYMOUS | MAP_PRIVATE | MAP_FIXED_NOREPLACE, -1, 0);
1888 if (addr == MAP_FAILED) {
1889 perror("Allocating guest commpage");
1890 exit(EXIT_FAILURE);
1891 }
1892 if (addr != want) {
1893 return false;
1894 }
eee816c0
RH		 1895 }
1896
1897 /*
1898 * On Linux, page zero is normally marked execute only + gateway.
1899 * Normal read or write is supposed to fail (thus PROT_NONE above),
1900 * but specific offsets have kernel code mapped to raise permissions
1901 * and implement syscalls. Here, simply mark the page executable.
1902 * Special case the entry points during translation (see do_page_zero).
1903 */
49840a4a 1904 page_set_flags(LO_COMMPAGE, LO_COMMPAGE | ~TARGET_PAGE_MASK,
eee816c0
RH		 1905 PAGE_EXEC | PAGE_VALID);
1906 return true;
1907}
1908
7c248bcd
RH		 1909#endif /* TARGET_HPPA */
1910
ba7651fb
MF		 1911#ifdef TARGET_XTENSA
1912
ba7651fb
MF		 1913#define ELF_CLASS ELFCLASS32
1914#define ELF_ARCH EM_XTENSA
1915
1916static inline void init_thread(struct target_pt_regs *regs,
1917 struct image_info *infop)
1918{
1919 regs->windowbase = 0;
1920 regs->windowstart = 1;
1921 regs->areg[1] = infop->start_stack;
1922 regs->pc = infop->entry;
d2796be6
MF		 1923 if (info_is_fdpic(infop)) {
1924 regs->areg[4] = infop->loadmap_addr;
1925 regs->areg[5] = infop->interpreter_loadmap_addr;
1926 if (infop->interpreter_loadmap_addr) {
1927 regs->areg[6] = infop->interpreter_pt_dynamic_addr;
1928 } else {
1929 regs->areg[6] = infop->pt_dynamic_addr;
1930 }
1931 }
ba7651fb
MF		 1932}
1933
1934/* See linux kernel: arch/xtensa/include/asm/elf.h. */
1935#define ELF_NREG 128
1936typedef target_elf_greg_t target_elf_gregset_t[ELF_NREG];
1937
1938enum {
1939 TARGET_REG_PC,
1940 TARGET_REG_PS,
1941 TARGET_REG_LBEG,
1942 TARGET_REG_LEND,
1943 TARGET_REG_LCOUNT,
1944 TARGET_REG_SAR,
1945 TARGET_REG_WINDOWSTART,
1946 TARGET_REG_WINDOWBASE,
1947 TARGET_REG_THREADPTR,
1948 TARGET_REG_AR0 = 64,
1949};
1950
1951static void elf_core_copy_regs(target_elf_gregset_t *regs,
1952 const CPUXtensaState *env)
1953{
1954 unsigned i;
1955
1956 (*regs)[TARGET_REG_PC] = tswapreg(env->pc);
1957 (*regs)[TARGET_REG_PS] = tswapreg(env->sregs[PS] & ~PS_EXCM);
1958 (*regs)[TARGET_REG_LBEG] = tswapreg(env->sregs[LBEG]);
1959 (*regs)[TARGET_REG_LEND] = tswapreg(env->sregs[LEND]);
1960 (*regs)[TARGET_REG_LCOUNT] = tswapreg(env->sregs[LCOUNT]);
1961 (*regs)[TARGET_REG_SAR] = tswapreg(env->sregs[SAR]);
1962 (*regs)[TARGET_REG_WINDOWSTART] = tswapreg(env->sregs[WINDOW_START]);
1963 (*regs)[TARGET_REG_WINDOWBASE] = tswapreg(env->sregs[WINDOW_BASE]);
1964 (*regs)[TARGET_REG_THREADPTR] = tswapreg(env->uregs[THREADPTR]);
1965 xtensa_sync_phys_from_window((CPUXtensaState *)env);
1966 for (i = 0; i < env->config->nareg; ++i) {
1967 (*regs)[TARGET_REG_AR0 + i] = tswapreg(env->phys_regs[i]);
1968 }
1969}
1970
1971#define USE_ELF_CORE_DUMP
1972#define ELF_EXEC_PAGESIZE 4096
1973
1974#endif /* TARGET_XTENSA */
1975
d2a56bd2
TS		 1976#ifdef TARGET_HEXAGON
1977
d2a56bd2
TS		 1978#define ELF_CLASS ELFCLASS32
1979#define ELF_ARCH EM_HEXAGON
1980
1981static inline void init_thread(struct target_pt_regs *regs,
1982 struct image_info *infop)
1983{
1984 regs->sepc = infop->entry;
1985 regs->sp = infop->start_stack;
1986}
1987
1988#endif /* TARGET_HEXAGON */
1989
fcdc0ab4
JY		 1990#ifndef ELF_BASE_PLATFORM
1991#define ELF_BASE_PLATFORM (NULL)
1992#endif
1993
15338fd7
FB		 1994#ifndef ELF_PLATFORM
1995#define ELF_PLATFORM (NULL)
1996#endif
1997
75be901c
PC		 1998#ifndef ELF_MACHINE
1999#define ELF_MACHINE ELF_ARCH
2000#endif
2001
d276a604
PC		 2002#ifndef elf_check_arch
2003#define elf_check_arch(x) ((x) == ELF_ARCH)
2004#endif
2005
ace3d654
CMAB		 2006#ifndef elf_check_abi
2007#define elf_check_abi(x) (1)
2008#endif
2009
15338fd7
FB		 2010#ifndef ELF_HWCAP
2011#define ELF_HWCAP 0
2012#endif
2013
7c4ee5bc
RH		 2014#ifndef STACK_GROWS_DOWN
2015#define STACK_GROWS_DOWN 1
2016#endif
2017
2018#ifndef STACK_ALIGNMENT
2019#define STACK_ALIGNMENT 16
2020#endif
2021
992f48a0 2022#ifdef TARGET_ABI32
cb33da57 2023#undef ELF_CLASS
992f48a0 2024#define ELF_CLASS ELFCLASS32
cb33da57
BS		 2025#undef bswaptls
2026#define bswaptls(ptr) bswap32s(ptr)
2027#endif
2028
872f3d04
RH		 2029#ifndef EXSTACK_DEFAULT
2030#define EXSTACK_DEFAULT false
2031#endif
2032
31e31b8a 2033#include "elf.h"
09bfb054 2034
e8384b37
RH		 2035/* We must delay the following stanzas until after "elf.h". */
2036#if defined(TARGET_AARCH64)
2037
2038static bool arch_parse_elf_property(uint32_t pr_type, uint32_t pr_datasz,
2039 const uint32_t *data,
2040 struct image_info *info,
2041 Error **errp)
2042{
2043 if (pr_type == GNU_PROPERTY_AARCH64_FEATURE_1_AND) {
2044 if (pr_datasz != sizeof(uint32_t)) {
2045 error_setg(errp, "Ill-formed GNU_PROPERTY_AARCH64_FEATURE_1_AND");
2046 return false;
2047 }
2048 /* We will extract GNU_PROPERTY_AARCH64_FEATURE_1_BTI later. */
2049 info->note_flags = *data;
2050 }
2051 return true;
2052}
2053#define ARCH_USE_GNU_PROPERTY 1
2054
2055#else
2056
83f990eb
RH		 2057static bool arch_parse_elf_property(uint32_t pr_type, uint32_t pr_datasz,
2058 const uint32_t *data,
2059 struct image_info *info,
2060 Error **errp)
2061{
2062 g_assert_not_reached();
2063}
2064#define ARCH_USE_GNU_PROPERTY 0
2065
e8384b37
RH		 2066#endif
2067
09bfb054
FB		 2068struct exec
2069{
d97ef72e
RH		 2070 unsigned int a_info; /* Use macros N_MAGIC, etc for access */
2071 unsigned int a_text; /* length of text, in bytes */
2072 unsigned int a_data; /* length of data, in bytes */
2073 unsigned int a_bss; /* length of uninitialized data area, in bytes */
2074 unsigned int a_syms; /* length of symbol table data in file, in bytes */
2075 unsigned int a_entry; /* start address */
2076 unsigned int a_trsize; /* length of relocation info for text, in bytes */
2077 unsigned int a_drsize; /* length of relocation info for data, in bytes */
09bfb054
FB		 2078};
2079
2080
2081#define N_MAGIC(exec) ((exec).a_info & 0xffff)
2082#define OMAGIC 0407
2083#define NMAGIC 0410
2084#define ZMAGIC 0413
2085#define QMAGIC 0314
2086
e0d1673d 2087#define DLINFO_ITEMS 16
31e31b8a 2088
09bfb054
FB		 2089static inline void memcpy_fromfs(void * to, const void * from, unsigned long n)
2090{
d97ef72e 2091 memcpy(to, from, n);
09bfb054 2092}
d691f669 2093
31e31b8a 2094#ifdef BSWAP_NEEDED
92a31b1f 2095static void bswap_ehdr(struct elfhdr *ehdr)
31e31b8a 2096{
d97ef72e
RH		 2097 bswap16s(&ehdr->e_type); /* Object file type */
2098 bswap16s(&ehdr->e_machine); /* Architecture */
2099 bswap32s(&ehdr->e_version); /* Object file version */
2100 bswaptls(&ehdr->e_entry); /* Entry point virtual address */
2101 bswaptls(&ehdr->e_phoff); /* Program header table file offset */
2102 bswaptls(&ehdr->e_shoff); /* Section header table file offset */
2103 bswap32s(&ehdr->e_flags); /* Processor-specific flags */
2104 bswap16s(&ehdr->e_ehsize); /* ELF header size in bytes */
2105 bswap16s(&ehdr->e_phentsize); /* Program header table entry size */
2106 bswap16s(&ehdr->e_phnum); /* Program header table entry count */
2107 bswap16s(&ehdr->e_shentsize); /* Section header table entry size */
2108 bswap16s(&ehdr->e_shnum); /* Section header table entry count */
2109 bswap16s(&ehdr->e_shstrndx); /* Section header string table index */
31e31b8a
FB		 2110}
2111
991f8f0c 2112static void bswap_phdr(struct elf_phdr *phdr, int phnum)
31e31b8a 2113{
991f8f0c
RH		 2114 int i;
2115 for (i = 0; i < phnum; ++i, ++phdr) {
2116 bswap32s(&phdr->p_type); /* Segment type */
2117 bswap32s(&phdr->p_flags); /* Segment flags */
2118 bswaptls(&phdr->p_offset); /* Segment file offset */
2119 bswaptls(&phdr->p_vaddr); /* Segment virtual address */
2120 bswaptls(&phdr->p_paddr); /* Segment physical address */
2121 bswaptls(&phdr->p_filesz); /* Segment size in file */
2122 bswaptls(&phdr->p_memsz); /* Segment size in memory */
2123 bswaptls(&phdr->p_align); /* Segment alignment */
2124 }
31e31b8a 2125}
689f936f 2126
991f8f0c 2127static void bswap_shdr(struct elf_shdr *shdr, int shnum)
689f936f 2128{
991f8f0c
RH		 2129 int i;
2130 for (i = 0; i < shnum; ++i, ++shdr) {
2131 bswap32s(&shdr->sh_name);
2132 bswap32s(&shdr->sh_type);
2133 bswaptls(&shdr->sh_flags);
2134 bswaptls(&shdr->sh_addr);
2135 bswaptls(&shdr->sh_offset);
2136 bswaptls(&shdr->sh_size);
2137 bswap32s(&shdr->sh_link);
2138 bswap32s(&shdr->sh_info);
2139 bswaptls(&shdr->sh_addralign);
2140 bswaptls(&shdr->sh_entsize);
2141 }
689f936f
FB		 2142}
2143
7a3148a9 2144static void bswap_sym(struct elf_sym *sym)
689f936f
FB		 2145{
2146 bswap32s(&sym->st_name);
7a3148a9
JM		 2147 bswaptls(&sym->st_value);
2148 bswaptls(&sym->st_size);
689f936f
FB		 2149 bswap16s(&sym->st_shndx);
2150}
5dd0db52
SM		 2151
2152#ifdef TARGET_MIPS
2153static void bswap_mips_abiflags(Mips_elf_abiflags_v0 *abiflags)
2154{
2155 bswap16s(&abiflags->version);
2156 bswap32s(&abiflags->ases);
2157 bswap32s(&abiflags->isa_ext);
2158 bswap32s(&abiflags->flags1);
2159 bswap32s(&abiflags->flags2);
2160}
2161#endif
991f8f0c
RH		 2162#else
2163static inline void bswap_ehdr(struct elfhdr *ehdr) { }
2164static inline void bswap_phdr(struct elf_phdr *phdr, int phnum) { }
2165static inline void bswap_shdr(struct elf_shdr *shdr, int shnum) { }
2166static inline void bswap_sym(struct elf_sym *sym) { }
5dd0db52
SM		 2167#ifdef TARGET_MIPS
2168static inline void bswap_mips_abiflags(Mips_elf_abiflags_v0 *abiflags) { }
2169#endif
31e31b8a
FB		 2170#endif
2171
edf8e2af 2172#ifdef USE_ELF_CORE_DUMP
9349b4f9 2173static int elf_core_dump(int, const CPUArchState *);
edf8e2af 2174#endif /* USE_ELF_CORE_DUMP */
86cf82dc
RH		 2175static void load_symbols(struct elfhdr *hdr, const ImageSource *src,
2176 abi_ulong load_bias);
edf8e2af 2177
9058abdd
RH		 2178/* Verify the portions of EHDR within E_IDENT for the target.
2179 This can be performed before bswapping the entire header. */
2180static bool elf_check_ident(struct elfhdr *ehdr)
2181{
2182 return (ehdr->e_ident[EI_MAG0] == ELFMAG0
2183 && ehdr->e_ident[EI_MAG1] == ELFMAG1
2184 && ehdr->e_ident[EI_MAG2] == ELFMAG2
2185 && ehdr->e_ident[EI_MAG3] == ELFMAG3
2186 && ehdr->e_ident[EI_CLASS] == ELF_CLASS
2187 && ehdr->e_ident[EI_DATA] == ELF_DATA
2188 && ehdr->e_ident[EI_VERSION] == EV_CURRENT);
2189}
2190
2191/* Verify the portions of EHDR outside of E_IDENT for the target.
2192 This has to wait until after bswapping the header. */
2193static bool elf_check_ehdr(struct elfhdr *ehdr)
2194{
2195 return (elf_check_arch(ehdr->e_machine)
ace3d654 2196 && elf_check_abi(ehdr->e_flags)
9058abdd
RH		 2197 && ehdr->e_ehsize == sizeof(struct elfhdr)
2198 && ehdr->e_phentsize == sizeof(struct elf_phdr)
9058abdd
RH		 2199 && (ehdr->e_type == ET_EXEC || ehdr->e_type == ET_DYN));
2200}
2201
31e31b8a 2202/*
e5fe0c52 2203 * 'copy_elf_strings()' copies argument/envelope strings from user
31e31b8a
FB		 2204 * memory to free pages in kernel mem. These are in a format ready
2205 * to be put directly into the top of new user memory.
2206 *
2207 */
59baae9a
SB		 2208static abi_ulong copy_elf_strings(int argc, char **argv, char *scratch,
2209 abi_ulong p, abi_ulong stack_limit)
31e31b8a 2210{
59baae9a 2211 char *tmp;
7c4ee5bc 2212 int len, i;
59baae9a 2213 abi_ulong top = p;
31e31b8a
FB		 2214
2215 if (!p) {
d97ef72e 2216 return 0; /* bullet-proofing */
31e31b8a 2217 }
59baae9a 2218
7c4ee5bc
RH		 2219 if (STACK_GROWS_DOWN) {
2220 int offset = ((p - 1) % TARGET_PAGE_SIZE) + 1;
2221 for (i = argc - 1; i >= 0; --i) {
2222 tmp = argv[i];
2223 if (!tmp) {
2224 fprintf(stderr, "VFS: argc is wrong");
2225 exit(-1);
2226 }
2227 len = strlen(tmp) + 1;
2228 tmp += len;
59baae9a 2229
7c4ee5bc
RH		 2230 if (len > (p - stack_limit)) {
2231 return 0;
2232 }
2233 while (len) {
2234 int bytes_to_copy = (len > offset) ? offset : len;
2235 tmp -= bytes_to_copy;
2236 p -= bytes_to_copy;
2237 offset -= bytes_to_copy;
2238 len -= bytes_to_copy;
2239
2240 memcpy_fromfs(scratch + offset, tmp, bytes_to_copy);
2241
2242 if (offset == 0) {
2243 memcpy_to_target(p, scratch, top - p);
2244 top = p;
2245 offset = TARGET_PAGE_SIZE;
2246 }
2247 }
d97ef72e 2248 }
7c4ee5bc
RH		 2249 if (p != top) {
2250 memcpy_to_target(p, scratch + offset, top - p);
d97ef72e 2251 }
7c4ee5bc
RH		 2252 } else {
2253 int remaining = TARGET_PAGE_SIZE - (p % TARGET_PAGE_SIZE);
2254 for (i = 0; i < argc; ++i) {
2255 tmp = argv[i];
2256 if (!tmp) {
2257 fprintf(stderr, "VFS: argc is wrong");
2258 exit(-1);
2259 }
2260 len = strlen(tmp) + 1;
2261 if (len > (stack_limit - p)) {
2262 return 0;
2263 }
2264 while (len) {
2265 int bytes_to_copy = (len > remaining) ? remaining : len;
2266
2267 memcpy_fromfs(scratch + (p - top), tmp, bytes_to_copy);
2268
2269 tmp += bytes_to_copy;
2270 remaining -= bytes_to_copy;
2271 p += bytes_to_copy;
2272 len -= bytes_to_copy;
2273
2274 if (remaining == 0) {
2275 memcpy_to_target(top, scratch, p - top);
2276 top = p;
2277 remaining = TARGET_PAGE_SIZE;
2278 }
d97ef72e
RH		 2279 }
2280 }
7c4ee5bc
RH		 2281 if (p != top) {
2282 memcpy_to_target(top, scratch, p - top);
2283 }
59baae9a
SB		 2284 }
2285
31e31b8a
FB		 2286 return p;
2287}
2288
59baae9a
SB		 2289/* Older linux kernels provide up to MAX_ARG_PAGES (default: 32) of
2290 * argument/environment space. Newer kernels (>2.6.33) allow more,
2291 * dependent on stack size, but guarantee at least 32 pages for
2292 * backwards compatibility.
2293 */
2294#define STACK_LOWER_LIMIT (32 * TARGET_PAGE_SIZE)
2295
2296static abi_ulong setup_arg_pages(struct linux_binprm *bprm,
992f48a0 2297 struct image_info *info)
53a5960a 2298{
59baae9a 2299 abi_ulong size, error, guard;
872f3d04 2300 int prot;
31e31b8a 2301
703e0e89 2302 size = guest_stack_size;
59baae9a
SB		 2303 if (size < STACK_LOWER_LIMIT) {
2304 size = STACK_LOWER_LIMIT;
60dcbcb5 2305 }
f4388205
HD		 2306
2307 if (STACK_GROWS_DOWN) {
2308 guard = TARGET_PAGE_SIZE;
2309 if (guard < qemu_real_host_page_size()) {
2310 guard = qemu_real_host_page_size();
2311 }
2312 } else {
2313 /* no guard page for hppa target where stack grows upwards. */
2314 guard = 0;
60dcbcb5
RH		 2315 }
2316
872f3d04
RH		 2317 prot = PROT_READ | PROT_WRITE;
2318 if (info->exec_stack) {
2319 prot |= PROT_EXEC;
2320 }
2321 error = target_mmap(0, size + guard, prot,
60dcbcb5 2322 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
09bfb054 2323 if (error == -1) {
60dcbcb5 2324 perror("mmap stack");
09bfb054
FB		 2325 exit(-1);
2326 }
31e31b8a 2327
60dcbcb5 2328 /* We reserve one extra page at the top of the stack as guard. */
7c4ee5bc
RH		 2329 if (STACK_GROWS_DOWN) {
2330 target_mprotect(error, guard, PROT_NONE);
2331 info->stack_limit = error + guard;
2332 return info->stack_limit + size - sizeof(void *);
2333 } else {
7c4ee5bc
RH		 2334 info->stack_limit = error + size;
2335 return error;
2336 }
31e31b8a
FB		 2337}
2338
2d385be6
RH		 2339/**
2340 * zero_bss:
2341 *
2342 * Map and zero the bss. We need to explicitly zero any fractional pages
2343 * after the data section (i.e. bss). Return false on mapping failure.
2344 */
e6e66b03
RH		 2345static bool zero_bss(abi_ulong start_bss, abi_ulong end_bss,
2346 int prot, Error **errp)
2d385be6
RH		 2347{
2348 abi_ulong align_bss;
853d6f7a 2349
e6e66b03
RH		 2350 /* We only expect writable bss; the code segment shouldn't need this. */
2351 if (!(prot & PROT_WRITE)) {
2352 error_setg(errp, "PT_LOAD with non-writable bss");
2353 return false;
2354 }
2355
2d385be6
RH		 2356 align_bss = TARGET_PAGE_ALIGN(start_bss);
2357 end_bss = TARGET_PAGE_ALIGN(end_bss);
2358
2359 if (start_bss < align_bss) {
2360 int flags = page_get_flags(start_bss);
31e31b8a 2361
e6e66b03
RH		 2362 if (!(flags & PAGE_BITS)) {
2363 /*
2364 * The whole address space of the executable was reserved
2365 * at the start, therefore all pages will be VALID.
2366 * But assuming there are no PROT_NONE PT_LOAD segments,
2367 * a PROT_NONE page means no data all bss, and we can
2368 * simply extend the new anon mapping back to the start
2369 * of the page of bss.
2370 */
2d385be6 2371 align_bss -= TARGET_PAGE_SIZE;
2d385be6 2372 } else {
e6e66b03
RH		 2373 /*
2374 * The start of the bss shares a page with something.
2375 * The only thing that we expect is the data section,
2376 * which would already be marked writable.
2377 * Overlapping the RX code segment seems malformed.
2378 */
2379 if (!(flags & PAGE_WRITE)) {
2380 error_setg(errp, "PT_LOAD with bss overlapping "
2381 "non-writable page");
2382 return false;
2383 }
2384
2385 /* The page is already mapped and writable. */
2386 memset(g2h_untagged(start_bss), 0, align_bss - start_bss);
2d385be6 2387 }
cf129f3a 2388 }
2d385be6 2389
e6e66b03
RH		 2390 if (align_bss < end_bss &&
2391 target_mmap(align_bss, end_bss - align_bss, prot,
2392 MAP_FIXED | MAP_PRIVATE | MAP_ANON, -1, 0) == -1) {
2393 error_setg_errno(errp, errno, "Error mapping bss");
2394 return false;
2395 }
2396 return true;
cf129f3a 2397}
53a5960a 2398
d2796be6 2399#if defined(TARGET_ARM)
cf58affe
CL		 2400static int elf_is_fdpic(struct elfhdr *exec)
2401{
2402 return exec->e_ident[EI_OSABI] == ELFOSABI_ARM_FDPIC;
2403}
d2796be6
MF		 2404#elif defined(TARGET_XTENSA)
2405static int elf_is_fdpic(struct elfhdr *exec)
2406{
2407 return exec->e_ident[EI_OSABI] == ELFOSABI_XTENSA_FDPIC;
2408}
cf58affe 2409#else
a99856cd
CL		 2410/* Default implementation, always false. */
2411static int elf_is_fdpic(struct elfhdr *exec)
2412{
2413 return 0;
2414}
cf58affe 2415#endif
a99856cd 2416
1af02e83
MF		 2417static abi_ulong loader_build_fdpic_loadmap(struct image_info *info, abi_ulong sp)
2418{
2419 uint16_t n;
2420 struct elf32_fdpic_loadseg *loadsegs = info->loadsegs;
2421
2422 /* elf32_fdpic_loadseg */
2423 n = info->nsegs;
2424 while (n--) {
2425 sp -= 12;
2426 put_user_u32(loadsegs[n].addr, sp+0);
2427 put_user_u32(loadsegs[n].p_vaddr, sp+4);
2428 put_user_u32(loadsegs[n].p_memsz, sp+8);
2429 }
2430
2431 /* elf32_fdpic_loadmap */
2432 sp -= 4;
2433 put_user_u16(0, sp+0); /* version */
2434 put_user_u16(info->nsegs, sp+2); /* nsegs */
2435
2436 info->personality = PER_LINUX_FDPIC;
2437 info->loadmap_addr = sp;
2438
2439 return sp;
2440}
1af02e83 2441
992f48a0 2442static abi_ulong create_elf_tables(abi_ulong p, int argc, int envc,
8e62a717
RH		 2443 struct elfhdr *exec,
2444 struct image_info *info,
c40f621a
RH		 2445 struct image_info *interp_info,
2446 struct image_info *vdso_info)
31e31b8a 2447{
d97ef72e 2448 abi_ulong sp;
7c4ee5bc 2449 abi_ulong u_argc, u_argv, u_envp, u_auxv;
d97ef72e 2450 int size;
14322bad
LA		 2451 int i;
2452 abi_ulong u_rand_bytes;
2453 uint8_t k_rand_bytes[16];
fcdc0ab4
JY		 2454 abi_ulong u_platform, u_base_platform;
2455 const char *k_platform, *k_base_platform;
d97ef72e
RH		 2456 const int n = sizeof(elf_addr_t);
2457
2458 sp = p;
1af02e83 2459
1af02e83
MF		 2460 /* Needs to be before we load the env/argc/... */
2461 if (elf_is_fdpic(exec)) {
2462 /* Need 4 byte alignment for these structs */
2463 sp &= ~3;
2464 sp = loader_build_fdpic_loadmap(info, sp);
2465 info->other_info = interp_info;
2466 if (interp_info) {
2467 interp_info->other_info = info;
2468 sp = loader_build_fdpic_loadmap(interp_info, sp);
3cb10cfa
CL		 2469 info->interpreter_loadmap_addr = interp_info->loadmap_addr;
2470 info->interpreter_pt_dynamic_addr = interp_info->pt_dynamic_addr;
2471 } else {
2472 info->interpreter_loadmap_addr = 0;
2473 info->interpreter_pt_dynamic_addr = 0;
1af02e83
MF		 2474 }
2475 }
1af02e83 2476
fcdc0ab4
JY		 2477 u_base_platform = 0;
2478 k_base_platform = ELF_BASE_PLATFORM;
2479 if (k_base_platform) {
2480 size_t len = strlen(k_base_platform) + 1;
2481 if (STACK_GROWS_DOWN) {
2482 sp -= (len + n - 1) & ~(n - 1);
2483 u_base_platform = sp;
2484 /* FIXME - check return value of memcpy_to_target() for failure */
2485 memcpy_to_target(sp, k_base_platform, len);
2486 } else {
2487 memcpy_to_target(sp, k_base_platform, len);
2488 u_base_platform = sp;
2489 sp += len + 1;
2490 }
2491 }
2492
d97ef72e
RH		 2493 u_platform = 0;
2494 k_platform = ELF_PLATFORM;
2495 if (k_platform) {
2496 size_t len = strlen(k_platform) + 1;
7c4ee5bc
RH		 2497 if (STACK_GROWS_DOWN) {
2498 sp -= (len + n - 1) & ~(n - 1);
2499 u_platform = sp;
2500 /* FIXME - check return value of memcpy_to_target() for failure */
2501 memcpy_to_target(sp, k_platform, len);
2502 } else {
2503 memcpy_to_target(sp, k_platform, len);
2504 u_platform = sp;
2505 sp += len + 1;
2506 }
2507 }
2508
2509 /* Provide 16 byte alignment for the PRNG, and basic alignment for
2510 * the argv and envp pointers.
2511 */
2512 if (STACK_GROWS_DOWN) {
2513 sp = QEMU_ALIGN_DOWN(sp, 16);
2514 } else {
2515 sp = QEMU_ALIGN_UP(sp, 16);
d97ef72e 2516 }
14322bad
LA		 2517
2518 /*
c6a2377f 2519 * Generate 16 random bytes for userspace PRNG seeding.
14322bad 2520 */
c6a2377f 2521 qemu_guest_getrandom_nofail(k_rand_bytes, sizeof(k_rand_bytes));
7c4ee5bc
RH		 2522 if (STACK_GROWS_DOWN) {
2523 sp -= 16;
2524 u_rand_bytes = sp;
2525 /* FIXME - check return value of memcpy_to_target() for failure */
2526 memcpy_to_target(sp, k_rand_bytes, 16);
2527 } else {
2528 memcpy_to_target(sp, k_rand_bytes, 16);
2529 u_rand_bytes = sp;
2530 sp += 16;
2531 }
14322bad 2532
d97ef72e 2533 size = (DLINFO_ITEMS + 1) * 2;
c40f621a 2534 if (k_base_platform) {
fcdc0ab4 2535 size += 2;
c40f621a
RH		 2536 }
2537 if (k_platform) {
fcdc0ab4 2538 size += 2;
c40f621a
RH		 2539 }
2540 if (vdso_info) {
d97ef72e 2541 size += 2;
c40f621a 2542 }
f5155289 2543#ifdef DLINFO_ARCH_ITEMS
d97ef72e 2544 size += DLINFO_ARCH_ITEMS * 2;
ad6919dc
PM		 2545#endif
2546#ifdef ELF_HWCAP2
2547 size += 2;
f5155289 2548#endif
f516511e
PM		 2549 info->auxv_len = size * n;
2550
d97ef72e 2551 size += envc + argc + 2;
b9329d4b 2552 size += 1; /* argc itself */
d97ef72e 2553 size *= n;
7c4ee5bc
RH		 2554
2555 /* Allocate space and finalize stack alignment for entry now. */
2556 if (STACK_GROWS_DOWN) {
2557 u_argc = QEMU_ALIGN_DOWN(sp - size, STACK_ALIGNMENT);
2558 sp = u_argc;
2559 } else {
2560 u_argc = sp;
2561 sp = QEMU_ALIGN_UP(sp + size, STACK_ALIGNMENT);
2562 }
2563
2564 u_argv = u_argc + n;
2565 u_envp = u_argv + (argc + 1) * n;
2566 u_auxv = u_envp + (envc + 1) * n;
2567 info->saved_auxv = u_auxv;
60f1c801
RH		 2568 info->argc = argc;
2569 info->envc = envc;
2570 info->argv = u_argv;
2571 info->envp = u_envp;
d97ef72e
RH		 2572
2573 /* This is correct because Linux defines
2574 * elf_addr_t as Elf32_Off / Elf64_Off
2575 */
2576#define NEW_AUX_ENT(id, val) do { \
7c4ee5bc
RH		 2577 put_user_ual(id, u_auxv); u_auxv += n; \
2578 put_user_ual(val, u_auxv); u_auxv += n; \
d97ef72e
RH		 2579 } while(0)
2580
82991bed
PM		 2581#ifdef ARCH_DLINFO
2582 /*
2583 * ARCH_DLINFO must come first so platform specific code can enforce
2584 * special alignment requirements on the AUXV if necessary (eg. PPC).
2585 */
2586 ARCH_DLINFO;
2587#endif
f516511e
PM		 2588 /* There must be exactly DLINFO_ITEMS entries here, or the assert
2589 * on info->auxv_len will trigger.
2590 */
8e62a717 2591 NEW_AUX_ENT(AT_PHDR, (abi_ulong)(info->load_addr + exec->e_phoff));
d97ef72e
RH		 2592 NEW_AUX_ENT(AT_PHENT, (abi_ulong)(sizeof (struct elf_phdr)));
2593 NEW_AUX_ENT(AT_PHNUM, (abi_ulong)(exec->e_phnum));
d17b684c 2594 NEW_AUX_ENT(AT_PAGESZ, (abi_ulong)(TARGET_PAGE_SIZE));
8e62a717 2595 NEW_AUX_ENT(AT_BASE, (abi_ulong)(interp_info ? interp_info->load_addr : 0));
d97ef72e 2596 NEW_AUX_ENT(AT_FLAGS, (abi_ulong)0);
8e62a717 2597 NEW_AUX_ENT(AT_ENTRY, info->entry);
d97ef72e
RH		 2598 NEW_AUX_ENT(AT_UID, (abi_ulong) getuid());
2599 NEW_AUX_ENT(AT_EUID, (abi_ulong) geteuid());
2600 NEW_AUX_ENT(AT_GID, (abi_ulong) getgid());
2601 NEW_AUX_ENT(AT_EGID, (abi_ulong) getegid());
2602 NEW_AUX_ENT(AT_HWCAP, (abi_ulong) ELF_HWCAP);
2603 NEW_AUX_ENT(AT_CLKTCK, (abi_ulong) sysconf(_SC_CLK_TCK));
14322bad 2604 NEW_AUX_ENT(AT_RANDOM, (abi_ulong) u_rand_bytes);
444cd5c3 2605 NEW_AUX_ENT(AT_SECURE, (abi_ulong) qemu_getauxval(AT_SECURE));
e0d1673d 2606 NEW_AUX_ENT(AT_EXECFN, info->file_string);
14322bad 2607
ad6919dc
PM		 2608#ifdef ELF_HWCAP2
2609 NEW_AUX_ENT(AT_HWCAP2, (abi_ulong) ELF_HWCAP2);
2610#endif
2611
fcdc0ab4
JY		 2612 if (u_base_platform) {
2613 NEW_AUX_ENT(AT_BASE_PLATFORM, u_base_platform);
2614 }
7c4ee5bc 2615 if (u_platform) {
d97ef72e 2616 NEW_AUX_ENT(AT_PLATFORM, u_platform);
7c4ee5bc 2617 }
c40f621a
RH		 2618 if (vdso_info) {
2619 NEW_AUX_ENT(AT_SYSINFO_EHDR, vdso_info->load_addr);
2620 }
7c4ee5bc 2621 NEW_AUX_ENT (AT_NULL, 0);
f5155289
FB		 2622#undef NEW_AUX_ENT
2623
f516511e
PM		 2624 /* Check that our initial calculation of the auxv length matches how much
2625 * we actually put into it.
2626 */
2627 assert(info->auxv_len == u_auxv - info->saved_auxv);
7c4ee5bc
RH		 2628
2629 put_user_ual(argc, u_argc);
2630
2631 p = info->arg_strings;
2632 for (i = 0; i < argc; ++i) {
2633 put_user_ual(p, u_argv);
2634 u_argv += n;
2635 p += target_strlen(p) + 1;
2636 }
2637 put_user_ual(0, u_argv);
2638
2639 p = info->env_strings;
2640 for (i = 0; i < envc; ++i) {
2641 put_user_ual(p, u_envp);
2642 u_envp += n;
2643 p += target_strlen(p) + 1;
2644 }
2645 put_user_ual(0, u_envp);
edf8e2af 2646
d97ef72e 2647 return sp;
31e31b8a
FB		 2648}
2649
f5ef0e51 2650#if defined(HI_COMMPAGE)
eee816c0 2651#define LO_COMMPAGE -1
f5ef0e51
RH		 2652#elif defined(LO_COMMPAGE)
2653#define HI_COMMPAGE 0
2654#else
66346faf 2655#define HI_COMMPAGE 0
eee816c0 2656#define LO_COMMPAGE -1
d461b73e 2657#ifndef INIT_GUEST_COMMPAGE
ee947430 2658#define init_guest_commpage() true
8756e136 2659#endif
d461b73e 2660#endif
dce10401 2661
06f38c66
RH		 2662/**
2663 * pgb_try_mmap:
2664 * @addr: host start address
2665 * @addr_last: host last address
2666 * @keep: do not unmap the probe region
2667 *
2668 * Return 1 if [@addr, @addr_last] is not mapped in the host,
2669 * return 0 if it is not available to map, and -1 on mmap error.
2670 * If @keep, the region is left mapped on success, otherwise unmapped.
2671 */
2672static int pgb_try_mmap(uintptr_t addr, uintptr_t addr_last, bool keep)
2673{
2674 size_t size = addr_last - addr + 1;
2675 void *p = mmap((void *)addr, size, PROT_NONE,
2676 MAP_ANONYMOUS | MAP_PRIVATE |
2677 MAP_NORESERVE | MAP_FIXED_NOREPLACE, -1, 0);
2678 int ret;
2679
2680 if (p == MAP_FAILED) {
2681 return errno == EEXIST ? 0 : -1;
2682 }
2683 ret = p == (void *)addr;
2684 if (!keep || !ret) {
2685 munmap(p, size);
2686 }
2687 return ret;
2688}
2689
2690/**
2691 * pgb_try_mmap_skip_brk(uintptr_t addr, uintptr_t size, uintptr_t brk)
2692 * @addr: host address
2693 * @addr_last: host last address
2694 * @brk: host brk
2695 *
2696 * Like pgb_try_mmap, but additionally reserve some memory following brk.
2697 */
2698static int pgb_try_mmap_skip_brk(uintptr_t addr, uintptr_t addr_last,
2699 uintptr_t brk, bool keep)
2700{
2701 uintptr_t brk_last = brk + 16 * MiB - 1;
2702
2703 /* Do not map anything close to the host brk. */
2704 if (addr <= brk_last && brk <= addr_last) {
2705 return 0;
2706 }
2707 return pgb_try_mmap(addr, addr_last, keep);
2708}
2709
2710/**
2711 * pgb_try_mmap_set:
2712 * @ga: set of guest addrs
2713 * @base: guest_base
2714 * @brk: host brk
2715 *
2716 * Return true if all @ga can be mapped by the host at @base.
2717 * On success, retain the mapping at index 0 for reserved_va.
2718 */
2719
2720typedef struct PGBAddrs {
2721 uintptr_t bounds[3][2]; /* start/last pairs */
2722 int nbounds;
2723} PGBAddrs;
2724
2725static bool pgb_try_mmap_set(const PGBAddrs *ga, uintptr_t base, uintptr_t brk)
2726{
2727 for (int i = ga->nbounds - 1; i >= 0; --i) {
2728 if (pgb_try_mmap_skip_brk(ga->bounds[i][0] + base,
2729 ga->bounds[i][1] + base,
2730 brk, i == 0 && reserved_va) <= 0) {
2731 return false;
2732 }
2733 }
2734 return true;
2735}
2736
2737/**
2738 * pgb_addr_set:
2739 * @ga: output set of guest addrs
2740 * @guest_loaddr: guest image low address
2741 * @guest_loaddr: guest image high address
2742 * @identity: create for identity mapping
2743 *
2744 * Fill in @ga with the image, COMMPAGE and NULL page.
2745 */
2746static bool pgb_addr_set(PGBAddrs *ga, abi_ulong guest_loaddr,
2747 abi_ulong guest_hiaddr, bool try_identity)
2748{
2749 int n;
2750
2751 /*
2752 * With a low commpage, or a guest mapped very low,
2753 * we may not be able to use the identity map.
2754 */
2755 if (try_identity) {
2756 if (LO_COMMPAGE != -1 && LO_COMMPAGE < mmap_min_addr) {
2757 return false;
2758 }
2759 if (guest_loaddr != 0 && guest_loaddr < mmap_min_addr) {
2760 return false;
2761 }
2762 }
2763
2764 memset(ga, 0, sizeof(*ga));
2765 n = 0;
2766
2767 if (reserved_va) {
2768 ga->bounds[n][0] = try_identity ? mmap_min_addr : 0;
2769 ga->bounds[n][1] = reserved_va;
2770 n++;
2771 /* LO_COMMPAGE and NULL handled by reserving from 0. */
2772 } else {
2773 /* Add any LO_COMMPAGE or NULL page. */
2774 if (LO_COMMPAGE != -1) {
2775 ga->bounds[n][0] = 0;
2776 ga->bounds[n][1] = LO_COMMPAGE + TARGET_PAGE_SIZE - 1;
2777 n++;
2778 } else if (!try_identity) {
2779 ga->bounds[n][0] = 0;
2780 ga->bounds[n][1] = TARGET_PAGE_SIZE - 1;
2781 n++;
2782 }
2783
2784 /* Add the guest image for ET_EXEC. */
2785 if (guest_loaddr) {
2786 ga->bounds[n][0] = guest_loaddr;
2787 ga->bounds[n][1] = guest_hiaddr;
2788 n++;
2789 }
2790 }
2791
2792 /*
2793 * Temporarily disable
2794 * "comparison is always false due to limited range of data type"
2795 * due to comparison between unsigned and (possible) 0.
2796 */
2797#pragma GCC diagnostic push
2798#pragma GCC diagnostic ignored "-Wtype-limits"
2799
2800 /* Add any HI_COMMPAGE not covered by reserved_va. */
2801 if (reserved_va < HI_COMMPAGE) {
ae6bffe0 2802 ga->bounds[n][0] = HI_COMMPAGE & qemu_real_host_page_mask();
06f38c66
RH		 2803 ga->bounds[n][1] = HI_COMMPAGE + TARGET_PAGE_SIZE - 1;
2804 n++;
2805 }
2806
2807#pragma GCC diagnostic pop
2808
2809 ga->nbounds = n;
2810 return true;
2811}
2812
ee947430
AB		 2813static void pgb_fail_in_use(const char *image_name)
2814{
2815 error_report("%s: requires virtual address space that is in use "
2816 "(omit the -B option or choose a different value)",
2817 image_name);
2818 exit(EXIT_FAILURE);
2819}
dce10401 2820
06f38c66
RH		 2821static void pgb_fixed(const char *image_name, uintptr_t guest_loaddr,
2822 uintptr_t guest_hiaddr, uintptr_t align)
ee947430 2823{
06f38c66
RH		 2824 PGBAddrs ga;
2825 uintptr_t brk = (uintptr_t)sbrk(0);
2a53535a 2826
ee947430 2827 if (!QEMU_IS_ALIGNED(guest_base, align)) {
5ca870b9 2828 fprintf(stderr, "Requested guest base %p does not satisfy "
06f38c66 2829 "host minimum alignment (0x%" PRIxPTR ")\n",
5ca870b9 2830 (void *)guest_base, align);
ee947430
AB		 2831 exit(EXIT_FAILURE);
2832 }
2833
06f38c66
RH		 2834 if (!pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, !guest_base)
2835 || !pgb_try_mmap_set(&ga, guest_base, brk)) {
ee947430
AB		 2836 pgb_fail_in_use(image_name);
2837 }
2838}
2839
ad592e37 2840/**
dd558855 2841 * pgb_find_fallback:
ad592e37 2842 *
dd558855
RH		 2843 * This is a fallback method for finding holes in the host address space
2844 * if we don't have the benefit of being able to access /proc/self/map.
2845 * It can potentially take a very long time as we can only dumbly iterate
2846 * up the host address space seeing if the allocation would work.
ad592e37 2847 */
dd558855
RH		 2848static uintptr_t pgb_find_fallback(const PGBAddrs *ga, uintptr_t align,
2849 uintptr_t brk)
ad592e37 2850{
dd558855
RH		 2851 /* TODO: come up with a better estimate of how much to skip. */
2852 uintptr_t skip = sizeof(uintptr_t) == 4 ? MiB : GiB;
ad592e37 2853
dd558855
RH		 2854 for (uintptr_t base = skip; ; base += skip) {
2855 base = ROUND_UP(base, align);
2856 if (pgb_try_mmap_set(ga, base, brk)) {
2857 return base;
2858 }
2859 if (base >= -skip) {
ad592e37 2860 return -1;
ad592e37
AB		 2861 }
2862 }
2863}
2864
dd558855
RH		 2865static uintptr_t pgb_try_itree(const PGBAddrs *ga, uintptr_t base,
2866 IntervalTreeRoot *root)
ee947430 2867{
dd558855
RH		 2868 for (int i = ga->nbounds - 1; i >= 0; --i) {
2869 uintptr_t s = base + ga->bounds[i][0];
2870 uintptr_t l = base + ga->bounds[i][1];
2871 IntervalTreeNode *n;
dce10401 2872
dd558855
RH		 2873 if (l < s) {
2874 /* Wraparound. Skip to advance S to mmap_min_addr. */
2875 return mmap_min_addr - s;
2876 }
ee947430 2877
dd558855
RH		 2878 n = interval_tree_iter_first(root, s, l);
2879 if (n != NULL) {
2880 /* Conflict. Skip to advance S to LAST + 1. */
2881 return n->last - s + 1;
2882 }
ad592e37 2883 }
dd558855
RH		 2884 return 0; /* success */
2885}
ad592e37 2886
dd558855
RH		 2887static uintptr_t pgb_find_itree(const PGBAddrs *ga, IntervalTreeRoot *root,
2888 uintptr_t align, uintptr_t brk)
2889{
2890 uintptr_t last = mmap_min_addr;
2891 uintptr_t base, skip;
ee947430 2892
dd558855
RH		 2893 while (true) {
2894 base = ROUND_UP(last, align);
2895 if (base < last) {
2896 return -1;
aac362e4
LS		 2897 }
2898
dd558855
RH		 2899 skip = pgb_try_itree(ga, base, root);
2900 if (skip == 0) {
2901 break;
806d1021
MI		 2902 }
2903
dd558855
RH		 2904 last = base + skip;
2905 if (last < base) {
2906 return -1;
dce10401
MI		 2907 }
2908 }
dd558855
RH		 2909
2910 /*
2911 * We've chosen 'base' based on holes in the interval tree,
2912 * but we don't yet know if it is a valid host address.
2913 * Because it is the first matching hole, if the host addresses
2914 * are invalid we know there are no further matches.
2915 */
2916 return pgb_try_mmap_set(ga, base, brk) ? base : -1;
dce10401
MI		 2917}
2918
dd558855
RH		 2919static void pgb_dynamic(const char *image_name, uintptr_t guest_loaddr,
2920 uintptr_t guest_hiaddr, uintptr_t align)
f3ed1f5d 2921{
dd558855
RH		 2922 IntervalTreeRoot *root;
2923 uintptr_t brk, ret;
2924 PGBAddrs ga;
f3ed1f5d 2925
dd558855
RH		 2926 /* Try the identity map first. */
2927 if (pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, true)) {
2928 brk = (uintptr_t)sbrk(0);
2929 if (pgb_try_mmap_set(&ga, 0, brk)) {
2930 guest_base = 0;
2931 return;
2932 }
ee947430
AB		 2933 }
2934
ee947430 2935 /*
dd558855
RH		 2936 * Rebuild the address set for non-identity map.
2937 * This differs in the mapping of the guest NULL page.
ee947430 2938 */
dd558855 2939 pgb_addr_set(&ga, guest_loaddr, guest_hiaddr, false);
ee947430 2940
dd558855
RH		 2941 root = read_self_maps();
2942
2943 /* Read brk after we've read the maps, which will malloc. */
2944 brk = (uintptr_t)sbrk(0);
ee947430 2945
dd558855
RH		 2946 if (!root) {
2947 ret = pgb_find_fallback(&ga, align, brk);
2948 } else {
ee947430 2949 /*
dd558855
RH		 2950 * Reserve the area close to the host brk.
2951 * This will be freed with the rest of the tree.
ee947430 2952 */
dd558855
RH		 2953 IntervalTreeNode *b = g_new0(IntervalTreeNode, 1);
2954 b->start = brk;
2955 b->last = brk + 16 * MiB - 1;
2956 interval_tree_insert(b, root);
ee947430 2957
dd558855
RH		 2958 ret = pgb_find_itree(&ga, root, align, brk);
2959 free_self_maps(root);
2960 }
ee947430 2961
dd558855
RH		 2962 if (ret == -1) {
2963 int w = TARGET_LONG_BITS / 4;
ee947430 2964
dd558855
RH		 2965 error_report("%s: Unable to find a guest_base to satisfy all "
2966 "guest address mapping requirements", image_name);
c1f6ad79 2967
dd558855
RH		 2968 for (int i = 0; i < ga.nbounds; ++i) {
2969 error_printf(" %0*" PRIx64 "-%0*" PRIx64 "\n",
2970 w, (uint64_t)ga.bounds[i][0],
2971 w, (uint64_t)ga.bounds[i][1]);
2972 }
ee947430
AB		 2973 exit(EXIT_FAILURE);
2974 }
dd558855 2975 guest_base = ret;
f3ed1f5d
PM		 2976}
2977
ee947430
AB		 2978void probe_guest_base(const char *image_name, abi_ulong guest_loaddr,
2979 abi_ulong guest_hiaddr)
2980{
2981 /* In order to use host shmat, we must be able to honor SHMLBA. */
ae6bffe0 2982 uintptr_t align = MAX(SHMLBA, TARGET_PAGE_SIZE);
ee947430 2983
0c441aeb
RH		 2984 /* Sanity check the guest binary. */
2985 if (reserved_va) {
2986 if (guest_hiaddr > reserved_va) {
2987 error_report("%s: requires more than reserved virtual "
2988 "address space (0x%" PRIx64 " > 0x%lx)",
2989 image_name, (uint64_t)guest_hiaddr, reserved_va);
2990 exit(EXIT_FAILURE);
2991 }
2992 } else {
2993 if (guest_hiaddr != (uintptr_t)guest_hiaddr) {
2994 error_report("%s: requires more virtual address space "
2995 "than the host can provide (0x%" PRIx64 ")",
2996 image_name, (uint64_t)guest_hiaddr + 1);
2997 exit(EXIT_FAILURE);
2998 }
2999 }
3000
ee947430 3001 if (have_guest_base) {
06f38c66 3002 pgb_fixed(image_name, guest_loaddr, guest_hiaddr, align);
ee947430 3003 } else {
dd558855 3004 pgb_dynamic(image_name, guest_loaddr, guest_hiaddr, align);
ee947430
AB		 3005 }
3006
3007 /* Reserve and initialize the commpage. */
3008 if (!init_guest_commpage()) {
06f38c66
RH		 3009 /* We have already probed for the commpage being free. */
3010 g_assert_not_reached();
ee947430
AB		 3011 }
3012
3013 assert(QEMU_IS_ALIGNED(guest_base, align));
3014 qemu_log_mask(CPU_LOG_PAGE, "Locating guest address space "
3015 "@ 0x%" PRIx64 "\n", (uint64_t)guest_base);
3016}
f3ed1f5d 3017
83f990eb
RH		 3018enum {
3019 /* The string "GNU\0" as a magic number. */
3020 GNU0_MAGIC = const_le32('G' | 'N' << 8 | 'U' << 16),
3021 NOTE_DATA_SZ = 1 * KiB,
3022 NOTE_NAME_SZ = 4,
3023 ELF_GNU_PROPERTY_ALIGN = ELF_CLASS == ELFCLASS32 ? 4 : 8,
3024};
3025
3026/*
3027 * Process a single gnu_property entry.
3028 * Return false for error.
3029 */
3030static bool parse_elf_property(const uint32_t *data, int *off, int datasz,
3031 struct image_info *info, bool have_prev_type,
3032 uint32_t *prev_type, Error **errp)
3033{
3034 uint32_t pr_type, pr_datasz, step;
3035
3036 if (*off > datasz || !QEMU_IS_ALIGNED(*off, ELF_GNU_PROPERTY_ALIGN)) {
3037 goto error_data;
3038 }
3039 datasz -= *off;
3040 data += *off / sizeof(uint32_t);
3041
3042 if (datasz < 2 * sizeof(uint32_t)) {
3043 goto error_data;
3044 }
3045 pr_type = data[0];
3046 pr_datasz = data[1];
3047 data += 2;
3048 datasz -= 2 * sizeof(uint32_t);
3049 step = ROUND_UP(pr_datasz, ELF_GNU_PROPERTY_ALIGN);
3050 if (step > datasz) {
3051 goto error_data;
3052 }
3053
3054 /* Properties are supposed to be unique and sorted on pr_type. */
3055 if (have_prev_type && pr_type <= *prev_type) {
3056 if (pr_type == *prev_type) {
3057 error_setg(errp, "Duplicate property in PT_GNU_PROPERTY");
3058 } else {
3059 error_setg(errp, "Unsorted property in PT_GNU_PROPERTY");
3060 }
3061 return false;
3062 }
3063 *prev_type = pr_type;
3064
3065 if (!arch_parse_elf_property(pr_type, pr_datasz, data, info, errp)) {
3066 return false;
3067 }
3068
3069 *off += 2 * sizeof(uint32_t) + step;
3070 return true;
3071
3072 error_data:
3073 error_setg(errp, "Ill-formed property in PT_GNU_PROPERTY");
3074 return false;
3075}
3076
3077/* Process NT_GNU_PROPERTY_TYPE_0. */
3bd02386 3078static bool parse_elf_properties(const ImageSource *src,
83f990eb
RH		 3079 struct image_info *info,
3080 const struct elf_phdr *phdr,
83f990eb
RH		 3081 Error **errp)
3082{
3083 union {
3084 struct elf_note nhdr;
3085 uint32_t data[NOTE_DATA_SZ / sizeof(uint32_t)];
3086 } note;
3087
3088 int n, off, datasz;
3089 bool have_prev_type;
3090 uint32_t prev_type;
3091
3092 /* Unless the arch requires properties, ignore them. */
3093 if (!ARCH_USE_GNU_PROPERTY) {
3094 return true;
3095 }
3096
3097 /* If the properties are crazy large, that's too bad. */
3098 n = phdr->p_filesz;
3099 if (n > sizeof(note)) {
3100 error_setg(errp, "PT_GNU_PROPERTY too large");
3101 return false;
3102 }
3103 if (n < sizeof(note.nhdr)) {
3104 error_setg(errp, "PT_GNU_PROPERTY too small");
3105 return false;
3106 }
3107
3bd02386
RH		 3108 if (!imgsrc_read(&note, phdr->p_offset, n, src, errp)) {
3109 return false;
83f990eb
RH		 3110 }
3111
3112 /*
3113 * The contents of a valid PT_GNU_PROPERTY is a sequence
3114 * of uint32_t -- swap them all now.
3115 */
3116#ifdef BSWAP_NEEDED
3117 for (int i = 0; i < n / 4; i++) {
3118 bswap32s(note.data + i);
3119 }
3120#endif
3121
3122 /*
3123 * Note that nhdr is 3 words, and that the "name" described by namesz
3124 * immediately follows nhdr and is thus at the 4th word. Further, all
3125 * of the inputs to the kernel's round_up are multiples of 4.
3126 */
3127 if (note.nhdr.n_type != NT_GNU_PROPERTY_TYPE_0 ||
3128 note.nhdr.n_namesz != NOTE_NAME_SZ ||
3129 note.data[3] != GNU0_MAGIC) {
3130 error_setg(errp, "Invalid note in PT_GNU_PROPERTY");
3131 return false;
3132 }
3133 off = sizeof(note.nhdr) + NOTE_NAME_SZ;
3134
3135 datasz = note.nhdr.n_descsz + off;
3136 if (datasz > n) {
3137 error_setg(errp, "Invalid note size in PT_GNU_PROPERTY");
3138 return false;
3139 }
3140
3141 have_prev_type = false;
3142 prev_type = 0;
3143 while (1) {
3144 if (off == datasz) {
3145 return true; /* end, exit ok */
3146 }
3147 if (!parse_elf_property(note.data, &off, datasz, info,
3148 have_prev_type, &prev_type, errp)) {
3149 return false;
3150 }
3151 have_prev_type = true;
3152 }
3153}
3154
3bd02386
RH		 3155/**
3156 * load_elf_image: Load an ELF image into the address space.
3157 * @image_name: the filename of the image, to use in error messages.
3158 * @src: the ImageSource from which to read.
3159 * @info: info collected from the loaded image.
3160 * @ehdr: the ELF header, not yet bswapped.
3161 * @pinterp_name: record any PT_INTERP string found.
3162 *
3163 * On return: @info values will be filled in, as necessary or available.
3164 */
8e62a717 3165
3bd02386 3166static void load_elf_image(const char *image_name, const ImageSource *src,
40d487ee 3167 struct image_info *info, struct elfhdr *ehdr,
3bd02386 3168 char **pinterp_name)
31e31b8a 3169{
3bd02386 3170 g_autofree struct elf_phdr *phdr = NULL;
8e62a717 3171 abi_ulong load_addr, load_bias, loaddr, hiaddr, error;
3bd02386 3172 int i, prot_exec;
c7f17e7b 3173 Error *err = NULL;
5fafdf24 3174
3bd02386
RH		 3175 /*
3176 * First of all, some simple consistency checks.
3177 * Note that we rely on the bswapped ehdr staying in bprm_buf,
3178 * for later use by load_elf_binary and create_elf_tables.
3179 */
3180 if (!imgsrc_read(ehdr, 0, sizeof(*ehdr), src, &err)) {
3181 goto exit_errmsg;
3182 }
8e62a717 3183 if (!elf_check_ident(ehdr)) {
c7f17e7b 3184 error_setg(&err, "Invalid ELF image for this architecture");
8e62a717
RH		 3185 goto exit_errmsg;
3186 }
3187 bswap_ehdr(ehdr);
3188 if (!elf_check_ehdr(ehdr)) {
c7f17e7b 3189 error_setg(&err, "Invalid ELF image for this architecture");
8e62a717 3190 goto exit_errmsg;
d97ef72e 3191 }
5fafdf24 3192
3bd02386
RH		 3193 phdr = imgsrc_read_alloc(ehdr->e_phoff,
3194 ehdr->e_phnum * sizeof(struct elf_phdr),
3195 src, &err);
3196 if (phdr == NULL) {
3197 goto exit_errmsg;
d97ef72e 3198 }
8e62a717 3199 bswap_phdr(phdr, ehdr->e_phnum);
09bfb054 3200
1af02e83
MF		 3201 info->nsegs = 0;
3202 info->pt_dynamic_addr = 0;
1af02e83 3203
98c1076c
AB		 3204 mmap_lock();
3205
8a1a5274
RH		 3206 /*
3207 * Find the maximum size of the image and allocate an appropriate
3208 * amount of memory to handle that. Locate the interpreter, if any.
3209 */
682674b8 3210 loaddr = -1, hiaddr = 0;
33143c44 3211 info->alignment = 0;
872f3d04 3212 info->exec_stack = EXSTACK_DEFAULT;
8e62a717 3213 for (i = 0; i < ehdr->e_phnum; ++i) {
4d9d535a
RH		 3214 struct elf_phdr *eppnt = phdr + i;
3215 if (eppnt->p_type == PT_LOAD) {
82d70a84 3216 abi_ulong a = eppnt->p_vaddr & TARGET_PAGE_MASK;
682674b8
RH		 3217 if (a < loaddr) {
3218 loaddr = a;
3219 }
a3a67f54 3220 a = eppnt->p_vaddr + eppnt->p_memsz - 1;
682674b8
RH		 3221 if (a > hiaddr) {
3222 hiaddr = a;
3223 }
1af02e83 3224 ++info->nsegs;
4d9d535a 3225 info->alignment |= eppnt->p_align;
8a1a5274
RH		 3226 } else if (eppnt->p_type == PT_INTERP && pinterp_name) {
3227 g_autofree char *interp_name = NULL;
3228
3229 if (*pinterp_name) {
c7f17e7b 3230 error_setg(&err, "Multiple PT_INTERP entries");
8a1a5274
RH		 3231 goto exit_errmsg;
3232 }
c7f17e7b 3233
3bd02386
RH		 3234 interp_name = imgsrc_read_alloc(eppnt->p_offset, eppnt->p_filesz,
3235 src, &err);
3236 if (interp_name == NULL) {
3237 goto exit_errmsg;
8a1a5274
RH		 3238 }
3239 if (interp_name[eppnt->p_filesz - 1] != 0) {
c7f17e7b 3240 error_setg(&err, "Invalid PT_INTERP entry");
8a1a5274
RH		 3241 goto exit_errmsg;
3242 }
3243 *pinterp_name = g_steal_pointer(&interp_name);
83f990eb 3244 } else if (eppnt->p_type == PT_GNU_PROPERTY) {
3bd02386 3245 if (!parse_elf_properties(src, info, eppnt, &err)) {
83f990eb
RH		 3246 goto exit_errmsg;
3247 }
872f3d04
RH		 3248 } else if (eppnt->p_type == PT_GNU_STACK) {
3249 info->exec_stack = eppnt->p_flags & PF_X;
682674b8
RH		 3250 }
3251 }
3252
1ea06ded
RH		 3253 load_addr = loaddr;
3254
6fd59449 3255 if (pinterp_name != NULL) {
6fd59449
RH		 3256 if (ehdr->e_type == ET_EXEC) {
3257 /*
3258 * Make sure that the low address does not conflict with
3259 * MMAP_MIN_ADDR or the QEMU application itself.
3260 */
3261 probe_guest_base(image_name, loaddr, hiaddr);
ee947430 3262 } else {
1ea06ded
RH		 3263 abi_ulong align;
3264
ee947430
AB		 3265 /*
3266 * The binary is dynamic, but we still need to
3267 * select guest_base. In this case we pass a size.
3268 */
3269 probe_guest_base(image_name, 0, hiaddr - loaddr);
1ea06ded
RH		 3270
3271 /*
3272 * Avoid collision with the loader by providing a different
3273 * default load address.
3274 */
3275 load_addr += elf_et_dyn_base;
3276
3277 /*
3278 * TODO: Better support for mmap alignment is desirable.
3279 * Since we do not have complete control over the guest
3280 * address space, we prefer the kernel to choose some address
3281 * rather than force the use of LOAD_ADDR via MAP_FIXED.
3282 * But without MAP_FIXED we cannot guarantee alignment,
3283 * only suggest it.
3284 */
3285 align = pow2ceil(info->alignment);
3286 if (align) {
3287 load_addr &= -align;
3288 }
d97ef72e 3289 }
6fd59449
RH		 3290 }
3291
3292 /*
3293 * Reserve address space for all of this.
3294 *
ad25051b
RH		 3295 * In the case of ET_EXEC, we supply MAP_FIXED_NOREPLACE so that we get
3296 * exactly the address range that is required. Without reserved_va,
3297 * the guest address space is not isolated. We have attempted to avoid
3298 * conflict with the host program itself via probe_guest_base, but using
3299 * MAP_FIXED_NOREPLACE instead of MAP_FIXED provides an extra check.
6fd59449
RH		 3300 *
3301 * Otherwise this is ET_DYN, and we are searching for a location
3302 * that can hold the memory space required. If the image is
1ea06ded 3303 * pre-linked, LOAD_ADDR will be non-zero, and the kernel should
6fd59449
RH		 3304 * honor that address if it happens to be free.
3305 *
3306 * In both cases, we will overwrite pages in this range with mappings
3307 * from the executable.
3308 */
1ea06ded 3309 load_addr = target_mmap(load_addr, (size_t)hiaddr - loaddr + 1, PROT_NONE,
6fd59449 3310 MAP_PRIVATE | MAP_ANON | MAP_NORESERVE |
ad25051b 3311 (ehdr->e_type == ET_EXEC ? MAP_FIXED_NOREPLACE : 0),
6fd59449
RH		 3312 -1, 0);
3313 if (load_addr == -1) {
c7f17e7b 3314 goto exit_mmap;
d97ef72e 3315 }
682674b8 3316 load_bias = load_addr - loaddr;
d97ef72e 3317
a99856cd 3318 if (elf_is_fdpic(ehdr)) {
1af02e83 3319 struct elf32_fdpic_loadseg *loadsegs = info->loadsegs =
7267c094 3320 g_malloc(sizeof(*loadsegs) * info->nsegs);
1af02e83
MF		 3321
3322 for (i = 0; i < ehdr->e_phnum; ++i) {
3323 switch (phdr[i].p_type) {
3324 case PT_DYNAMIC:
3325 info->pt_dynamic_addr = phdr[i].p_vaddr + load_bias;
3326 break;
3327 case PT_LOAD:
3328 loadsegs->addr = phdr[i].p_vaddr + load_bias;
3329 loadsegs->p_vaddr = phdr[i].p_vaddr;
3330 loadsegs->p_memsz = phdr[i].p_memsz;
3331 ++loadsegs;
3332 break;
3333 }
3334 }
3335 }
1af02e83 3336
8e62a717 3337 info->load_bias = load_bias;
dc12567a
JK		 3338 info->code_offset = load_bias;
3339 info->data_offset = load_bias;
8e62a717
RH		 3340 info->load_addr = load_addr;
3341 info->entry = ehdr->e_entry + load_bias;
3342 info->start_code = -1;
3343 info->end_code = 0;
3344 info->start_data = -1;
3345 info->end_data = 0;
1f356e8c 3346 /* Usual start for brk is after all sections of the main executable. */
aec338d6 3347 info->brk = TARGET_PAGE_ALIGN(hiaddr + load_bias);
d8fd2954 3348 info->elf_flags = ehdr->e_flags;
8e62a717 3349
e8384b37
RH		 3350 prot_exec = PROT_EXEC;
3351#ifdef TARGET_AARCH64
3352 /*
3353 * If the BTI feature is present, this indicates that the executable
3354 * pages of the startup binary should be mapped with PROT_BTI, so that
3355 * branch targets are enforced.
3356 *
3357 * The startup binary is either the interpreter or the static executable.
3358 * The interpreter is responsible for all pages of a dynamic executable.
3359 *
3360 * Elf notes are backward compatible to older cpus.
3361 * Do not enable BTI unless it is supported.
3362 */
3363 if ((info->note_flags & GNU_PROPERTY_AARCH64_FEATURE_1_BTI)
3364 && (pinterp_name == NULL || *pinterp_name == 0)
3365 && cpu_isar_feature(aa64_bti, ARM_CPU(thread_cpu))) {
3366 prot_exec |= TARGET_PROT_BTI;
3367 }
3368#endif
3369
8e62a717
RH		 3370 for (i = 0; i < ehdr->e_phnum; i++) {
3371 struct elf_phdr *eppnt = phdr + i;
d97ef72e 3372 if (eppnt->p_type == PT_LOAD) {
5f4e5b34 3373 abi_ulong vaddr, vaddr_po, vaddr_ps, vaddr_ef, vaddr_em;
d97ef72e 3374 int elf_prot = 0;
d97ef72e 3375
e5eaf570
RH		 3376 if (eppnt->p_flags & PF_R) {
3377 elf_prot |= PROT_READ;
3378 }
3379 if (eppnt->p_flags & PF_W) {
3380 elf_prot |= PROT_WRITE;
3381 }
3382 if (eppnt->p_flags & PF_X) {
e8384b37 3383 elf_prot |= prot_exec;
e5eaf570 3384 }
d97ef72e 3385
682674b8 3386 vaddr = load_bias + eppnt->p_vaddr;
e3d97d5c
RH		 3387 vaddr_po = vaddr & ~TARGET_PAGE_MASK;
3388 vaddr_ps = vaddr & TARGET_PAGE_MASK;
22d113b5
GM		 3389
3390 vaddr_ef = vaddr + eppnt->p_filesz;
3391 vaddr_em = vaddr + eppnt->p_memsz;
682674b8 3392
d87146bc 3393 /*
22d113b5
GM		 3394 * Some segments may be completely empty, with a non-zero p_memsz
3395 * but no backing file segment.
d87146bc
GM		 3396 */
3397 if (eppnt->p_filesz != 0) {
3bd02386 3398 error = imgsrc_mmap(vaddr_ps, eppnt->p_filesz + vaddr_po,
5f4e5b34 3399 elf_prot, MAP_PRIVATE | MAP_FIXED,
3bd02386 3400 src, eppnt->p_offset - vaddr_po);
d87146bc 3401 if (error == -1) {
c7f17e7b 3402 goto exit_mmap;
d87146bc 3403 }
5f4e5b34 3404 }
09bfb054 3405
5f4e5b34
RH		 3406 /* If the load segment requests extra zeros (e.g. bss), map it. */
3407 if (vaddr_ef < vaddr_em &&
e6e66b03
RH		 3408 !zero_bss(vaddr_ef, vaddr_em, elf_prot, &err)) {
3409 goto exit_errmsg;
cf129f3a 3410 }
8e62a717
RH		 3411
3412 /* Find the full program boundaries. */
3413 if (elf_prot & PROT_EXEC) {
3414 if (vaddr < info->start_code) {
3415 info->start_code = vaddr;
3416 }
3417 if (vaddr_ef > info->end_code) {
3418 info->end_code = vaddr_ef;
3419 }
3420 }
3421 if (elf_prot & PROT_WRITE) {
3422 if (vaddr < info->start_data) {
3423 info->start_data = vaddr;
3424 }
3425 if (vaddr_ef > info->end_data) {
3426 info->end_data = vaddr_ef;
3427 }
8a045188 3428 }
5dd0db52
SM		 3429#ifdef TARGET_MIPS
3430 } else if (eppnt->p_type == PT_MIPS_ABIFLAGS) {
3431 Mips_elf_abiflags_v0 abiflags;
3bd02386
RH		 3432
3433 if (!imgsrc_read(&abiflags, eppnt->p_offset, sizeof(abiflags),
3434 src, &err)) {
5dd0db52
SM		 3435 goto exit_errmsg;
3436 }
5dd0db52 3437 bswap_mips_abiflags(&abiflags);
c94cb6c9 3438 info->fp_abi = abiflags.fp_abi;
5dd0db52 3439#endif
d97ef72e 3440 }
682674b8 3441 }
5fafdf24 3442
8e62a717
RH		 3443 if (info->end_data == 0) {
3444 info->start_data = info->end_code;
3445 info->end_data = info->end_code;
8e62a717
RH		 3446 }
3447
682674b8 3448 if (qemu_log_enabled()) {
86cf82dc 3449 load_symbols(ehdr, src, load_bias);
682674b8 3450 }
31e31b8a 3451
3bd02386 3452 debuginfo_report_elf(image_name, src->fd, load_bias);
7c10cb38 3453
98c1076c
AB		 3454 mmap_unlock();
3455
3bd02386 3456 close(src->fd);
8e62a717
RH		 3457 return;
3458
c7f17e7b
RH		 3459 exit_mmap:
3460 error_setg_errno(&err, errno, "Error mapping file");
3461 goto exit_errmsg;
8e62a717 3462 exit_errmsg:
c7f17e7b 3463 error_reportf_err(err, "%s: ", image_name);
8e62a717
RH		 3464 exit(-1);
3465}
3466
3467static void load_elf_interp(const char *filename, struct image_info *info,
3468 char bprm_buf[BPRM_BUF_SIZE])
3469{
40d487ee 3470 struct elfhdr ehdr;
3bd02386 3471 ImageSource src;
8e62a717 3472 int fd, retval;
808f6563 3473 Error *err = NULL;
8e62a717
RH		 3474
3475 fd = open(path(filename), O_RDONLY);
3476 if (fd < 0) {
808f6563
RH		 3477 error_setg_file_open(&err, errno, filename);
3478 error_report_err(err);
3479 exit(-1);
8e62a717 3480 }
31e31b8a 3481
8e62a717
RH		 3482 retval = read(fd, bprm_buf, BPRM_BUF_SIZE);
3483 if (retval < 0) {
808f6563
RH		 3484 error_setg_errno(&err, errno, "Error reading file header");
3485 error_reportf_err(err, "%s: ", filename);
3486 exit(-1);
8e62a717 3487 }
808f6563 3488
3bd02386
RH		 3489 src.fd = fd;
3490 src.cache = bprm_buf;
3491 src.cache_size = retval;
8e62a717 3492
3bd02386 3493 load_elf_image(filename, &src, info, &ehdr, NULL);
31e31b8a
FB		 3494}
3495
c40f621a
RH		 3496#ifdef VDSO_HEADER
3497#include VDSO_HEADER
3498#define vdso_image_info() &vdso_image_info
3499#else
3500#define vdso_image_info() NULL
3501#endif
3502
3503static void load_elf_vdso(struct image_info *info, const VdsoImageInfo *vdso)
3504{
3505 ImageSource src;
3506 struct elfhdr ehdr;
3507 abi_ulong load_bias, load_addr;
3508
3509 src.fd = -1;
3510 src.cache = vdso->image;
3511 src.cache_size = vdso->image_size;
3512
3513 load_elf_image("<internal-vdso>", &src, info, &ehdr, NULL);
3514 load_addr = info->load_addr;
3515 load_bias = info->load_bias;
3516
3517 /*
3518 * We need to relocate the VDSO image. The one built into the kernel
3519 * is built for a fixed address. The one built for QEMU is not, since
3520 * that requires close control of the guest address space.
3521 * We pre-processed the image to locate all of the addresses that need
3522 * to be updated.
3523 */
3524 for (unsigned i = 0, n = vdso->reloc_count; i < n; i++) {
3525 abi_ulong *addr = g2h_untagged(load_addr + vdso->relocs[i]);
3526 *addr = tswapal(tswapal(*addr) + load_bias);
3527 }
3528
3529 /* Install signal trampolines, if present. */
3530 if (vdso->sigreturn_ofs) {
3531 default_sigreturn = load_addr + vdso->sigreturn_ofs;
3532 }
3533 if (vdso->rt_sigreturn_ofs) {
3534 default_rt_sigreturn = load_addr + vdso->rt_sigreturn_ofs;
8e62a717
RH		 3535 }
3536
c40f621a
RH		 3537 /* Remove write from VDSO segment. */
3538 target_mprotect(info->start_data, info->end_data - info->start_data,
3539 PROT_READ | PROT_EXEC);
31e31b8a
FB		 3540}
3541
49918a75
PB		 3542static int symfind(const void *s0, const void *s1)
3543{
49918a75 3544 struct elf_sym *sym = (struct elf_sym *)s1;
b6235a75 3545 __typeof(sym->st_value) addr = *(uint64_t *)s0;
49918a75 3546 int result = 0;
b6235a75 3547
c7c530cd 3548 if (addr < sym->st_value) {
49918a75 3549 result = -1;
c7c530cd 3550 } else if (addr >= sym->st_value + sym->st_size) {
49918a75
PB		 3551 result = 1;
3552 }
3553 return result;
3554}
3555
b6235a75 3556static const char *lookup_symbolxx(struct syminfo *s, uint64_t orig_addr)
49918a75
PB		 3557{
3558#if ELF_CLASS == ELFCLASS32
3559 struct elf_sym *syms = s->disas_symtab.elf32;
3560#else
3561 struct elf_sym *syms = s->disas_symtab.elf64;
3562#endif
3563
3564 // binary search
49918a75
PB		 3565 struct elf_sym *sym;
3566
c7c530cd 3567 sym = bsearch(&orig_addr, syms, s->disas_num_syms, sizeof(*syms), symfind);
7cba04f6 3568 if (sym != NULL) {
49918a75
PB		 3569 return s->disas_strtab + sym->st_name;
3570 }
3571
3572 return "";
3573}
3574
159fb790 3575/* FIXME: This should use elf_ops.h.inc */
49918a75
PB		 3576static int symcmp(const void *s0, const void *s1)
3577{
3578 struct elf_sym *sym0 = (struct elf_sym *)s0;
3579 struct elf_sym *sym1 = (struct elf_sym *)s1;
3580 return (sym0->st_value < sym1->st_value)
3581 ? -1
3582 : ((sym0->st_value > sym1->st_value) ? 1 : 0);
3583}
3584
689f936f 3585/* Best attempt to load symbols from this ELF object. */
86cf82dc
RH		 3586static void load_symbols(struct elfhdr *hdr, const ImageSource *src,
3587 abi_ulong load_bias)
689f936f 3588{
682674b8 3589 int i, shnum, nsyms, sym_idx = 0, str_idx = 0;
86cf82dc 3590 g_autofree struct elf_shdr *shdr = NULL;
b9475279 3591 char *strings = NULL;
86cf82dc
RH		 3592 struct elf_sym *syms = NULL;
3593 struct elf_sym *new_syms;
3594 uint64_t segsz;
689f936f 3595
682674b8 3596 shnum = hdr->e_shnum;
86cf82dc
RH		 3597 shdr = imgsrc_read_alloc(hdr->e_shoff, shnum * sizeof(struct elf_shdr),
3598 src, NULL);
3599 if (shdr == NULL) {
682674b8
RH		 3600 return;
3601 }
3602
3603 bswap_shdr(shdr, shnum);
3604 for (i = 0; i < shnum; ++i) {
3605 if (shdr[i].sh_type == SHT_SYMTAB) {
3606 sym_idx = i;
3607 str_idx = shdr[i].sh_link;
49918a75
PB		 3608 goto found;
3609 }
689f936f 3610 }
682674b8
RH		 3611
3612 /* There will be no symbol table if the file was stripped. */
3613 return;
689f936f
FB		 3614
3615 found:
682674b8 3616 /* Now know where the strtab and symtab are. Snarf them. */
5fafdf24 3617
1e06262d 3618 segsz = shdr[str_idx].sh_size;
86cf82dc
RH		 3619 strings = g_try_malloc(segsz);
3620 if (!strings) {
b9475279 3621 goto give_up;
682674b8 3622 }
86cf82dc 3623 if (!imgsrc_read(strings, shdr[str_idx].sh_offset, segsz, src, NULL)) {
b9475279 3624 goto give_up;
682674b8 3625 }
31e31b8a 3626
86cf82dc 3627 segsz = shdr[sym_idx].sh_size;
1e06262d 3628 if (segsz / sizeof(struct elf_sym) > INT_MAX) {
86cf82dc
RH		 3629 /*
3630 * Implausibly large symbol table: give up rather than ploughing
3631 * on with the number of symbols calculation overflowing.
1e06262d
PM		 3632 */
3633 goto give_up;
3634 }
3635 nsyms = segsz / sizeof(struct elf_sym);
86cf82dc
RH		 3636 syms = g_try_malloc(segsz);
3637 if (!syms) {
3638 goto give_up;
3639 }
3640 if (!imgsrc_read(syms, shdr[sym_idx].sh_offset, segsz, src, NULL)) {
3641 goto give_up;
3642 }
3643
682674b8 3644 for (i = 0; i < nsyms; ) {
49918a75 3645 bswap_sym(syms + i);
682674b8
RH		 3646 /* Throw away entries which we do not need. */
3647 if (syms[i].st_shndx == SHN_UNDEF
3648 || syms[i].st_shndx >= SHN_LORESERVE
3649 || ELF_ST_TYPE(syms[i].st_info) != STT_FUNC) {
3650 if (i < --nsyms) {
49918a75
PB		 3651 syms[i] = syms[nsyms];
3652 }
682674b8 3653 } else {
49918a75 3654#if defined(TARGET_ARM) || defined (TARGET_MIPS)
682674b8
RH		 3655 /* The bottom address bit marks a Thumb or MIPS16 symbol. */
3656 syms[i].st_value &= ~(target_ulong)1;
0774bed1 3657#endif
682674b8
RH		 3658 syms[i].st_value += load_bias;
3659 i++;
3660 }
0774bed1 3661 }
49918a75 3662
b9475279
CV		 3663 /* No "useful" symbol. */
3664 if (nsyms == 0) {
3665 goto give_up;
3666 }
3667
86cf82dc
RH		 3668 /*
3669 * Attempt to free the storage associated with the local symbols
3670 * that we threw away. Whether or not this has any effect on the
3671 * memory allocation depends on the malloc implementation and how
3672 * many symbols we managed to discard.
3673 */
0ef9ea29 3674 new_syms = g_try_renew(struct elf_sym, syms, nsyms);
8d79de6e 3675 if (new_syms == NULL) {
b9475279 3676 goto give_up;
5d5c9930 3677 }
8d79de6e 3678 syms = new_syms;
5d5c9930 3679
49918a75 3680 qsort(syms, nsyms, sizeof(*syms), symcmp);
689f936f 3681
86cf82dc
RH		 3682 {
3683 struct syminfo *s = g_new(struct syminfo, 1);
3684
3685 s->disas_strtab = strings;
3686 s->disas_num_syms = nsyms;
49918a75 3687#if ELF_CLASS == ELFCLASS32
86cf82dc 3688 s->disas_symtab.elf32 = syms;
49918a75 3689#else
86cf82dc 3690 s->disas_symtab.elf64 = syms;
49918a75 3691#endif
86cf82dc
RH		 3692 s->lookup_symbol = lookup_symbolxx;
3693 s->next = syminfos;
3694 syminfos = s;
3695 }
b9475279
CV		 3696 return;
3697
86cf82dc 3698 give_up:
0ef9ea29
PM		 3699 g_free(strings);
3700 g_free(syms);
689f936f 3701}
31e31b8a 3702
768fe76e
YS		 3703uint32_t get_elf_eflags(int fd)
3704{
3705 struct elfhdr ehdr;
3706 off_t offset;
3707 int ret;
3708
3709 /* Read ELF header */
3710 offset = lseek(fd, 0, SEEK_SET);
3711 if (offset == (off_t) -1) {
3712 return 0;
3713 }
3714 ret = read(fd, &ehdr, sizeof(ehdr));
3715 if (ret < sizeof(ehdr)) {
3716 return 0;
3717 }
3718 offset = lseek(fd, offset, SEEK_SET);
3719 if (offset == (off_t) -1) {
3720 return 0;
3721 }
3722
3723 /* Check ELF signature */
3724 if (!elf_check_ident(&ehdr)) {
3725 return 0;
3726 }
3727
3728 /* check header */
3729 bswap_ehdr(&ehdr);
3730 if (!elf_check_ehdr(&ehdr)) {
3731 return 0;
3732 }
3733
3734 /* return architecture id */
3735 return ehdr.e_flags;
3736}
3737
f0116c54 3738int load_elf_binary(struct linux_binprm *bprm, struct image_info *info)
31e31b8a 3739{
40d487ee
RH		 3740 /*
3741 * We need a copy of the elf header for passing to create_elf_tables.
3742 * We will have overwritten the original when we re-use bprm->buf
3743 * while loading the interpreter. Allocate the storage for this now
3744 * and let elf_load_image do any swapping that may be required.
3745 */
3746 struct elfhdr ehdr;
c40f621a 3747 struct image_info interp_info, vdso_info;
8e62a717 3748 char *elf_interpreter = NULL;
59baae9a 3749 char *scratch;
31e31b8a 3750
abcac736
DS		 3751 memset(&interp_info, 0, sizeof(interp_info));
3752#ifdef TARGET_MIPS
3753 interp_info.fp_abi = MIPS_ABI_FP_UNKNOWN;
3754#endif
3755
3bd02386 3756 load_elf_image(bprm->filename, &bprm->src, info, &ehdr, &elf_interpreter);
31e31b8a 3757
59baae9a
SB		 3758 /* Do this so that we can load the interpreter, if need be. We will
3759 change some of these later */
3760 bprm->p = setup_arg_pages(bprm, info);
3761
3762 scratch = g_new0(char, TARGET_PAGE_SIZE);
7c4ee5bc
RH		 3763 if (STACK_GROWS_DOWN) {
3764 bprm->p = copy_elf_strings(1, &bprm->filename, scratch,
3765 bprm->p, info->stack_limit);
3766 info->file_string = bprm->p;
3767 bprm->p = copy_elf_strings(bprm->envc, bprm->envp, scratch,
3768 bprm->p, info->stack_limit);
3769 info->env_strings = bprm->p;
3770 bprm->p = copy_elf_strings(bprm->argc, bprm->argv, scratch,
3771 bprm->p, info->stack_limit);
3772 info->arg_strings = bprm->p;
3773 } else {
3774 info->arg_strings = bprm->p;
3775 bprm->p = copy_elf_strings(bprm->argc, bprm->argv, scratch,
3776 bprm->p, info->stack_limit);
3777 info->env_strings = bprm->p;
3778 bprm->p = copy_elf_strings(bprm->envc, bprm->envp, scratch,
3779 bprm->p, info->stack_limit);
3780 info->file_string = bprm->p;
3781 bprm->p = copy_elf_strings(1, &bprm->filename, scratch,
3782 bprm->p, info->stack_limit);
3783 }
3784
59baae9a
SB		 3785 g_free(scratch);
3786
e5fe0c52 3787 if (!bprm->p) {
bf858897
RH		 3788 fprintf(stderr, "%s: %s\n", bprm->filename, strerror(E2BIG));
3789 exit(-1);
379f6698 3790 }
379f6698 3791
8e62a717
RH		 3792 if (elf_interpreter) {
3793 load_elf_interp(elf_interpreter, &interp_info, bprm->buf);
31e31b8a 3794
1f356e8c
HD		 3795 /*
3796 * While unusual because of ELF_ET_DYN_BASE, if we are unlucky
3797 * with the mappings the interpreter can be loaded above but
3798 * near the main executable, which can leave very little room
3799 * for the heap.
3800 * If the current brk has less than 16MB, use the end of the
3801 * interpreter.
3802 */
3803 if (interp_info.brk > info->brk &&
3804 interp_info.load_bias - info->brk < 16 * MiB) {
3805 info->brk = interp_info.brk;
3806 }
3807
8e62a717
RH		 3808 /* If the program interpreter is one of these two, then assume
3809 an iBCS2 image. Otherwise assume a native linux image. */
3810
3811 if (strcmp(elf_interpreter, "/usr/lib/libc.so.1") == 0
3812 || strcmp(elf_interpreter, "/usr/lib/ld.so.1") == 0) {
3813 info->personality = PER_SVR4;
31e31b8a 3814
8e62a717
RH		 3815 /* Why this, you ask??? Well SVr4 maps page 0 as read-only,
3816 and some applications "depend" upon this behavior. Since
3817 we do not have the power to recompile these, we emulate
3818 the SVr4 behavior. Sigh. */
f11c05c3
RH		 3819 target_mmap(0, TARGET_PAGE_SIZE, PROT_READ | PROT_EXEC,
3820 MAP_FIXED_NOREPLACE | MAP_PRIVATE | MAP_ANONYMOUS,
3821 -1, 0);
8e62a717 3822 }
c94cb6c9
SM		 3823#ifdef TARGET_MIPS
3824 info->interp_fp_abi = interp_info.fp_abi;
3825#endif
31e31b8a
FB		 3826 }
3827
db2af69d 3828 /*
c40f621a
RH		 3829 * Load a vdso if available, which will amongst other things contain the
3830 * signal trampolines. Otherwise, allocate a separate page for them.
db2af69d 3831 */
c40f621a
RH		 3832 const VdsoImageInfo *vdso = vdso_image_info();
3833 if (vdso) {
3834 load_elf_vdso(&vdso_info, vdso);
5d94c2ff 3835 info->vdso = vdso_info.load_bias;
c40f621a 3836 } else if (TARGET_ARCH_HAS_SIGTRAMP_PAGE) {
802ae45e
LV		 3837 abi_long tramp_page = target_mmap(0, TARGET_PAGE_SIZE,
3838 PROT_READ | PROT_WRITE,
3839 MAP_PRIVATE | MAP_ANON, -1, 0);
3840 if (tramp_page == -1) {
3841 return -errno;
3842 }
3843
db2af69d
RH		 3844 setup_sigtramp(tramp_page);
3845 target_mprotect(tramp_page, TARGET_PAGE_SIZE, PROT_READ | PROT_EXEC);
3846 }
3847
c40f621a
RH		 3848 bprm->p = create_elf_tables(bprm->p, bprm->argc, bprm->envc, &ehdr, info,
3849 elf_interpreter ? &interp_info : NULL,
3850 vdso ? &vdso_info : NULL);
8e62a717
RH		 3851 info->start_stack = bprm->p;
3852
3853 /* If we have an interpreter, set that as the program's entry point.
8e78064e 3854 Copy the load_bias as well, to help PPC64 interpret the entry
8e62a717
RH		 3855 point as a function descriptor. Do this after creating elf tables
3856 so that we copy the original program entry point into the AUXV. */
3857 if (elf_interpreter) {
8e78064e 3858 info->load_bias = interp_info.load_bias;
8e62a717 3859 info->entry = interp_info.entry;
2b323087 3860 g_free(elf_interpreter);
8e62a717 3861 }
31e31b8a 3862
edf8e2af
MW		 3863#ifdef USE_ELF_CORE_DUMP
3864 bprm->core_dump = &elf_core_dump;
3865#endif
3866
31e31b8a
FB		 3867 return 0;
3868}
3869
edf8e2af 3870#ifdef USE_ELF_CORE_DUMP
41689bb3
RH		 3871#include "exec/translate-all.h"
3872
edf8e2af
MW		 3873/*
3874 * Definitions to generate Intel SVR4-like core files.
a2547a13 3875 * These mostly have the same names as the SVR4 types with "target_elf_"
edf8e2af
MW		 3876 * tacked on the front to prevent clashes with linux definitions,
3877 * and the typedef forms have been avoided. This is mostly like
3878 * the SVR4 structure, but more Linuxy, with things that Linux does
3879 * not support and which gdb doesn't really use excluded.
3880 *
3881 * Fields we don't dump (their contents is zero) in linux-user qemu
3882 * are marked with XXX.
3883 *
3884 * Core dump code is copied from linux kernel (fs/binfmt_elf.c).
3885 *
3886 * Porting ELF coredump for target is (quite) simple process. First you
dd0a3651 3887 * define USE_ELF_CORE_DUMP in target ELF code (where init_thread() for
edf8e2af
MW		 3888 * the target resides):
3889 *
3890 * #define USE_ELF_CORE_DUMP
3891 *
3892 * Next you define type of register set used for dumping. ELF specification
3893 * says that it needs to be array of elf_greg_t that has size of ELF_NREG.
3894 *
c227f099 3895 * typedef <target_regtype> target_elf_greg_t;
edf8e2af 3896 * #define ELF_NREG <number of registers>
c227f099 3897 * typedef taret_elf_greg_t target_elf_gregset_t[ELF_NREG];
edf8e2af 3898 *
edf8e2af
MW		 3899 * Last step is to implement target specific function that copies registers
3900 * from given cpu into just specified register set. Prototype is:
3901 *
c227f099 3902 * static void elf_core_copy_regs(taret_elf_gregset_t *regs,
9349b4f9 3903 * const CPUArchState *env);
edf8e2af
MW		 3904 *
3905 * Parameters:
3906 * regs - copy register values into here (allocated and zeroed by caller)
3907 * env - copy registers from here
3908 *
3909 * Example for ARM target is provided in this file.
3910 */
3911
a2547a13 3912struct target_elf_siginfo {
f8fd4fc4
PB		 3913 abi_int si_signo; /* signal number */
3914 abi_int si_code; /* extra code */
3915 abi_int si_errno; /* errno */
edf8e2af
MW		 3916};
3917
a2547a13
LD		 3918struct target_elf_prstatus {
3919 struct target_elf_siginfo pr_info; /* Info associated with signal */
1ddd592f 3920 abi_short pr_cursig; /* Current signal */
ca98ac83
PB		 3921 abi_ulong pr_sigpend; /* XXX */
3922 abi_ulong pr_sighold; /* XXX */
c227f099
AL		 3923 target_pid_t pr_pid;
3924 target_pid_t pr_ppid;
3925 target_pid_t pr_pgrp;
3926 target_pid_t pr_sid;
edf8e2af
MW		 3927 struct target_timeval pr_utime; /* XXX User time */
3928 struct target_timeval pr_stime; /* XXX System time */
3929 struct target_timeval pr_cutime; /* XXX Cumulative user time */
3930 struct target_timeval pr_cstime; /* XXX Cumulative system time */
c227f099 3931 target_elf_gregset_t pr_reg; /* GP registers */
f8fd4fc4 3932 abi_int pr_fpvalid; /* XXX */
edf8e2af
MW		 3933};
3934
3935#define ELF_PRARGSZ (80) /* Number of chars for args */
3936
a2547a13 3937struct target_elf_prpsinfo {
edf8e2af
MW		 3938 char pr_state; /* numeric process state */
3939 char pr_sname; /* char for pr_state */
3940 char pr_zomb; /* zombie */
3941 char pr_nice; /* nice val */
ca98ac83 3942 abi_ulong pr_flag; /* flags */
c227f099
AL		 3943 target_uid_t pr_uid;
3944 target_gid_t pr_gid;
3945 target_pid_t pr_pid, pr_ppid, pr_pgrp, pr_sid;
edf8e2af 3946 /* Lots missing */
d7eb2b92 3947 char pr_fname[16] QEMU_NONSTRING; /* filename of executable */
edf8e2af
MW		 3948 char pr_psargs[ELF_PRARGSZ]; /* initial part of arg list */
3949};
3950
edf8e2af 3951#ifdef BSWAP_NEEDED
a2547a13 3952static void bswap_prstatus(struct target_elf_prstatus *prstatus)
edf8e2af 3953{
ca98ac83
PB		 3954 prstatus->pr_info.si_signo = tswap32(prstatus->pr_info.si_signo);
3955 prstatus->pr_info.si_code = tswap32(prstatus->pr_info.si_code);
3956 prstatus->pr_info.si_errno = tswap32(prstatus->pr_info.si_errno);
edf8e2af 3957 prstatus->pr_cursig = tswap16(prstatus->pr_cursig);
ca98ac83
PB		 3958 prstatus->pr_sigpend = tswapal(prstatus->pr_sigpend);
3959 prstatus->pr_sighold = tswapal(prstatus->pr_sighold);
edf8e2af
MW		 3960 prstatus->pr_pid = tswap32(prstatus->pr_pid);
3961 prstatus->pr_ppid = tswap32(prstatus->pr_ppid);
3962 prstatus->pr_pgrp = tswap32(prstatus->pr_pgrp);
3963 prstatus->pr_sid = tswap32(prstatus->pr_sid);
3964 /* cpu times are not filled, so we skip them */
3965 /* regs should be in correct format already */
3966 prstatus->pr_fpvalid = tswap32(prstatus->pr_fpvalid);
3967}
3968
a2547a13 3969static void bswap_psinfo(struct target_elf_prpsinfo *psinfo)
edf8e2af 3970{
ca98ac83 3971 psinfo->pr_flag = tswapal(psinfo->pr_flag);
edf8e2af
MW		 3972 psinfo->pr_uid = tswap16(psinfo->pr_uid);
3973 psinfo->pr_gid = tswap16(psinfo->pr_gid);
3974 psinfo->pr_pid = tswap32(psinfo->pr_pid);
3975 psinfo->pr_ppid = tswap32(psinfo->pr_ppid);
3976 psinfo->pr_pgrp = tswap32(psinfo->pr_pgrp);
3977 psinfo->pr_sid = tswap32(psinfo->pr_sid);
3978}
991f8f0c
RH		 3979
3980static void bswap_note(struct elf_note *en)
3981{
3982 bswap32s(&en->n_namesz);
3983 bswap32s(&en->n_descsz);
3984 bswap32s(&en->n_type);
3985}
3986#else
3987static inline void bswap_prstatus(struct target_elf_prstatus *p) { }
3988static inline void bswap_psinfo(struct target_elf_prpsinfo *p) {}
3989static inline void bswap_note(struct elf_note *en) { }
edf8e2af
MW		 3990#endif /* BSWAP_NEEDED */
3991
edf8e2af
MW		 3992/*
3993 * Calculate file (dump) size of given memory region.
3994 */
50e33f52
RH		 3995static size_t vma_dump_size(target_ulong start, target_ulong end,
3996 unsigned long flags)
edf8e2af 3997{
1928d50b 3998 /* The area must be readable. */
50e33f52 3999 if (!(flags & PAGE_READ)) {
1928d50b
RH		 4000 return 0;
4001 }
edf8e2af
MW		 4002
4003 /*
4004 * Usually we don't dump executable pages as they contain
4005 * non-writable code that debugger can read directly from
1928d50b 4006 * target library etc. If there is no elf header, we dump it.
edf8e2af 4007 */
50e33f52
RH		 4008 if (!(flags & PAGE_WRITE_ORG) &&
4009 (flags & PAGE_EXEC) &&
4010 memcmp(g2h_untagged(start), ELFMAG, SELFMAG) == 0) {
1928d50b 4011 return 0;
edf8e2af
MW		 4012 }
4013
50e33f52 4014 return end - start;
edf8e2af
MW		 4015}
4016
2410d28d
RH		 4017static size_t size_note(const char *name, size_t datasz)
4018{
4019 size_t namesz = strlen(name) + 1;
4020
4021 namesz = ROUND_UP(namesz, 4);
4022 datasz = ROUND_UP(datasz, 4);
4023
4024 return sizeof(struct elf_note) + namesz + datasz;
4025}
4026
243c4706 4027static void *fill_note(void **pptr, int type, const char *name, size_t datasz)
edf8e2af 4028{
243c4706
RH		 4029 void *ptr = *pptr;
4030 struct elf_note *n = ptr;
4031 size_t namesz = strlen(name) + 1;
edf8e2af 4032
243c4706
RH		 4033 n->n_namesz = namesz;
4034 n->n_descsz = datasz;
4035 n->n_type = type;
4036 bswap_note(n);
80f5ce75 4037
243c4706
RH		 4038 ptr += sizeof(*n);
4039 memcpy(ptr, name, namesz);
edf8e2af 4040
243c4706
RH		 4041 namesz = ROUND_UP(namesz, 4);
4042 datasz = ROUND_UP(datasz, 4);
4043
4044 *pptr = ptr + namesz + datasz;
4045 return ptr + namesz;
edf8e2af
MW		 4046}
4047
4048static void fill_elf_header(struct elfhdr *elf, int segs, uint16_t machine,
d97ef72e 4049 uint32_t flags)
edf8e2af 4050{
243c4706 4051 memcpy(elf->e_ident, ELFMAG, SELFMAG);
edf8e2af 4052
edf8e2af
MW		 4053 elf->e_ident[EI_CLASS] = ELF_CLASS;
4054 elf->e_ident[EI_DATA] = ELF_DATA;
4055 elf->e_ident[EI_VERSION] = EV_CURRENT;
4056 elf->e_ident[EI_OSABI] = ELF_OSABI;
4057
4058 elf->e_type = ET_CORE;
4059 elf->e_machine = machine;
4060 elf->e_version = EV_CURRENT;
4061 elf->e_phoff = sizeof(struct elfhdr);
4062 elf->e_flags = flags;
4063 elf->e_ehsize = sizeof(struct elfhdr);
4064 elf->e_phentsize = sizeof(struct elf_phdr);
4065 elf->e_phnum = segs;
4066
edf8e2af 4067 bswap_ehdr(elf);
edf8e2af
MW		 4068}
4069
243c4706 4070static void fill_elf_note_phdr(struct elf_phdr *phdr, size_t sz, off_t offset)
edf8e2af
MW		 4071{
4072 phdr->p_type = PT_NOTE;
4073 phdr->p_offset = offset;
edf8e2af 4074 phdr->p_filesz = sz;
edf8e2af 4075
991f8f0c 4076 bswap_phdr(phdr, 1);
edf8e2af
MW		 4077}
4078
243c4706
RH		 4079static void fill_prstatus_note(void *data, const TaskState *ts,
4080 CPUState *cpu, int signr)
edf8e2af 4081{
243c4706
RH		 4082 /*
4083 * Because note memory is only aligned to 4, and target_elf_prstatus
4084 * may well have higher alignment requirements, fill locally and
4085 * memcpy to the destination afterward.
4086 */
4087 struct target_elf_prstatus prstatus = {
4088 .pr_info.si_signo = signr,
4089 .pr_cursig = signr,
4090 .pr_pid = ts->ts_tid,
4091 .pr_ppid = getppid(),
4092 .pr_pgrp = getpgrp(),
4093 .pr_sid = getsid(0),
4094 };
edf8e2af 4095
243c4706
RH		 4096 elf_core_copy_regs(&prstatus.pr_reg, cpu_env(cpu));
4097 bswap_prstatus(&prstatus);
4098 memcpy(data, &prstatus, sizeof(prstatus));
edf8e2af
MW		 4099}
4100
243c4706 4101static void fill_prpsinfo_note(void *data, const TaskState *ts)
edf8e2af 4102{
243c4706
RH		 4103 /*
4104 * Because note memory is only aligned to 4, and target_elf_prpsinfo
4105 * may well have higher alignment requirements, fill locally and
4106 * memcpy to the destination afterward.
4107 */
52e566b3
RH		 4108 struct target_elf_prpsinfo psinfo = {
4109 .pr_pid = getpid(),
4110 .pr_ppid = getppid(),
4111 .pr_pgrp = getpgrp(),
4112 .pr_sid = getsid(0),
4113 .pr_uid = getuid(),
4114 .pr_gid = getgid(),
4115 };
900cfbca 4116 char *base_filename;
243c4706 4117 size_t len;
edf8e2af 4118
5f779a3a 4119 len = ts->info->env_strings - ts->info->arg_strings;
243c4706
RH		 4120 len = MIN(len, ELF_PRARGSZ);
4121 memcpy(&psinfo.pr_psargs, g2h_untagged(ts->info->arg_strings), len);
4122 for (size_t i = 0; i < len; i++) {
4123 if (psinfo.pr_psargs[i] == 0) {
4124 psinfo.pr_psargs[i] = ' ';
4125 }
4126 }
4127
900cfbca
JM		 4128 base_filename = g_path_get_basename(ts->bprm->filename);
4129 /*
4130 * Using strncpy here is fine: at max-length,
4131 * this field is not NUL-terminated.
4132 */
243c4706 4133 strncpy(psinfo.pr_fname, base_filename, sizeof(psinfo.pr_fname));
900cfbca 4134 g_free(base_filename);
243c4706
RH		 4135
4136 bswap_psinfo(&psinfo);
4137 memcpy(data, &psinfo, sizeof(psinfo));
edf8e2af
MW		 4138}
4139
243c4706 4140static void fill_auxv_note(void *data, const TaskState *ts)
edf8e2af 4141{
243c4706 4142 memcpy(data, g2h_untagged(ts->info->saved_auxv), ts->info->auxv_len);
edf8e2af
MW		 4143}
4144
4145/*
4146 * Constructs name of coredump file. We have following convention
4147 * for the name:
4148 * qemu_<basename-of-target-binary>_<date>-<time>_<pid>.core
4149 *
68af19ad 4150 * Returns the filename
edf8e2af 4151 */
68af19ad 4152static char *core_dump_filename(const TaskState *ts)
edf8e2af 4153{
68af19ad
DB		 4154 g_autoptr(GDateTime) now = g_date_time_new_now_local();
4155 g_autofree char *nowstr = g_date_time_format(now, "%Y%m%d-%H%M%S");
4156 g_autofree char *base_filename = g_path_get_basename(ts->bprm->filename);
edf8e2af 4157
68af19ad
DB		 4158 return g_strdup_printf("qemu_%s_%s_%d.core",
4159 base_filename, nowstr, (int)getpid());
edf8e2af
MW		 4160}
4161
4162static int dump_write(int fd, const void *ptr, size_t size)
4163{
4164 const char *bufp = (const char *)ptr;
4165 ssize_t bytes_written, bytes_left;
edf8e2af
MW		 4166
4167 bytes_written = 0;
2410d28d 4168 bytes_left = size;
edf8e2af
MW		 4169
4170 /*
4171 * In normal conditions, single write(2) should do but
4172 * in case of socket etc. this mechanism is more portable.
4173 */
4174 do {
4175 bytes_written = write(fd, bufp, bytes_left);
4176 if (bytes_written < 0) {
4177 if (errno == EINTR)
4178 continue;
4179 return (-1);
4180 } else if (bytes_written == 0) { /* eof */
4181 return (-1);
4182 }
4183 bufp += bytes_written;
4184 bytes_left -= bytes_written;
4185 } while (bytes_left > 0);
4186
4187 return (0);
4188}
4189
41689bb3
RH		 4190static int wmr_page_unprotect_regions(void *opaque, target_ulong start,
4191 target_ulong end, unsigned long flags)
4192{
4193 if ((flags & (PAGE_WRITE | PAGE_WRITE_ORG)) == PAGE_WRITE_ORG) {
2c796d23 4194 size_t step = MAX(TARGET_PAGE_SIZE, qemu_real_host_page_size());
41689bb3
RH		 4195
4196 while (1) {
4197 page_unprotect(start, 0);
4198 if (end - start <= step) {
4199 break;
4200 }
4201 start += step;
4202 }
4203 }
4204 return 0;
4205}
4206
50e33f52
RH		 4207typedef struct {
4208 unsigned count;
4209 size_t size;
4210} CountAndSizeRegions;
4211
4212static int wmr_count_and_size_regions(void *opaque, target_ulong start,
4213 target_ulong end, unsigned long flags)
4214{
4215 CountAndSizeRegions *css = opaque;
4216
4217 css->count++;
4218 css->size += vma_dump_size(start, end, flags);
4219 return 0;
4220}
4221
4222typedef struct {
4223 struct elf_phdr *phdr;
4224 off_t offset;
4225} FillRegionPhdr;
4226
4227static int wmr_fill_region_phdr(void *opaque, target_ulong start,
4228 target_ulong end, unsigned long flags)
4229{
4230 FillRegionPhdr *d = opaque;
4231 struct elf_phdr *phdr = d->phdr;
4232
4233 phdr->p_type = PT_LOAD;
4234 phdr->p_vaddr = start;
4235 phdr->p_paddr = 0;
4236 phdr->p_filesz = vma_dump_size(start, end, flags);
4237 phdr->p_offset = d->offset;
4238 d->offset += phdr->p_filesz;
4239 phdr->p_memsz = end - start;
4240 phdr->p_flags = (flags & PAGE_READ ? PF_R : 0)
4241 | (flags & PAGE_WRITE_ORG ? PF_W : 0)
4242 | (flags & PAGE_EXEC ? PF_X : 0);
4243 phdr->p_align = ELF_EXEC_PAGESIZE;
4244
4245 bswap_phdr(phdr, 1);
4246 d->phdr = phdr + 1;
4247 return 0;
4248}
4249
4250static int wmr_write_region(void *opaque, target_ulong start,
4251 target_ulong end, unsigned long flags)
4252{
4253 int fd = *(int *)opaque;
4254 size_t size = vma_dump_size(start, end, flags);
4255
4256 if (!size) {
4257 return 0;
4258 }
4259 return dump_write(fd, g2h_untagged(start), size);
4260}
4261
edf8e2af
MW		 4262/*
4263 * Write out ELF coredump.
4264 *
4265 * See documentation of ELF object file format in:
4266 * http://www.caldera.com/developers/devspecs/gabi41.pdf
4267 *
4268 * Coredump format in linux is following:
4269 *
4270 * 0 +----------------------+ \
4271 * | ELF header | ET_CORE |
4272 * +----------------------+ |
4273 * | ELF program headers | |--- headers
4274 * | - NOTE section | |
4275 * | - PT_LOAD sections | |
4276 * +----------------------+ /
4277 * | NOTEs: |
4278 * | - NT_PRSTATUS |
4279 * | - NT_PRSINFO |
4280 * | - NT_AUXV |
4281 * +----------------------+ <-- aligned to target page
4282 * | Process memory dump |
4283 * : :
4284 * . .
4285 * : :
4286 * | |
4287 * +----------------------+
4288 *
4289 * NT_PRSTATUS -> struct elf_prstatus (per thread)
4290 * NT_PRSINFO -> struct elf_prpsinfo
4291 * NT_AUXV is array of { type, value } pairs (see fill_auxv_note()).
4292 *
4293 * Format follows System V format as close as possible. Current
4294 * version limitations are as follows:
4295 * - no floating point registers are dumped
4296 *
4297 * Function returns 0 in case of success, negative errno otherwise.
4298 *
4299 * TODO: make this work also during runtime: it should be
4300 * possible to force coredump from running process and then
4301 * continue processing. For example qemu could set up SIGUSR2
4302 * handler (provided that target process haven't registered
4303 * handler for that) that does the dump when signal is received.
4304 */
9349b4f9 4305static int elf_core_dump(int signr, const CPUArchState *env)
edf8e2af 4306{
29a0af61 4307 const CPUState *cpu = env_cpu((CPUArchState *)env);
e4e5cb4a 4308 const TaskState *ts = (const TaskState *)get_task_state((CPUState *)cpu);
edf8e2af 4309 struct rlimit dumpsize;
50e33f52 4310 CountAndSizeRegions css;
2410d28d 4311 off_t offset, note_offset, data_offset;
243c4706 4312 size_t note_size;
50e33f52 4313 int cpus, ret;
edf8e2af 4314 int fd = -1;
243c4706 4315 CPUState *cpu_iter;
0ea731db
TW		 4316
4317 if (prctl(PR_GET_DUMPABLE) == 0) {
4318 return 0;
4319 }
4320
f93b9953 4321 if (getrlimit(RLIMIT_CORE, &dumpsize) < 0 || dumpsize.rlim_cur == 0) {
d97ef72e 4322 return 0;
3805d428 4323 }
edf8e2af 4324
b5262077
RH		 4325 cpu_list_lock();
4326 mmap_lock();
4327
41689bb3
RH		 4328 /* By unprotecting, we merge vmas that might be split. */
4329 walk_memory_regions(NULL, wmr_page_unprotect_regions);
4330
edf8e2af
MW		 4331 /*
4332 * Walk through target process memory mappings and
2410d28d 4333 * set up structure containing this information.
edf8e2af 4334 */
50e33f52
RH		 4335 memset(&css, 0, sizeof(css));
4336 walk_memory_regions(&css, wmr_count_and_size_regions);
2410d28d
RH		 4337
4338 cpus = 0;
243c4706 4339 CPU_FOREACH(cpu_iter) {
2410d28d
RH		 4340 cpus++;
4341 }
4342
4343 offset = sizeof(struct elfhdr);
50e33f52 4344 offset += (css.count + 1) * sizeof(struct elf_phdr);
2410d28d
RH		 4345 note_offset = offset;
4346
4347 offset += size_note("CORE", ts->info->auxv_len);
4348 offset += size_note("CORE", sizeof(struct target_elf_prpsinfo));
4349 offset += size_note("CORE", sizeof(struct target_elf_prstatus)) * cpus;
243c4706 4350 note_size = offset - note_offset;
50e33f52 4351 data_offset = ROUND_UP(offset, ELF_EXEC_PAGESIZE);
2410d28d
RH		 4352
4353 /* Do not dump if the corefile size exceeds the limit. */
50e33f52
RH		 4354 if (dumpsize.rlim_cur != RLIM_INFINITY
4355 && dumpsize.rlim_cur < data_offset + css.size) {
2410d28d
RH		 4356 errno = 0;
4357 goto out;
4358 }
edf8e2af 4359
106f8da6
RH		 4360 {
4361 g_autofree char *corefile = core_dump_filename(ts);
e0add9a8 4362 fd = open(corefile, O_WRONLY | O_CREAT | O_TRUNC,
106f8da6
RH		 4363 S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH);
4364 }
4365 if (fd < 0) {
4366 goto out;
4367 }
4368
edf8e2af 4369 /*
243c4706
RH		 4370 * There is a fair amount of alignment padding within the notes
4371 * as well as preceeding the process memory. Allocate a zeroed
4372 * block to hold it all. Write all of the headers directly into
4373 * this buffer and then write it out as a block.
edf8e2af 4374 */
243c4706
RH		 4375 {
4376 g_autofree void *header = g_malloc0(data_offset);
50e33f52 4377 FillRegionPhdr frp;
243c4706
RH		 4378 void *hptr, *dptr;
4379
4380 /* Create elf file header. */
4381 hptr = header;
50e33f52 4382 fill_elf_header(hptr, css.count + 1, ELF_MACHINE, 0);
243c4706
RH		 4383 hptr += sizeof(struct elfhdr);
4384
4385 /* Create elf program headers. */
4386 fill_elf_note_phdr(hptr, note_size, note_offset);
4387 hptr += sizeof(struct elf_phdr);
4388
50e33f52
RH		 4389 frp.phdr = hptr;
4390 frp.offset = data_offset;
4391 walk_memory_regions(&frp, wmr_fill_region_phdr);
4392 hptr = frp.phdr;
edf8e2af 4393
243c4706
RH		 4394 /* Create the notes. */
4395 dptr = fill_note(&hptr, NT_AUXV, "CORE", ts->info->auxv_len);
4396 fill_auxv_note(dptr, ts);
edf8e2af 4397
243c4706
RH		 4398 dptr = fill_note(&hptr, NT_PRPSINFO, "CORE",
4399 sizeof(struct target_elf_prpsinfo));
4400 fill_prpsinfo_note(dptr, ts);
edf8e2af 4401
243c4706
RH		 4402 CPU_FOREACH(cpu_iter) {
4403 dptr = fill_note(&hptr, NT_PRSTATUS, "CORE",
4404 sizeof(struct target_elf_prstatus));
4405 fill_prstatus_note(dptr, ts, cpu_iter,
4406 cpu_iter == cpu ? signr : 0);
4407 }
edf8e2af 4408
243c4706 4409 if (dump_write(fd, header, data_offset) < 0) {
772034b6
PM		 4410 goto out;
4411 }
edf8e2af
MW		 4412 }
4413
edf8e2af 4414 /*
b4c7ab81 4415 * Finally write process memory into the corefile as well.
edf8e2af 4416 */
50e33f52
RH		 4417 if (walk_memory_regions(&fd, wmr_write_region) < 0) {
4418 goto out;
edf8e2af 4419 }
ccb6f3ee 4420 errno = 0;
edf8e2af 4421
d97ef72e 4422 out:
ccb6f3ee 4423 ret = -errno;
b5262077
RH		 4424 mmap_unlock();
4425 cpu_list_unlock();
b35348c7
RH		 4426 if (fd >= 0) {
4427 close(fd);
4428 }
ccb6f3ee 4429 return ret;
edf8e2af 4430}
edf8e2af
MW		 4431#endif /* USE_ELF_CORE_DUMP */
4432
e5fe0c52
PB		 4433void do_init_thread(struct target_pt_regs *regs, struct image_info *infop)
4434{
4435 init_thread(regs, infop);
4436}
Mirror of https://git.qemu.org/git/qemu.git