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* gold-threads.h (class Once): Define.
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
c75ef631
L		 12010-02-11 H.J. Lu <hongjiu.lu@intel.com>
2
3 * i386-dis.c: Update copyright.
4 * i386-gen.c: Likewise.
5 * i386-opc.h: Likewise.
6 * i386-opc.tbl: Likewise.
7
a683cc34
SP		 82010-02-10 Quentin Neill <quentin.neill@amd.com>
9 Sebastian Pop <sebastian.pop@amd.com>
10
11 * i386-dis.c (OP_EX_VexImmW): Reintroduced
12 function to handle 5th imm8 operand.
13 (PREFIX_VEX_3A48): Added.
14 (PREFIX_VEX_3A49): Added.
15 (VEX_W_3A48_P_2): Added.
16 (VEX_W_3A49_P_2): Added.
17 (prefix table): Added entries for PREFIX_VEX_3A48
18 and PREFIX_VEX_3A49.
19 (vex table): Added entries for VEX_W_3A48_P_2 and
20 and VEX_W_3A49_P_2.
21 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
22 for Vec_Imm4 operands.
23 * i386-opc.h (enum): Added Vec_Imm4.
24 (i386_operand_type): Added vec_imm4.
25 * i386-opc.tbl: Add entries for vpermilp[ds].
26 * i386-init.h: Regenerated.
27 * i386-tbl.h: Regenerated.
28
cdc51b07
RS		 292010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
30
31 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
32 and "pwr7". Move "a2" into alphabetical order.
33
ce3d2015
AM		 342010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
35
36 * ppc-dis.c (ppc_opts): Add titan entry.
37 * ppc-opc.c (TITAN, MULHW): Define.
38 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
39
68339fdf
SP		 402010-02-03 Quentin Neill <quentin.neill@amd.com>
41
42 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
43 to CPU_BDVER1_FLAGS
44 * i386-init.h: Regenerated.
45
f3d55a94
AG		 462010-02-03 Anthony Green <green@moxielogic.com>
47
48 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
49 0x0f, and make 0x00 an illegal instruction.
50
b0e28b39
DJ		 512010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
52
53 * opcodes/arm-dis.c (struct arm_private_data): New.
54 (print_insn_coprocessor, print_insn_arm): Update to use struct
55 arm_private_data.
56 (is_mapping_symbol, get_map_sym_type): New functions.
57 (get_sym_code_type): Check the symbol's section. Do not check
58 mapping symbols.
59 (print_insn): Default to disassembling ARM mode code. Check
60 for mapping symbols separately from other symbols. Use
61 struct arm_private_data.
62
1c480963
L		 632010-01-28 H.J. Lu <hongjiu.lu@intel.com>
64
65 * i386-dis.c (EXVexWdqScalar): New.
66 (vex_scalar_w_dq_mode): Likewise.
67 (prefix_table): Update entries for PREFIX_VEX_3899,
68 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
69 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
70 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
71 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
72 (intel_operand_size): Handle vex_scalar_w_dq_mode.
73 (OP_EX): Likewise.
74
539f890d
L		 752010-01-27 H.J. Lu <hongjiu.lu@intel.com>
76
77 * i386-dis.c (XMScalar): New.
78 (EXdScalar): Likewise.
79 (EXqScalar): Likewise.
80 (EXqScalarS): Likewise.
81 (VexScalar): Likewise.
82 (EXdVexScalarS): Likewise.
83 (EXqVexScalarS): Likewise.
84 (XMVexScalar): Likewise.
85 (scalar_mode): Likewise.
86 (d_scalar_mode): Likewise.
87 (d_scalar_swap_mode): Likewise.
88 (q_scalar_mode): Likewise.
89 (q_scalar_swap_mode): Likewise.
90 (vex_scalar_mode): Likewise.
91 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
92 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
93 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
94 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
95 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
96 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
97 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
98 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
99 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
100 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
101 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
102 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
103 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
104 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
105 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
106 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
107 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
108 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
109 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
110 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
111 q_scalar_mode, q_scalar_swap_mode.
112 (OP_XMM): Handle scalar_mode.
113 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
114 and q_scalar_swap_mode.
115 (OP_VEX): Handle vex_scalar_mode.
116
208b4d78
L		 1172010-01-24 H.J. Lu <hongjiu.lu@intel.com>
118
119 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
120
448b213a
L		 1212010-01-24 H.J. Lu <hongjiu.lu@intel.com>
122
123 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
124
47cf8fa0
L		 1252010-01-24 H.J. Lu <hongjiu.lu@intel.com>
126
127 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
128
592d1631
L		 1292010-01-24 H.J. Lu <hongjiu.lu@intel.com>
130
131 * i386-dis.c (Bad_Opcode): New.
132 (bad_opcode): Likewise.
133 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
134 (dis386_twobyte): Likewise.
135 (reg_table): Likewise.
136 (prefix_table): Likewise.
137 (x86_64_table): Likewise.
138 (vex_len_table): Likewise.
139 (vex_w_table): Likewise.
140 (mod_table): Likewise.
141 (rm_table): Likewise.
142 (float_reg): Likewise.
143 (reg_table): Remove trailing "(bad)" entries.
144 (prefix_table): Likewise.
145 (x86_64_table): Likewise.
146 (vex_len_table): Likewise.
147 (vex_w_table): Likewise.
148 (mod_table): Likewise.
149 (rm_table): Likewise.
150 (get_valid_dis386): Handle bytemode 0.
151
712366da
L		 1522010-01-23 H.J. Lu <hongjiu.lu@intel.com>
153
154 * i386-opc.h (VEXScalar): New.
155
156 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
157 instructions.
158 * i386-tbl.h: Regenerated.
159
706e8205 1602010-01-21 H.J. Lu <hongjiu.lu@intel.com>
73bb6729
L		 161
162 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
163
164 * i386-opc.tbl: Add xsave64 and xrstor64.
165 * i386-tbl.h: Regenerated.
166
99ea83aa
NC		 1672010-01-20 Nick Clifton <nickc@redhat.com>
168
169 PR 11170
170 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
171 based post-indexed addressing.
172
a6461c02
SP		 1732010-01-15 Sebastian Pop <sebastian.pop@amd.com>
174
175 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
176 * i386-tbl.h: Regenerated.
177
a2a7d12c
L		 1782010-01-14 H.J. Lu <hongjiu.lu@intel.com>
179
180 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
181 comments.
182
b9733481
L		 1832010-01-14 H.J. Lu <hongjiu.lu@intel.com>
184
185 * i386-dis.c (names_mm): New.
186 (intel_names_mm): Likewise.
187 (att_names_mm): Likewise.
188 (names_xmm): Likewise.
189 (intel_names_xmm): Likewise.
190 (att_names_xmm): Likewise.
191 (names_ymm): Likewise.
192 (intel_names_ymm): Likewise.
193 (att_names_ymm): Likewise.
194 (print_insn): Set names_mm, names_xmm and names_ymm.
195 (OP_MMX): Use names_mm, names_xmm and names_ymm.
196 (OP_XMM): Likewise.
197 (OP_EM): Likewise.
198 (OP_EMC): Likewise.
199 (OP_MXC): Likewise.
200 (OP_EX): Likewise.
201 (XMM_Fixup): Likewise.
202 (OP_VEX): Likewise.
203 (OP_EX_VexReg): Likewise.
204 (OP_Vex_2src): Likewise.
205 (OP_Vex_2src_1): Likewise.
206 (OP_Vex_2src_2): Likewise.
207 (OP_REG_VexI4): Likewise.
208
5e6718e4
L		 2092010-01-13 H.J. Lu <hongjiu.lu@intel.com>
210
211 * i386-dis.c (print_insn): Update comments.
212
d869730d
L		 2132010-01-12 H.J. Lu <hongjiu.lu@intel.com>
214
215 * i386-dis.c (rex_original): Removed.
216 (ckprefix): Remove rex_original.
217 (print_insn): Update comments.
218
3725885a
RW		 2192010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
220
221 * Makefile.in: Regenerate.
222 * configure: Regenerate.
223
b7cd1872
DE		 2242010-01-07 Doug Evans <dje@sebabeach.org>
225
226 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
227 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
228 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
229 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
230 * xstormy16-ibld.c: Regenerate.
231
69dd9865
SP		 2322010-01-06 Quentin Neill <quentin.neill@amd.com>
233
234 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
235 * i386-init.h: Regenerated.
236
e3e535bc
NC		 2372010-01-06 Daniel Gutson <dgutson@codesourcery.com>
238
239 * arm-dis.c (print_insn): Fixed search for next symbol and data
240 dumping condition, and the initial mapping symbol state.
241
fe8afbc4
DE		 2422010-01-05 Doug Evans <dje@sebabeach.org>
243
244 * cgen-ibld.in: #include "cgen/basic-modes.h".
245 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
246 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
247 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
248 * xstormy16-ibld.c: Regenerate.
249
2edcd244
NC		 2502010-01-04 Nick Clifton <nickc@redhat.com>
251
252 PR 11123
253 * arm-dis.c (print_insn_coprocessor): Initialise value.
254
0dc93057
AM		 2552010-01-04 Edmar Wienskoski <edmar@freescale.com>
256
257 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
258
05994f45
DE		 2592010-01-02 Doug Evans <dje@sebabeach.org>
260
261 * cgen-asm.in: Update copyright year.
262 * cgen-dis.in: Update copyright year.
263 * cgen-ibld.in: Update copyright year.
264 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
265 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
266 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
267 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
268 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
269 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
270 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
271 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
272 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
273 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
274 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
275 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
276 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
277 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
278 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
279 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
280 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
281 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
282 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
283 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
284 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f 285
43ecc30f 286For older changes see ChangeLog-2009
252b5132
RH		 287\f
288Local Variables:
2f6d2f85
NC		 289mode: change-log
290left-margin: 8
291fill-column: 74
252b5132
RH		 292version-control: never
293End:
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