[thirdparty/binutils-gdb.git] / opcodes / ChangeLog

2010-05-13  Alan Modra  <amodra@gmail.com>

	* ppc-opc.c (powerpc_opcodes): Correct wclr encoding.

2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>

	* arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
	format.
	(print_insn_thumb16): Add support for new %W format.

2010-05-07  Tristan Gingold  <gingold@adacore.com>

	* Makefile.in: Regenerate with automake 1.11.1.
	* aclocal.m4: Ditto.

2010-05-05  Nick Clifton  <nickc@redhat.com>

	* po/es.po: Updated Spanish translation.

2010-04-22  Nick Clifton  <nickc@redhat.com>

	* po/opcodes.pot: Updated by the Translation project.
	* po/vi.po: Updated Vietnamese translation.

2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
	bits in opcode.

2010-04-09  Nick Clifton  <nickc@redhat.com>

	* i386-dis.c (print_insn): Remove unused variable op.
	(OP_sI): Remove unused variable mask.

2010-04-07  Alan Modra  <amodra@gmail.com>

	* configure: Regenerate.

2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>

	* ppc-opc.c (RBOPT): New define.
	("dccci"): Enable for PPCA2.  Make operands optional.
	("iccci"): Likewise.  Do not deprecate for PPC476.

2010-04-02  Masaki Muranaka  <monaka@monami-software.com>

	* cr16-opc.c (cr16_instruction): Fix typo in comment.

2010-03-25  Joseph Myers  <joseph@codesourcery.com>

	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	* Makefile.in: Regenerate.
	* configure.in (bfd_tic6x_arch): New.
	* configure: Regenerate.
	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	(disassembler): Handle TI C6X.
	* tic6x-dis.c: New.

2010-03-24  Mike Frysinger  <vapier@gentoo.org>

	* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.

2010-03-23  Joseph Myers  <joseph@codesourcery.com>

	* dis-buf.c (buffer_read_memory): Give error for reading just
	before the start of memory.

2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
	    Quentin Neill <quentin.neill@amd.com>

	* i386-dis.c (OP_LWP_I): Removed.
	(reg_table): Do not use OP_LWP_I, use Iq.
	(OP_LWPCB_E): Remove use of names16.
	(OP_LWP_E): Same.
	* i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
	should not set the Vex.length bit.
	* i386-tbl.h: Regenerated.

2010-02-25  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".

2010-02-24  Nick Clifton  <nickc@redhat.com>

	PR binutils/6773
	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
	<prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
	(thumb32_opcodes): Likewise.

2010-02-15  Nick Clifton  <nickc@redhat.com>

	* po/vi.po: Updated Vietnamese translation.

2010-02-12  Doug Evans  <dje@sebabeach.org>

	* lm32-opinst.c: Regenerate.

2010-02-11  Doug Evans  <dje@sebabeach.org>

	* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
	(print_address): Delete CGEN_PRINT_ADDRESS.
	* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
	* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
	* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
	* xc16x-dis.c, * xstormy16-dis.c: Regenerate.

	* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.

2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c: Update copyright.
	* i386-gen.c: Likewise.
	* i386-opc.h: Likewise.
	* i386-opc.tbl: Likewise.

2010-02-10  Quentin Neill  <quentin.neill@amd.com>
	    Sebastian Pop  <sebastian.pop@amd.com>

	* i386-dis.c (OP_EX_VexImmW): Reintroduced
	function to handle 5th imm8 operand.
	(PREFIX_VEX_3A48): Added.
	(PREFIX_VEX_3A49): Added.
	(VEX_W_3A48_P_2): Added.
	(VEX_W_3A49_P_2): Added.
	(prefix table): Added entries for PREFIX_VEX_3A48
	and PREFIX_VEX_3A49.
	(vex table): Added entries for VEX_W_3A48_P_2 and
	and VEX_W_3A49_P_2.
	* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
	for Vec_Imm4 operands.
	* i386-opc.h (enum): Added Vec_Imm4.
	(i386_operand_type): Added vec_imm4.
	* i386-opc.tbl: Add entries for vpermilp[ds].
	* i386-init.h: Regenerated.
	* i386-tbl.h: Regenerated.

2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>

	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	and "pwr7".  Move "a2" into alphabetical order.

2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>

	* ppc-dis.c (ppc_opts): Add titan entry.
	* ppc-opc.c (TITAN, MULHW): Define.
	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).

2010-02-03  Quentin Neill  <quentin.neill@amd.com>

	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	to CPU_BDVER1_FLAGS
	* i386-init.h: Regenerated.

2010-02-03  Anthony Green  <green@moxielogic.com>

	* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
	0x0f, and make 0x00 an illegal instruction.

2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>

	* opcodes/arm-dis.c (struct arm_private_data): New.
	(print_insn_coprocessor, print_insn_arm): Update to use struct
	arm_private_data.
	(is_mapping_symbol, get_map_sym_type): New functions.
	(get_sym_code_type): Check the symbol's section.  Do not check
	mapping symbols.
	(print_insn): Default to disassembling ARM mode code.  Check
	for mapping symbols separately from other symbols.  Use
	struct arm_private_data.

2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EXVexWdqScalar): New.
	(vex_scalar_w_dq_mode): Likewise.
	(prefix_table): Update entries for PREFIX_VEX_3899,
	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	(OP_EX): Likewise.

2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (XMScalar): New.
	(EXdScalar): Likewise.
	(EXqScalar): Likewise.
	(EXqScalarS): Likewise.
	(VexScalar): Likewise.
	(EXdVexScalarS): Likewise.
	(EXqVexScalarS): Likewise.
	(XMVexScalar): Likewise.
	(scalar_mode): Likewise.
	(d_scalar_mode): Likewise.
	(d_scalar_swap_mode): Likewise.
	(q_scalar_mode): Likewise.
	(q_scalar_swap_mode): Likewise.
	(vex_scalar_mode): Likewise.
	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	q_scalar_mode, q_scalar_swap_mode.
	(OP_XMM): Handle scalar_mode.
	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	and q_scalar_swap_mode.
	(OP_VEX): Handle vex_scalar_mode.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.

2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (Bad_Opcode): New.
	(bad_opcode): Likewise.
	(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
	(dis386_twobyte): Likewise.
	(reg_table): Likewise.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(float_reg): Likewise.
	(reg_table): Remove trailing "(bad)" entries.
	(prefix_table): Likewise.
	(x86_64_table): Likewise.
	(vex_len_table): Likewise.
	(vex_w_table): Likewise.
	(mod_table): Likewise.
	(rm_table): Likewise.
	(get_valid_dis386): Handle bytemode 0.

2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VEXScalar): New.

	* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
	instructions.
	* i386-tbl.h: Regenerated.

2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.

	* i386-opc.tbl: Add xsave64 and xrstor64.
	* i386-tbl.h: Regenerated.

2010-01-20  Nick Clifton  <nickc@redhat.com>

	PR 11170
	* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
	based post-indexed addressing.

2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>

	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	* i386-tbl.h: Regenerated.

2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
	comments.

2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (names_mm): New.
	(intel_names_mm): Likewise.
	(att_names_mm): Likewise.
	(names_xmm): Likewise.
	(intel_names_xmm): Likewise.
	(att_names_xmm): Likewise.
	(names_ymm): Likewise.
	(intel_names_ymm): Likewise.
	(att_names_ymm): Likewise.
	(print_insn): Set names_mm, names_xmm and names_ymm.
	(OP_MMX): Use names_mm, names_xmm and names_ymm.
	(OP_XMM): Likewise.
	(OP_EM): Likewise.
	(OP_EMC): Likewise.
	(OP_MXC): Likewise.
	(OP_EX): Likewise.
	(XMM_Fixup): Likewise.
	(OP_VEX): Likewise.
	(OP_EX_VexReg): Likewise.
	(OP_Vex_2src): Likewise.
	(OP_Vex_2src_1): Likewise.
	(OP_Vex_2src_2): Likewise.
	(OP_REG_VexI4): Likewise.

2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (print_insn): Update comments.

2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (rex_original): Removed.
	(ckprefix): Remove rex_original.
	(print_insn): Update comments.

2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>

	* Makefile.in: Regenerate.
	* configure: Regenerate.

2010-01-07  Doug Evans  <dje@sebabeach.org>

	* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

2010-01-06  Quentin Neill  <quentin.neill@amd.com>

	* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
	* i386-init.h: Regenerated.

2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>

	* arm-dis.c (print_insn): Fixed search for next symbol and data
	dumping condition, and the initial mapping symbol state.

2010-01-05  Doug Evans  <dje@sebabeach.org>

	* cgen-ibld.in: #include "cgen/basic-modes.h".
	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	* xstormy16-ibld.c: Regenerate.

2010-01-04  Nick Clifton  <nickc@redhat.com>

	PR 11123
	* arm-dis.c (print_insn_coprocessor): Initialise value.

2010-01-04  Edmar Wienskoski  <edmar@freescale.com>

	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".

2010-01-02  Doug Evans  <dje@sebabeach.org>

	* cgen-asm.in: Update copyright year.
	* cgen-dis.in: Update copyright year.
	* cgen-ibld.in: Update copyright year.
	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.

For older changes see ChangeLog-2009
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
85d4ac0b AM	1	2010-05-13 Alan Modra <amodra@gmail.com>
	2
	3	* ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
	4
4547cb56 NC	5	2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
	6
	7	* arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
	8	format.
	9	(print_insn_thumb16): Add support for new %W format.
	10
6540b386 TG	11	2010-05-07 Tristan Gingold <gingold@adacore.com>
	12
	13	* Makefile.in: Regenerate with automake 1.11.1.
	14	* aclocal.m4: Ditto.
	15
3e01a7fd NC	16	2010-05-05 Nick Clifton <nickc@redhat.com>
	17
	18	* po/es.po: Updated Spanish translation.
	19
9c9c98a5 NC	20	2010-04-22 Nick Clifton <nickc@redhat.com>
	21
	22	* po/opcodes.pot: Updated by the Translation project.
	23	* po/vi.po: Updated Vietnamese translation.
	24
f07af43e L	25	2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
	26
	27	* i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
	28	bits in opcode.
	29
3d540e93 NC	30	2010-04-09 Nick Clifton <nickc@redhat.com>
	31
	32	* i386-dis.c (print_insn): Remove unused variable op.
	33	(OP_sI): Remove unused variable mask.
	34
397841b5 AM	35	2010-04-07 Alan Modra <amodra@gmail.com>
	36
	37	* configure: Regenerate.
	38
cee62821 PB	39	2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
	40
	41	* ppc-opc.c (RBOPT): New define.
	42	("dccci"): Enable for PPCA2. Make operands optional.
	43	("iccci"): Likewise. Do not deprecate for PPC476.
	44
accf4463 NC	45	2010-04-02 Masaki Muranaka <monaka@monami-software.com>
	46
	47	* cr16-opc.c (cr16_instruction): Fix typo in comment.
	48
40b36596 JM	49	2010-03-25 Joseph Myers <joseph@codesourcery.com>
	50
	51	* Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
	52	* Makefile.in: Regenerate.
	53	* configure.in (bfd_tic6x_arch): New.
	54	* configure: Regenerate.
	55	* disassemble.c (ARCH_tic6x): Define if ARCH_all.
	56	(disassembler): Handle TI C6X.
	57	* tic6x-dis.c: New.
	58
1985c81c MF	59	2010-03-24 Mike Frysinger <vapier@gentoo.org>
	60
	61	* bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
	62
f66187fd JM	63	2010-03-23 Joseph Myers <joseph@codesourcery.com>
	64
	65	* dis-buf.c (buffer_read_memory): Give error for reading just
	66	before the start of memory.
	67
ce7d077e SP	68	2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
	69	Quentin Neill <quentin.neill@amd.com>
	70
	71	* i386-dis.c (OP_LWP_I): Removed.
	72	(reg_table): Do not use OP_LWP_I, use Iq.
	73	(OP_LWPCB_E): Remove use of names16.
	74	(OP_LWP_E): Same.
	75	* i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
	76	should not set the Vex.length bit.
	77	* i386-tbl.h: Regenerated.
	78
63d0fa4e AM	79	2010-02-25 Edmar Wienskoski <edmar@freescale.com>
	80
	81	* ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
	82
c060226a NC	83	2010-02-24 Nick Clifton <nickc@redhat.com>
	84
	85	PR binutils/6773
	86	* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
	87	<prefix>asx. Replace <prefix>subaddx with <prefix>sax.
	88	(thumb32_opcodes): Likewise.
	89
ab7875de NC	90	2010-02-15 Nick Clifton <nickc@redhat.com>
	91
	92	* po/vi.po: Updated Vietnamese translation.
	93
fee1d3e8 DE	94	2010-02-12 Doug Evans <dje@sebabeach.org>
	95
	96	* lm32-opinst.c: Regenerate.
	97
37ec9240 DE	98	2010-02-11 Doug Evans <dje@sebabeach.org>
37ec9240 DE	99
9468ae89 DE	100	* cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
	101	(print_address): Delete CGEN_PRINT_ADDRESS.
	102	* fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
	103	* lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
	104	* m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
	105	* xc16x-dis.c, * xstormy16-dis.c: Regenerate.
	106
37ec9240 DE	107	* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
	108	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	109	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	110	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	111	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	112	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	113	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	114	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	115	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	116	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	117	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	118	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
	119
c75ef631 L	120	2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
	121
	122	* i386-dis.c: Update copyright.
	123	* i386-gen.c: Likewise.
	124	* i386-opc.h: Likewise.
	125	* i386-opc.tbl: Likewise.
	126
a683cc34 SP	127	2010-02-10 Quentin Neill <quentin.neill@amd.com>
	128	Sebastian Pop <sebastian.pop@amd.com>
	129
	130	* i386-dis.c (OP_EX_VexImmW): Reintroduced
	131	function to handle 5th imm8 operand.
	132	(PREFIX_VEX_3A48): Added.
	133	(PREFIX_VEX_3A49): Added.
	134	(VEX_W_3A48_P_2): Added.
	135	(VEX_W_3A49_P_2): Added.
	136	(prefix table): Added entries for PREFIX_VEX_3A48
	137	and PREFIX_VEX_3A49.
	138	(vex table): Added entries for VEX_W_3A48_P_2 and
	139	and VEX_W_3A49_P_2.
	140	* i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
	141	for Vec_Imm4 operands.
	142	* i386-opc.h (enum): Added Vec_Imm4.
	143	(i386_operand_type): Added vec_imm4.
	144	* i386-opc.tbl: Add entries for vpermilp[ds].
	145	* i386-init.h: Regenerated.
	146	* i386-tbl.h: Regenerated.
	147
cdc51b07 RS	148	2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
	149
	150	* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
	151	and "pwr7". Move "a2" into alphabetical order.
	152
ce3d2015 AM	153	2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
	154
	155	* ppc-dis.c (ppc_opts): Add titan entry.
	156	* ppc-opc.c (TITAN, MULHW): Define.
	157	(powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
	158
68339fdf SP	159	2010-02-03 Quentin Neill <quentin.neill@amd.com>
	160
	161	* i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
	162	to CPU_BDVER1_FLAGS
	163	* i386-init.h: Regenerated.
	164
f3d55a94 AG	165	2010-02-03 Anthony Green <green@moxielogic.com>
	166
	167	* moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
	168	0x0f, and make 0x00 an illegal instruction.
	169
b0e28b39 DJ	170	2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
	171
	172	* opcodes/arm-dis.c (struct arm_private_data): New.
	173	(print_insn_coprocessor, print_insn_arm): Update to use struct
	174	arm_private_data.
	175	(is_mapping_symbol, get_map_sym_type): New functions.
	176	(get_sym_code_type): Check the symbol's section. Do not check
	177	mapping symbols.
	178	(print_insn): Default to disassembling ARM mode code. Check
	179	for mapping symbols separately from other symbols. Use
	180	struct arm_private_data.
	181
1c480963 L	182	2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
	183
	184	* i386-dis.c (EXVexWdqScalar): New.
	185	(vex_scalar_w_dq_mode): Likewise.
	186	(prefix_table): Update entries for PREFIX_VEX_3899,
	187	PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
	188	PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
	189	PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
	190	PREFIX_VEX_38BD and PREFIX_VEX_38BF.
	191	(intel_operand_size): Handle vex_scalar_w_dq_mode.
	192	(OP_EX): Likewise.
	193
539f890d L	194	2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
	195
	196	* i386-dis.c (XMScalar): New.
	197	(EXdScalar): Likewise.
	198	(EXqScalar): Likewise.
	199	(EXqScalarS): Likewise.
	200	(VexScalar): Likewise.
	201	(EXdVexScalarS): Likewise.
	202	(EXqVexScalarS): Likewise.
	203	(XMVexScalar): Likewise.
	204	(scalar_mode): Likewise.
	205	(d_scalar_mode): Likewise.
	206	(d_scalar_swap_mode): Likewise.
	207	(q_scalar_mode): Likewise.
	208	(q_scalar_swap_mode): Likewise.
	209	(vex_scalar_mode): Likewise.
	210	(vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
	211	VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
	212	VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
	213	VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
	214	VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
	215	VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
	216	VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
	217	VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
	218	VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
	219	VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
	220	(vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
	221	VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
	222	VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
	223	VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
	224	VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
	225	VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
	226	VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
	227	VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
	228	VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
	229	(intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
	230	q_scalar_mode, q_scalar_swap_mode.
	231	(OP_XMM): Handle scalar_mode.
	232	(OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
	233	and q_scalar_swap_mode.
	234	(OP_VEX): Handle vex_scalar_mode.
	235
208b4d78 L	236	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	237
	238	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
	239
448b213a L	240	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	241
	242	* i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
	243
47cf8fa0 L	244	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	245
	246	* i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
	247
592d1631 L	248	2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
	249
	250	* i386-dis.c (Bad_Opcode): New.
	251	(bad_opcode): Likewise.
	252	(dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
	253	(dis386_twobyte): Likewise.
	254	(reg_table): Likewise.
	255	(prefix_table): Likewise.
	256	(x86_64_table): Likewise.
	257	(vex_len_table): Likewise.
	258	(vex_w_table): Likewise.
	259	(mod_table): Likewise.
	260	(rm_table): Likewise.
	261	(float_reg): Likewise.
	262	(reg_table): Remove trailing "(bad)" entries.
	263	(prefix_table): Likewise.
	264	(x86_64_table): Likewise.
	265	(vex_len_table): Likewise.
	266	(vex_w_table): Likewise.
	267	(mod_table): Likewise.
	268	(rm_table): Likewise.
	269	(get_valid_dis386): Handle bytemode 0.
	270
712366da L	271	2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
	272
	273	* i386-opc.h (VEXScalar): New.
	274
	275	* i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
	276	instructions.
	277	* i386-tbl.h: Regenerated.
	278
706e8205	279	2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
73bb6729 L	280
	281	* i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
	282
	283	* i386-opc.tbl: Add xsave64 and xrstor64.
	284	* i386-tbl.h: Regenerated.
	285
99ea83aa NC	286	2010-01-20 Nick Clifton <nickc@redhat.com>
	287
	288	PR 11170
	289	* arm-dis.c (print_arm_address): Do not ignore negative bit in PC
	290	based post-indexed addressing.
	291
a6461c02 SP	292	2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
	293
	294	* i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
	295	* i386-tbl.h: Regenerated.
	296
a2a7d12c L	297	2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
	298
	299	* i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
	300	comments.
	301
b9733481 L	302	2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
	303
	304	* i386-dis.c (names_mm): New.
	305	(intel_names_mm): Likewise.
	306	(att_names_mm): Likewise.
	307	(names_xmm): Likewise.
	308	(intel_names_xmm): Likewise.
	309	(att_names_xmm): Likewise.
	310	(names_ymm): Likewise.
	311	(intel_names_ymm): Likewise.
	312	(att_names_ymm): Likewise.
	313	(print_insn): Set names_mm, names_xmm and names_ymm.
	314	(OP_MMX): Use names_mm, names_xmm and names_ymm.
	315	(OP_XMM): Likewise.
	316	(OP_EM): Likewise.
	317	(OP_EMC): Likewise.
	318	(OP_MXC): Likewise.
	319	(OP_EX): Likewise.
	320	(XMM_Fixup): Likewise.
	321	(OP_VEX): Likewise.
	322	(OP_EX_VexReg): Likewise.
	323	(OP_Vex_2src): Likewise.
	324	(OP_Vex_2src_1): Likewise.
	325	(OP_Vex_2src_2): Likewise.
	326	(OP_REG_VexI4): Likewise.
	327
5e6718e4 L	328	2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
	329
	330	* i386-dis.c (print_insn): Update comments.
	331
d869730d L	332	2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
	333
	334	* i386-dis.c (rex_original): Removed.
	335	(ckprefix): Remove rex_original.
	336	(print_insn): Update comments.
	337
3725885a RW	338	2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
	339
	340	* Makefile.in: Regenerate.
	341	* configure: Regenerate.
	342
b7cd1872 DE	343	2010-01-07 Doug Evans <dje@sebabeach.org>
	344
	345	* cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
	346	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	347	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	348	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	349	* xstormy16-ibld.c: Regenerate.
	350
69dd9865 SP	351	2010-01-06 Quentin Neill <quentin.neill@amd.com>
	352
	353	* i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
	354	* i386-init.h: Regenerated.
	355
e3e535bc NC	356	2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
	357
	358	* arm-dis.c (print_insn): Fixed search for next symbol and data
	359	dumping condition, and the initial mapping symbol state.
	360
fe8afbc4 DE	361	2010-01-05 Doug Evans <dje@sebabeach.org>
	362
	363	* cgen-ibld.in: #include "cgen/basic-modes.h".
	364	* fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
	365	* lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
	366	* mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
	367	* xstormy16-ibld.c: Regenerate.
	368
2edcd244 NC	369	2010-01-04 Nick Clifton <nickc@redhat.com>
	370
	371	PR 11123
	372	* arm-dis.c (print_insn_coprocessor): Initialise value.
	373
0dc93057 AM	374	2010-01-04 Edmar Wienskoski <edmar@freescale.com>
	375
	376	* ppc-dis.c (ppc_opts): Add entry for "e500mc64".
	377
05994f45 DE	378	2010-01-02 Doug Evans <dje@sebabeach.org>
	379
	380	* cgen-asm.in: Update copyright year.
	381	* cgen-dis.in: Update copyright year.
	382	* cgen-ibld.in: Update copyright year.
	383	* fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
	384	* fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
	385	* frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
	386	* ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
	387	* ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
	388	* iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
	389	* iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
	390	* lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
	391	* lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
	392	* m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
	393	* m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
	394	* m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
	395	* mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
	396	* mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
	397	* mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
	398	* openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
	399	* openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
	400	* xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
	401	* xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
	402	* xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
	403	* xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f	404
43ecc30f	405	For older changes see ChangeLog-2009
252b5132 RH	406	\f
252b5132 RH	407	Local Variables:
2f6d2f85 NC	408	mode: change-log
	409	left-margin: 8
	410	fill-column: 74
252b5132 RH	411	version-control: never
252b5132 RH	412	End: