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x86: convert broadcast insn attribute to boolean
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
8e6e0792
JB
12018-03-28 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
4 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
5 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
6 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
7 * i386-tlb.h: Re-generate.
8
9f123b91
JB
92018-03-28 Jan Beulich <jbeulich@suse.com>
10
11 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
12 Fold AVX512 forms
13 * i386-tlb.h: Re-generate.
14
9646c87b
JB
152018-03-28 Jan Beulich <jbeulich@suse.com>
16
17 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
18 (vex_len_table): Drop Y for vcvt*2si.
19 (putop): Replace plain 'Y' handling by abort().
20
c8d59609
NC
212018-03-28 Nick Clifton <nickc@redhat.com>
22
23 PR 22988
24 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
25 instructions with only a base address register.
26 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
27 handle AARHC64_OPND_SVE_ADDR_R.
28 (aarch64_print_operand): Likewise.
29 * aarch64-asm-2.c: Regenerate.
30 * aarch64_dis-2.c: Regenerate.
31 * aarch64-opc-2.c: Regenerate.
32
b8c169f3
JB
332018-03-22 Jan Beulich <jbeulich@suse.com>
34
35 * i386-opc.tbl: Drop VecESize from register only insn forms and
36 memory forms not allowing broadcast.
37 * i386-tlb.h: Re-generate.
38
96bc132a
JB
392018-03-22 Jan Beulich <jbeulich@suse.com>
40
41 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
42 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
43 sha256*): Drop Disp<N>.
44
9f79e886
JB
452018-03-22 Jan Beulich <jbeulich@suse.com>
46
47 * i386-dis.c (EbndS, bnd_swap_mode): New.
48 (prefix_table): Use EbndS.
49 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
50 * i386-opc.tbl (bndmov): Move misplaced Load.
51 * i386-tlb.h: Re-generate.
52
d6793fa1
JB
532018-03-22 Jan Beulich <jbeulich@suse.com>
54
55 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
56 templates allowing memory operands and folded ones for register
57 only flavors.
58 * i386-tlb.h: Re-generate.
59
f7768225
JB
602018-03-22 Jan Beulich <jbeulich@suse.com>
61
62 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
63 256-bit templates. Drop redundant leftover Disp<N>.
64 * i386-tlb.h: Re-generate.
65
0e35537d
JW
662018-03-14 Kito Cheng <kito.cheng@gmail.com>
67
68 * riscv-opc.c (riscv_insn_types): New.
69
b4a3689a
NC
702018-03-13 Nick Clifton <nickc@redhat.com>
71
72 * po/pt_BR.po: Updated Brazilian Portuguese translation.
73
d3d50934
L
742018-03-08 H.J. Lu <hongjiu.lu@intel.com>
75
76 * i386-opc.tbl: Add Optimize to clr.
77 * i386-tbl.h: Regenerated.
78
bd5dea88
L
792018-03-08 H.J. Lu <hongjiu.lu@intel.com>
80
81 * i386-gen.c (opcode_modifiers): Remove OldGcc.
82 * i386-opc.h (OldGcc): Removed.
83 (i386_opcode_modifier): Remove oldgcc.
84 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
85 instructions for old (<= 2.8.1) versions of gcc.
86 * i386-tbl.h: Regenerated.
87
e771e7c9
JB
882018-03-08 Jan Beulich <jbeulich@suse.com>
89
90 * i386-opc.h (EVEXDYN): New.
91 * i386-opc.tbl: Fold various AVX512VL templates.
92 * i386-tlb.h: Re-generate.
93
ed438a93
JB
942018-03-08 Jan Beulich <jbeulich@suse.com>
95
96 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
97 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
98 vpexpandd, vpexpandq): Fold AFX512VF templates.
99 * i386-tlb.h: Re-generate.
100
454172a9
JB
1012018-03-08 Jan Beulich <jbeulich@suse.com>
102
103 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
104 Fold 128- and 256-bit VEX-encoded templates.
105 * i386-tlb.h: Re-generate.
106
36824150
JB
1072018-03-08 Jan Beulich <jbeulich@suse.com>
108
109 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
110 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
111 vpexpandd, vpexpandq): Fold AVX512F templates.
112 * i386-tlb.h: Re-generate.
113
e7f5c0a9
JB
1142018-03-08 Jan Beulich <jbeulich@suse.com>
115
116 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
117 64-bit templates. Drop Disp<N>.
118 * i386-tlb.h: Re-generate.
119
25a4277f
JB
1202018-03-08 Jan Beulich <jbeulich@suse.com>
121
122 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
123 and 256-bit templates.
124 * i386-tlb.h: Re-generate.
125
d2224064
JB
1262018-03-08 Jan Beulich <jbeulich@suse.com>
127
128 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
129 * i386-tlb.h: Re-generate.
130
1b193f0b
JB
1312018-03-08 Jan Beulich <jbeulich@suse.com>
132
133 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
134 Drop NoAVX.
135 * i386-tlb.h: Re-generate.
136
f2f6a710
JB
1372018-03-08 Jan Beulich <jbeulich@suse.com>
138
139 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
140 * i386-tlb.h: Re-generate.
141
38e314eb
JB
1422018-03-08 Jan Beulich <jbeulich@suse.com>
143
144 * i386-gen.c (opcode_modifiers): Delete FloatD.
145 * i386-opc.h (FloatD): Delete.
146 (struct i386_opcode_modifier): Delete floatd.
147 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
148 FloatD by D.
149 * i386-tlb.h: Re-generate.
150
d53e6b98
JB
1512018-03-08 Jan Beulich <jbeulich@suse.com>
152
153 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
154
2907c2f5
JB
1552018-03-08 Jan Beulich <jbeulich@suse.com>
156
157 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
158 * i386-tlb.h: Re-generate.
159
73053c1f
JB
1602018-03-08 Jan Beulich <jbeulich@suse.com>
161
162 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
163 forms.
164 * i386-tlb.h: Re-generate.
165
52fe4420
AM
1662018-03-07 Alan Modra <amodra@gmail.com>
167
168 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
169 bfd_arch_rs6000.
170 * disassemble.h (print_insn_rs6000): Delete.
171 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
172 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
173 (print_insn_rs6000): Delete.
174
a6743a54
AM
1752018-03-03 Alan Modra <amodra@gmail.com>
176
177 * sysdep.h (opcodes_error_handler): Define.
178 (_bfd_error_handler): Declare.
179 * Makefile.am: Remove stray #.
180 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
181 EDIT" comment.
182 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
183 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
184 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
185 opcodes_error_handler to print errors. Standardize error messages.
186 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
187 and include opintl.h.
188 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
189 * i386-gen.c: Standardize error messages.
190 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
191 * Makefile.in: Regenerate.
192 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
193 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
194 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
195 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
196 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
197 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
198 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
199 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
200 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
201 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
202 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
203 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
204 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
205
8305403a
L
2062018-03-01 H.J. Lu <hongjiu.lu@intel.com>
207
208 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
209 vpsub[bwdq] instructions.
210 * i386-tbl.h: Regenerated.
211
e184813f
AM
2122018-03-01 Alan Modra <amodra@gmail.com>
213
214 * configure.ac (ALL_LINGUAS): Sort.
215 * configure: Regenerate.
216
5b616bef
TP
2172018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
218
219 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
220 macro by assignements.
221
b6f8c7c4
L
2222018-02-27 H.J. Lu <hongjiu.lu@intel.com>
223
224 PR gas/22871
225 * i386-gen.c (opcode_modifiers): Add Optimize.
226 * i386-opc.h (Optimize): New enum.
227 (i386_opcode_modifier): Add optimize.
228 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
229 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
230 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
231 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
232 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
233 vpxord and vpxorq.
234 * i386-tbl.h: Regenerated.
235
e95b887f
AM
2362018-02-26 Alan Modra <amodra@gmail.com>
237
238 * crx-dis.c (getregliststring): Allocate a large enough buffer
239 to silence false positive gcc8 warning.
240
0bccfb29
JW
2412018-02-22 Shea Levy <shea@shealevy.com>
242
243 * disassemble.c (ARCH_riscv): Define if ARCH_all.
244
6b6b6807
L
2452018-02-22 H.J. Lu <hongjiu.lu@intel.com>
246
247 * i386-opc.tbl: Add {rex},
248 * i386-tbl.h: Regenerated.
249
75f31665
MR
2502018-02-20 Maciej W. Rozycki <macro@mips.com>
251
252 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
253 (mips16_opcodes): Replace `M' with `m' for "restore".
254
e207bc53
TP
2552018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
256
257 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
258
87993319
MR
2592018-02-13 Maciej W. Rozycki <macro@mips.com>
260
261 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
262 variable to `function_index'.
263
68d20676
NC
2642018-02-13 Nick Clifton <nickc@redhat.com>
265
266 PR 22823
267 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
268 about truncation of printing.
269
d2159fdc
HW
2702018-02-12 Henry Wong <henry@stuffedcow.net>
271
272 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
273
f174ef9f
NC
2742018-02-05 Nick Clifton <nickc@redhat.com>
275
276 * po/pt_BR.po: Updated Brazilian Portuguese translation.
277
be3a8dca
IT
2782018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
279
280 * i386-dis.c (enum): Add pconfig.
281 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
282 (cpu_flags): Add CpuPCONFIG.
283 * i386-opc.h (enum): Add CpuPCONFIG.
284 (i386_cpu_flags): Add cpupconfig.
285 * i386-opc.tbl: Add PCONFIG instruction.
286 * i386-init.h: Regenerate.
287 * i386-tbl.h: Likewise.
288
3233d7d0
IT
2892018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
290
291 * i386-dis.c (enum): Add PREFIX_0F09.
292 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
293 (cpu_flags): Add CpuWBNOINVD.
294 * i386-opc.h (enum): Add CpuWBNOINVD.
295 (i386_cpu_flags): Add cpuwbnoinvd.
296 * i386-opc.tbl: Add WBNOINVD instruction.
297 * i386-init.h: Regenerate.
298 * i386-tbl.h: Likewise.
299
e925c834
JW
3002018-01-17 Jim Wilson <jimw@sifive.com>
301
302 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
303
d777820b
IT
3042018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
305
306 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
307 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
308 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
309 (cpu_flags): Add CpuIBT, CpuSHSTK.
310 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
311 (i386_cpu_flags): Add cpuibt, cpushstk.
312 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
313 * i386-init.h: Regenerate.
314 * i386-tbl.h: Likewise.
315
f6efed01
NC
3162018-01-16 Nick Clifton <nickc@redhat.com>
317
318 * po/pt_BR.po: Updated Brazilian Portugese translation.
319 * po/de.po: Updated German translation.
320
2721d702
JW
3212018-01-15 Jim Wilson <jimw@sifive.com>
322
323 * riscv-opc.c (match_c_nop): New.
324 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
325
616dcb87
NC
3262018-01-15 Nick Clifton <nickc@redhat.com>
327
328 * po/uk.po: Updated Ukranian translation.
329
3957a496
NC
3302018-01-13 Nick Clifton <nickc@redhat.com>
331
332 * po/opcodes.pot: Regenerated.
333
769c7ea5
NC
3342018-01-13 Nick Clifton <nickc@redhat.com>
335
336 * configure: Regenerate.
337
faf766e3
NC
3382018-01-13 Nick Clifton <nickc@redhat.com>
339
340 2.30 branch created.
341
888a89da
IT
3422018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
343
344 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
345 * i386-tbl.h: Regenerate.
346
cbda583a
JB
3472018-01-10 Jan Beulich <jbeulich@suse.com>
348
349 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
350 * i386-tbl.h: Re-generate.
351
c9e92278
JB
3522018-01-10 Jan Beulich <jbeulich@suse.com>
353
354 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
355 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
356 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
357 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
358 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
359 Disp8MemShift of AVX512VL forms.
360 * i386-tbl.h: Re-generate.
361
35fd2b2b
JW
3622018-01-09 Jim Wilson <jimw@sifive.com>
363
364 * riscv-dis.c (maybe_print_address): If base_reg is zero,
365 then the hi_addr value is zero.
366
91d8b670
JG
3672018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
368
369 * arm-dis.c (arm_opcodes): Add csdb.
370 (thumb32_opcodes): Add csdb.
371
be2e7d95
JG
3722018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
373
374 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
375 * aarch64-asm-2.c: Regenerate.
376 * aarch64-dis-2.c: Regenerate.
377 * aarch64-opc-2.c: Regenerate.
378
704a705d
L
3792018-01-08 H.J. Lu <hongjiu.lu@intel.com>
380
381 PR gas/22681
382 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
383 Remove AVX512 vmovd with 64-bit operands.
384 * i386-tbl.h: Regenerated.
385
35eeb78f
JW
3862018-01-05 Jim Wilson <jimw@sifive.com>
387
388 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
389 jalr.
390
219d1afa
AM
3912018-01-03 Alan Modra <amodra@gmail.com>
392
393 Update year range in copyright notice of all files.
394
1508bbf5
JB
3952018-01-02 Jan Beulich <jbeulich@suse.com>
396
397 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
398 and OPERAND_TYPE_REGZMM entries.
399
1e563868 400For older changes see ChangeLog-2017
3499769a 401\f
1e563868 402Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM
403
404Copying and distribution of this file, with or without modification,
405are permitted in any medium without royalty provided the copyright
406notice and this notice are preserved.
407
408Local Variables:
409mode: change-log
410left-margin: 8
411fill-column: 74
412version-control: never
413End: