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binutils/testsuite: Also consider `*-*-lynxos*' and `*-*-symbianelf*' ELF
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
caf0678c
L		 12018-04-04 H.J. Lu <hongjiu.lu@intel.com>
2
3 PR binutils/23025
4 * i386-dis.c (get_valid_dis386): Don't set vex.prefix nor vex.w
5 to 0.
6 (print_insn): Clear vex instead of vex.evex.
7
4fb0d2b9
NC		 82018-04-04 Nick Clifton <nickc@redhat.com>
9
10 * po/es.po: Updated Spanish translation.
11
c39e5b26
JB		 122018-03-28 Jan Beulich <jbeulich@suse.com>
13
14 * i386-gen.c (opcode_modifiers): Delete VecESize.
15 * i386-opc.h (VecESize): Delete.
16 (struct i386_opcode_modifier): Delete vecesize.
17 * i386-opc.tbl: Drop VecESize.
18 * i386-tlb.h: Re-generate.
19
8e6e0792
JB		 202018-03-28 Jan Beulich <jbeulich@suse.com>
21
22 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
23 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
24 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
25 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
26 * i386-tlb.h: Re-generate.
27
9f123b91
JB		 282018-03-28 Jan Beulich <jbeulich@suse.com>
29
30 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
31 Fold AVX512 forms
32 * i386-tlb.h: Re-generate.
33
9646c87b
JB		 342018-03-28 Jan Beulich <jbeulich@suse.com>
35
36 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
37 (vex_len_table): Drop Y for vcvt*2si.
38 (putop): Replace plain 'Y' handling by abort().
39
c8d59609
NC		 402018-03-28 Nick Clifton <nickc@redhat.com>
41
42 PR 22988
43 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
44 instructions with only a base address register.
45 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
46 handle AARHC64_OPND_SVE_ADDR_R.
47 (aarch64_print_operand): Likewise.
48 * aarch64-asm-2.c: Regenerate.
49 * aarch64_dis-2.c: Regenerate.
50 * aarch64-opc-2.c: Regenerate.
51
b8c169f3
JB		 522018-03-22 Jan Beulich <jbeulich@suse.com>
53
54 * i386-opc.tbl: Drop VecESize from register only insn forms and
55 memory forms not allowing broadcast.
56 * i386-tlb.h: Re-generate.
57
96bc132a
JB		 582018-03-22 Jan Beulich <jbeulich@suse.com>
59
60 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
61 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
62 sha256*): Drop Disp<N>.
63
9f79e886
JB		 642018-03-22 Jan Beulich <jbeulich@suse.com>
65
66 * i386-dis.c (EbndS, bnd_swap_mode): New.
67 (prefix_table): Use EbndS.
68 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
69 * i386-opc.tbl (bndmov): Move misplaced Load.
70 * i386-tlb.h: Re-generate.
71
d6793fa1
JB		 722018-03-22 Jan Beulich <jbeulich@suse.com>
73
74 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
75 templates allowing memory operands and folded ones for register
76 only flavors.
77 * i386-tlb.h: Re-generate.
78
f7768225
JB		 792018-03-22 Jan Beulich <jbeulich@suse.com>
80
81 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
82 256-bit templates. Drop redundant leftover Disp<N>.
83 * i386-tlb.h: Re-generate.
84
0e35537d
JW		 852018-03-14 Kito Cheng <kito.cheng@gmail.com>
86
87 * riscv-opc.c (riscv_insn_types): New.
88
b4a3689a
NC		 892018-03-13 Nick Clifton <nickc@redhat.com>
90
91 * po/pt_BR.po: Updated Brazilian Portuguese translation.
92
d3d50934
L		 932018-03-08 H.J. Lu <hongjiu.lu@intel.com>
94
95 * i386-opc.tbl: Add Optimize to clr.
96 * i386-tbl.h: Regenerated.
97
bd5dea88
L		 982018-03-08 H.J. Lu <hongjiu.lu@intel.com>
99
100 * i386-gen.c (opcode_modifiers): Remove OldGcc.
101 * i386-opc.h (OldGcc): Removed.
102 (i386_opcode_modifier): Remove oldgcc.
103 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
104 instructions for old (<= 2.8.1) versions of gcc.
105 * i386-tbl.h: Regenerated.
106
e771e7c9
JB		 1072018-03-08 Jan Beulich <jbeulich@suse.com>
108
109 * i386-opc.h (EVEXDYN): New.
110 * i386-opc.tbl: Fold various AVX512VL templates.
111 * i386-tlb.h: Re-generate.
112
ed438a93
JB		 1132018-03-08 Jan Beulich <jbeulich@suse.com>
114
115 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
116 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
117 vpexpandd, vpexpandq): Fold AFX512VF templates.
118 * i386-tlb.h: Re-generate.
119
454172a9
JB		 1202018-03-08 Jan Beulich <jbeulich@suse.com>
121
122 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
123 Fold 128- and 256-bit VEX-encoded templates.
124 * i386-tlb.h: Re-generate.
125
36824150
JB		 1262018-03-08 Jan Beulich <jbeulich@suse.com>
127
128 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
129 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
130 vpexpandd, vpexpandq): Fold AVX512F templates.
131 * i386-tlb.h: Re-generate.
132
e7f5c0a9
JB		 1332018-03-08 Jan Beulich <jbeulich@suse.com>
134
135 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
136 64-bit templates. Drop Disp<N>.
137 * i386-tlb.h: Re-generate.
138
25a4277f
JB		 1392018-03-08 Jan Beulich <jbeulich@suse.com>
140
141 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
142 and 256-bit templates.
143 * i386-tlb.h: Re-generate.
144
d2224064
JB		 1452018-03-08 Jan Beulich <jbeulich@suse.com>
146
147 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
148 * i386-tlb.h: Re-generate.
149
1b193f0b
JB		 1502018-03-08 Jan Beulich <jbeulich@suse.com>
151
152 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
153 Drop NoAVX.
154 * i386-tlb.h: Re-generate.
155
f2f6a710
JB		 1562018-03-08 Jan Beulich <jbeulich@suse.com>
157
158 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
159 * i386-tlb.h: Re-generate.
160
38e314eb
JB		 1612018-03-08 Jan Beulich <jbeulich@suse.com>
162
163 * i386-gen.c (opcode_modifiers): Delete FloatD.
164 * i386-opc.h (FloatD): Delete.
165 (struct i386_opcode_modifier): Delete floatd.
166 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
167 FloatD by D.
168 * i386-tlb.h: Re-generate.
169
d53e6b98
JB		 1702018-03-08 Jan Beulich <jbeulich@suse.com>
171
172 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
173
2907c2f5
JB		 1742018-03-08 Jan Beulich <jbeulich@suse.com>
175
176 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
177 * i386-tlb.h: Re-generate.
178
73053c1f
JB		 1792018-03-08 Jan Beulich <jbeulich@suse.com>
180
181 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
182 forms.
183 * i386-tlb.h: Re-generate.
184
52fe4420
AM		 1852018-03-07 Alan Modra <amodra@gmail.com>
186
187 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
188 bfd_arch_rs6000.
189 * disassemble.h (print_insn_rs6000): Delete.
190 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
191 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
192 (print_insn_rs6000): Delete.
193
a6743a54
AM		 1942018-03-03 Alan Modra <amodra@gmail.com>
195
196 * sysdep.h (opcodes_error_handler): Define.
197 (_bfd_error_handler): Declare.
198 * Makefile.am: Remove stray #.
199 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
200 EDIT" comment.
201 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
202 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
203 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
204 opcodes_error_handler to print errors. Standardize error messages.
205 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
206 and include opintl.h.
207 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
208 * i386-gen.c: Standardize error messages.
209 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
210 * Makefile.in: Regenerate.
211 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
212 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
213 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
214 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
215 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
216 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
217 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
218 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
219 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
220 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
221 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
222 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
223 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
224
8305403a
L		 2252018-03-01 H.J. Lu <hongjiu.lu@intel.com>
226
227 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
228 vpsub[bwdq] instructions.
229 * i386-tbl.h: Regenerated.
230
e184813f
AM		 2312018-03-01 Alan Modra <amodra@gmail.com>
232
233 * configure.ac (ALL_LINGUAS): Sort.
234 * configure: Regenerate.
235
5b616bef
TP		 2362018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
237
238 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
239 macro by assignements.
240
b6f8c7c4
L		 2412018-02-27 H.J. Lu <hongjiu.lu@intel.com>
242
243 PR gas/22871
244 * i386-gen.c (opcode_modifiers): Add Optimize.
245 * i386-opc.h (Optimize): New enum.
246 (i386_opcode_modifier): Add optimize.
247 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
248 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
249 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
250 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
251 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
252 vpxord and vpxorq.
253 * i386-tbl.h: Regenerated.
254
e95b887f
AM		 2552018-02-26 Alan Modra <amodra@gmail.com>
256
257 * crx-dis.c (getregliststring): Allocate a large enough buffer
258 to silence false positive gcc8 warning.
259
0bccfb29
JW		 2602018-02-22 Shea Levy <shea@shealevy.com>
261
262 * disassemble.c (ARCH_riscv): Define if ARCH_all.
263
6b6b6807
L		 2642018-02-22 H.J. Lu <hongjiu.lu@intel.com>
265
266 * i386-opc.tbl: Add {rex},
267 * i386-tbl.h: Regenerated.
268
75f31665
MR		 2692018-02-20 Maciej W. Rozycki <macro@mips.com>
270
271 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
272 (mips16_opcodes): Replace `M' with `m' for "restore".
273
e207bc53
TP		 2742018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
275
276 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
277
87993319
MR		 2782018-02-13 Maciej W. Rozycki <macro@mips.com>
279
280 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
281 variable to `function_index'.
282
68d20676
NC		 2832018-02-13 Nick Clifton <nickc@redhat.com>
284
285 PR 22823
286 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
287 about truncation of printing.
288
d2159fdc
HW		 2892018-02-12 Henry Wong <henry@stuffedcow.net>
290
291 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
292
f174ef9f
NC		 2932018-02-05 Nick Clifton <nickc@redhat.com>
294
295 * po/pt_BR.po: Updated Brazilian Portuguese translation.
296
be3a8dca
IT		 2972018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
298
299 * i386-dis.c (enum): Add pconfig.
300 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
301 (cpu_flags): Add CpuPCONFIG.
302 * i386-opc.h (enum): Add CpuPCONFIG.
303 (i386_cpu_flags): Add cpupconfig.
304 * i386-opc.tbl: Add PCONFIG instruction.
305 * i386-init.h: Regenerate.
306 * i386-tbl.h: Likewise.
307
3233d7d0
IT		 3082018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
309
310 * i386-dis.c (enum): Add PREFIX_0F09.
311 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
312 (cpu_flags): Add CpuWBNOINVD.
313 * i386-opc.h (enum): Add CpuWBNOINVD.
314 (i386_cpu_flags): Add cpuwbnoinvd.
315 * i386-opc.tbl: Add WBNOINVD instruction.
316 * i386-init.h: Regenerate.
317 * i386-tbl.h: Likewise.
318
e925c834
JW		 3192018-01-17 Jim Wilson <jimw@sifive.com>
320
321 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
322
d777820b
IT		 3232018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
324
325 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
326 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
327 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
328 (cpu_flags): Add CpuIBT, CpuSHSTK.
329 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
330 (i386_cpu_flags): Add cpuibt, cpushstk.
331 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
332 * i386-init.h: Regenerate.
333 * i386-tbl.h: Likewise.
334
f6efed01
NC		 3352018-01-16 Nick Clifton <nickc@redhat.com>
336
337 * po/pt_BR.po: Updated Brazilian Portugese translation.
338 * po/de.po: Updated German translation.
339
2721d702
JW		 3402018-01-15 Jim Wilson <jimw@sifive.com>
341
342 * riscv-opc.c (match_c_nop): New.
343 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
344
616dcb87
NC		 3452018-01-15 Nick Clifton <nickc@redhat.com>
346
347 * po/uk.po: Updated Ukranian translation.
348
3957a496
NC		 3492018-01-13 Nick Clifton <nickc@redhat.com>
350
351 * po/opcodes.pot: Regenerated.
352
769c7ea5
NC		 3532018-01-13 Nick Clifton <nickc@redhat.com>
354
355 * configure: Regenerate.
356
faf766e3
NC		 3572018-01-13 Nick Clifton <nickc@redhat.com>
358
359 2.30 branch created.
360
888a89da
IT		 3612018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
362
363 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
364 * i386-tbl.h: Regenerate.
365
cbda583a
JB		 3662018-01-10 Jan Beulich <jbeulich@suse.com>
367
368 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
369 * i386-tbl.h: Re-generate.
370
c9e92278
JB		 3712018-01-10 Jan Beulich <jbeulich@suse.com>
372
373 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
374 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
375 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
376 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
377 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
378 Disp8MemShift of AVX512VL forms.
379 * i386-tbl.h: Re-generate.
380
35fd2b2b
JW		 3812018-01-09 Jim Wilson <jimw@sifive.com>
382
383 * riscv-dis.c (maybe_print_address): If base_reg is zero,
384 then the hi_addr value is zero.
385
91d8b670
JG		 3862018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
387
388 * arm-dis.c (arm_opcodes): Add csdb.
389 (thumb32_opcodes): Add csdb.
390
be2e7d95
JG		 3912018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
392
393 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
394 * aarch64-asm-2.c: Regenerate.
395 * aarch64-dis-2.c: Regenerate.
396 * aarch64-opc-2.c: Regenerate.
397
704a705d
L		 3982018-01-08 H.J. Lu <hongjiu.lu@intel.com>
399
400 PR gas/22681
401 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
402 Remove AVX512 vmovd with 64-bit operands.
403 * i386-tbl.h: Regenerated.
404
35eeb78f
JW		 4052018-01-05 Jim Wilson <jimw@sifive.com>
406
407 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
408 jalr.
409
219d1afa
AM		 4102018-01-03 Alan Modra <amodra@gmail.com>
411
412 Update year range in copyright notice of all files.
413
1508bbf5
JB		 4142018-01-02 Jan Beulich <jbeulich@suse.com>
415
416 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
417 and OPERAND_TYPE_REGZMM entries.
418
1e563868 419For older changes see ChangeLog-2017
3499769a 420\f
1e563868 421Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 422
423Copying and distribution of this file, with or without modification,
424are permitted in any medium without royalty provided the copyright
425notice and this notice are preserved.
426
427Local Variables:
428mode: change-log
429left-margin: 8
430fill-column: 74
431version-control: never
432End:
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