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* ppc.h (PPC_OPCODE_COMMON): Expand comment.
[thirdparty/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
c7b8aa3a
L		 12010-07-01 H.J. Lu <hongjiu.lu@intel.com>
2
3 AVX Programming Reference (June, 2010)
4 * i386-dis.c (PREFIX_0FAE_REG_0): New.
5 (PREFIX_0FAE_REG_1): Likewise.
6 (PREFIX_0FAE_REG_2): Likewise.
7 (PREFIX_0FAE_REG_3): Likewise.
8 (PREFIX_VEX_3813): Likewise.
9 (PREFIX_VEX_3A1D): Likewise.
10 (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
11 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
12 PREFIX_VEX_3A1D.
13 (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
14 (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
15 PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
16
17 * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
18 CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
19 (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
20
21 * i386-opc.h (CpuXsaveopt): New.
22 (CpuFSGSBase):Likewise.
23 (CpuRdRnd): Likewise.
24 (CpuF16C): Likewise.
25 (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
26 cpuf16c.
27
28 * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
29 wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
a00eb5e8
L		 30 * i386-init.h: Regenerated.
31 * i386-tbl.h: Likewise.
c7b8aa3a 32
09a8ad8d
AM		 332010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
34
35 * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
36 and mtocrf on EFS.
37
360cfc9c
AM		 382010-06-29 Alan Modra <amodra@gmail.com>
39
40 * maxq-dis.c: Delete file.
41 * Makefile.am: Remove references to maxq.
42 * configure.in: Likewise.
43 * disassemble.c: Likewise.
44 * Makefile.in: Regenerate.
45 * configure: Regenerate.
46 * po/POTFILES.in: Regenerate.
47
dc898d5e
AM		 482010-06-29 Alan Modra <amodra@gmail.com>
49
50 * mep-dis.c: Regenerate.
51
8e560766
MGD		 522010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
53
54 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
55
c7e2358a
AM		 562010-06-27 Alan Modra <amodra@gmail.com>
57
58 * arc-dis.c (arc_sprintf): Delete set but unused variables.
59 (decodeInstr): Likewise.
60 * dlx-dis.c (print_insn_dlx): Likewise.
61 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
62 * maxq-dis.c (check_move, print_insn): Likewise.
63 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
64 * msp430-dis.c (msp430_branchinstr): Likewise.
65 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
66 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
67 * sparc-dis.c (print_insn_sparc): Likewise.
68 * fr30-asm.c: Regenerate.
69 * frv-asm.c: Regenerate.
70 * ip2k-asm.c: Regenerate.
71 * iq2000-asm.c: Regenerate.
72 * lm32-asm.c: Regenerate.
73 * m32c-asm.c: Regenerate.
74 * m32r-asm.c: Regenerate.
75 * mep-asm.c: Regenerate.
76 * mt-asm.c: Regenerate.
77 * openrisc-asm.c: Regenerate.
78 * xc16x-asm.c: Regenerate.
79 * xstormy16-asm.c: Regenerate.
80
6ffe3d99
NC		 812010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
82
83 PR gas/11673
84 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
85
09ec0d17
NC		 862010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
87
88 PR binutils/11676
89 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
90
e01d869a
AM		 912010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
92
93 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
94 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
95 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
96 touch floating point regs and are enabled by COM, PPC or PPCCOM.
97 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
98 Treat lwsync as msync on e500.
99
1f4e4950
MGD		 1002010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
101
102 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
103
9d82ec38
MGD		 1042010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
105
e01d869a 106 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
9d82ec38
MGD		 107 constants is the same on 32-bit and 64-bit hosts.
108
c3a6ea62 1092010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
d8b24b95
NC		 110
111 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
112 .short directives so that they can be reassembled.
113
9db8dccb
CM		 1142010-05-26 Catherine Moore <clm@codesourcery.com>
115 David Ung <davidu@mips.com>
116
117 * mips-opc.c: Change membership to I1 for instructions ssnop and
118 ehb.
119
dfc8cf43
L		 1202010-05-26 H.J. Lu <hongjiu.lu@intel.com>
121
122 * i386-dis.c (sib): New.
123 (get_sib): Likewise.
124 (print_insn): Call get_sib.
125 OP_E_memory): Use sib.
126
f79e2745
CM		 1272010-05-26 Catherine Moore <clm@codesoourcery.com>
128
129 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
130 * mips-opc.c (I16): Remove.
131 (mips_builtin_op): Reclassify jalx.
132
51b5d4a8
AM		 1332010-05-19 Alan Modra <amodra@gmail.com>
134
135 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
136 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
137
85d4ac0b
AM		 1382010-05-13 Alan Modra <amodra@gmail.com>
139
140 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
141
4547cb56
NC		 1422010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
143
144 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
145 format.
146 (print_insn_thumb16): Add support for new %W format.
147
6540b386
TG		 1482010-05-07 Tristan Gingold <gingold@adacore.com>
149
150 * Makefile.in: Regenerate with automake 1.11.1.
151 * aclocal.m4: Ditto.
152
3e01a7fd
NC		 1532010-05-05 Nick Clifton <nickc@redhat.com>
154
155 * po/es.po: Updated Spanish translation.
156
9c9c98a5
NC		 1572010-04-22 Nick Clifton <nickc@redhat.com>
158
159 * po/opcodes.pot: Updated by the Translation project.
160 * po/vi.po: Updated Vietnamese translation.
161
f07af43e
L		 1622010-04-16 H.J. Lu <hongjiu.lu@intel.com>
163
164 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
165 bits in opcode.
166
3d540e93
NC		 1672010-04-09 Nick Clifton <nickc@redhat.com>
168
169 * i386-dis.c (print_insn): Remove unused variable op.
170 (OP_sI): Remove unused variable mask.
171
397841b5
AM		 1722010-04-07 Alan Modra <amodra@gmail.com>
173
174 * configure: Regenerate.
175
cee62821
PB		 1762010-04-06 Peter Bergner <bergner@vnet.ibm.com>
177
178 * ppc-opc.c (RBOPT): New define.
179 ("dccci"): Enable for PPCA2. Make operands optional.
180 ("iccci"): Likewise. Do not deprecate for PPC476.
181
accf4463
NC		 1822010-04-02 Masaki Muranaka <monaka@monami-software.com>
183
184 * cr16-opc.c (cr16_instruction): Fix typo in comment.
185
40b36596
JM		 1862010-03-25 Joseph Myers <joseph@codesourcery.com>
187
188 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
189 * Makefile.in: Regenerate.
190 * configure.in (bfd_tic6x_arch): New.
191 * configure: Regenerate.
192 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
193 (disassembler): Handle TI C6X.
194 * tic6x-dis.c: New.
195
1985c81c
MF		 1962010-03-24 Mike Frysinger <vapier@gentoo.org>
197
198 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
199
f66187fd
JM		 2002010-03-23 Joseph Myers <joseph@codesourcery.com>
201
202 * dis-buf.c (buffer_read_memory): Give error for reading just
203 before the start of memory.
204
ce7d077e
SP		 2052010-03-22 Sebastian Pop <sebastian.pop@amd.com>
206 Quentin Neill <quentin.neill@amd.com>
207
208 * i386-dis.c (OP_LWP_I): Removed.
209 (reg_table): Do not use OP_LWP_I, use Iq.
210 (OP_LWPCB_E): Remove use of names16.
211 (OP_LWP_E): Same.
212 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
213 should not set the Vex.length bit.
214 * i386-tbl.h: Regenerated.
215
63d0fa4e
AM		 2162010-02-25 Edmar Wienskoski <edmar@freescale.com>
217
218 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
219
c060226a
NC		 2202010-02-24 Nick Clifton <nickc@redhat.com>
221
222 PR binutils/6773
223 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
224 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
225 (thumb32_opcodes): Likewise.
226
ab7875de
NC		 2272010-02-15 Nick Clifton <nickc@redhat.com>
228
229 * po/vi.po: Updated Vietnamese translation.
230
fee1d3e8
DE		 2312010-02-12 Doug Evans <dje@sebabeach.org>
232
233 * lm32-opinst.c: Regenerate.
234
37ec9240
DE		 2352010-02-11 Doug Evans <dje@sebabeach.org>
236
9468ae89
DE		 237 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
238 (print_address): Delete CGEN_PRINT_ADDRESS.
239 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
240 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
241 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
242 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
243
37ec9240
DE		 244 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
245 * frv-desc.c, * frv-desc.h, * frv-opc.c,
246 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
247 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
248 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
249 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
250 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
251 * mep-desc.c, * mep-desc.h, * mep-opc.c,
252 * mt-desc.c, * mt-desc.h, * mt-opc.c,
253 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
254 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
255 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
256
c75ef631
L		 2572010-02-11 H.J. Lu <hongjiu.lu@intel.com>
258
259 * i386-dis.c: Update copyright.
260 * i386-gen.c: Likewise.
261 * i386-opc.h: Likewise.
262 * i386-opc.tbl: Likewise.
263
a683cc34
SP		 2642010-02-10 Quentin Neill <quentin.neill@amd.com>
265 Sebastian Pop <sebastian.pop@amd.com>
266
267 * i386-dis.c (OP_EX_VexImmW): Reintroduced
268 function to handle 5th imm8 operand.
269 (PREFIX_VEX_3A48): Added.
270 (PREFIX_VEX_3A49): Added.
271 (VEX_W_3A48_P_2): Added.
272 (VEX_W_3A49_P_2): Added.
273 (prefix table): Added entries for PREFIX_VEX_3A48
274 and PREFIX_VEX_3A49.
275 (vex table): Added entries for VEX_W_3A48_P_2 and
276 and VEX_W_3A49_P_2.
277 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
278 for Vec_Imm4 operands.
279 * i386-opc.h (enum): Added Vec_Imm4.
280 (i386_operand_type): Added vec_imm4.
281 * i386-opc.tbl: Add entries for vpermilp[ds].
282 * i386-init.h: Regenerated.
283 * i386-tbl.h: Regenerated.
284
cdc51b07
RS		 2852010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
286
287 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
288 and "pwr7". Move "a2" into alphabetical order.
289
ce3d2015
AM		 2902010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
291
292 * ppc-dis.c (ppc_opts): Add titan entry.
293 * ppc-opc.c (TITAN, MULHW): Define.
294 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
295
68339fdf
SP		 2962010-02-03 Quentin Neill <quentin.neill@amd.com>
297
298 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
299 to CPU_BDVER1_FLAGS
300 * i386-init.h: Regenerated.
301
f3d55a94
AG		 3022010-02-03 Anthony Green <green@moxielogic.com>
303
304 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
305 0x0f, and make 0x00 an illegal instruction.
306
b0e28b39
DJ		 3072010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
308
309 * opcodes/arm-dis.c (struct arm_private_data): New.
310 (print_insn_coprocessor, print_insn_arm): Update to use struct
311 arm_private_data.
312 (is_mapping_symbol, get_map_sym_type): New functions.
313 (get_sym_code_type): Check the symbol's section. Do not check
314 mapping symbols.
315 (print_insn): Default to disassembling ARM mode code. Check
316 for mapping symbols separately from other symbols. Use
317 struct arm_private_data.
318
1c480963
L		 3192010-01-28 H.J. Lu <hongjiu.lu@intel.com>
320
321 * i386-dis.c (EXVexWdqScalar): New.
322 (vex_scalar_w_dq_mode): Likewise.
323 (prefix_table): Update entries for PREFIX_VEX_3899,
324 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
325 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
326 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
327 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
328 (intel_operand_size): Handle vex_scalar_w_dq_mode.
329 (OP_EX): Likewise.
330
539f890d
L		 3312010-01-27 H.J. Lu <hongjiu.lu@intel.com>
332
333 * i386-dis.c (XMScalar): New.
334 (EXdScalar): Likewise.
335 (EXqScalar): Likewise.
336 (EXqScalarS): Likewise.
337 (VexScalar): Likewise.
338 (EXdVexScalarS): Likewise.
339 (EXqVexScalarS): Likewise.
340 (XMVexScalar): Likewise.
341 (scalar_mode): Likewise.
342 (d_scalar_mode): Likewise.
343 (d_scalar_swap_mode): Likewise.
344 (q_scalar_mode): Likewise.
345 (q_scalar_swap_mode): Likewise.
346 (vex_scalar_mode): Likewise.
347 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
348 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
349 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
350 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
351 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
352 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
353 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
354 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
355 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
356 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
357 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
358 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
359 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
360 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
361 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
362 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
363 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
364 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
365 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
366 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
367 q_scalar_mode, q_scalar_swap_mode.
368 (OP_XMM): Handle scalar_mode.
369 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
370 and q_scalar_swap_mode.
371 (OP_VEX): Handle vex_scalar_mode.
372
208b4d78
L		 3732010-01-24 H.J. Lu <hongjiu.lu@intel.com>
374
375 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
376
448b213a
L		 3772010-01-24 H.J. Lu <hongjiu.lu@intel.com>
378
379 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
380
47cf8fa0
L		 3812010-01-24 H.J. Lu <hongjiu.lu@intel.com>
382
383 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
384
592d1631
L		 3852010-01-24 H.J. Lu <hongjiu.lu@intel.com>
386
387 * i386-dis.c (Bad_Opcode): New.
388 (bad_opcode): Likewise.
389 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
390 (dis386_twobyte): Likewise.
391 (reg_table): Likewise.
392 (prefix_table): Likewise.
393 (x86_64_table): Likewise.
394 (vex_len_table): Likewise.
395 (vex_w_table): Likewise.
396 (mod_table): Likewise.
397 (rm_table): Likewise.
398 (float_reg): Likewise.
399 (reg_table): Remove trailing "(bad)" entries.
400 (prefix_table): Likewise.
401 (x86_64_table): Likewise.
402 (vex_len_table): Likewise.
403 (vex_w_table): Likewise.
404 (mod_table): Likewise.
405 (rm_table): Likewise.
406 (get_valid_dis386): Handle bytemode 0.
407
712366da
L		 4082010-01-23 H.J. Lu <hongjiu.lu@intel.com>
409
410 * i386-opc.h (VEXScalar): New.
411
412 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
413 instructions.
414 * i386-tbl.h: Regenerated.
415
706e8205 4162010-01-21 H.J. Lu <hongjiu.lu@intel.com>
73bb6729
L		 417
418 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
419
420 * i386-opc.tbl: Add xsave64 and xrstor64.
421 * i386-tbl.h: Regenerated.
422
99ea83aa
NC		 4232010-01-20 Nick Clifton <nickc@redhat.com>
424
425 PR 11170
426 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
427 based post-indexed addressing.
428
a6461c02
SP		 4292010-01-15 Sebastian Pop <sebastian.pop@amd.com>
430
431 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
432 * i386-tbl.h: Regenerated.
433
a2a7d12c
L		 4342010-01-14 H.J. Lu <hongjiu.lu@intel.com>
435
436 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
437 comments.
438
b9733481
L		 4392010-01-14 H.J. Lu <hongjiu.lu@intel.com>
440
441 * i386-dis.c (names_mm): New.
442 (intel_names_mm): Likewise.
443 (att_names_mm): Likewise.
444 (names_xmm): Likewise.
445 (intel_names_xmm): Likewise.
446 (att_names_xmm): Likewise.
447 (names_ymm): Likewise.
448 (intel_names_ymm): Likewise.
449 (att_names_ymm): Likewise.
450 (print_insn): Set names_mm, names_xmm and names_ymm.
451 (OP_MMX): Use names_mm, names_xmm and names_ymm.
452 (OP_XMM): Likewise.
453 (OP_EM): Likewise.
454 (OP_EMC): Likewise.
455 (OP_MXC): Likewise.
456 (OP_EX): Likewise.
457 (XMM_Fixup): Likewise.
458 (OP_VEX): Likewise.
459 (OP_EX_VexReg): Likewise.
460 (OP_Vex_2src): Likewise.
461 (OP_Vex_2src_1): Likewise.
462 (OP_Vex_2src_2): Likewise.
463 (OP_REG_VexI4): Likewise.
464
5e6718e4
L		 4652010-01-13 H.J. Lu <hongjiu.lu@intel.com>
466
467 * i386-dis.c (print_insn): Update comments.
468
d869730d
L		 4692010-01-12 H.J. Lu <hongjiu.lu@intel.com>
470
471 * i386-dis.c (rex_original): Removed.
472 (ckprefix): Remove rex_original.
473 (print_insn): Update comments.
474
3725885a
RW		 4752010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
476
477 * Makefile.in: Regenerate.
478 * configure: Regenerate.
479
b7cd1872
DE		 4802010-01-07 Doug Evans <dje@sebabeach.org>
481
482 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
483 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
484 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
485 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
486 * xstormy16-ibld.c: Regenerate.
487
69dd9865
SP		 4882010-01-06 Quentin Neill <quentin.neill@amd.com>
489
490 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
491 * i386-init.h: Regenerated.
492
e3e535bc
NC		 4932010-01-06 Daniel Gutson <dgutson@codesourcery.com>
494
495 * arm-dis.c (print_insn): Fixed search for next symbol and data
496 dumping condition, and the initial mapping symbol state.
497
fe8afbc4
DE		 4982010-01-05 Doug Evans <dje@sebabeach.org>
499
500 * cgen-ibld.in: #include "cgen/basic-modes.h".
501 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
502 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
503 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
504 * xstormy16-ibld.c: Regenerate.
505
2edcd244
NC		 5062010-01-04 Nick Clifton <nickc@redhat.com>
507
508 PR 11123
509 * arm-dis.c (print_insn_coprocessor): Initialise value.
510
0dc93057
AM		 5112010-01-04 Edmar Wienskoski <edmar@freescale.com>
512
513 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
514
05994f45
DE		 5152010-01-02 Doug Evans <dje@sebabeach.org>
516
517 * cgen-asm.in: Update copyright year.
518 * cgen-dis.in: Update copyright year.
519 * cgen-ibld.in: Update copyright year.
520 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
521 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
522 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
523 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
524 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
525 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
526 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
527 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
528 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
529 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
530 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
531 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
532 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
533 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
534 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
535 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
536 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
537 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
538 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
539 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
540 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
2426c15f 541
43ecc30f 542For older changes see ChangeLog-2009
252b5132
RH		 543\f
544Local Variables:
2f6d2f85
NC		 545mode: change-log
546left-margin: 8
547fill-column: 74
252b5132
RH		 548version-control: never
549End:
A mirror of the official binutils-gdb repository