[thirdparty/binutils-gdb.git] / opcodes / avr-dis.c

/* Disassemble AVR instructions.
   Copyright 1999, 2000 Free Software Foundation, Inc.

   Contributed by Denis Chertykov <denisc@overta.ru>

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

#include <assert.h>
#include "sysdep.h"
#include "dis-asm.h"
#include "opintl.h"
#include "libiberty.h"

struct avr_opcodes_s
{
  char *name;
  char *constraints;
  char *opcode;
  int insn_size;		/* in words */
  int isa;
  unsigned int bin_opcode;
};

#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},

const struct avr_opcodes_s avr_opcodes[] =
{
  #include "opcode/avr.h"
  {NULL, NULL, NULL, 0, 0, 0}
};

static int avr_operand (unsigned int, unsigned int, unsigned int, int,
                        char *, char *, int, int *, bfd_vma *);

static int
avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
             char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
{
  int ok = 1;
  *sym = 0;

  switch (constraint)
    {
      /* Any register operand.  */
    case 'r':
      if (regs)
	insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* source register */
      else
	insn = (insn & 0x01f0) >> 4; /* destination register */
      
      sprintf (buf, "r%d", insn);
      break;

    case 'd':
      if (regs)
	sprintf (buf, "r%d", 16 + (insn & 0xf));
      else
	sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
      break;
      
    case 'w':
      sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
      break;
      
    case 'a':
      if (regs)
	sprintf (buf, "r%d", 16 + (insn & 7));
      else
	sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
      break;

    case 'v':
      if (regs)
	sprintf (buf, "r%d", (insn & 0xf) * 2);
      else
	sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
      break;

    case 'e':
      {
	char *xyz;

	switch (insn & 0x100f)
	  {
	    case 0x0000: xyz = "Z";  break;
	    case 0x1001: xyz = "Z+"; break;
	    case 0x1002: xyz = "-Z"; break;
	    case 0x0008: xyz = "Y";  break;
	    case 0x1009: xyz = "Y+"; break;
	    case 0x100a: xyz = "-Y"; break;
	    case 0x100c: xyz = "X";  break;
	    case 0x100d: xyz = "X+"; break;
	    case 0x100e: xyz = "-X"; break;
	    default: xyz = "??"; ok = 0;
	  }
	sprintf (buf, xyz);

	if (AVR_UNDEF_P (insn))
	  sprintf (comment, _("undefined"));
      }
      break;

    case 'z':
      *buf++ = 'Z';
      if (insn & 0x1)
	*buf++ = '+';
      *buf = '\0';
      if (AVR_UNDEF_P (insn))
	sprintf (comment, _("undefined"));
      break;

    case 'b':
      {
	unsigned int x;
	
	x = (insn & 7);
	x |= (insn >> 7) & (3 << 3);
	x |= (insn >> 8) & (1 << 5);
	
	if (insn & 0x8)
	  *buf++ = 'Y';
	else
	  *buf++ = 'Z';
	sprintf (buf, "+%d", x);
	sprintf (comment, "0x%02x", x);
      }
      break;
      
    case 'h':
      *sym = 1;
      *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
      sprintf (buf, "0x");
      break;
      
    case 'L':
      {
	int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
	sprintf (buf, ".%+-8d", rel_addr);
        *sym = 1;
        *sym_addr = pc + 2 + rel_addr;
	sprintf (comment, "0x");
      }
      break;

    case 'l':
      {
	int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
	sprintf (buf, ".%+-8d", rel_addr);
        *sym = 1;
        *sym_addr = pc + 2 + rel_addr;
	sprintf (comment, "0x");
      }
      break;

    case 'i':
      sprintf (buf, "0x%04X", insn2);
      break;
      
    case 'M':
      sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
      sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
      break;

    case 'n':
      sprintf (buf, "??");
      fprintf (stderr, _("Internal disassembler error"));
      ok = 0;
      break;
      
    case 'K':
      {
	unsigned int x;

	x = (insn & 0xf) | ((insn >> 2) & 0x30);
	sprintf (buf, "0x%02x", x);
	sprintf (comment, "%d", x);
      }
      break;
      
    case 's':
      sprintf (buf, "%d", insn & 7);
      break;
      
    case 'S':
      sprintf (buf, "%d", (insn >> 4) & 7);
      break;
      
    case 'P':
      {
	unsigned int x;
	x = (insn & 0xf);
	x |= (insn >> 5) & 0x30;
	sprintf (buf, "0x%02x", x);
	sprintf (comment, "%d", x);
      }
      break;

    case 'p':
      {
	unsigned int x;
	
	x = (insn >> 3) & 0x1f;
	sprintf (buf, "0x%02x", x);
	sprintf (comment, "%d", x);
      }
      break;
      
    case '?':
      *buf = '\0';
      break;
      
    default:
      sprintf (buf, "??");
      fprintf (stderr, _("unknown constraint `%c'"), constraint);
      ok = 0;
    }

    return ok;
}

static unsigned short avrdis_opcode PARAMS ((bfd_vma, disassemble_info *));

static unsigned short
avrdis_opcode (addr, info)
     bfd_vma addr;
     disassemble_info *info;
{
  bfd_byte buffer[2];
  int status;
  status = info->read_memory_func(addr, buffer, 2, info);
  if (status != 0)
    {
      info->memory_error_func(status, addr, info);
      return -1;
    }
  return bfd_getl16 (buffer);
}


int
print_insn_avr(addr, info)
     bfd_vma addr;
     disassemble_info *info;
{
  unsigned int insn, insn2;
  const struct avr_opcodes_s *opcode;
  static unsigned int *maskptr;
  void *stream = info->stream;
  fprintf_ftype prin = info->fprintf_func;
  static unsigned int *avr_bin_masks;
  static int initialized;
  int cmd_len = 2;
  int ok = 0;
  char op1[20], op2[20], comment1[40], comment2[40];
  int sym_op1 = 0, sym_op2 = 0;
  bfd_vma sym_addr1, sym_addr2;

  if (!initialized)
    {
      unsigned int nopcodes;

      nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
      
      avr_bin_masks = (unsigned int *)
	xmalloc (nopcodes * sizeof (unsigned int));

      for (opcode = avr_opcodes, maskptr = avr_bin_masks;
	   opcode->name;
	   opcode++, maskptr++)
	{
	  char * s;
	  unsigned int bin = 0;
	  unsigned int mask = 0;
	
	  for (s = opcode->opcode; *s; ++s)
	    {
	      bin <<= 1;
	      mask <<= 1;
	      bin |= (*s == '1');
	      mask |= (*s == '1' || *s == '0');
	    }
	  assert (s - opcode->opcode == 16);
	  assert (opcode->bin_opcode == bin);
	  *maskptr = mask;
	}

      initialized = 1;
    }

  insn = avrdis_opcode (addr, info);
  
  for (opcode = avr_opcodes, maskptr = avr_bin_masks;
       opcode->name;
       opcode++, maskptr++)
    {
      if ((insn & *maskptr) == opcode->bin_opcode)
	break;
    }
  
  /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
     `std b+0,r' as `st b,r' (next entry in the table).  */

  if (AVR_DISP0_P (insn))
    opcode++;

  op1[0] = 0;
  op2[0] = 0;
  comment1[0] = 0;
  comment2[0] = 0;

  if (opcode->name)
    {
      char *op = opcode->constraints;

      insn2 = 0;
      ok = 1;

      if (opcode->insn_size > 1)
	{
	  insn2 = avrdis_opcode (addr + 2, info);
	  cmd_len = 4;
	}

      if (*op && *op != '?')
	{
	  int regs = REGISTER_P (*op);

	  ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);

	  if (ok && *(++op) == ',')
	    ok = avr_operand (insn, insn2, addr, *(++op), op2,
			      *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
	}
    }

  if (!ok)
    {
      /* Unknown opcode, or invalid combination of operands.  */
      sprintf (op1, "0x%04x", insn);
      op2[0] = 0;
      sprintf (comment1, "????");
      comment2[0] = 0;
    }

  (*prin) (stream, "%s", ok ? opcode->name : ".word");

  if (*op1)
      (*prin) (stream, "\t%s", op1);

  if (*op2)
    (*prin) (stream, ", %s", op2);

  if (*comment1)
    (*prin) (stream, "\t; %s", comment1);

  if (sym_op1)
    info->print_address_func(sym_addr1, info);

  if (*comment2)
    (*prin) (stream, " %s", comment2);

  if (sym_op2)
    info->print_address_func(sym_addr2, info);

  return cmd_len;
}
Commit	Line	Data
adde6300	1	/* Disassemble AVR instructions.
060d22b0	2	Copyright 1999, 2000 Free Software Foundation, Inc.
adde6300 AM	3
	4	Contributed by Denis Chertykov <denisc@overta.ru>
	5
	6	This program is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2 of the License, or
	9	(at your option) any later version.
	10
	11	This program is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with this program; if not, write to the Free Software
	18	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	19
bab84c47	20	#include <assert.h>
0d8dfecf	21	#include "sysdep.h"
adde6300 AM	22	#include "dis-asm.h"
adde6300 AM	23	#include "opintl.h"
11041102	24	#include "libiberty.h"
3c504221	25
bab84c47	26	struct avr_opcodes_s
adde6300	27	{
bab84c47 DC	28	char *name;
	29	char *constraints;
	30	char *opcode;
	31	int insn_size; /* in words */
	32	int isa;
	33	unsigned int bin_opcode;
bab84c47	34	};
adde6300	35
bab84c47	36	#define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
11041102	37	{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
adde6300	38
11041102	39	const struct avr_opcodes_s avr_opcodes[] =
adde6300	40	{
bab84c47	41	#include "opcode/avr.h"
11041102	42	{NULL, NULL, NULL, 0, 0, 0}
bab84c47	43	};
adde6300	44
246f4c05 SS	45	static int avr_operand (unsigned int, unsigned int, unsigned int, int,
246f4c05 SS	46	char , char , int, int , bfd_vma );
adde6300	47
463f102c	48	static int
246f4c05 SS	49	avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
246f4c05 SS	50	char buf, char comment, int regs, int sym, bfd_vma sym_addr)
adde6300	51	{
463f102c	52	int ok = 1;
246f4c05	53	*sym = 0;
463f102c	54
bab84c47 DC	55	switch (constraint)
	56	{
	57	/* Any register operand. */
	58	case 'r':
	59	if (regs)
	60	insn = (insn & 0xf) \| ((insn & 0x0200) >> 5); /* source register */
	61	else
	62	insn = (insn & 0x01f0) >> 4; /* destination register */
	63
	64	sprintf (buf, "r%d", insn);
	65	break;
	66
	67	case 'd':
	68	if (regs)
	69	sprintf (buf, "r%d", 16 + (insn & 0xf));
	70	else
	71	sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
	72	break;
	73
	74	case 'w':
	75	sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
	76	break;
	77
	78	case 'a':
	79	if (regs)
	80	sprintf (buf, "r%d", 16 + (insn & 7));
	81	else
	82	sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
	83	break;
adde6300	84
bab84c47 DC	85	case 'v':
	86	if (regs)
	87	sprintf (buf, "r%d", (insn & 0xf) * 2);
	88	else
	89	sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
	90	break;
	91
	92	case 'e':
463f102c DC	93	{
	94	char *xyz;
	95
	96	switch (insn & 0x100f)
	97	{
	98	case 0x0000: xyz = "Z"; break;
	99	case 0x1001: xyz = "Z+"; break;
	100	case 0x1002: xyz = "-Z"; break;
	101	case 0x0008: xyz = "Y"; break;
	102	case 0x1009: xyz = "Y+"; break;
	103	case 0x100a: xyz = "-Y"; break;
	104	case 0x100c: xyz = "X"; break;
	105	case 0x100d: xyz = "X+"; break;
	106	case 0x100e: xyz = "-X"; break;
	107	default: xyz = "??"; ok = 0;
	108	}
	109	sprintf (buf, xyz);
	110
	111	if (AVR_UNDEF_P (insn))
	112	sprintf (comment, _("undefined"));
	113	}
bab84c47 DC	114	break;
	115
	116	case 'z':
	117	*buf++ = 'Z';
	118	if (insn & 0x1)
	119	*buf++ = '+';
	120	*buf = '\0';
463f102c DC	121	if (AVR_UNDEF_P (insn))
463f102c DC	122	sprintf (comment, _("undefined"));
bab84c47 DC	123	break;
	124
	125	case 'b':
	126	{
463f102c	127	unsigned int x;
bab84c47 DC	128
	129	x = (insn & 7);
	130	x \|= (insn >> 7) & (3 << 3);
	131	x \|= (insn >> 8) & (1 << 5);
	132
	133	if (insn & 0x8)
	134	*buf++ = 'Y';
	135	else
	136	*buf++ = 'Z';
	137	sprintf (buf, "+%d", x);
	138	sprintf (comment, "0x%02x", x);
	139	}
	140	break;
	141
	142	case 'h':
246f4c05 SS	143	*sym = 1;
	144	sym_addr = ((((insn & 1) \| ((insn & 0x1f0) >> 3)) << 16) \| insn2) 2;
	145	sprintf (buf, "0x");
bab84c47 DC	146	break;
	147
	148	case 'L':
	149	{
	150	int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
	151	sprintf (buf, ".%+-8d", rel_addr);
246f4c05 SS	152	*sym = 1;
	153	*sym_addr = pc + 2 + rel_addr;
	154	sprintf (comment, "0x");
bab84c47 DC	155	}
	156	break;
	157
	158	case 'l':
	159	{
	160	int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
	161	sprintf (buf, ".%+-8d", rel_addr);
246f4c05 SS	162	*sym = 1;
	163	*sym_addr = pc + 2 + rel_addr;
	164	sprintf (comment, "0x");
bab84c47 DC	165	}
	166	break;
	167
	168	case 'i':
	169	sprintf (buf, "0x%04X", insn2);
	170	break;
	171
	172	case 'M':
	173	sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) \| (insn & 0xf));
	174	sprintf (comment, "%d", ((insn & 0xf00) >> 4) \| (insn & 0xf));
	175	break;
	176
	177	case 'n':
463f102c DC	178	sprintf (buf, "??");
	179	fprintf (stderr, _("Internal disassembler error"));
	180	ok = 0;
bab84c47 DC	181	break;
	182
	183	case 'K':
463f102c DC	184	{
	185	unsigned int x;
	186
	187	x = (insn & 0xf) \| ((insn >> 2) & 0x30);
	188	sprintf (buf, "0x%02x", x);
	189	sprintf (comment, "%d", x);
	190	}
bab84c47 DC	191	break;
	192
	193	case 's':
	194	sprintf (buf, "%d", insn & 7);
	195	break;
	196
	197	case 'S':
	198	sprintf (buf, "%d", (insn >> 4) & 7);
	199	break;
	200
	201	case 'P':
	202	{
	203	unsigned int x;
	204	x = (insn & 0xf);
	205	x \|= (insn >> 5) & 0x30;
	206	sprintf (buf, "0x%02x", x);
	207	sprintf (comment, "%d", x);
	208	}
	209	break;
	210
	211	case 'p':
	212	{
	213	unsigned int x;
	214
	215	x = (insn >> 3) & 0x1f;
	216	sprintf (buf, "0x%02x", x);
	217	sprintf (comment, "%d", x);
	218	}
	219	break;
	220
	221	case '?':
	222	*buf = '\0';
	223	break;
	224
	225	default:
463f102c DC	226	sprintf (buf, "??");
	227	fprintf (stderr, _("unknown constraint `%c'"), constraint);
	228	ok = 0;
bab84c47	229	}
463f102c DC	230
463f102c DC	231	return ok;
adde6300 AM	232	}
adde6300 AM	233
bab84c47	234	static unsigned short avrdis_opcode PARAMS ((bfd_vma, disassemble_info *));
adde6300	235
bab84c47	236	static unsigned short
adde6300 AM	237	avrdis_opcode (addr, info)
	238	bfd_vma addr;
	239	disassemble_info *info;
	240	{
	241	bfd_byte buffer[2];
	242	int status;
	243	status = info->read_memory_func(addr, buffer, 2, info);
	244	if (status != 0)
	245	{
	246	info->memory_error_func(status, addr, info);
	247	return -1;
	248	}
	249	return bfd_getl16 (buffer);
	250	}
	251
	252
	253	int
	254	print_insn_avr(addr, info)
	255	bfd_vma addr;
	256	disassemble_info *info;
	257	{
bab84c47	258	unsigned int insn, insn2;
11041102 KD	259	const struct avr_opcodes_s *opcode;
11041102 KD	260	static unsigned int *maskptr;
adde6300 AM	261	void *stream = info->stream;
adde6300 AM	262	fprintf_ftype prin = info->fprintf_func;
11041102	263	static unsigned int *avr_bin_masks;
bab84c47	264	static int initialized;
adde6300	265	int cmd_len = 2;
463f102c DC	266	int ok = 0;
463f102c DC	267	char op1[20], op2[20], comment1[40], comment2[40];
246f4c05 SS	268	int sym_op1 = 0, sym_op2 = 0;
246f4c05 SS	269	bfd_vma sym_addr1, sym_addr2;
adde6300	270
bab84c47 DC	271	if (!initialized)
bab84c47 DC	272	{
11041102 KD	273	unsigned int nopcodes;
	274
	275	nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
bab84c47	276
11041102 KD	277	avr_bin_masks = (unsigned int *)
	278	xmalloc (nopcodes * sizeof (unsigned int));
	279
	280	for (opcode = avr_opcodes, maskptr = avr_bin_masks;
	281	opcode->name;
	282	opcode++, maskptr++)
bab84c47 DC	283	{
	284	char * s;
	285	unsigned int bin = 0;
	286	unsigned int mask = 0;
	287
	288	for (s = opcode->opcode; *s; ++s)
	289	{
	290	bin <<= 1;
	291	mask <<= 1;
	292	bin \|= (*s == '1');
	293	mask \|= (s == '1' \|\| s == '0');
	294	}
	295	assert (s - opcode->opcode == 16);
	296	assert (opcode->bin_opcode == bin);
11041102	297	*maskptr = mask;
bab84c47	298	}
11041102 KD	299
11041102 KD	300	initialized = 1;
bab84c47	301	}
adde6300	302
bab84c47 DC	303	insn = avrdis_opcode (addr, info);
bab84c47 DC	304
11041102 KD	305	for (opcode = avr_opcodes, maskptr = avr_bin_masks;
	306	opcode->name;
	307	opcode++, maskptr++)
adde6300	308	{
11041102	309	if ((insn & *maskptr) == opcode->bin_opcode)
bab84c47	310	break;
adde6300	311	}
bab84c47	312
463f102c DC	313	/* Special case: disassemble `ldd r,b+0' as `ld r,b', and
	314	`std b+0,r' as `st b,r' (next entry in the table). */
	315
	316	if (AVR_DISP0_P (insn))
	317	opcode++;
	318
	319	op1[0] = 0;
	320	op2[0] = 0;
	321	comment1[0] = 0;
	322	comment2[0] = 0;
	323
bab84c47	324	if (opcode->name)
adde6300	325	{
bab84c47 DC	326	char *op = opcode->constraints;
bab84c47 DC	327
00d2865b	328	insn2 = 0;
463f102c	329	ok = 1;
bab84c47 DC	330
	331	if (opcode->insn_size > 1)
	332	{
	333	insn2 = avrdis_opcode (addr + 2, info);
	334	cmd_len = 4;
	335	}
	336
	337	if (op && op != '?')
	338	{
	339	int regs = REGISTER_P (*op);
	340
246f4c05	341	ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
bab84c47	342
463f102c DC	343	if (ok && *(++op) == ',')
463f102c DC	344	ok = avr_operand (insn, insn2, addr, *(++op), op2,
246f4c05	345	*comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
bab84c47	346	}
463f102c	347	}
bab84c47	348
463f102c DC	349	if (!ok)
	350	{
	351	/* Unknown opcode, or invalid combination of operands. */
	352	sprintf (op1, "0x%04x", insn);
	353	op2[0] = 0;
	354	sprintf (comment1, "????");
	355	comment2[0] = 0;
	356	}
bab84c47	357
463f102c	358	(*prin) (stream, "%s", ok ? opcode->name : ".word");
bab84c47	359
463f102c	360	if (*op1)
246f4c05	361	(*prin) (stream, "\t%s", op1);
bab84c47	362
463f102c DC	363	if (*op2)
	364	(*prin) (stream, ", %s", op2);
	365
	366	if (*comment1)
	367	(*prin) (stream, "\t; %s", comment1);
	368
246f4c05 SS	369	if (sym_op1)
	370	info->print_address_func(sym_addr1, info);
	371
463f102c DC	372	if (*comment2)
463f102c DC	373	(*prin) (stream, " %s", comment2);
bab84c47	374
246f4c05 SS	375	if (sym_op2)
	376	info->print_address_func(sym_addr2, info);
	377
adde6300 AM	378	return cmd_len;
adde6300 AM	379	}