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* dwarf2read.c (isreg): Removed.
[thirdparty/binutils-gdb.git] / opcodes / bfin-dis.c
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4b7f6baa
CM		 1/* Disassemble ADI Blackfin Instructions.
2 Copyright 2005 Free Software Foundation, Inc.
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
17 MA 02110-1301, USA. */
18
19#include <stdio.h>
20#include <stdlib.h>
21#include <string.h>
22
23#include "opcode/bfin.h"
24
25#define M_S2RND 1
26#define M_T 2
27#define M_W32 3
28#define M_FU 4
29#define M_TFU 6
30#define M_IS 8
31#define M_ISS2 9
32#define M_IH 11
33#define M_IU 12
34
35#ifndef PRINTF
36#define PRINTF printf
37#endif
38
39#ifndef EXIT
40#define EXIT exit
41#endif
42
43typedef long TIword;
44
45#define HOST_LONG_WORD_SIZE (sizeof(long)*8)
46
47#define XFIELD(w,p,s) (((w)&((1<<(s))-1)<<(p))>>(p))
48
49#define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n)))
50#define MASKBITS(val, bits) (val & (( 1 << bits)-1))
51
52
53#include "dis-asm.h"
54typedef enum
55{
56 c_0, c_1, c_4, c_2, c_uimm2, c_uimm3, c_imm3, c_pcrel4,
57 c_imm4, c_uimm4s4, c_uimm4, c_uimm4s2, c_negimm5s4, c_imm5, c_uimm5, c_imm6,
58 c_imm7, c_imm8, c_uimm8, c_pcrel8, c_uimm8s4, c_pcrel8s4, c_lppcrel10, c_pcrel10,
59 c_pcrel12, c_imm16s4, c_luimm16, c_imm16, c_huimm16, c_rimm16, c_imm16s2, c_uimm16s4,
60 c_uimm16, c_pcrel24,
61} const_forms_t;
62
63static struct
64{
65 char *name;
66 int nbits;
67 char reloc;
68 char issigned;
69 char pcrel;
70 char scale;
71 char offset;
72 char negative;
73 char positive;
74} constant_formats[] =
75{
76 { "0", 0, 0, 1, 0, 0, 0, 0, 0},
77 { "1", 0, 0, 1, 0, 0, 0, 0, 0},
78 { "4", 0, 0, 1, 0, 0, 0, 0, 0},
79 { "2", 0, 0, 1, 0, 0, 0, 0, 0},
80 { "uimm2", 2, 0, 0, 0, 0, 0, 0, 0},
81 { "uimm3", 3, 0, 0, 0, 0, 0, 0, 0},
82 { "imm3", 3, 0, 1, 0, 0, 0, 0, 0},
83 { "pcrel4", 4, 1, 0, 1, 1, 0, 0, 0},
84 { "imm4", 4, 0, 1, 0, 0, 0, 0, 0},
85 { "uimm4s4", 4, 0, 0, 0, 2, 0, 0, 1},
86 { "uimm4", 4, 0, 0, 0, 0, 0, 0, 0},
87 { "uimm4s2", 4, 0, 0, 0, 1, 0, 0, 1},
88 { "negimm5s4", 5, 0, 1, 0, 2, 0, 1, 0},
89 { "imm5", 5, 0, 1, 0, 0, 0, 0, 0},
90 { "uimm5", 5, 0, 0, 0, 0, 0, 0, 0},
91 { "imm6", 6, 0, 1, 0, 0, 0, 0, 0},
92 { "imm7", 7, 0, 1, 0, 0, 0, 0, 0},
93 { "imm8", 8, 0, 1, 0, 0, 0, 0, 0},
94 { "uimm8", 8, 0, 0, 0, 0, 0, 0, 0},
95 { "pcrel8", 8, 1, 0, 1, 1, 0, 0, 0},
96 { "uimm8s4", 8, 0, 0, 0, 2, 0, 0, 0},
97 { "pcrel8s4", 8, 1, 1, 1, 2, 0, 0, 0},
98 { "lppcrel10", 10, 1, 0, 1, 1, 0, 0, 0},
99 { "pcrel10", 10, 1, 1, 1, 1, 0, 0, 0},
100 { "pcrel12", 12, 1, 1, 1, 1, 0, 0, 0},
101 { "imm16s4", 16, 0, 1, 0, 2, 0, 0, 0},
102 { "luimm16", 16, 1, 0, 0, 0, 0, 0, 0},
103 { "imm16", 16, 0, 1, 0, 0, 0, 0, 0},
104 { "huimm16", 16, 1, 0, 0, 0, 0, 0, 0},
105 { "rimm16", 16, 1, 1, 0, 0, 0, 0, 0},
106 { "imm16s2", 16, 0, 1, 0, 1, 0, 0, 0},
107 { "uimm16s4", 16, 0, 0, 0, 2, 0, 0, 0},
108 { "uimm16", 16, 0, 0, 0, 0, 0, 0, 0},
109 { "pcrel24", 24, 1, 1, 1, 1, 0, 0, 0}
110};
111
112int _print_insn_bfin (bfd_vma pc, disassemble_info * outf);
113int print_insn_bfin (bfd_vma pc, disassemble_info * outf);
114
115static char *
116fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info * outf)
117{
118 static char buf[60];
119
120 if (constant_formats[cf].reloc)
121 {
122 bfd_vma ea = (((constant_formats[cf].pcrel ? SIGNEXTEND (x, constant_formats[cf].nbits)
123 : x) + constant_formats[cf].offset) << constant_formats[cf].scale);
124 if (constant_formats[cf].pcrel)
125 ea += pc;
126
127 outf->print_address_func (ea, outf);
128 return "";
129 }
130
131 /* Negative constants have an implied sign bit. */
132 if (constant_formats[cf].negative)
133 {
134 int nb = constant_formats[cf].nbits + 1;
135 x = x | (1 << constant_formats[cf].nbits);
136 x = SIGNEXTEND (x, nb);
137 }
138 else
139 x = constant_formats[cf].issigned ? SIGNEXTEND (x, constant_formats[cf].nbits) : x;
140
141 if (constant_formats[cf].offset)
142 x += constant_formats[cf].offset;
143
144 if (constant_formats[cf].scale)
145 x <<= constant_formats[cf].scale;
146
147 if (constant_formats[cf].issigned && x < 0)
148 sprintf (buf, "%ld", x);
149 else
150 sprintf (buf, "0x%lx", x);
151
152 return buf;
153}
154
155#undef SIGNEXTEND
156#undef MASKBITS
157#undef HOST_LONG_WORD_SIZE
158#define HOST_LONG_WORD_SIZE (sizeof(long)*8)
159#define SIGNEXTEND(v, n) (((long)(v) << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n)))
160#define MASKBITS(val, bits) (val & (( 1 << bits)-1))
161
162enum machine_registers
163{
164 REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7,
165 REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7,
166 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
167 REG_R1_0, REG_R3_2, REG_R5_4, REG_R7_6, REG_P0, REG_P1, REG_P2, REG_P3,
168 REG_P4, REG_P5, REG_SP, REG_FP, REG_A0x, REG_A1x, REG_A0w, REG_A1w,
169 REG_A0, REG_A1, REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1,
170 REG_M2, REG_M3, REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1,
171 REG_L2, REG_L3,
172 REG_AZ, REG_AN, REG_AC0, REG_AC1, REG_AV0, REG_AV1, REG_AV0S, REG_AV1S,
173 REG_AQ, REG_V, REG_VS,
174 REG_sftreset, REG_omode, REG_excause, REG_emucause, REG_idle_req, REG_hwerrcause, REG_CC, REG_LC0,
175 REG_LC1, REG_GP, REG_ASTAT, REG_RETS, REG_LT0, REG_LB0, REG_LT1, REG_LB1,
176 REG_CYCLES, REG_CYCLES2, REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN,
177 REG_RETE, REG_EMUDAT, REG_BR0, REG_BR1, REG_BR2, REG_BR3, REG_BR4, REG_BR5, REG_BR6,
178 REG_BR7, REG_PL0, REG_PL1, REG_PL2, REG_PL3, REG_PL4, REG_PL5, REG_SLP, REG_FLP,
179 REG_PH0, REG_PH1, REG_PH2, REG_PH3, REG_PH4, REG_PH5, REG_SHP, REG_FHP,
180 REG_IL0, REG_IL1, REG_IL2, REG_IL3, REG_ML0, REG_ML1, REG_ML2, REG_ML3,
181 REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3,
182 REG_IH0, REG_IH1, REG_IH2, REG_IH3, REG_MH0, REG_MH1, REG_MH2, REG_MH3,
183 REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3,
184 REG_LASTREG,
185};
186
187enum reg_class
188{
189 rc_dregs_lo, rc_dregs_hi, rc_dregs, rc_dregs_pair, rc_pregs, rc_spfp, rc_dregs_hilo, rc_accum_ext,
190 rc_accum_word, rc_accum, rc_iregs, rc_mregs, rc_bregs, rc_lregs, rc_dpregs, rc_gregs,
191 rc_regs, rc_statbits, rc_ignore_bits, rc_ccstat, rc_counters, rc_dregs2_sysregs1, rc_open, rc_sysregs2,
192 rc_sysregs3, rc_allregs,
193 LIM_REG_CLASSES
194};
195
196static char *reg_names[] =
197{
198 "R0.L", "R1.L", "R2.L", "R3.L", "R4.L", "R5.L", "R6.L", "R7.L",
199 "R0.H", "R1.H", "R2.H", "R3.H", "R4.H", "R5.H", "R6.H", "R7.H",
200 "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",
201 "R1:0", "R3:2", "R5:4", "R7:6", "P0", "P1", "P2", "P3",
202 "P4", "P5", "SP", "FP", "A0.x", "A1.x", "A0.w", "A1.w",
203 "A0", "A1", "I0", "I1", "I2", "I3", "M0", "M1",
204 "M2", "M3", "B0", "B1", "B2", "B3", "L0", "L1",
205 "L2", "L3",
206 "AZ", "AN", "AC0", "AC1", "AV0", "AV1", "AV0S", "AV1S",
207 "AQ", "V", "VS",
208 "sftreset", "omode", "excause", "emucause", "idle_req", "hwerrcause", "CC", "LC0",
209 "LC1", "GP", "ASTAT", "RETS", "LT0", "LB0", "LT1", "LB1",
210 "CYCLES", "CYCLES2", "USP", "SEQSTAT", "SYSCFG", "RETI", "RETX", "RETN",
211 "RETE", "EMUDAT",
212 "R0.B", "R1.B", "R2.B", "R3.B", "R4.B", "R5.B", "R6.B", "R7.B",
213 "P0.L", "P1.L", "P2.L", "P3.L", "P4.L", "P5.L", "SP.L", "FP.L",
214 "P0.H", "P1.H", "P2.H", "P3.H", "P4.H", "P5.H", "SP.H", "FP.H",
215 "I0.L", "I1.L", "I2.L", "I3.L", "M0.L", "M1.L", "M2.L", "M3.L",
216 "B0.L", "B1.L", "B2.L", "B3.L", "L0.L", "L1.L", "L2.L", "L3.L",
217 "I0.H", "I1.H", "I2.H", "I3.H", "M0.H", "M1.H", "M2.H", "M3.H",
218 "B0.H", "B1.H", "B2.H", "B3.H", "L0.H", "L1.H", "L2.H", "L3.H",
219 "LASTREG",
220 0
221};
222
223#define REGNAME(x) ((x) < REG_LASTREG ? (reg_names[x]) : "...... Illegal register .......")
224
225/* RL(0..7). */
226static enum machine_registers decode_dregs_lo[] =
227{
228 REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7,
229};
230
231#define dregs_lo(x) REGNAME(decode_dregs_lo[(x) & 7])
232
233/* RH(0..7). */
234static enum machine_registers decode_dregs_hi[] =
235{
236 REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7,
237};
238
239#define dregs_hi(x) REGNAME(decode_dregs_hi[(x) & 7])
240
241/* R(0..7). */
242static enum machine_registers decode_dregs[] =
243{
244 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
245};
246
247#define dregs(x) REGNAME(decode_dregs[(x) & 7])
248
249/* R BYTE(0..7). */
250static enum machine_registers decode_dregs_byte[] =
251{
252 REG_BR0, REG_BR1, REG_BR2, REG_BR3, REG_BR4, REG_BR5, REG_BR6, REG_BR7,
253};
254
255#define dregs_byte(x) REGNAME(decode_dregs_byte[(x) & 7])
256#define dregs_pair(x) REGNAME(decode_dregs_pair[(x) & 7])
257
258/* P(0..5) SP FP. */
259static enum machine_registers decode_pregs[] =
260{
261 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
262};
263
264#define pregs(x) REGNAME(decode_pregs[(x) & 7])
265#define spfp(x) REGNAME(decode_spfp[(x) & 1])
266#define dregs_hilo(x,i) REGNAME(decode_dregs_hilo[((i)<<3)|x])
267#define accum_ext(x) REGNAME(decode_accum_ext[(x) & 1])
268#define accum_word(x) REGNAME(decode_accum_word[(x) & 1])
269#define accum(x) REGNAME(decode_accum[(x) & 1])
270
271/* I(0..3). */
272static enum machine_registers decode_iregs[] =
273{
274 REG_I0, REG_I1, REG_I2, REG_I3,
275};
276
277#define iregs(x) REGNAME(decode_iregs[(x) & 3])
278
279/* M(0..3). */
280static enum machine_registers decode_mregs[] =
281{
282 REG_M0, REG_M1, REG_M2, REG_M3,
283};
284
285#define mregs(x) REGNAME(decode_mregs[(x) & 3])
286#define bregs(x) REGNAME(decode_bregs[(x) & 3])
287#define lregs(x) REGNAME(decode_lregs[(x) & 3])
288
289/* dregs pregs. */
290static enum machine_registers decode_dpregs[] =
291{
292 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
293 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
294};
295
296#define dpregs(x) REGNAME(decode_dpregs[(x) & 15])
297
298/* [dregs pregs]. */
299static enum machine_registers decode_gregs[] =
300{
301 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
302 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
303};
304
305#define gregs(x,i) REGNAME(decode_gregs[((i)<<3)|x])
306
307/* [dregs pregs (iregs mregs) (bregs lregs)]. */
308static enum machine_registers decode_regs[] =
309{
310 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
311 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
312 REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3,
313 REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
314};
315
316#define regs(x,i) REGNAME(decode_regs[((i)<<3)|x])
317
318/* [dregs pregs (iregs mregs) (bregs lregs) Low Half]. */
319static enum machine_registers decode_regs_lo[] =
320{
321 REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7,
322 REG_PL0, REG_PL1, REG_PL2, REG_PL3, REG_PL4, REG_PL5, REG_SLP, REG_FLP,
323 REG_IL0, REG_IL1, REG_IL2, REG_IL3, REG_ML0, REG_ML1, REG_ML2, REG_ML3,
324 REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3,
325};
326
327#define regs_lo(x,i) REGNAME(decode_regs_lo[((i)<<3)|x])
328/* [dregs pregs (iregs mregs) (bregs lregs) High Half]. */
329static enum machine_registers decode_regs_hi[] =
330{
331 REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7,
332 REG_PH0, REG_PH1, REG_PH2, REG_PH3, REG_PH4, REG_PH5, REG_SHP, REG_FHP,
333 REG_IH0, REG_IH1, REG_IH2, REG_IH3, REG_MH0, REG_MH1, REG_LH2, REG_MH3,
334 REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3,
335};
336
337#define regs_hi(x,i) REGNAME(decode_regs_hi[((i)<<3)|x])
338
339static enum machine_registers decode_statbits[] =
340{
341 REG_AZ, REG_AN, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_AQ, REG_LASTREG,
342 REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_AC0, REG_AC1, REG_LASTREG, REG_LASTREG,
343 REG_AV0, REG_AV0S, REG_AV1, REG_AV1S, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG,
344 REG_V, REG_VS, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG,
345};
346
347#define statbits(x) REGNAME(decode_statbits[(x) & 31])
348#define ignore_bits(x) REGNAME(decode_ignore_bits[(x) & 7])
349#define ccstat(x) REGNAME(decode_ccstat[(x) & 0])
350
351/* LC0 LC1. */
352static enum machine_registers decode_counters[] =
353{
354 REG_LC0, REG_LC1,
355};
356
357#define counters(x) REGNAME(decode_counters[(x) & 1])
358#define dregs2_sysregs1(x) REGNAME(decode_dregs2_sysregs1[(x) & 7])
359
360/* [dregs pregs (iregs mregs) (bregs lregs)
361 dregs2_sysregs1 open sysregs2 sysregs3]. */
362static enum machine_registers decode_allregs[] =
363{
364 REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7,
365 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
366 REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3,
367 REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3,
368 REG_A0x, REG_A0w, REG_A1x, REG_A1w, REG_GP, REG_LASTREG, REG_ASTAT, REG_RETS,
369 REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG,
370 REG_LC0, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1, REG_CYCLES, REG_CYCLES2,
371 REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, REG_RETE, REG_EMUDAT, REG_LASTREG,
372};
373
374#define allregs(x,i) REGNAME(decode_allregs[((i) << 3) | x])
375#define uimm16s4(x) fmtconst(c_uimm16s4, x, 0, outf)
376#define pcrel4(x) fmtconst(c_pcrel4, x, pc, outf)
377#define pcrel8(x) fmtconst(c_pcrel8, x, pc, outf)
378#define pcrel8s4(x) fmtconst(c_pcrel8s4, x, pc, outf)
379#define pcrel10(x) fmtconst(c_pcrel10, x, pc, outf)
380#define pcrel12(x) fmtconst(c_pcrel12, x, pc, outf)
381#define negimm5s4(x) fmtconst(c_negimm5s4, x, 0, outf)
382#define rimm16(x) fmtconst(c_rimm16, x, 0, outf)
383#define huimm16(x) fmtconst(c_huimm16, x, 0, outf)
384#define imm16(x) fmtconst(c_imm16, x, 0, outf)
385#define uimm2(x) fmtconst(c_uimm2, x, 0, outf)
386#define uimm3(x) fmtconst(c_uimm3, x, 0, outf)
387#define luimm16(x) fmtconst(c_luimm16, x, 0, outf)
388#define uimm4(x) fmtconst(c_uimm4, x, 0, outf)
389#define uimm5(x) fmtconst(c_uimm5, x, 0, outf)
390#define imm16s2(x) fmtconst(c_imm16s2, x, 0, outf)
391#define uimm8(x) fmtconst(c_uimm8, x, 0, outf)
392#define imm16s4(x) fmtconst(c_imm16s4, x, 0, outf)
393#define uimm4s2(x) fmtconst(c_uimm4s2, x, 0, outf)
394#define uimm4s4(x) fmtconst(c_uimm4s4, x, 0, outf)
395#define lppcrel10(x) fmtconst(c_lppcrel10, x, pc, outf)
396#define imm3(x) fmtconst(c_imm3, x, 0, outf)
397#define imm4(x) fmtconst(c_imm4, x, 0, outf)
398#define uimm8s4(x) fmtconst(c_uimm8s4, x, 0, outf)
399#define imm5(x) fmtconst(c_imm5, x, 0, outf)
400#define imm6(x) fmtconst(c_imm6, x, 0, outf)
401#define imm7(x) fmtconst(c_imm7, x, 0, outf)
402#define imm8(x) fmtconst(c_imm8, x, 0, outf)
403#define pcrel24(x) fmtconst(c_pcrel24, x, pc, outf)
404#define uimm16(x) fmtconst(c_uimm16, x, 0, outf)
405
406/* (arch.pm)arch_disassembler_functions. */
407#define notethat(x)
408
409#ifndef OUTS
410#define OUTS(p,txt) ((p) ? (((txt)[0]) ? (p->fprintf_func)(p->stream, txt) :0) :0)
411#endif
412
413
414static void
415amod0 (int s0, int x0, disassemble_info *outf)
416{
417 if (s0 == 0 && x0 == 0)
418 {
419 notethat ("(NS)");
420 return;
421 }
422 else if (s0 == 1 && x0 == 0)
423 {
424 notethat ("(S)");
425 OUTS (outf, "(S)");
426 return;
427 }
428 else if (s0 == 0 && x0 == 1)
429 {
430 notethat ("(CO)");
431 OUTS (outf, "(CO)");
432 return;
433 }
434 else if (s0 == 1 && x0 == 1)
435 {
436 notethat ("(SCO)");
437 OUTS (outf, "(SCO)");
438 return;
439 }
440 else
441 goto illegal_instruction;
442illegal_instruction:
443 return;
444}
445
446static void
447amod1 (int s0, int x0, disassemble_info *outf)
448{
449 if (s0 == 0 && x0 == 0)
450 {
451 notethat ("(NS)");
452 OUTS (outf, "(NS)");
453 return;
454 }
455 else if (s0 == 1 && x0 == 0)
456 {
457 notethat ("(S)");
458 OUTS (outf, "(S)");
459 return;
460 }
461 else
462 goto illegal_instruction;
463illegal_instruction:
464 return;
465}
466
467static void
468amod0amod2 (int s0, int x0, int aop0, disassemble_info *outf)
469{
470 if (s0 == 0 && x0 == 0 && aop0 == 0)
471 {
472 notethat ("(NS)");
473 return;
474 }
475 else if (s0 == 1 && x0 == 0 && aop0 == 0)
476 {
477 notethat ("(S)");
478 OUTS (outf, "(S)");
479 return;
480 }
481 else if (s0 == 0 && x0 == 1 && aop0 == 0)
482 {
483 notethat ("(CO)");
484 OUTS (outf, "(CO)");
485 return;
486 }
487 else if (s0 == 1 && x0 == 1 && aop0 == 0)
488 {
489 notethat ("(SCO)");
490 OUTS (outf, "(SCO)");
491 return;
492 }
493 else if (s0 == 0 && x0 == 0 && aop0 == 2)
494 {
495 notethat ("(ASR)");
496 OUTS (outf, "(ASR)");
497 return;
498 }
499 else if (s0 == 1 && x0 == 0 && aop0 == 2)
500 {
501 notethat ("(S,ASR)");
502 OUTS (outf, "(S,ASR)");
503 return;
504 }
505 else if (s0 == 0 && x0 == 1 && aop0 == 2)
506 {
507 notethat ("(CO,ASR)");
508 OUTS (outf, "(CO,ASR)");
509 return;
510 }
511 else if (s0 == 1 && x0 == 1 && aop0 == 2)
512 {
513 notethat ("(SCO,ASR)");
514 OUTS (outf, "(SCO,ASR)");
515 return;
516 }
517 else if (s0 == 0 && x0 == 0 && aop0 == 3)
518 {
519 notethat ("(ASL)");
520 OUTS (outf, "(ASL)");
521 return;
522 }
523 else if (s0 == 1 && x0 == 0 && aop0 == 3)
524 {
525 notethat ("(S,ASL)");
526 OUTS (outf, "(S,ASL)");
527 return;
528 }
529 else if (s0 == 0 && x0 == 1 && aop0 == 3)
530 {
531 notethat ("(CO,ASL)");
532 OUTS (outf, "(CO,ASL)");
533 return;
534 }
535 else if (s0 == 1 && x0 == 1 && aop0 == 3)
536 {
537 notethat ("(SCO,ASL)");
538 OUTS (outf, "(SCO,ASL)");
539 return;
540 }
541 else
542 goto illegal_instruction;
543illegal_instruction:
544 return;
545}
546
547static void
548searchmod (int r0, disassemble_info *outf)
549{
550 if ((r0 == 0))
551 {
552 notethat ("GT");
553 OUTS (outf, "GT");
554 return;
555 }
556 else if ((r0 == 1))
557 {
558 notethat ("GE");
559 OUTS (outf, "GE");
560 return;
561 }
562 else if ((r0 == 2))
563 {
564 notethat ("LT");
565 OUTS (outf, "LT");
566 return;
567 }
568 else if ((r0 == 3))
569 {
570 notethat ("LE");
571 OUTS (outf, "LE");
572 return;
573 }
574 else
575 goto illegal_instruction;
576illegal_instruction:
577 return;
578}
579
580static void
581aligndir (int r0, disassemble_info *outf)
582{
583 if ((r0 == 0))
584 {
585 notethat ("");
586 return;
587 }
588 else if ((r0 == 1))
589 {
590 notethat ("(R)");
591 OUTS (outf, "(R)");
592 return;
593 }
594 else
595 goto illegal_instruction;
596illegal_instruction:
597 return;
598}
599
600static int
601decode_multfunc (int h0, int h1, int src0, int src1, disassemble_info * outf)
602{
603 char *s0, *s1;
604
605 if (h0)
606 s0 = dregs_hi (src0);
607 else
608 s0 = dregs_lo (src0);
609
610 if (h1)
611 s1 = dregs_hi (src1);
612 else
613 s1 = dregs_lo (src1);
614
615 OUTS (outf, s0);
616 OUTS (outf, " * ");
617 OUTS (outf, s1);
618 return 0;
619}
620
621static int
622decode_macfunc (int which, int op, int h0, int h1, int src0, int src1, disassemble_info * outf)
623{
624 char *a;
625 char *sop = "<unknown op>";
626
627 if (which)
628 a = "a1";
629 else
630 a = "a0";
631
632 if (op == 3)
633 {
634 OUTS (outf, a);
635 return 0;
636 }
637
638 switch (op)
639 {
640 case 0:
641 sop = "=";
642 break;
643 case 1:
644 sop = "+=";
645 break;
646 case 2:
647 sop = "-=";
648 break;
649 }
650
651 OUTS (outf, a);
652 OUTS (outf, " ");
653 OUTS (outf, sop);
654 OUTS (outf, " ");
655 decode_multfunc (h0, h1, src0, src1, outf);
656
657 return 0;
658}
659
660static void
661decode_optmode (int mod, int MM, disassemble_info *outf)
662{
663 if (mod == 0 && MM == 0)
664 return;
665
666 OUTS (outf, " (");
667
668 if (MM && !mod)
669 {
670 OUTS (outf, "M)");
671 return;
672 }
673
674 if (MM)
675 OUTS (outf, "M, ");
676
677 if (mod == M_S2RND)
678 OUTS (outf, "S2RND");
679 else if (mod == M_T)
680 OUTS (outf, "T");
681 else if (mod == M_W32)
682 OUTS (outf, "W32");
683 else if (mod == M_FU)
684 OUTS (outf, "FU");
685 else if (mod == M_TFU)
686 OUTS (outf, "TFU");
687 else if (mod == M_IS)
688 OUTS (outf, "IS");
689 else if (mod == M_ISS2)
690 OUTS (outf, "ISS2");
691 else if (mod == M_IH)
692 OUTS (outf, "IH");
693 else if (mod == M_IU)
694 OUTS (outf, "IU");
695 else
696 abort ();
697
698 OUTS (outf, ")");
699}
700static int
701decode_ProgCtrl_0 (TIword iw0, disassemble_info *outf)
702{
703/* ProgCtrl
704+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
705| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........|
706+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
707*/
708 int poprnd = ((iw0 >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask);
709 int prgfunc = ((iw0 >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask);
710
711 if (prgfunc == 0 && poprnd == 0)
712 {
713 notethat ("NOP");
714 OUTS (outf, "NOP");
715 return 1 * 2;
716 }
717 else if (prgfunc == 1 && poprnd == 0)
718 {
719 notethat ("RTS");
720 OUTS (outf, "RTS");
721 return 1 * 2;
722 }
723 else if (prgfunc == 1 && poprnd == 1)
724 {
725 notethat ("RTI");
726 OUTS (outf, "RTI");
727 return 1 * 2;
728 }
729 else if (prgfunc == 1 && poprnd == 2)
730 {
731 notethat ("RTX");
732 OUTS (outf, "RTX");
733 return 1 * 2;
734 }
735 else if (prgfunc == 1 && poprnd == 3)
736 {
737 notethat ("RTN");
738 OUTS (outf, "RTN");
739 return 1 * 2;
740 }
741 else if (prgfunc == 1 && poprnd == 4)
742 {
743 notethat ("RTE");
744 OUTS (outf, "RTE");
745 return 1 * 2;
746 }
747 else if (prgfunc == 2 && poprnd == 0)
748 {
749 notethat ("IDLE");
750 OUTS (outf, "IDLE");
751 return 1 * 2;
752 }
753 else if (prgfunc == 2 && poprnd == 3)
754 {
755 notethat ("CSYNC");
756 OUTS (outf, "CSYNC");
757 return 1 * 2;
758 }
759 else if (prgfunc == 2 && poprnd == 4)
760 {
761 notethat ("SSYNC");
762 OUTS (outf, "SSYNC");
763 return 1 * 2;
764 }
765 else if (prgfunc == 2 && poprnd == 5)
766 {
767 notethat ("EMUEXCPT");
768 OUTS (outf, "EMUEXCPT");
769 return 1 * 2;
770 }
771 else if (prgfunc == 3)
772 {
773 notethat ("CLI dregs");
774 OUTS (outf, "CLI ");
775 OUTS (outf, dregs (poprnd));
776 return 1 * 2;
777 }
778 else if (prgfunc == 4)
779 {
780 notethat ("STI dregs");
781 OUTS (outf, "STI ");
782 OUTS (outf, dregs (poprnd));
783 return 1 * 2;
784 }
785 else if (prgfunc == 5)
786 {
787 notethat ("JUMP ( pregs )");
788 OUTS (outf, "JUMP (");
789 OUTS (outf, pregs (poprnd));
790 OUTS (outf, ")");
791 return 1 * 2;
792 }
793 else if (prgfunc == 6)
794 {
795 notethat ("CALL ( pregs )");
796 OUTS (outf, "CALL (");
797 OUTS (outf, pregs (poprnd));
798 OUTS (outf, ")");
799 return 1 * 2;
800 }
801 else if (prgfunc == 7)
802 {
803 notethat ("CALL ( PC + pregs )");
804 OUTS (outf, "CALL (PC+");
805 OUTS (outf, pregs (poprnd));
806 OUTS (outf, ")");
807 return 1 * 2;
808 }
809 else if (prgfunc == 8)
810 {
811 notethat ("JUMP ( PC + pregs )");
812 OUTS (outf, "JUMP (PC+");
813 OUTS (outf, pregs (poprnd));
814 OUTS (outf, ")");
815 return 1 * 2;
816 }
817 else if (prgfunc == 9)
818 {
819 notethat ("RAISE uimm4");
820 OUTS (outf, "RAISE ");
821 OUTS (outf, uimm4 (poprnd));
822 return 1 * 2;
823 }
824 else if (prgfunc == 10)
825 {
826 notethat ("EXCPT uimm4");
827 OUTS (outf, "EXCPT ");
828 OUTS (outf, uimm4 (poprnd));
829 return 1 * 2;
830 }
831 else if (prgfunc == 11)
832 {
833 notethat ("TESTSET ( pregs )");
834 OUTS (outf, "TESTSET (");
835 OUTS (outf, pregs (poprnd));
836 OUTS (outf, ")");
837 return 1 * 2;
838 }
839 else
840 goto illegal_instruction;
841illegal_instruction:
842 return 0;
843}
844
845static int
846decode_CaCTRL_0 (TIword iw0, disassemble_info *outf)
847{
848/* CaCTRL
849+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
850| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......|
851+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
852*/
853 int a = ((iw0 >> CaCTRL_a_bits) & CaCTRL_a_mask);
854 int op = ((iw0 >> CaCTRL_op_bits) & CaCTRL_op_mask);
855 int reg = ((iw0 >> CaCTRL_reg_bits) & CaCTRL_reg_mask);
856
857 if (a == 0 && op == 0)
858 {
859 notethat ("PREFETCH [ pregs ]");
860 OUTS (outf, "PREFETCH[");
861 OUTS (outf, pregs (reg));
862 OUTS (outf, "]");
863 return 1 * 2;
864 }
865 else if (a == 0 && op == 1)
866 {
867 notethat ("FLUSHINV [ pregs ]");
868 OUTS (outf, "FLUSHINV[");
869 OUTS (outf, pregs (reg));
870 OUTS (outf, "]");
871 return 1 * 2;
872 }
873 else if (a == 0 && op == 2)
874 {
875 notethat ("FLUSH [ pregs ]");
876 OUTS (outf, "FLUSH[");
877 OUTS (outf, pregs (reg));
878 OUTS (outf, "]");
879 return 1 * 2;
880 }
881 else if (a == 0 && op == 3)
882 {
883 notethat ("IFLUSH [ pregs ]");
884 OUTS (outf, "IFLUSH[");
885 OUTS (outf, pregs (reg));
886 OUTS (outf, "]");
887 return 1 * 2;
888 }
889 else if (a == 1 && op == 0)
890 {
891 notethat ("PREFETCH [ pregs ++ ]");
892 OUTS (outf, "PREFETCH[");
893 OUTS (outf, pregs (reg));
894 OUTS (outf, "++]");
895 return 1 * 2;
896 }
897 else if (a == 1 && op == 1)
898 {
899 notethat ("FLUSHINV [ pregs ++ ]");
900 OUTS (outf, "FLUSHINV[");
901 OUTS (outf, pregs (reg));
902 OUTS (outf, "++]");
903 return 1 * 2;
904 }
905 else if (a == 1 && op == 2)
906 {
907 notethat ("FLUSH [ pregs ++ ]");
908 OUTS (outf, "FLUSH[");
909 OUTS (outf, pregs (reg));
910 OUTS (outf, "++]");
911 return 1 * 2;
912 }
913 else if (a == 1 && op == 3)
914 {
915 notethat ("IFLUSH [ pregs ++ ]");
916 OUTS (outf, "IFLUSH[");
917 OUTS (outf, pregs (reg));
918 OUTS (outf, "++]");
919 return 1 * 2;
920 }
921 else
922 goto illegal_instruction;
923illegal_instruction:
924 return 0;
925}
926
927static int
928decode_PushPopReg_0 (TIword iw0, disassemble_info *outf)
929{
930
931/* PushPopReg
932+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
933| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......|
934+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
935*/
936 int W = ((iw0 >> PushPopReg_W_bits) & PushPopReg_W_mask);
937 int grp = ((iw0 >> PushPopReg_grp_bits) & PushPopReg_grp_mask);
938 int reg = ((iw0 >> PushPopReg_reg_bits) & PushPopReg_reg_mask);
939
940 if (W == 0)
941 {
942 notethat ("allregs = [ SP ++ ]");
943 OUTS (outf, allregs (reg, grp));
944 OUTS (outf, " = [SP++]");
945 return 1 * 2;
946 }
947 else if (W == 1)
948 {
949 notethat ("[ -- SP ] = allregs");
950 OUTS (outf, "[--SP] = ");
951 OUTS (outf, allregs (reg, grp));
952 return 1 * 2;
953 }
954 else
955 goto illegal_instruction;
956illegal_instruction:
957 return 0;
958}
959
960static int
961decode_PushPopMultiple_0 (TIword iw0, disassemble_info *outf)
962{
963/* PushPopMultiple
964+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
965| 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........|
966+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
967*/
968 int p = ((iw0 >> PushPopMultiple_p_bits) & PushPopMultiple_p_mask);
969 int d = ((iw0 >> PushPopMultiple_d_bits) & PushPopMultiple_d_mask);
970 int W = ((iw0 >> PushPopMultiple_W_bits) & PushPopMultiple_W_mask);
971 int dr = ((iw0 >> PushPopMultiple_dr_bits) & PushPopMultiple_dr_mask);
972 int pr = ((iw0 >> PushPopMultiple_pr_bits) & PushPopMultiple_pr_mask);
973
974 char ps[5], ds[5];
975 sprintf (ps, "%d", pr);
976 sprintf (ds, "%d", dr);
977
978 if (W == 1 && d == 1 && p == 1)
979 {
980 notethat ("[ -- SP ] = ( R7 : reglim , P5 : reglim )");
981 OUTS (outf, "[--SP] = (R7:");
982 OUTS (outf, ds);
983 OUTS (outf, ", P5:");
984 OUTS (outf, ps);
985 OUTS (outf, ")");
986 return 1 * 2;
987 }
988 else if (W == 1 && d == 1 && p == 0)
989 {
990 notethat ("[ -- SP ] = ( R7 : reglim )");
991 OUTS (outf, "[--SP] = (R7:");
992 OUTS (outf, ds);
993 OUTS (outf, ")");
994 return 1 * 2;
995 }
996 else if (W == 1 && d == 0 && p == 1)
997 {
998 notethat ("[ -- SP ] = ( P5 : reglim )");
999 OUTS (outf, "[--SP] = (P5:");
1000 OUTS (outf, ps);
1001 OUTS (outf, ")");
1002 return 1 * 2;
1003 }
1004 else if (W == 0 && d == 1 && p == 1)
1005 {
1006 notethat ("( R7 : reglim , P5 : reglim ) = [ SP ++ ]");
1007 OUTS (outf, "(R7:");
1008 OUTS (outf, ds);
1009 OUTS (outf, ", P5:");
1010 OUTS (outf, ps);
1011 OUTS (outf, ") = [SP++]");
1012 return 1 * 2;
1013 }
1014 else if (W == 0 && d == 1 && p == 0)
1015 {
1016 notethat ("( R7 : reglim ) = [ SP ++ ]");
1017 OUTS (outf, "(R7:");
1018 OUTS (outf, ds);
1019 OUTS (outf, ") = [SP++]");
1020 return 1 * 2;
1021 }
1022 else if (W == 0 && d == 0 && p == 1)
1023 {
1024 notethat ("( P5 : reglim ) = [ SP ++ ]");
1025 OUTS (outf, "(P5:");
1026 OUTS (outf, ps);
1027 OUTS (outf, ") = [SP++]");
1028 return 1 * 2;
1029 }
1030 else
1031 goto illegal_instruction;
1032illegal_instruction:
1033 return 0;
1034}
1035
1036static int
1037decode_ccMV_0 (TIword iw0, disassemble_info *outf)
1038{
1039/* ccMV
1040+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1041| 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......|
1042+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1043*/
1044 int s = ((iw0 >> CCmv_s_bits) & CCmv_s_mask);
1045 int d = ((iw0 >> CCmv_d_bits) & CCmv_d_mask);
1046 int T = ((iw0 >> CCmv_T_bits) & CCmv_T_mask);
1047 int src = ((iw0 >> CCmv_src_bits) & CCmv_src_mask);
1048 int dst = ((iw0 >> CCmv_dst_bits) & CCmv_dst_mask);
1049
1050 if (T == 1)
1051 {
1052 notethat ("IF CC gregs = gregs");
1053 OUTS (outf, "IF CC ");
1054 OUTS (outf, gregs (dst, d));
1055 OUTS (outf, " = ");
1056 OUTS (outf, gregs (src, s));
1057 return 1 * 2;
1058 }
1059 else if (T == 0)
1060 {
1061 notethat ("IF ! CC gregs = gregs");
1062 OUTS (outf, "IF ! CC ");
1063 OUTS (outf, gregs (dst, d));
1064 OUTS (outf, " = ");
1065 OUTS (outf, gregs (src, s));
1066 return 1 * 2;
1067 }
1068 else
1069 goto illegal_instruction;
1070illegal_instruction:
1071 return 0;
1072}
1073
1074static int
1075decode_CCflag_0 (TIword iw0, disassemble_info *outf)
1076{
1077/* CCflag
1078+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1079| 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........|
1080+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1081*/
1082 int x = ((iw0 >> CCflag_x_bits) & CCflag_x_mask);
1083 int y = ((iw0 >> CCflag_y_bits) & CCflag_y_mask);
1084 int I = ((iw0 >> CCflag_I_bits) & CCflag_I_mask);
1085 int G = ((iw0 >> CCflag_G_bits) & CCflag_G_mask);
1086 int opc = ((iw0 >> CCflag_opc_bits) & CCflag_opc_mask);
1087
1088 if (opc == 0 && I == 0 && G == 0)
1089 {
1090 notethat ("CC = dregs == dregs");
1091 OUTS (outf, "CC=");
1092 OUTS (outf, dregs (x));
1093 OUTS (outf, "==");
1094 OUTS (outf, dregs (y));
1095 return 1 * 2;
1096 }
1097 else if (opc == 1 && I == 0 && G == 0)
1098 {
1099 notethat ("CC = dregs < dregs");
1100 OUTS (outf, "CC=");
1101 OUTS (outf, dregs (x));
1102 OUTS (outf, "<");
1103 OUTS (outf, dregs (y));
1104 return 1 * 2;
1105 }
1106 else if (opc == 2 && I == 0 && G == 0)
1107 {
1108 notethat ("CC = dregs <= dregs");
1109 OUTS (outf, "CC=");
1110 OUTS (outf, dregs (x));
1111 OUTS (outf, "<=");
1112 OUTS (outf, dregs (y));
1113 return 1 * 2;
1114 }
1115 else if (opc == 3 && I == 0 && G == 0)
1116 {
1117 notethat ("CC = dregs < dregs ( IU )");
1118 OUTS (outf, "CC=");
1119 OUTS (outf, dregs (x));
1120 OUTS (outf, "<");
1121 OUTS (outf, dregs (y));
1122 OUTS (outf, "(IU)");
1123 return 1 * 2;
1124 }
1125 else if (opc == 4 && I == 0 && G == 0)
1126 {
1127 notethat ("CC = dregs <= dregs ( IU )");
1128 OUTS (outf, "CC=");
1129 OUTS (outf, dregs (x));
1130 OUTS (outf, "<=");
1131 OUTS (outf, dregs (y));
1132 OUTS (outf, "(IU)");
1133 return 1 * 2;
1134 }
1135 else if (opc == 0 && I == 1 && G == 0)
1136 {
1137 notethat ("CC = dregs == imm3");
1138 OUTS (outf, "CC=");
1139 OUTS (outf, dregs (x));
1140 OUTS (outf, "==");
1141 OUTS (outf, imm3 (y));
1142 return 1 * 2;
1143 }
1144 else if (opc == 1 && I == 1 && G == 0)
1145 {
1146 notethat ("CC = dregs < imm3");
1147 OUTS (outf, "CC=");
1148 OUTS (outf, dregs (x));
1149 OUTS (outf, "<");
1150 OUTS (outf, imm3 (y));
1151 return 1 * 2;
1152 }
1153 else if (opc == 2 && I == 1 && G == 0)
1154 {
1155 notethat ("CC = dregs <= imm3");
1156 OUTS (outf, "CC=");
1157 OUTS (outf, dregs (x));
1158 OUTS (outf, "<=");
1159 OUTS (outf, imm3 (y));
1160 return 1 * 2;
1161 }
1162 else if (opc == 3 && I == 1 && G == 0)
1163 {
1164 notethat ("CC = dregs < uimm3 ( IU )");
1165 OUTS (outf, "CC=");
1166 OUTS (outf, dregs (x));
1167 OUTS (outf, "<");
1168 OUTS (outf, uimm3 (y));
1169 OUTS (outf, "(IU)");
1170 return 1 * 2;
1171 }
1172 else if (opc == 4 && I == 1 && G == 0)
1173 {
1174 notethat ("CC = dregs <= uimm3 ( IU )");
1175 OUTS (outf, "CC=");
1176 OUTS (outf, dregs (x));
1177 OUTS (outf, "<=");
1178 OUTS (outf, uimm3 (y));
1179 OUTS (outf, "(IU)");
1180 return 1 * 2;
1181 }
1182 else if (opc == 0 && I == 0 && G == 1)
1183 {
1184 notethat ("CC = pregs == pregs");
1185 OUTS (outf, "CC=");
1186 OUTS (outf, pregs (x));
1187 OUTS (outf, "==");
1188 OUTS (outf, pregs (y));
1189 return 1 * 2;
1190 }
1191 else if (opc == 1 && I == 0 && G == 1)
1192 {
1193 notethat ("CC = pregs < pregs");
1194 OUTS (outf, "CC=");
1195 OUTS (outf, pregs (x));
1196 OUTS (outf, "<");
1197 OUTS (outf, pregs (y));
1198 return 1 * 2;
1199 }
1200 else if (opc == 2 && I == 0 && G == 1)
1201 {
1202 notethat ("CC = pregs <= pregs");
1203 OUTS (outf, "CC=");
1204 OUTS (outf, pregs (x));
1205 OUTS (outf, "<=");
1206 OUTS (outf, pregs (y));
1207 return 1 * 2;
1208 }
1209 else if (opc == 3 && I == 0 && G == 1)
1210 {
1211 notethat ("CC = pregs < pregs ( IU )");
1212 OUTS (outf, "CC=");
1213 OUTS (outf, pregs (x));
1214 OUTS (outf, "<");
1215 OUTS (outf, pregs (y));
1216 OUTS (outf, "(IU)");
1217 return 1 * 2;
1218 }
1219 else if (opc == 4 && I == 0 && G == 1)
1220 {
1221 notethat ("CC = pregs <= pregs ( IU )");
1222 OUTS (outf, "CC=");
1223 OUTS (outf, pregs (x));
1224 OUTS (outf, "<=");
1225 OUTS (outf, pregs (y));
1226 OUTS (outf, "(IU)");
1227 return 1 * 2;
1228 }
1229 else if (opc == 0 && I == 1 && G == 1)
1230 {
1231 notethat ("CC = pregs == imm3");
1232 OUTS (outf, "CC=");
1233 OUTS (outf, pregs (x));
1234 OUTS (outf, "==");
1235 OUTS (outf, imm3 (y));
1236 return 1 * 2;
1237 }
1238 else if (opc == 1 && I == 1 && G == 1)
1239 {
1240 notethat ("CC = pregs < imm3");
1241 OUTS (outf, "CC=");
1242 OUTS (outf, pregs (x));
1243 OUTS (outf, "<");
1244 OUTS (outf, imm3 (y));
1245 return 1 * 2;
1246 }
1247 else if (opc == 2 && I == 1 && G == 1)
1248 {
1249 notethat ("CC = pregs <= imm3");
1250 OUTS (outf, "CC=");
1251 OUTS (outf, pregs (x));
1252 OUTS (outf, "<=");
1253 OUTS (outf, imm3 (y));
1254 return 1 * 2;
1255 }
1256 else if (opc == 3 && I == 1 && G == 1)
1257 {
1258 notethat ("CC = pregs < uimm3 ( IU )");
1259 OUTS (outf, "CC=");
1260 OUTS (outf, pregs (x));
1261 OUTS (outf, "<");
1262 OUTS (outf, uimm3 (y));
1263 OUTS (outf, "(IU)");
1264 return 1 * 2;
1265 }
1266 else if (opc == 4 && I == 1 && G == 1)
1267 {
1268 notethat ("CC = pregs <= uimm3 ( IU )");
1269 OUTS (outf, "CC=");
1270 OUTS (outf, pregs (x));
1271 OUTS (outf, "<=");
1272 OUTS (outf, uimm3 (y));
1273 OUTS (outf, "(IU)");
1274 return 1 * 2;
1275 }
1276 else if (opc == 5 && I == 0 && G == 0)
1277 {
1278 notethat ("CC = A0 == A1");
1279 OUTS (outf, "CC=A0==A1");
1280 return 1 * 2;
1281 }
1282 else if (opc == 6 && I == 0 && G == 0)
1283 {
1284 notethat ("CC = A0 < A1");
1285 OUTS (outf, "CC=A0<A1");
1286 return 1 * 2;
1287 }
1288 else if (opc == 7 && I == 0 && G == 0)
1289 {
1290 notethat ("CC = A0 <= A1");
1291 OUTS (outf, "CC=A0<=A1");
1292 return 1 * 2;
1293 }
1294 else
1295 goto illegal_instruction;
1296illegal_instruction:
1297 return 0;
1298}
1299
1300static int
1301decode_CC2dreg_0 (TIword iw0, disassemble_info *outf)
1302{
1303/* CC2dreg
1304+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1305| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......|
1306+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1307*/
1308 int op = ((iw0 >> CC2dreg_op_bits) & CC2dreg_op_mask);
1309 int reg = ((iw0 >> CC2dreg_reg_bits) & CC2dreg_reg_mask);
1310
1311 if (op == 0)
1312 {
1313 notethat ("dregs = CC");
1314 OUTS (outf, dregs (reg));
1315 OUTS (outf, "=CC");
1316 return 1 * 2;
1317 }
1318 else if (op == 1)
1319 {
1320 notethat ("CC = dregs");
1321 OUTS (outf, "CC=");
1322 OUTS (outf, dregs (reg));
1323 return 1 * 2;
1324 }
1325 else if (op == 3)
1326 {
1327 notethat ("CC =! CC");
1328 OUTS (outf, "CC=!CC");
1329 return 1 * 2;
1330 }
1331 else
1332 goto illegal_instruction;
1333illegal_instruction:
1334 return 0;
1335}
1336
1337static int
1338decode_CC2stat_0 (TIword iw0, disassemble_info *outf)
1339{
1340/* CC2stat
1341+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1342| 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............|
1343+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1344*/
1345 int D = ((iw0 >> CC2stat_D_bits) & CC2stat_D_mask);
1346 int op = ((iw0 >> CC2stat_op_bits) & CC2stat_op_mask);
1347 int cbit = ((iw0 >> CC2stat_cbit_bits) & CC2stat_cbit_mask);
1348
1349 if (op == 0 && D == 0)
1350 {
1351 notethat ("CC = statbits");
1352 OUTS (outf, "CC = ");
1353 OUTS (outf, statbits (cbit));
1354 return 1 * 2;
1355 }
1356 else if (op == 1 && D == 0)
1357 {
1358 notethat ("CC |= statbits");
1359 OUTS (outf, "CC|=");
1360 OUTS (outf, statbits (cbit));
1361 return 1 * 2;
1362 }
1363 else if (op == 2 && D == 0)
1364 {
1365 notethat ("CC &= statbits");
1366 OUTS (outf, "CC&=");
1367 OUTS (outf, statbits (cbit));
1368 return 1 * 2;
1369 }
1370 else if (op == 3 && D == 0)
1371 {
1372 notethat ("CC ^= statbits");
1373 OUTS (outf, "CC^=");
1374 OUTS (outf, statbits (cbit));
1375 return 1 * 2;
1376 }
1377 else if (op == 0 && D == 1)
1378 {
1379 notethat ("statbits = CC");
1380 OUTS (outf, statbits (cbit));
1381 OUTS (outf, "=CC");
1382 return 1 * 2;
1383 }
1384 else if (op == 1 && D == 1)
1385 {
1386 notethat ("statbits |= CC");
1387 OUTS (outf, statbits (cbit));
1388 OUTS (outf, "|=CC");
1389 return 1 * 2;
1390 }
1391 else if (op == 2 && D == 1)
1392 {
1393 notethat ("statbits &= CC");
1394 OUTS (outf, statbits (cbit));
1395 OUTS (outf, "&=CC");
1396 return 1 * 2;
1397 }
1398 else if (op == 3 && D == 1)
1399 {
1400 notethat ("statbits ^= CC");
1401 OUTS (outf, statbits (cbit));
1402 OUTS (outf, "^=CC");
1403 return 1 * 2;
1404 }
1405 else
1406 goto illegal_instruction;
1407illegal_instruction:
1408 return 0;
1409}
1410
1411static int
1412decode_BRCC_0 (TIword iw0, bfd_vma pc, disassemble_info *outf)
1413{
1414/* BRCC
1415+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1416| 0 | 0 | 0 | 1 |.T.|.B.|.offset................................|
1417+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1418*/
1419 int B = ((iw0 >> BRCC_B_bits) & BRCC_B_mask);
1420 int T = ((iw0 >> BRCC_T_bits) & BRCC_T_mask);
1421 int offset = ((iw0 >> BRCC_offset_bits) & BRCC_offset_mask);
1422
1423 if (T == 1 && B == 1)
1424 {
1425 notethat ("IF CC JUMP pcrel10 ( BP )");
1426 OUTS (outf, "IF CC JUMP ");
1427 OUTS (outf, pcrel10 (offset));
1428 OUTS (outf, "(BP)");
1429 return 1 * 2;
1430 }
1431 else if (T == 0 && B == 1)
1432 {
1433 notethat ("IF !CC JUMP pcrel10 ( BP )");
1434 OUTS (outf, "IF ! CC JUMP ");
1435 OUTS (outf, pcrel10 (offset));
1436 OUTS (outf, "(BP)");
1437 return 1 * 2;
1438 }
1439 else if (T == 1)
1440 {
1441 notethat ("IF CC JUMP pcrel10");
1442 OUTS (outf, "IF CC JUMP ");
1443 OUTS (outf, pcrel10 (offset));
1444 return 1 * 2;
1445 }
1446 else if (T == 0)
1447 {
1448 notethat ("IF !CC JUMP pcrel10");
1449 OUTS (outf, "IF ! CC JUMP ");
1450 OUTS (outf, pcrel10 (offset));
1451 return 1 * 2;
1452 }
1453 else
1454 goto illegal_instruction;
1455illegal_instruction:
1456 return 0;
1457}
1458
1459static int
1460decode_UJUMP_0 (TIword iw0, bfd_vma pc, disassemble_info *outf)
1461{
1462/* UJUMP
1463+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1464| 0 | 0 | 1 | 0 |.offset........................................|
1465+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1466*/
1467 int offset = ((iw0 >> UJump_offset_bits) & UJump_offset_mask);
1468
1469 notethat ("JUMP.S pcrel12");
1470 OUTS (outf, "JUMP.S ");
1471 OUTS (outf, pcrel12 (offset));
1472 return 1 * 2;
1473}
1474
1475static int
1476decode_REGMV_0 (TIword iw0, disassemble_info *outf)
1477{
1478/* REGMV
1479+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1480| 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......|
1481+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1482*/
1483 int gs = ((iw0 >> RegMv_gs_bits) & RegMv_gs_mask);
1484 int gd = ((iw0 >> RegMv_gd_bits) & RegMv_gd_mask);
1485 int src = ((iw0 >> RegMv_src_bits) & RegMv_src_mask);
1486 int dst = ((iw0 >> RegMv_dst_bits) & RegMv_dst_mask);
1487
1488 notethat ("allregs = allregs");
1489 OUTS (outf, allregs (dst, gd));
1490 OUTS (outf, "=");
1491 OUTS (outf, allregs (src, gs));
1492 return 1 * 2;
1493}
1494
1495static int
1496decode_ALU2op_0 (TIword iw0, disassemble_info *outf)
1497{
1498/* ALU2op
1499+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1500| 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......|
1501+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1502*/
1503 int src = ((iw0 >> ALU2op_src_bits) & ALU2op_src_mask);
1504 int opc = ((iw0 >> ALU2op_opc_bits) & ALU2op_opc_mask);
1505 int dst = ((iw0 >> ALU2op_dst_bits) & ALU2op_dst_mask);
1506
1507 if (opc == 0)
1508 {
1509 notethat ("dregs >>>= dregs");
1510 OUTS (outf, dregs (dst));
1511 OUTS (outf, ">>>=");
1512 OUTS (outf, dregs (src));
1513 return 1 * 2;
1514 }
1515 else if (opc == 1)
1516 {
1517 notethat ("dregs >>= dregs");
1518 OUTS (outf, dregs (dst));
1519 OUTS (outf, ">>=");
1520 OUTS (outf, dregs (src));
1521 return 1 * 2;
1522 }
1523 else if (opc == 2)
1524 {
1525 notethat ("dregs <<= dregs");
1526 OUTS (outf, dregs (dst));
1527 OUTS (outf, "<<=");
1528 OUTS (outf, dregs (src));
1529 return 1 * 2;
1530 }
1531 else if (opc == 3)
1532 {
1533 notethat ("dregs *= dregs");
1534 OUTS (outf, dregs (dst));
1535 OUTS (outf, "*=");
1536 OUTS (outf, dregs (src));
1537 return 1 * 2;
1538 }
1539 else if (opc == 4)
1540 {
1541 notethat ("dregs = (dregs + dregs) << 1");
1542 OUTS (outf, dregs (dst));
1543 OUTS (outf, "=(");
1544 OUTS (outf, dregs (dst));
1545 OUTS (outf, "+");
1546 OUTS (outf, dregs (src));
1547 OUTS (outf, ")<<1");
1548 return 1 * 2;
1549 }
1550 else if (opc == 5)
1551 {
1552 notethat ("dregs = (dregs + dregs) << 2");
1553 OUTS (outf, dregs (dst));
1554 OUTS (outf, "=(");
1555 OUTS (outf, dregs (dst));
1556 OUTS (outf, "+");
1557 OUTS (outf, dregs (src));
1558 OUTS (outf, ")<<2");
1559 return 1 * 2;
1560 }
1561 else if (opc == 8)
1562 {
1563 notethat ("DIVQ (dregs , dregs)");
1564 OUTS (outf, "DIVQ(");
1565 OUTS (outf, dregs (dst));
1566 OUTS (outf, ",");
1567 OUTS (outf, dregs (src));
1568 OUTS (outf, ")");
1569 return 1 * 2;
1570 }
1571 else if (opc == 9)
1572 {
1573 notethat ("DIVS (dregs , dregs)");
1574 OUTS (outf, "DIVS(");
1575 OUTS (outf, dregs (dst));
1576 OUTS (outf, ",");
1577 OUTS (outf, dregs (src));
1578 OUTS (outf, ")");
1579 return 1 * 2;
1580 }
1581 else if (opc == 10)
1582 {
1583 notethat ("dregs = dregs_lo (X)");
1584 OUTS (outf, dregs (dst));
1585 OUTS (outf, "=");
1586 OUTS (outf, dregs_lo (src));
1587 OUTS (outf, "(X)");
1588 return 1 * 2;
1589 }
1590 else if (opc == 11)
1591 {
1592 notethat ("dregs = dregs_lo (Z)");
1593 OUTS (outf, dregs (dst));
1594 OUTS (outf, "=");
1595 OUTS (outf, dregs_lo (src));
1596 OUTS (outf, "(Z)");
1597 return 1 * 2;
1598 }
1599 else if (opc == 12)
1600 {
1601 notethat ("dregs = dregs_byte (X)");
1602 OUTS (outf, dregs (dst));
1603 OUTS (outf, "=");
1604 OUTS (outf, dregs_byte (src));
1605 OUTS (outf, "(X)");
1606 return 1 * 2;
1607 }
1608 else if (opc == 13)
1609 {
1610 notethat ("dregs = dregs_byte (Z)");
1611 OUTS (outf, dregs (dst));
1612 OUTS (outf, "=");
1613 OUTS (outf, dregs_byte (src));
1614 OUTS (outf, "(Z)");
1615 return 1 * 2;
1616 }
1617 else if (opc == 14)
1618 {
1619 notethat ("dregs = - dregs");
1620 OUTS (outf, dregs (dst));
1621 OUTS (outf, "=-");
1622 OUTS (outf, dregs (src));
1623 return 1 * 2;
1624 }
1625 else if (opc == 15)
1626 {
1627 notethat ("dregs = ~ dregs");
1628 OUTS (outf, dregs (dst));
1629 OUTS (outf, "=~");
1630 OUTS (outf, dregs (src));
1631 return 1 * 2;
1632 }
1633 else
1634 goto illegal_instruction;
1635illegal_instruction:
1636 return 0;
1637}
1638
1639static int
1640decode_PTR2op_0 (TIword iw0, disassemble_info *outf)
1641{
1642/* PTR2op
1643+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1644| 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......|
1645+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1646*/
1647 int src = ((iw0 >> PTR2op_src_bits) & PTR2op_dst_mask);
1648 int opc = ((iw0 >> PTR2op_opc_bits) & PTR2op_opc_mask);
1649 int dst = ((iw0 >> PTR2op_dst_bits) & PTR2op_dst_mask);
1650
1651 if (opc == 0)
1652 {
1653 notethat ("pregs -= pregs");
1654 OUTS (outf, pregs (dst));
1655 OUTS (outf, "-=");
1656 OUTS (outf, pregs (src));
1657 return 1 * 2;
1658 }
1659 else if (opc == 1)
1660 {
1661 notethat ("pregs = pregs << 2");
1662 OUTS (outf, pregs (dst));
1663 OUTS (outf, "=");
1664 OUTS (outf, pregs (src));
1665 OUTS (outf, "<<2");
1666 return 1 * 2;
1667 }
1668 else if (opc == 3)
1669 {
1670 notethat ("pregs = pregs >> 2");
1671 OUTS (outf, pregs (dst));
1672 OUTS (outf, "=");
1673 OUTS (outf, pregs (src));
1674 OUTS (outf, ">>2");
1675 return 1 * 2;
1676 }
1677 else if (opc == 4)
1678 {
1679 notethat ("pregs = pregs >> 1");
1680 OUTS (outf, pregs (dst));
1681 OUTS (outf, "=");
1682 OUTS (outf, pregs (src));
1683 OUTS (outf, ">>1");
1684 return 1 * 2;
1685 }
1686 else if (opc == 5)
1687 {
1688 notethat ("pregs += pregs ( BREV )");
1689 OUTS (outf, pregs (dst));
1690 OUTS (outf, "+=");
1691 OUTS (outf, pregs (src));
1692 OUTS (outf, "(BREV)");
1693 return 1 * 2;
1694 }
1695 else if (opc == 6)
1696 {
1697 notethat ("pregs = (pregs + pregs) << 1");
1698 OUTS (outf, pregs (dst));
1699 OUTS (outf, "=(");
1700 OUTS (outf, pregs (dst));
1701 OUTS (outf, "+");
1702 OUTS (outf, pregs (src));
1703 OUTS (outf, ")<<1");
1704 return 1 * 2;
1705 }
1706 else if (opc == 7)
1707 {
1708 notethat ("pregs = (pregs + pregs) << 2");
1709 OUTS (outf, pregs (dst));
1710 OUTS (outf, "=(");
1711 OUTS (outf, pregs (dst));
1712 OUTS (outf, "+");
1713 OUTS (outf, pregs (src));
1714 OUTS (outf, ")<<2");
1715 return 1 * 2;
1716 }
1717 else
1718 goto illegal_instruction;
1719illegal_instruction:
1720 return 0;
1721}
1722
1723static int
1724decode_LOGI2op_0 (TIword iw0, disassemble_info *outf)
1725{
1726/* LOGI2op
1727+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1728| 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......|
1729+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1730*/
1731 int src = ((iw0 >> LOGI2op_src_bits) & LOGI2op_src_mask);
1732 int opc = ((iw0 >> LOGI2op_opc_bits) & LOGI2op_opc_mask);
1733 int dst = ((iw0 >> LOGI2op_dst_bits) & LOGI2op_dst_mask);
1734
1735 if (opc == 0)
1736 {
1737 notethat ("CC = ! BITTST ( dregs , uimm5 )");
1738 OUTS (outf, "CC = ! BITTST (");
1739 OUTS (outf, dregs (dst));
1740 OUTS (outf, ",");
1741 OUTS (outf, uimm5 (src));
1742 OUTS (outf, ")");
1743 return 1 * 2;
1744 }
1745 else if (opc == 1)
1746 {
1747 notethat ("CC = BITTST ( dregs , uimm5 )");
1748 OUTS (outf, "CC = BITTST (");
1749 OUTS (outf, dregs (dst));
1750 OUTS (outf, ",");
1751 OUTS (outf, uimm5 (src));
1752 OUTS (outf, ")");
1753 return 1 * 2;
1754 }
1755 else if (opc == 2)
1756 {
1757 notethat ("BITSET ( dregs , uimm5 )");
1758 OUTS (outf, "BITSET (");
1759 OUTS (outf, dregs (dst));
1760 OUTS (outf, ",");
1761 OUTS (outf, uimm5 (src));
1762 OUTS (outf, ")");
1763 return 1 * 2;
1764 }
1765 else if (opc == 3)
1766 {
1767 notethat ("BITTGL ( dregs , uimm5 )");
1768 OUTS (outf, "BITTGL (");
1769 OUTS (outf, dregs (dst));
1770 OUTS (outf, ",");
1771 OUTS (outf, uimm5 (src));
1772 OUTS (outf, ")");
1773 return 1 * 2;
1774 }
1775 else if (opc == 4)
1776 {
1777 notethat ("BITCLR ( dregs , uimm5 )");
1778 OUTS (outf, "BITCLR (");
1779 OUTS (outf, dregs (dst));
1780 OUTS (outf, ",");
1781 OUTS (outf, uimm5 (src));
1782 OUTS (outf, ")");
1783 return 1 * 2;
1784 }
1785 else if (opc == 5)
1786 {
1787 notethat ("dregs >>>= uimm5");
1788 OUTS (outf, dregs (dst));
1789 OUTS (outf, ">>>=");
1790 OUTS (outf, uimm5 (src));
1791 return 1 * 2;
1792 }
1793 else if (opc == 6)
1794 {
1795 notethat ("dregs >>= uimm5");
1796 OUTS (outf, dregs (dst));
1797 OUTS (outf, ">>=");
1798 OUTS (outf, uimm5 (src));
1799 return 1 * 2;
1800 }
1801 else if (opc == 7)
1802 {
1803 notethat ("dregs <<= uimm5");
1804 OUTS (outf, dregs (dst));
1805 OUTS (outf, "<<=");
1806 OUTS (outf, uimm5 (src));
1807 return 1 * 2;
1808 }
1809 else
1810 goto illegal_instruction;
1811illegal_instruction:
1812 return 0;
1813}
1814
1815static int
1816decode_COMP3op_0 (TIword iw0, disassemble_info *outf)
1817{
1818/* COMP3op
1819+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1820| 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......|
1821+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1822*/
1823 int opc = ((iw0 >> COMP3op_opc_bits) & COMP3op_opc_mask);
1824 int dst = ((iw0 >> COMP3op_dst_bits) & COMP3op_dst_mask);
1825 int src0 = ((iw0 >> COMP3op_src0_bits) & COMP3op_src0_mask);
1826 int src1 = ((iw0 >> COMP3op_src1_bits) & COMP3op_src1_mask);
1827
1828 if (opc == 5 && src1 == src0)
1829 {
1830 notethat ("pregs = pregs << 1");
1831 OUTS (outf, pregs (dst));
1832 OUTS (outf, "=");
1833 OUTS (outf, pregs (src0));
1834 OUTS (outf, "<<1");
1835 return 1 * 2;
1836 }
1837 else if (opc == 1)
1838 {
1839 notethat ("dregs = dregs - dregs");
1840 OUTS (outf, dregs (dst));
1841 OUTS (outf, "=");
1842 OUTS (outf, dregs (src0));
1843 OUTS (outf, "-");
1844 OUTS (outf, dregs (src1));
1845 return 1 * 2;
1846 }
1847 else if (opc == 2)
1848 {
1849 notethat ("dregs = dregs & dregs");
1850 OUTS (outf, dregs (dst));
1851 OUTS (outf, "=");
1852 OUTS (outf, dregs (src0));
1853 OUTS (outf, "&");
1854 OUTS (outf, dregs (src1));
1855 return 1 * 2;
1856 }
1857 else if (opc == 3)
1858 {
1859 notethat ("dregs = dregs | dregs");
1860 OUTS (outf, dregs (dst));
1861 OUTS (outf, "=");
1862 OUTS (outf, dregs (src0));
1863 OUTS (outf, "|");
1864 OUTS (outf, dregs (src1));
1865 return 1 * 2;
1866 }
1867 else if (opc == 4)
1868 {
1869 notethat ("dregs = dregs ^ dregs");
1870 OUTS (outf, dregs (dst));
1871 OUTS (outf, "=");
1872 OUTS (outf, dregs (src0));
1873 OUTS (outf, "^");
1874 OUTS (outf, dregs (src1));
1875 return 1 * 2;
1876 }
1877 else if (opc == 5)
1878 {
1879 notethat ("pregs = pregs + pregs");
1880 OUTS (outf, pregs (dst));
1881 OUTS (outf, "=");
1882 OUTS (outf, pregs (src0));
1883 OUTS (outf, "+");
1884 OUTS (outf, pregs (src1));
1885 return 1 * 2;
1886 }
1887 else if (opc == 6)
1888 {
1889 notethat ("pregs = pregs + (pregs << 1)");
1890 OUTS (outf, pregs (dst));
1891 OUTS (outf, "=");
1892 OUTS (outf, pregs (src0));
1893 OUTS (outf, "+(");
1894 OUTS (outf, pregs (src1));
1895 OUTS (outf, "<<1)");
1896 return 1 * 2;
1897 }
1898 else if (opc == 7)
1899 {
1900 notethat ("pregs = pregs + (pregs << 2)");
1901 OUTS (outf, pregs (dst));
1902 OUTS (outf, "=");
1903 OUTS (outf, pregs (src0));
1904 OUTS (outf, "+(");
1905 OUTS (outf, pregs (src1));
1906 OUTS (outf, "<<2)");
1907 return 1 * 2;
1908 }
1909 else if (opc == 0)
1910 {
1911 notethat ("dregs = dregs + dregs");
1912 OUTS (outf, dregs (dst));
1913 OUTS (outf, "=");
1914 OUTS (outf, dregs (src0));
1915 OUTS (outf, "+");
1916 OUTS (outf, dregs (src1));
1917 return 1 * 2;
1918 }
1919 else
1920 goto illegal_instruction;
1921illegal_instruction:
1922 return 0;
1923}
1924
1925static int
1926decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf)
1927{
1928/* COMPI2opD
1929+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1930| 0 | 1 | 1 | 0 | 0 |.op|..src......................|.dst.......|
1931+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1932*/
1933 int op = ((iw0 >> COMPI2opD_op_bits) & COMPI2opD_op_mask);
1934 int dst = ((iw0 >> COMPI2opD_dst_bits) & COMPI2opD_dst_mask);
1935 int src = ((iw0 >> COMPI2opD_src_bits) & COMPI2opD_src_mask);
1936
1937 if (op == 0)
1938 {
1939 notethat ("dregs = imm7 (x)");
1940 OUTS (outf, dregs (dst));
1941 OUTS (outf, "=");
1942 OUTS (outf, imm7 (src));
1943 OUTS (outf, "(x)");
1944 return 1 * 2;
1945 }
1946 else if (op == 1)
1947 {
1948 notethat ("dregs += imm7");
1949 OUTS (outf, dregs (dst));
1950 OUTS (outf, "+=");
1951 OUTS (outf, imm7 (src));
1952 return 1 * 2;
1953 }
1954 else
1955 goto illegal_instruction;
1956illegal_instruction:
1957 return 0;
1958}
1959
1960static int
1961decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf)
1962{
1963/* COMPI2opP
1964+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1965| 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......|
1966+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1967*/
1968 int op = ((iw0 >> COMPI2opP_op_bits) & COMPI2opP_op_mask);
1969 int src = ((iw0 >> COMPI2opP_src_bits) & COMPI2opP_src_mask);
1970 int dst = ((iw0 >> COMPI2opP_dst_bits) & COMPI2opP_dst_mask);
1971
1972 if (op == 0)
1973 {
1974 notethat ("pregs = imm7");
1975 OUTS (outf, pregs (dst));
1976 OUTS (outf, "=");
1977 OUTS (outf, imm7 (src));
1978 return 1 * 2;
1979 }
1980 else if (op == 1)
1981 {
1982 notethat ("pregs += imm7");
1983 OUTS (outf, pregs (dst));
1984 OUTS (outf, "+=");
1985 OUTS (outf, imm7 (src));
1986 return 1 * 2;
1987 }
1988 else
1989 goto illegal_instruction;
1990illegal_instruction:
1991 return 0;
1992}
1993
1994static int
1995decode_LDSTpmod_0 (TIword iw0, disassemble_info *outf)
1996{
1997/* LDSTpmod
1998+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
1999| 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......|
2000+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2001*/
2002 int W = ((iw0 >> LDSTpmod_W_bits) & LDSTpmod_W_mask);
2003 int aop = ((iw0 >> LDSTpmod_aop_bits) & LDSTpmod_aop_mask);
2004 int idx = ((iw0 >> LDSTpmod_idx_bits) & LDSTpmod_idx_mask);
2005 int ptr = ((iw0 >> LDSTpmod_ptr_bits) & LDSTpmod_ptr_mask);
2006 int reg = ((iw0 >> LDSTpmod_reg_bits) & LDSTpmod_reg_mask);
2007
2008 if (aop == 1 && W == 0 && idx == ptr)
2009 {
2010 notethat ("dregs_lo = W [ pregs ]");
2011 OUTS (outf, dregs_lo (reg));
2012 OUTS (outf, "=W[");
2013 OUTS (outf, pregs (ptr));
2014 OUTS (outf, "]");
2015 return 1 * 2;
2016 }
2017 else if (aop == 2 && W == 0 && idx == ptr)
2018 {
2019 notethat ("dregs_hi = W [ pregs ]");
2020 OUTS (outf, dregs_hi (reg));
2021 OUTS (outf, "=W[");
2022 OUTS (outf, pregs (ptr));
2023 OUTS (outf, "]");
2024 return 1 * 2;
2025 }
2026 else if (aop == 1 && W == 1 && idx == ptr)
2027 {
2028 notethat ("W [ pregs ] = dregs_lo");
2029 OUTS (outf, "W[");
2030 OUTS (outf, pregs (ptr));
2031 OUTS (outf, "]=");
2032 OUTS (outf, dregs_lo (reg));
2033 return 1 * 2;
2034 }
2035 else if (aop == 2 && W == 1 && idx == ptr)
2036 {
2037 notethat ("W [ pregs ] = dregs_hi");
2038 OUTS (outf, "W[");
2039 OUTS (outf, pregs (ptr));
2040 OUTS (outf, "]=");
2041 OUTS (outf, dregs_hi (reg));
2042 return 1 * 2;
2043 }
2044 else if (aop == 0 && W == 0)
2045 {
2046 notethat ("dregs = [ pregs ++ pregs ]");
2047 OUTS (outf, dregs (reg));
2048 OUTS (outf, "=[");
2049 OUTS (outf, pregs (ptr));
2050 OUTS (outf, "++");
2051 OUTS (outf, pregs (idx));
2052 OUTS (outf, "]");
2053 return 1 * 2;
2054 }
2055 else if (aop == 1 && W == 0)
2056 {
2057 notethat ("dregs_lo = W [ pregs ++ pregs ]");
2058 OUTS (outf, dregs_lo (reg));
2059 OUTS (outf, "=W[");
2060 OUTS (outf, pregs (ptr));
2061 OUTS (outf, "++");
2062 OUTS (outf, pregs (idx));
2063 OUTS (outf, "]");
2064 return 1 * 2;
2065 }
2066 else if (aop == 2 && W == 0)
2067 {
2068 notethat ("dregs_hi = W [ pregs ++ pregs ]");
2069 OUTS (outf, dregs_hi (reg));
2070 OUTS (outf, "=W[");
2071 OUTS (outf, pregs (ptr));
2072 OUTS (outf, "++");
2073 OUTS (outf, pregs (idx));
2074 OUTS (outf, "]");
2075 return 1 * 2;
2076 }
2077 else if (aop == 3 && W == 0)
2078 {
2079 notethat ("dregs = W [ pregs ++ pregs ] (Z)");
2080 OUTS (outf, dregs (reg));
2081 OUTS (outf, "=W[");
2082 OUTS (outf, pregs (ptr));
2083 OUTS (outf, "++");
2084 OUTS (outf, pregs (idx));
2085 OUTS (outf, "] (Z)");
2086 return 1 * 2;
2087 }
2088 else if (aop == 3 && W == 1)
2089 {
2090 notethat ("dregs = W [ pregs ++ pregs ] (X)");
2091 OUTS (outf, dregs (reg));
2092 OUTS (outf, "=W[");
2093 OUTS (outf, pregs (ptr));
2094 OUTS (outf, "++");
2095 OUTS (outf, pregs (idx));
2096 OUTS (outf, "](X)");
2097 return 1 * 2;
2098 }
2099 else if (aop == 0 && W == 1)
2100 {
2101 notethat ("[ pregs ++ pregs ] = dregs");
2102 OUTS (outf, "[");
2103 OUTS (outf, pregs (ptr));
2104 OUTS (outf, "++");
2105 OUTS (outf, pregs (idx));
2106 OUTS (outf, "]=");
2107 OUTS (outf, dregs (reg));
2108 return 1 * 2;
2109 }
2110 else if (aop == 1 && W == 1)
2111 {
2112 notethat (" W [ pregs ++ pregs ] = dregs_lo");
2113 OUTS (outf, "W[");
2114 OUTS (outf, pregs (ptr));
2115 OUTS (outf, "++");
2116 OUTS (outf, pregs (idx));
2117 OUTS (outf, "]=");
2118 OUTS (outf, dregs_lo (reg));
2119 return 1 * 2;
2120 }
2121 else if (aop == 2 && W == 1)
2122 {
2123 notethat (" W[ pregs ++ pregs ] = dregs_hi");
2124 OUTS (outf, "W[");
2125 OUTS (outf, pregs (ptr));
2126 OUTS (outf, "++");
2127 OUTS (outf, pregs (idx));
2128 OUTS (outf, "]=");
2129 OUTS (outf, dregs_hi (reg));
2130 return 1 * 2;
2131 }
2132 else
2133 goto illegal_instruction;
2134illegal_instruction:
2135 return 0;
2136}
2137
2138static int
2139decode_dagMODim_0 (TIword iw0, disassemble_info *outf)
2140{
2141/* dagMODim
2142+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2143| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....|
2144+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2145*/
2146 int i = ((iw0 >> DagMODim_i_bits) & DagMODim_i_mask);
2147 int m = ((iw0 >> DagMODim_m_bits) & DagMODim_m_mask);
2148 int br = ((iw0 >> DagMODim_br_bits) & DagMODim_br_mask);
2149 int op = ((iw0 >> DagMODim_op_bits) & DagMODim_op_mask);
2150
2151 if (op == 0 && br == 1)
2152 {
2153 notethat ("iregs += mregs ( BREV )");
2154 OUTS (outf, iregs (i));
2155 OUTS (outf, "+=");
2156 OUTS (outf, mregs (m));
2157 OUTS (outf, "(BREV)");
2158 return 1 * 2;
2159 }
2160 else if (op == 0)
2161 {
2162 notethat ("iregs += mregs");
2163 OUTS (outf, iregs (i));
2164 OUTS (outf, "+=");
2165 OUTS (outf, mregs (m));
2166 return 1 * 2;
2167 }
2168 else if (op == 1)
2169 {
2170 notethat ("iregs -= mregs");
2171 OUTS (outf, iregs (i));
2172 OUTS (outf, "-=");
2173 OUTS (outf, mregs (m));
2174 return 1 * 2;
2175 }
2176 else
2177 goto illegal_instruction;
2178illegal_instruction:
2179 return 0;
2180}
2181
2182static int
2183decode_dagMODik_0 (TIword iw0, disassemble_info *outf)
2184{
2185/* dagMODik
2186+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2187| 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....|
2188+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2189*/
2190 int i = ((iw0 >> DagMODik_i_bits) & DagMODik_i_mask);
2191 int op = ((iw0 >> DagMODik_op_bits) & DagMODik_op_mask);
2192
2193 if (op == 0)
2194 {
2195 notethat ("iregs += 2");
2196 OUTS (outf, iregs (i));
2197 OUTS (outf, "+=2");
2198 return 1 * 2;
2199 }
2200 else if (op == 1)
2201 {
2202 notethat ("iregs -= 2");
2203 OUTS (outf, iregs (i));
2204 OUTS (outf, "-=2");
2205 return 1 * 2;
2206 }
2207 else if (op == 2)
2208 {
2209 notethat ("iregs += 4");
2210 OUTS (outf, iregs (i));
2211 OUTS (outf, "+=4");
2212 return 1 * 2;
2213 }
2214 else if (op == 3)
2215 {
2216 notethat ("iregs -= 4");
2217 OUTS (outf, iregs (i));
2218 OUTS (outf, "-=4");
2219 return 1 * 2;
2220 }
2221 else
2222 goto illegal_instruction;
2223illegal_instruction:
2224 return 0;
2225}
2226
2227static int
2228decode_dspLDST_0 (TIword iw0, disassemble_info *outf)
2229{
2230/* dspLDST
2231+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2232| 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......|
2233+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2234*/
2235 int i = ((iw0 >> DspLDST_i_bits) & DspLDST_i_mask);
2236 int m = ((iw0 >> DspLDST_m_bits) & DspLDST_m_mask);
2237 int W = ((iw0 >> DspLDST_W_bits) & DspLDST_W_mask);
2238 int aop = ((iw0 >> DspLDST_aop_bits) & DspLDST_aop_mask);
2239 int reg = ((iw0 >> DspLDST_reg_bits) & DspLDST_reg_mask);
2240
2241 if (aop == 0 && W == 0 && m == 0)
2242 {
2243 notethat ("dregs = [ iregs ++ ]");
2244 OUTS (outf, dregs (reg));
2245 OUTS (outf, "=[");
2246 OUTS (outf, iregs (i));
2247 OUTS (outf, "++]");
2248 return 1 * 2;
2249 }
2250 else if (aop == 0 && W == 0 && m == 1)
2251 {
2252 notethat ("dregs_lo = W [ iregs ++ ]");
2253 OUTS (outf, dregs_lo (reg));
2254 OUTS (outf, "=W[");
2255 OUTS (outf, iregs (i));
2256 OUTS (outf, "++]");
2257 return 1 * 2;
2258 }
2259 else if (aop == 0 && W == 0 && m == 2)
2260 {
2261 notethat ("dregs_hi = W [ iregs ++ ]");
2262 OUTS (outf, dregs_hi (reg));
2263 OUTS (outf, "=W[");
2264 OUTS (outf, iregs (i));
2265 OUTS (outf, "++]");
2266 return 1 * 2;
2267 }
2268 else if (aop == 1 && W == 0 && m == 0)
2269 {
2270 notethat ("dregs = [ iregs -- ]");
2271 OUTS (outf, dregs (reg));
2272 OUTS (outf, "=[");
2273 OUTS (outf, iregs (i));
2274 OUTS (outf, "--]");
2275 return 1 * 2;
2276 }
2277 else if (aop == 1 && W == 0 && m == 1)
2278 {
2279 notethat ("dregs_lo = W [ iregs -- ]");
2280 OUTS (outf, dregs_lo (reg));
2281 OUTS (outf, "=W[");
2282 OUTS (outf, iregs (i));
2283 OUTS (outf, "--]");
2284 return 1 * 2;
2285 }
2286 else if (aop == 1 && W == 0 && m == 2)
2287 {
2288 notethat ("dregs_hi = W [ iregs -- ]");
2289 OUTS (outf, dregs_hi (reg));
2290 OUTS (outf, "=W[");
2291 OUTS (outf, iregs (i));
2292 OUTS (outf, "--]");
2293 return 1 * 2;
2294 }
2295 else if (aop == 2 && W == 0 && m == 0)
2296 {
2297 notethat ("dregs = [ iregs ]");
2298 OUTS (outf, dregs (reg));
2299 OUTS (outf, "=[");
2300 OUTS (outf, iregs (i));
2301 OUTS (outf, "]");
2302 return 1 * 2;
2303 }
2304 else if (aop == 2 && W == 0 && m == 1)
2305 {
2306 notethat ("dregs_lo = W [ iregs ]");
2307 OUTS (outf, dregs_lo (reg));
2308 OUTS (outf, "=W[");
2309 OUTS (outf, iregs (i));
2310 OUTS (outf, "]");
2311 return 1 * 2;
2312 }
2313 else if (aop == 2 && W == 0 && m == 2)
2314 {
2315 notethat ("dregs_hi = W [ iregs ]");
2316 OUTS (outf, dregs_hi (reg));
2317 OUTS (outf, "=W[");
2318 OUTS (outf, iregs (i));
2319 OUTS (outf, "]");
2320 return 1 * 2;
2321 }
2322 else if (aop == 0 && W == 1 && m == 0)
2323 {
2324 notethat ("[ iregs ++ ] = dregs");
2325 OUTS (outf, "[");
2326 OUTS (outf, iregs (i));
2327 OUTS (outf, "++]=");
2328 OUTS (outf, dregs (reg));
2329 return 1 * 2;
2330 }
2331 else if (aop == 0 && W == 1 && m == 1)
2332 {
2333 notethat ("W [ iregs ++ ] = dregs_lo");
2334 OUTS (outf, "W[");
2335 OUTS (outf, iregs (i));
2336 OUTS (outf, "++]=");
2337 OUTS (outf, dregs_lo (reg));
2338 return 1 * 2;
2339 }
2340 else if (aop == 0 && W == 1 && m == 2)
2341 {
2342 notethat ("W [ iregs ++ ] = dregs_hi");
2343 OUTS (outf, "W[");
2344 OUTS (outf, iregs (i));
2345 OUTS (outf, "++]=");
2346 OUTS (outf, dregs_hi (reg));
2347 return 1 * 2;
2348 }
2349 else if (aop == 1 && W == 1 && m == 0)
2350 {
2351 notethat ("[ iregs -- ] = dregs");
2352 OUTS (outf, "[");
2353 OUTS (outf, iregs (i));
2354 OUTS (outf, "--]=");
2355 OUTS (outf, dregs (reg));
2356 return 1 * 2;
2357 }
2358 else if (aop == 1 && W == 1 && m == 1)
2359 {
2360 notethat ("W [ iregs -- ] = dregs_lo");
2361 OUTS (outf, "W[");
2362 OUTS (outf, iregs (i));
2363 OUTS (outf, "--]=");
2364 OUTS (outf, dregs_lo (reg));
2365 return 1 * 2;
2366 }
2367 else if (aop == 1 && W == 1 && m == 2)
2368 {
2369 notethat ("W [ iregs -- ] = dregs_hi");
2370 OUTS (outf, "W[");
2371 OUTS (outf, iregs (i));
2372 OUTS (outf, "--]=");
2373 OUTS (outf, dregs_hi (reg));
2374 return 1 * 2;
2375 }
2376 else if (aop == 2 && W == 1 && m == 0)
2377 {
2378 notethat ("[ iregs ] = dregs");
2379 OUTS (outf, "[");
2380 OUTS (outf, iregs (i));
2381 OUTS (outf, "]=");
2382 OUTS (outf, dregs (reg));
2383 return 1 * 2;
2384 }
2385 else if (aop == 2 && W == 1 && m == 1)
2386 {
2387 notethat (" W [ iregs ] = dregs_lo");
2388 OUTS (outf, "W[");
2389 OUTS (outf, iregs (i));
2390 OUTS (outf, "]=");
2391 OUTS (outf, dregs_lo (reg));
2392 return 1 * 2;
2393 }
2394 else if (aop == 2 && W == 1 && m == 2)
2395 {
2396 notethat (" W [ iregs ] = dregs_hi");
2397 OUTS (outf, "W[");
2398 OUTS (outf, iregs (i));
2399 OUTS (outf, "]=");
2400 OUTS (outf, dregs_hi (reg));
2401 return 1 * 2;
2402 }
2403 else if (aop == 3 && W == 0)
2404 {
2405 notethat ("dregs = [ iregs ++ mregs ]");
2406 OUTS (outf, dregs (reg));
2407 OUTS (outf, "=[");
2408 OUTS (outf, iregs (i));
2409 OUTS (outf, "++");
2410 OUTS (outf, mregs (m));
2411 OUTS (outf, "]");
2412 return 1 * 2;
2413 }
2414 else if (aop == 3 && W == 1)
2415 {
2416 notethat ("[ iregs ++ mregs ] = dregs");
2417 OUTS (outf, "[");
2418 OUTS (outf, iregs (i));
2419 OUTS (outf, "++");
2420 OUTS (outf, mregs (m));
2421 OUTS (outf, "]=");
2422 OUTS (outf, dregs (reg));
2423 return 1 * 2;
2424 }
2425 else
2426 goto illegal_instruction;
2427illegal_instruction:
2428 return 0;
2429}
2430
2431static int
2432decode_LDST_0 (TIword iw0, disassemble_info *outf)
2433{
2434/* LDST
2435+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2436| 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......|
2437+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2438*/
2439 int Z = ((iw0 >> LDST_Z_bits) & LDST_Z_mask);
2440 int W = ((iw0 >> LDST_W_bits) & LDST_W_mask);
2441 int sz = ((iw0 >> LDST_sz_bits) & LDST_sz_mask);
2442 int aop = ((iw0 >> LDST_aop_bits) & LDST_aop_mask);
2443 int reg = ((iw0 >> LDST_reg_bits) & LDST_reg_mask);
2444 int ptr = ((iw0 >> LDST_ptr_bits) & LDST_ptr_mask);
2445
2446 if (aop == 0 && sz == 0 && Z == 0 && W == 0)
2447 {
2448 notethat ("dregs = [ pregs ++ ]");
2449 OUTS (outf, dregs (reg));
2450 OUTS (outf, "=[");
2451 OUTS (outf, pregs (ptr));
2452 OUTS (outf, "++]");
2453 return 1 * 2;
2454 }
2455 else if (aop == 0 && sz == 0 && Z == 1 && W == 0)
2456 {
2457 notethat ("pregs = [ pregs ++ ]");
2458 OUTS (outf, pregs (reg));
2459 OUTS (outf, "=[");
2460 OUTS (outf, pregs (ptr));
2461 OUTS (outf, "++]");
2462 return 1 * 2;
2463 }
2464 else if (aop == 0 && sz == 1 && Z == 0 && W == 0)
2465 {
2466 notethat ("dregs = W [ pregs ++ ] (z)");
2467 OUTS (outf, dregs (reg));
2468 OUTS (outf, "=W[");
2469 OUTS (outf, pregs (ptr));
2470 OUTS (outf, "++] (Z)");
2471 return 1 * 2;
2472 }
2473 else if (aop == 0 && sz == 1 && Z == 1 && W == 0)
2474 {
2475 notethat ("dregs = W [ pregs ++ ] (X)");
2476 OUTS (outf, dregs (reg));
2477 OUTS (outf, "=W[");
2478 OUTS (outf, pregs (ptr));
2479 OUTS (outf, "++](X)");
2480 return 1 * 2;
2481 }
2482 else if (aop == 0 && sz == 2 && Z == 0 && W == 0)
2483 {
2484 notethat ("dregs = B [ pregs ++ ] (Z)");
2485 OUTS (outf, dregs (reg));
2486 OUTS (outf, "=B[");
2487 OUTS (outf, pregs (ptr));
2488 OUTS (outf, "++] (Z)");
2489 return 1 * 2;
2490 }
2491 else if (aop == 0 && sz == 2 && Z == 1 && W == 0)
2492 {
2493 notethat ("dregs = B [ pregs ++ ] (X)");
2494 OUTS (outf, dregs (reg));
2495 OUTS (outf, "=B[");
2496 OUTS (outf, pregs (ptr));
2497 OUTS (outf, "++](X)");
2498 return 1 * 2;
2499 }
2500 else if (aop == 1 && sz == 0 && Z == 0 && W == 0)
2501 {
2502 notethat ("dregs = [ pregs -- ]");
2503 OUTS (outf, dregs (reg));
2504 OUTS (outf, "=[");
2505 OUTS (outf, pregs (ptr));
2506 OUTS (outf, "--]");
2507 return 1 * 2;
2508 }
2509 else if (aop == 1 && sz == 0 && Z == 1 && W == 0)
2510 {
2511 notethat ("pregs = [ pregs -- ]");
2512 OUTS (outf, pregs (reg));
2513 OUTS (outf, "=[");
2514 OUTS (outf, pregs (ptr));
2515 OUTS (outf, "--]");
2516 return 1 * 2;
2517 }
2518 else if (aop == 1 && sz == 1 && Z == 0 && W == 0)
2519 {
2520 notethat ("dregs = W [ pregs -- ] (Z)");
2521 OUTS (outf, dregs (reg));
2522 OUTS (outf, "=W[");
2523 OUTS (outf, pregs (ptr));
2524 OUTS (outf, "--] (Z)");
2525 return 1 * 2;
2526 }
2527 else if (aop == 1 && sz == 1 && Z == 1 && W == 0)
2528 {
2529 notethat ("dregs = W [ pregs -- ] (X)");
2530 OUTS (outf, dregs (reg));
2531 OUTS (outf, "=W[");
2532 OUTS (outf, pregs (ptr));
2533 OUTS (outf, "--](X)");
2534 return 1 * 2;
2535 }
2536 else if (aop == 1 && sz == 2 && Z == 0 && W == 0)
2537 {
2538 notethat ("dregs = B [ pregs -- ] (Z)");
2539 OUTS (outf, dregs (reg));
2540 OUTS (outf, "=B[");
2541 OUTS (outf, pregs (ptr));
2542 OUTS (outf, "--] (Z)");
2543 return 1 * 2;
2544 }
2545 else if (aop == 1 && sz == 2 && Z == 1 && W == 0)
2546 {
2547 notethat ("dregs = B [ pregs -- ] (X)");
2548 OUTS (outf, dregs (reg));
2549 OUTS (outf, "=B[");
2550 OUTS (outf, pregs (ptr));
2551 OUTS (outf, "--](X)");
2552 return 1 * 2;
2553 }
2554 else if (aop == 2 && sz == 0 && Z == 0 && W == 0)
2555 {
2556 notethat ("dregs = [ pregs ]");
2557 OUTS (outf, dregs (reg));
2558 OUTS (outf, "=[");
2559 OUTS (outf, pregs (ptr));
2560 OUTS (outf, "]");
2561 return 1 * 2;
2562 }
2563 else if (aop == 2 && sz == 0 && Z == 1 && W == 0)
2564 {
2565 notethat ("pregs = [ pregs ]");
2566 OUTS (outf, pregs (reg));
2567 OUTS (outf, "=[");
2568 OUTS (outf, pregs (ptr));
2569 OUTS (outf, "]");
2570 return 1 * 2;
2571 }
2572 else if (aop == 2 && sz == 1 && Z == 0 && W == 0)
2573 {
2574 notethat ("dregs = W [ pregs ] (Z)");
2575 OUTS (outf, dregs (reg));
2576 OUTS (outf, "=W[");
2577 OUTS (outf, pregs (ptr));
2578 OUTS (outf, "] (Z)");
2579 return 1 * 2;
2580 }
2581 else if (aop == 2 && sz == 1 && Z == 1 && W == 0)
2582 {
2583 notethat ("dregs = W [ pregs ] (X)");
2584 OUTS (outf, dregs (reg));
2585 OUTS (outf, "=W[");
2586 OUTS (outf, pregs (ptr));
2587 OUTS (outf, "](X)");
2588 return 1 * 2;
2589 }
2590 else if (aop == 2 && sz == 2 && Z == 0 && W == 0)
2591 {
2592 notethat ("dregs = B [ pregs ] (Z)");
2593 OUTS (outf, dregs (reg));
2594 OUTS (outf, "=B[");
2595 OUTS (outf, pregs (ptr));
2596 OUTS (outf, "] (Z)");
2597 return 1 * 2;
2598 }
2599 else if (aop == 2 && sz == 2 && Z == 1 && W == 0)
2600 {
2601 notethat ("dregs = B [ pregs ] (X)");
2602 OUTS (outf, dregs (reg));
2603 OUTS (outf, "=B[");
2604 OUTS (outf, pregs (ptr));
2605 OUTS (outf, "](X)");
2606 return 1 * 2;
2607 }
2608 else if (aop == 0 && sz == 0 && Z == 0 && W == 1)
2609 {
2610 notethat ("[ pregs ++ ] = dregs");
2611 OUTS (outf, "[");
2612 OUTS (outf, pregs (ptr));
2613 OUTS (outf, "++]=");
2614 OUTS (outf, dregs (reg));
2615 return 1 * 2;
2616 }
2617 else if (aop == 0 && sz == 0 && Z == 1 && W == 1)
2618 {
2619 notethat ("[ pregs ++ ] = pregs");
2620 OUTS (outf, "[");
2621 OUTS (outf, pregs (ptr));
2622 OUTS (outf, "++]=");
2623 OUTS (outf, pregs (reg));
2624 return 1 * 2;
2625 }
2626 else if (aop == 0 && sz == 1 && Z == 0 && W == 1)
2627 {
2628 notethat ("W [ pregs ++ ] = dregs");
2629 OUTS (outf, "W[");
2630 OUTS (outf, pregs (ptr));
2631 OUTS (outf, "++]=");
2632 OUTS (outf, dregs (reg));
2633 return 1 * 2;
2634 }
2635 else if (aop == 0 && sz == 2 && Z == 0 && W == 1)
2636 {
2637 notethat ("B [ pregs ++ ] = dregs");
2638 OUTS (outf, "B[");
2639 OUTS (outf, pregs (ptr));
2640 OUTS (outf, "++]=");
2641 OUTS (outf, dregs (reg));
2642 return 1 * 2;
2643 }
2644 else if (aop == 1 && sz == 0 && Z == 0 && W == 1)
2645 {
2646 notethat ("[ pregs -- ] = dregs");
2647 OUTS (outf, "[");
2648 OUTS (outf, pregs (ptr));
2649 OUTS (outf, "--]=");
2650 OUTS (outf, dregs (reg));
2651 return 1 * 2;
2652 }
2653 else if (aop == 1 && sz == 0 && Z == 1 && W == 1)
2654 {
2655 notethat ("[ pregs -- ] = pregs");
2656 OUTS (outf, "[");
2657 OUTS (outf, pregs (ptr));
2658 OUTS (outf, "--]=");
2659 OUTS (outf, pregs (reg));
2660 return 1 * 2;
2661 }
2662 else if (aop == 1 && sz == 1 && Z == 0 && W == 1)
2663 {
2664 notethat ("W [ pregs -- ] = dregs");
2665 OUTS (outf, "W[");
2666 OUTS (outf, pregs (ptr));
2667 OUTS (outf, "--]=");
2668 OUTS (outf, dregs (reg));
2669 return 1 * 2;
2670 }
2671 else if (aop == 1 && sz == 2 && Z == 0 && W == 1)
2672 {
2673 notethat ("B [ pregs -- ] = dregs");
2674 OUTS (outf, "B[");
2675 OUTS (outf, pregs (ptr));
2676 OUTS (outf, "--]=");
2677 OUTS (outf, dregs (reg));
2678 return 1 * 2;
2679 }
2680 else if (aop == 2 && sz == 0 && Z == 0 && W == 1)
2681 {
2682 notethat ("[ pregs ] = dregs");
2683 OUTS (outf, "[");
2684 OUTS (outf, pregs (ptr));
2685 OUTS (outf, "]=");
2686 OUTS (outf, dregs (reg));
2687 return 1 * 2;
2688 }
2689 else if (aop == 2 && sz == 0 && Z == 1 && W == 1)
2690 {
2691 notethat ("[ pregs ] = pregs");
2692 OUTS (outf, "[");
2693 OUTS (outf, pregs (ptr));
2694 OUTS (outf, "]=");
2695 OUTS (outf, pregs (reg));
2696 return 1 * 2;
2697 }
2698 else if (aop == 2 && sz == 1 && Z == 0 && W == 1)
2699 {
2700 notethat ("W [ pregs ] = dregs");
2701 OUTS (outf, "W[");
2702 OUTS (outf, pregs (ptr));
2703 OUTS (outf, "]=");
2704 OUTS (outf, dregs (reg));
2705 return 1 * 2;
2706 }
2707 else if (aop == 2 && sz == 2 && Z == 0 && W == 1)
2708 {
2709 notethat ("B [ pregs ] = dregs");
2710 OUTS (outf, "B[");
2711 OUTS (outf, pregs (ptr));
2712 OUTS (outf, "]=");
2713 OUTS (outf, dregs (reg));
2714 return 1 * 2;
2715 }
2716 else
2717 goto illegal_instruction;
2718illegal_instruction:
2719 return 0;
2720}
2721
2722static int
2723decode_LDSTiiFP_0 (TIword iw0, disassemble_info *outf)
2724{
2725/* LDSTiiFP
2726+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2727| 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........|
2728+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2729*/
2730 int reg = ((iw0 >> LDSTiiFP_reg_bits) & LDSTiiFP_reg_mask);
2731 int offset = ((iw0 >> LDSTiiFP_offset_bits) & LDSTiiFP_offset_mask);
2732 int W = ((iw0 >> LDSTiiFP_W_bits) & LDSTiiFP_W_mask);
2733
2734 if (W == 0)
2735 {
2736 notethat ("dpregs = [ FP - negimm5s4 ]");
2737 OUTS (outf, dpregs (reg));
2738 OUTS (outf, "=[FP");
2739 OUTS (outf, negimm5s4 (offset));
2740 OUTS (outf, "]");
2741 return 1 * 2;
2742 }
2743 else if (W == 1)
2744 {
2745 notethat ("[ FP - negimm5s4 ] = dpregs");
2746 OUTS (outf, "[FP");
2747 OUTS (outf, negimm5s4 (offset));
2748 OUTS (outf, "]=");
2749 OUTS (outf, dpregs (reg));
2750 return 1 * 2;
2751 }
2752 else
2753 goto illegal_instruction;
2754illegal_instruction:
2755 return 0;
2756}
2757
2758static int
2759decode_LDSTii_0 (TIword iw0, disassemble_info *outf)
2760{
2761/* LDSTii
2762+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2763| 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......|
2764+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2765*/
2766 int reg = ((iw0 >> LDSTii_reg_bit) & LDSTii_reg_mask);
2767 int ptr = ((iw0 >> LDSTii_ptr_bit) & LDSTii_ptr_mask);
2768 int offset = ((iw0 >> LDSTii_offset_bit) & LDSTii_offset_mask);
2769 int op = ((iw0 >> LDSTii_op_bit) & LDSTii_op_mask);
2770 int W = ((iw0 >> LDSTii_W_bit) & LDSTii_W_mask);
2771
2772 if (W == 0 && op == 0)
2773 {
2774 notethat ("dregs = [ pregs + uimm4s4 ]");
2775 OUTS (outf, dregs (reg));
2776 OUTS (outf, "=[");
2777 OUTS (outf, pregs (ptr));
2778 OUTS (outf, "+");
2779 OUTS (outf, uimm4s4 (offset));
2780 OUTS (outf, "]");
2781 return 1 * 2;
2782 }
2783 else if (W == 0 && op == 1)
2784 {
2785 notethat ("dregs = W [ pregs + uimm4s2 ] (Z)");
2786 OUTS (outf, dregs (reg));
2787 OUTS (outf, "=W[");
2788 OUTS (outf, pregs (ptr));
2789 OUTS (outf, "+");
2790 OUTS (outf, uimm4s2 (offset));
2791 OUTS (outf, "] (Z)");
2792 return 1 * 2;
2793 }
2794 else if (W == 0 && op == 2)
2795 {
2796 notethat ("dregs = W [ pregs + uimm4s2 ] (X)");
2797 OUTS (outf, dregs (reg));
2798 OUTS (outf, "=W[");
2799 OUTS (outf, pregs (ptr));
2800 OUTS (outf, "+");
2801 OUTS (outf, uimm4s2 (offset));
2802 OUTS (outf, "](X)");
2803 return 1 * 2;
2804 }
2805 else if (W == 0 && op == 3)
2806 {
2807 notethat ("pregs = [ pregs + uimm4s4 ]");
2808 OUTS (outf, pregs (reg));
2809 OUTS (outf, "=[");
2810 OUTS (outf, pregs (ptr));
2811 OUTS (outf, "+");
2812 OUTS (outf, uimm4s4 (offset));
2813 OUTS (outf, "]");
2814 return 1 * 2;
2815 }
2816 else if (W == 1 && op == 0)
2817 {
2818 notethat ("[ pregs + uimm4s4 ] = dregs");
2819 OUTS (outf, "[");
2820 OUTS (outf, pregs (ptr));
2821 OUTS (outf, "+");
2822 OUTS (outf, uimm4s4 (offset));
2823 OUTS (outf, "]=");
2824 OUTS (outf, dregs (reg));
2825 return 1 * 2;
2826 }
2827 else if (W == 1 && op == 1)
2828 {
2829 notethat ("W [ pregs + uimm4s2 ] = dregs");
2830 OUTS (outf, "W");
2831 OUTS (outf, "[");
2832 OUTS (outf, pregs (ptr));
2833 OUTS (outf, "+");
2834 OUTS (outf, uimm4s2 (offset));
2835 OUTS (outf, "]");
2836 OUTS (outf, "=");
2837 OUTS (outf, dregs (reg));
2838 return 1 * 2;
2839 }
2840 else if (W == 1 && op == 3)
2841 {
2842 notethat ("[ pregs + uimm4s4 ] = pregs");
2843 OUTS (outf, "[");
2844 OUTS (outf, pregs (ptr));
2845 OUTS (outf, "+");
2846 OUTS (outf, uimm4s4 (offset));
2847 OUTS (outf, "]=");
2848 OUTS (outf, pregs (reg));
2849 return 1 * 2;
2850 }
2851 else
2852 goto illegal_instruction;
2853illegal_instruction:
2854 return 0;
2855}
2856
2857static int
2858decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf)
2859{
2860/* LoopSetup
2861+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2862| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......|
2863|.reg...........| - | - |.eoffset...............................|
2864+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2865*/
2866 int c = ((iw0 >> (LoopSetup_c_bits - 16)) & LoopSetup_c_mask);
2867 int reg = ((iw1 >> LoopSetup_reg_bits) & LoopSetup_reg_mask);
2868 int rop = ((iw0 >> (LoopSetup_rop_bits - 16)) & LoopSetup_rop_mask);
2869 int soffset = ((iw0 >> (LoopSetup_soffset_bits - 16)) & LoopSetup_soffset_mask);
2870 int eoffset = ((iw1 >> LoopSetup_eoffset_bits) & LoopSetup_eoffset_mask);
2871
2872 if (rop == 0)
2873 {
2874 notethat ("LSETUP ( pcrel4 , lppcrel10 ) counters");
2875 OUTS (outf, "LSETUP");
2876 OUTS (outf, "(");
2877 OUTS (outf, pcrel4 (soffset));
2878 OUTS (outf, ",");
2879 OUTS (outf, lppcrel10 (eoffset));
2880 OUTS (outf, ")");
2881 OUTS (outf, counters (c));
2882 return 2 * 2;
2883 }
2884 else if (rop == 1)
2885 {
2886 notethat ("LSETUP ( pcrel4 , lppcrel10 ) counters = pregs");
2887 OUTS (outf, "LSETUP");
2888 OUTS (outf, "(");
2889 OUTS (outf, pcrel4 (soffset));
2890 OUTS (outf, ",");
2891 OUTS (outf, lppcrel10 (eoffset));
2892 OUTS (outf, ")");
2893 OUTS (outf, counters (c));
2894 OUTS (outf, "=");
2895 OUTS (outf, pregs (reg));
2896 return 2 * 2;
2897 }
2898 else if (rop == 3)
2899 {
2900 notethat ("LSETUP ( pcrel4 , lppcrel10 ) counters = pregs >> 1");
2901 OUTS (outf, "LSETUP");
2902 OUTS (outf, "(");
2903 OUTS (outf, pcrel4 (soffset));
2904 OUTS (outf, ",");
2905 OUTS (outf, lppcrel10 (eoffset));
2906 OUTS (outf, ")");
2907 OUTS (outf, counters (c));
2908 OUTS (outf, "=");
2909 OUTS (outf, pregs (reg));
2910 OUTS (outf, ">>1");
2911 return 2 * 2;
2912 }
2913 else
2914 goto illegal_instruction;
2915illegal_instruction:
2916 return 0;
2917}
2918
2919static int
2920decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf)
2921{
2922/* LDIMMhalf
2923+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2924| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......|
2925|.hword.........................................................|
2926+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
2927*/
2928 int H = ((iw0 >> (LDIMMhalf_H_bits - 16)) & LDIMMhalf_H_mask);
2929 int Z = ((iw0 >> (LDIMMhalf_Z_bits - 16)) & LDIMMhalf_Z_mask);
2930 int S = ((iw0 >> (LDIMMhalf_S_bits - 16)) & LDIMMhalf_S_mask);
2931 int reg = ((iw0 >> (LDIMMhalf_reg_bits - 16)) & LDIMMhalf_reg_mask);
2932 int grp = ((iw0 >> (LDIMMhalf_grp_bits - 16)) & LDIMMhalf_grp_mask);
2933 int hword = ((iw1 >> LDIMMhalf_hword_bits) & LDIMMhalf_hword_mask);
2934
2935 if (grp == 0 && H == 0 && S == 0 && Z == 0)
2936 {
2937 notethat ("dregs_lo = imm16");
2938 OUTS (outf, dregs_lo (reg));
2939 OUTS (outf, "=");
2940 OUTS (outf, imm16 (hword));
2941 return 2 * 2;
2942 }
2943 else if (grp == 0 && H == 1 && S == 0 && Z == 0)
2944 {
2945 notethat ("dregs_hi = imm16");
2946 OUTS (outf, dregs_hi (reg));
2947 OUTS (outf, "=");
2948 OUTS (outf, imm16 (hword));
2949 return 2 * 2;
2950 }
2951 else if (grp == 0 && H == 0 && S == 1 && Z == 0)
2952 {
2953 notethat ("dregs = imm16 (x)");
2954 OUTS (outf, dregs (reg));
2955 OUTS (outf, "=");
2956 OUTS (outf, imm16 (hword));
2957 OUTS (outf, " (X)");
2958 return 2 * 2;
2959 }
2960 else if (H == 0 && S == 1 && Z == 0)
2961 {
2962 notethat ("regs = imm16 (x)");
2963 OUTS (outf, regs (reg, grp));
2964 OUTS (outf, "=");
2965 OUTS (outf, imm16 (hword));
2966 OUTS (outf, " (X)");
2967 return 2 * 2;
2968 }
2969 else if (H == 0 && S == 0 && Z == 1)
2970 {
2971 notethat ("regs = luimm16 (Z)");
2972 OUTS (outf, regs (reg, grp));
2973 OUTS (outf, "=");
2974 OUTS (outf, luimm16 (hword));
2975 OUTS (outf, "(Z)");
2976 return 2 * 2;
2977 }
2978 else if (H == 0 && S == 0 && Z == 0)
2979 {
2980 notethat ("regs_lo = luimm16");
2981 OUTS (outf, regs_lo (reg, grp));
2982 OUTS (outf, "=");
2983 OUTS (outf, luimm16 (hword));
2984 return 2 * 2;
2985 }
2986 else if (H == 1 && S == 0 && Z == 0)
2987 {
2988 notethat ("regs_hi = huimm16");
2989 OUTS (outf, regs_hi (reg, grp));
2990 OUTS (outf, "=");
2991 OUTS (outf, huimm16 (hword));
2992 return 2 * 2;
2993 }
2994 else
2995 goto illegal_instruction;
2996illegal_instruction:
2997 return 0;
2998}
2999
3000static int
3001decode_CALLa_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf)
3002{
3003/* CALLa
3004+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3005| 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................|
3006|.lsw...........................................................|
3007+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3008*/
3009 int S = ((iw0 >> (CALLa_S_bits - 16)) & CALLa_S_mask);
3010 int lsw = ((iw1 >> 0) & 0xffff);
3011 int msw = ((iw0 >> 0) & 0xff);
3012
3013 if (S == 1)
3014 {
3015 notethat ("CALL pcrel24");
3016 OUTS (outf, "CALL ");
3017 OUTS (outf, pcrel24 (((msw) << 16) | (lsw)));
3018 return 2 * 2;
3019 }
3020 else if (S == 0)
3021 {
3022 notethat ("JUMP.L pcrel24");
3023 OUTS (outf, "JUMP.L ");
3024 OUTS (outf, pcrel24 (((msw) << 16) | (lsw)));
3025 return 2 * 2;
3026 }
3027 else
3028 goto illegal_instruction;
3029illegal_instruction:
3030 return 0;
3031}
3032
3033static int
3034decode_LDSTidxI_0 (TIword iw0, TIword iw1, disassemble_info *outf)
3035{
3036/* LDSTidxI
3037+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3038| 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......|
3039|.offset........................................................|
3040+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3041*/
3042 int Z = ((iw0 >> (LDSTidxI_Z_bits - 16)) & LDSTidxI_Z_mask);
3043 int W = ((iw0 >> (LDSTidxI_W_bits - 16)) & LDSTidxI_W_mask);
3044 int sz = ((iw0 >> (LDSTidxI_sz_bits - 16)) & LDSTidxI_sz_mask);
3045 int reg = ((iw0 >> (LDSTidxI_reg_bits - 16)) & LDSTidxI_reg_mask);
3046 int ptr = ((iw0 >> (LDSTidxI_ptr_bits - 16)) & LDSTidxI_ptr_mask);
3047 int offset = ((iw1 >> LDSTidxI_offset_bits) & LDSTidxI_offset_mask);
3048
3049 if (W == 0 && sz == 0 && Z == 0)
3050 {
3051 notethat ("dregs = [ pregs + imm16s4 ]");
3052 OUTS (outf, dregs (reg));
3053 OUTS (outf, "=[");
3054 OUTS (outf, pregs (ptr));
3055 OUTS (outf, "+");
3056 OUTS (outf, imm16s4 (offset));
3057 OUTS (outf, "]");
3058 return 2 * 2;
3059 }
3060 else if (W == 0 && sz == 0 && Z == 1)
3061 {
3062 notethat ("pregs = [ pregs + imm16s4 ]");
3063 OUTS (outf, pregs (reg));
3064 OUTS (outf, "=[");
3065 OUTS (outf, pregs (ptr));
3066 OUTS (outf, "+");
3067 OUTS (outf, imm16s4 (offset));
3068 OUTS (outf, "]");
3069 return 2 * 2;
3070 }
3071 else if (W == 0 && sz == 1 && Z == 0)
3072 {
3073 notethat ("dregs = W [ pregs + imm16s2 ] (Z)");
3074 OUTS (outf, dregs (reg));
3075 OUTS (outf, "=W[");
3076 OUTS (outf, pregs (ptr));
3077 OUTS (outf, "+");
3078 OUTS (outf, imm16s2 (offset));
3079 OUTS (outf, "] (Z)");
3080 return 2 * 2;
3081 }
3082 else if (W == 0 && sz == 1 && Z == 1)
3083 {
3084 notethat ("dregs = W [ pregs + imm16s2 ] (X)");
3085 OUTS (outf, dregs (reg));
3086 OUTS (outf, "=W[");
3087 OUTS (outf, pregs (ptr));
3088 OUTS (outf, "+");
3089 OUTS (outf, imm16s2 (offset));
3090 OUTS (outf, "](X)");
3091 return 2 * 2;
3092 }
3093 else if (W == 0 && sz == 2 && Z == 0)
3094 {
3095 notethat ("dregs = B [ pregs + imm16 ] (Z)");
3096 OUTS (outf, dregs (reg));
3097 OUTS (outf, "=B[");
3098 OUTS (outf, pregs (ptr));
3099 OUTS (outf, "+");
3100 OUTS (outf, imm16 (offset));
3101 OUTS (outf, "] (Z)");
3102 return 2 * 2;
3103 }
3104 else if (W == 0 && sz == 2 && Z == 1)
3105 {
3106 notethat ("dregs = B [ pregs + imm16 ] (X)");
3107 OUTS (outf, dregs (reg));
3108 OUTS (outf, "=B[");
3109 OUTS (outf, pregs (ptr));
3110 OUTS (outf, "+");
3111 OUTS (outf, imm16 (offset));
3112 OUTS (outf, "](X)");
3113 return 2 * 2;
3114 }
3115 else if (W == 1 && sz == 0 && Z == 0)
3116 {
3117 notethat ("[ pregs + imm16s4 ] = dregs");
3118 OUTS (outf, "[");
3119 OUTS (outf, pregs (ptr));
3120 OUTS (outf, "+");
3121 OUTS (outf, imm16s4 (offset));
3122 OUTS (outf, "]=");
3123 OUTS (outf, dregs (reg));
3124 return 2 * 2;
3125 }
3126 else if (W == 1 && sz == 0 && Z == 1)
3127 {
3128 notethat ("[ pregs + imm16s4 ] = pregs");
3129 OUTS (outf, "[");
3130 OUTS (outf, pregs (ptr));
3131 OUTS (outf, "+");
3132 OUTS (outf, imm16s4 (offset));
3133 OUTS (outf, "]=");
3134 OUTS (outf, pregs (reg));
3135 return 2 * 2;
3136 }
3137 else if (W == 1 && sz == 1 && Z == 0)
3138 {
3139 notethat ("W [ pregs + imm16s2 ] = dregs");
3140 OUTS (outf, "W[");
3141 OUTS (outf, pregs (ptr));
3142 OUTS (outf, "+");
3143 OUTS (outf, imm16s2 (offset));
3144 OUTS (outf, "]=");
3145 OUTS (outf, dregs (reg));
3146 return 2 * 2;
3147 }
3148 else if (W == 1 && sz == 2 && Z == 0)
3149 {
3150 notethat ("B [ pregs + imm16 ] = dregs");
3151 OUTS (outf, "B[");
3152 OUTS (outf, pregs (ptr));
3153 OUTS (outf, "+");
3154 OUTS (outf, imm16 (offset));
3155 OUTS (outf, "]=");
3156 OUTS (outf, dregs (reg));
3157 return 2 * 2;
3158 }
3159 else
3160 goto illegal_instruction;
3161illegal_instruction:
3162 return 0;
3163}
3164
3165static int
3166decode_linkage_0 (TIword iw0, TIword iw1, disassemble_info *outf)
3167{
3168/* linkage
3169+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3170| 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.|
3171|.framesize.....................................................|
3172+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3173*/
3174 int R = ((iw0 >> (Linkage_R_bits - 16)) & Linkage_R_mask);
3175 int framesize = ((iw1 >> Linkage_framesize_bits) & Linkage_framesize_mask);
3176
3177 if (R == 0)
3178 {
3179 notethat ("LINK uimm16s4");
3180 OUTS (outf, "LINK ");
3181 OUTS (outf, uimm16s4 (framesize));
3182 return 2 * 2;
3183 }
3184 else if (R == 1)
3185 {
3186 notethat ("UNLINK");
3187 OUTS (outf, "UNLINK");
3188 return 2 * 2;
3189 }
3190 else
3191 goto illegal_instruction;
3192illegal_instruction:
3193 return 0;
3194}
3195
3196static int
3197decode_dsp32mac_0 (TIword iw0, TIword iw1, disassemble_info *outf)
3198{
3199/* dsp32mac
3200+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3201| 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...|
3202|.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
3203+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3204*/
3205 int op1 = ((iw0 >> (DSP32Mac_op1_bits - 16)) & DSP32Mac_op1_mask);
3206 int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask);
3207 int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask);
3208 int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask);
3209 int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask);
3210 int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask);
3211 int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask);
3212 int src1 = ((iw1 >> DSP32Mac_src1_bits) & DSP32Mac_src1_mask);
3213 int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask);
3214 int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask);
3215 int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask);
3216 int op0 = ((iw1 >> DSP32Mac_op0_bits) & DSP32Mac_op0_mask);
3217 int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask);
3218 int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask);
3219
3220 if (w0 == 0 && w1 == 0 && op1 == 3 && op0 == 3)
3221 return 0;
3222
3223 if (op1 == 3 && MM)
3224 return 0;
3225
3226 if ((w1 || w0) && mmod == M_W32)
3227 return 0;
3228
3229 if (((1 << mmod) & (P ? 0x31b : 0x1b5f)) == 0)
3230 return 0;
3231
3232 if (w1 == 1 || op1 != 3)
3233 {
3234 if (w1)
3235 OUTS (outf, P ? dregs (dst + 1) : dregs_hi (dst));
3236
3237 if (op1 == 3)
3238 OUTS (outf, " = A1");
3239 else
3240 {
3241 if (w1)
3242 OUTS (outf, " = (");
3243 decode_macfunc (1, op1, h01, h11, src0, src1, outf);
3244 if (w1)
3245 OUTS (outf, ")");
3246 }
3247
3248 if (w0 == 1 || op0 != 3)
3249 {
3250 if (MM)
3251 OUTS (outf, " (M)");
3252 MM = 0;
3253 OUTS (outf, ", ");
3254 }
3255 }
3256
3257 if (w0 == 1 || op0 != 3)
3258 {
3259 if (w0)
3260 OUTS (outf, P ? dregs (dst) : dregs_lo (dst));
3261
3262 if (op0 == 3)
3263 OUTS (outf, " = A0");
3264 else
3265 {
3266 if (w0)
3267 OUTS (outf, " = (");
3268 decode_macfunc (0, op0, h00, h10, src0, src1, outf);
3269 if (w0)
3270 OUTS (outf, ")");
3271 }
3272 }
3273
3274 decode_optmode (mmod, MM, outf);
3275
3276 return 4;
3277}
3278
3279static int
3280decode_dsp32mult_0 (TIword iw0, TIword iw1, disassemble_info *outf)
3281{
3282/* dsp32mult
3283+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3284| 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...|
3285|.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......|
3286+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3287*/
3288 int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask);
3289 int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask);
3290 int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask);
3291 int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask);
3292 int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask);
3293 int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask);
3294 int src1 = ((iw1 >> DSP32Mac_src1_bits) & DSP32Mac_src1_mask);
3295 int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask);
3296 int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask);
3297 int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask);
3298 int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask);
3299 int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask);
3300
3301 if (w1 == 0 && w0 == 0)
3302 return 0;
3303 if (((1 << mmod) & (P ? 0x313 : 0x1b57)) == 0)
3304 return 0;
3305
3306 if (w1)
3307 {
3308 OUTS (outf, P ? dregs (dst | 1) : dregs_hi (dst));
3309 OUTS (outf, " = ");
3310 decode_multfunc (h01, h11, src0, src1, outf);
3311
3312 if (w0)
3313 {
3314 if (MM)
3315 OUTS (outf, " (M)");
3316 MM = 0;
3317 OUTS (outf, ", ");
3318 }
3319 }
3320
3321 if (w0)
3322 {
3323 OUTS (outf, dregs (dst));
3324 OUTS (outf, " = ");
3325 decode_multfunc (h00, h10, src0, src1, outf);
3326 }
3327
3328 decode_optmode (mmod, MM, outf);
3329 return 4;
3330}
3331
3332static int
3333decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf)
3334{
3335/* dsp32alu
3336+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3337| 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............|
3338|.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......|
3339+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
3340*/
3341 int s = ((iw1 >> DSP32Alu_s_bits) & DSP32Alu_s_mask);
3342 int x = ((iw1 >> DSP32Alu_x_bits) & DSP32Alu_x_mask);
3343 int aop = ((iw1 >> DSP32Alu_aop_bits) & DSP32Alu_aop_mask);
3344 int src0 = ((iw1 >> DSP32Alu_src0_bits) & DSP32Alu_src0_mask);
3345 int src1 = ((iw1 >> DSP32Alu_src1_bits) & DSP32Alu_src1_mask);
3346 int dst0 = ((iw1 >> DSP32Alu_dst0_bits) & DSP32Alu_dst0_mask);
3347 int dst1 = ((iw1 >> DSP32Alu_dst1_bits) & DSP32Alu_dst1_mask);
3348 int HL = ((iw0 >> (DSP32Alu_HL_bits - 16)) & DSP32Alu_HL_mask);
3349 int aopcde = ((iw0 >> (DSP32Alu_aopcde_bits - 16)) & DSP32Alu_aopcde_mask);
3350
3351 if (aop == 0 && aopcde == 9 && HL == 0 && s == 0)
3352 {
3353 notethat ("A0.L = dregs_lo");
3354 OUTS (outf, "A0.L=");
3355 OUTS (outf, dregs_lo (src0));
3356 return 2 * 2;
3357 }
3358 else if (aop == 2 && aopcde == 9 && HL == 1 && s == 0)
3359 {
3360 notethat ("A1.H = dregs_hi");
3361 OUTS (outf, "A1.H=");
3362 OUTS (outf, dregs_hi (src0));
3363 return 2 * 2;
3364 }
3365 else if (aop == 2 && aopcde == 9 && HL == 0 && s == 0)
3366 {
3367 notethat ("A1.L = dregs_lo");
3368 OUTS (outf, "A1.L=");
3369 OUTS (outf, dregs_lo (src0));
3370 return 2 * 2;
3371 }
3372 else if (aop == 0 && aopcde == 9 && HL == 1 && s == 0)
3373 {
3374 notethat ("A0.H = dregs_hi");
3375 OUTS (outf, "A0.H=");
3376 OUTS (outf, dregs_hi (src0));
3377 return 2 * 2;
3378 }
3379 else if (x == 1 && HL == 1 && aop == 3 && aopcde == 5)
3380 {
3381 notethat ("dregs_hi = dregs - dregs (RND20)");
3382 OUTS (outf, dregs_hi (dst0));
3383 OUTS (outf, "=");
3384 OUTS (outf, dregs (src0));
3385 OUTS (outf, "-");
3386 OUTS (outf, dregs (src1));
3387 OUTS (outf, "(RND20)");
3388 return 2 * 2;
3389 }
3390 else if (x == 1 && HL == 1 && aop == 2 && aopcde == 5)
3391 {
3392 notethat ("dregs_hi = dregs + dregs (RND20)");
3393 OUTS (outf, dregs_hi (dst0));
3394 OUTS (outf, "=");
3395 OUTS (outf, dregs (src0));
3396 OUTS (outf, "+");
3397 OUTS (outf, dregs (src1));
3398 OUTS (outf, "(RND20)");
3399 return 2 * 2;
3400 }
3401 else if (x == 0 && HL == 0 && aop == 1 && aopcde == 5)
3402 {
3403 notethat ("dregs_lo = dregs - dregs (RND12)");
3404 OUTS (outf, dregs_lo (dst0));
3405 OUTS (outf, "=");
3406 OUTS (outf, dregs (src0));
3407 OUTS (outf, "-");
3408 OUTS (outf, dregs (src1));
3409 OUTS (outf, "(RND12)");
3410 return 2 * 2;
3411 }
3412 else if (x == 0 && HL == 0 && aop == 0 && aopcde == 5)
3413 {
3414 notethat ("dregs_lo = dregs + dregs (RND12)");
3415 OUTS (outf, dregs_lo (dst0));
3416 OUTS (outf, "=");
3417 OUTS (outf, dregs (src0));
3418 OUTS (outf, "+");
3419 OUTS (outf, dregs (src1));
3420 OUTS (outf, "(RND12)");
3421 return 2 * 2;
3422 }
3423 else if (x == 1 && HL == 0 && aop == 3 && aopcde == 5)
3424 {
3425 notethat ("dregs_lo = dregs - dregs (RND20)");
3426 OUTS (outf, dregs_lo (dst0));
3427 OUTS (outf, "=");
3428 OUTS (outf, dregs (src0));
3429 OUTS (outf, "-");
3430 OUTS (outf, dregs (src1));
3431 OUTS (outf, "(RND20)");
3432 return 2 * 2;
3433 }
3434 else if (x == 0 && HL == 1 && aop == 0 && aopcde == 5)
3435 {
3436 notethat ("dregs_hi = dregs + dregs (RND12)");
3437 OUTS (outf, dregs_hi (dst0));
3438 OUTS (outf, "=");
3439 OUTS (outf, dregs (src0));
3440 OUTS (outf, "+");
3441 OUTS (outf, dregs (src1));
3442 OUTS (outf, "(RND12)");
3443 return 2 * 2;
3444 }
3445 else if (x == 1 && HL == 0 && aop == 2 && aopcde == 5)
3446 {
3447 notethat ("dregs_lo = dregs + dregs (RND20)");
3448 OUTS (outf, dregs_lo (dst0));
3449 OUTS (outf, "=");
3450 OUTS (outf, dregs (src0));
3451 OUTS (outf, "+");
3452 OUTS (outf, dregs (src1));
3453 OUTS (outf, "(RND20)");
3454 return 2 * 2;
3455 }
3456 else if (x == 0 && HL == 1 && aop == 1 && aopcde == 5)
3457 {
3458 notethat ("dregs_hi = dregs - dregs (RND12)");
3459 OUTS (outf, dregs_hi (dst0));
3460 OUTS (outf, "=");
3461 OUTS (outf, dregs (src0));
3462 OUTS (outf, "-");
3463 OUTS (outf, dregs (src1));
3464 OUTS (outf, "(RND12)");
3465 return 2 * 2;
3466 }
3467 else if (HL == 1 && aop == 0 && aopcde == 2)
3468 {
3469 notethat ("dregs_hi = dregs_lo + dregs_lo amod1");
3470 OUTS (outf, dregs_hi (dst0));
3471 OUTS (outf, "=");
3472 OUTS (outf, dregs_lo (src0));
3473 OUTS (outf, "+");
3474 OUTS (outf, dregs_lo (src1));
3475 OUTS (outf, " ");
3476 amod1 (s, x, outf);
3477 return 2 * 2;
3478 }
3479 else if (HL == 1 && aop == 1 && aopcde == 2)
3480 {
3481 notethat ("dregs_hi = dregs_lo + dregs_hi amod1");
3482 OUTS (outf, dregs_hi (dst0));
3483 OUTS (outf, "=");
3484 OUTS (outf, dregs_lo (src0));
3485 OUTS (outf, "+");
3486 OUTS (outf, dregs_hi (src1));
3487 OUTS (outf, " ");
3488 amod1 (s, x, outf);
3489 return 2 * 2;
3490 }
3491 else if (HL == 1 && aop == 2 && aopcde == 2)
3492 {
3493 notethat ("dregs_hi = dregs_hi + dregs_lo amod1");
3494 OUTS (outf, dregs_hi (dst0));
3495 OUTS (outf, "=");
3496 OUTS (outf, dregs_hi (src0));
3497 OUTS (outf, "+");
3498 OUTS (outf, dregs_lo (src1));
3499 OUTS (outf, " ");
3500 amod1 (s, x, outf);
3501 return 2 * 2;
3502 }
3503 else if (HL == 1 && aop == 3 && aopcde == 2)
3504 {
3505 notethat ("dregs_hi = dregs_hi + dregs_hi amod1");
3506 OUTS (outf, dregs_hi (dst0));
3507 OUTS (outf, "=");
3508 OUTS (outf, dregs_hi (src0));
3509 OUTS (outf, "+");
3510 OUTS (outf, dregs_hi (src1));
3511 OUTS (outf, " ");
3512 amod1 (s, x, outf);
3513 return 2 * 2;
3514 }
3515 else if (HL == 0 && aop == 0 && aopcde == 3)
3516 {
3517 notethat ("dregs_lo = dregs_lo - dregs_lo amod1");
3518 OUTS (outf, dregs_lo (dst0));
3519 OUTS (outf, "=");
3520 OUTS (outf, dregs_lo (src0));
3521 OUTS (outf, "-");
3522 OUTS (outf, dregs_lo (src1));
3523 OUTS (outf, " ");
3524 amod1 (s, x, outf);
3525 return 2 * 2;
3526 }
3527 else if (HL == 0 && aop == 1 && aopcde == 3)
3528 {
3529 notethat ("dregs_lo = dregs_lo - dregs_hi amod1");
3530 OUTS (outf, dregs_lo (dst0));
3531 OUTS (outf, "=");
3532 OUTS (outf, dregs_lo (src0));
3533 OUTS (outf, "-");
3534 OUTS (outf, dregs_hi (src1));
3535 OUTS (outf, " ");
3536 amod1 (s, x, outf);
3537 return 2 * 2;
3538 }
3539 else if (HL == 0 && aop == 3 && aopcde == 2)
3540 {
3541 notethat ("dregs_lo = dregs_hi + dregs_hi amod1");
3542 OUTS (outf, dregs_lo (dst0));
3543 OUTS (outf, "=");
3544 OUTS (outf, dregs_hi (src0));
3545 OUTS (outf, "+");
3546 OUTS (outf, dregs_hi (src1));
3547 OUTS (outf, " ");
3548 amod1 (s, x, outf);
3549 return 2 * 2;
3550 }
3551 else if (HL == 1 && aop == 0 && aopcde == 3)
3552 {
3553 notethat ("dregs_hi = dregs_lo - dregs_lo amod1");
3554 OUTS (outf, dregs_hi (dst0));
3555 OUTS (outf, "=");
3556 OUTS (outf, dregs_lo (src0));
3557 OUTS (outf, "-");
3558 OUTS (outf, dregs_lo (src1));
3559 OUTS (outf, " ");
3560 amod1 (s, x, outf);
3561 return 2 * 2;
3562 }
3563 else if (HL == 1 && aop == 1 && aopcde == 3)
3564 {
3565 notethat ("dregs_hi = dregs_lo - dregs_hi amod1");
3566 OUTS (outf, dregs_hi (dst0));
3567 OUTS (outf, "=");
3568 OUTS (outf, dregs_lo (src0));
3569 OUTS (outf, "-");
3570 OUTS (outf, dregs_hi (src1));
3571 OUTS (outf, " ");
3572 amod1 (s, x, outf);
3573 return 2 * 2;
3574 }
3575 else if (HL == 1 && aop == 2 && aopcde == 3)
3576 {
3577 notethat ("dregs_hi = dregs_hi - dregs_lo amod1");
3578 OUTS (outf, dregs_hi (dst0));
3579 OUTS (outf, "=");
3580 OUTS (outf, dregs_hi (src0));
3581 OUTS (outf, "-");
3582 OUTS (outf, dregs_lo (src1));
3583 OUTS (outf, " ");
3584 amod1 (s, x, outf);
3585 return 2 * 2;
3586 }
3587 else if (HL == 1 && aop == 3 && aopcde == 3)
3588 {
3589 notethat ("dregs_hi = dregs_hi - dregs_hi amod1");
3590 OUTS (outf, dregs_hi (dst0));
3591 OUTS (outf, "=");
3592 OUTS (outf, dregs_hi (src0));
3593 OUTS (outf, "-");
3594 OUTS (outf, dregs_hi (src1));
3595 OUTS (outf, " ");
3596 amod1 (s, x, outf);
3597 return 2 * 2;
3598 }
3599 else if (HL == 0 && aop == 2 && aopcde == 2)
3600 {
3601 notethat ("dregs_lo = dregs_hi + dregs_lo amod1");
3602 OUTS (outf, dregs_lo (dst0));
3603 OUTS (outf, "=");
3604 OUTS (outf, dregs_hi (src0));
3605 OUTS (outf, "+");
3606 OUTS (outf, dregs_lo (src1));
3607 OUTS (outf, " ");
3608 amod1 (s, x, outf);
3609 return 2 * 2;
3610 }
3611 else if (HL == 0 && aop == 1 && aopcde == 2)
3612 {
3613 notethat ("dregs_lo = dregs_lo + dregs_hi amod1");
3614 OUTS (outf, dregs_lo (dst0));
3615 OUTS (outf, "=");
3616 OUTS (outf, dregs_lo (src0));
3617 OUTS (outf, "+");
3618 OUTS (outf, dregs_hi (src1));
3619 OUTS (outf, " ");
3620 amod1 (s, x, outf);
3621 return 2 * 2;
3622 }
3623 else if (HL == 0 && aop == 2 && aopcde == 3)
3624 {
3625 notethat ("dregs_lo = dregs_hi - dregs_lo amod1");
3626 OUTS (outf, dregs_lo (dst0));
3627 OUTS (outf, "=");
3628 OUTS (outf, dregs_hi (src0));
3629 OUTS (outf, "-");
3630 OUTS (outf, dregs_lo (src1));
3631 OUTS (outf, " ");
3632 amod1 (s, x, outf);
3633 return 2 * 2;
3634 }
3635 else if (HL == 0 && aop == 3 && aopcde == 3)
3636 {
3637 notethat ("dregs_lo = dregs_hi - dregs_hi amod1");
3638 OUTS (outf, dregs_lo (dst0));
3639 OUTS (outf, "=");
3640 OUTS (outf, dregs_hi (src0));
3641 OUTS (outf, "-");
3642 OUTS (outf, dregs_hi (src1));
3643 OUTS (outf, " ");
3644 amod1 (s, x, outf);
3645 return 2 * 2;
3646 }
3647 else if (HL == 0 && aop == 0 && aopcde == 2)
3648 {
3649 notethat ("dregs_lo = dregs_lo + dregs_lo amod1");
3650 OUTS (outf, dregs_lo (dst0));
3651 OUTS (outf, "=");
3652 OUTS (outf, dregs_lo (src0));
3653 OUTS (outf, "+");
3654 OUTS (outf, dregs_lo (src1));
3655 OUTS (outf, " ");
3656 amod1 (s, x, outf);
3657 return 2 * 2;
3658 }
3659 else if (aop == 0 && aopcde == 9 && s == 1)
3660 {
3661 notethat ("A0 = dregs");
3662 OUTS (outf, "A0=");
3663 OUTS (outf, dregs (src0));
3664 return 2 * 2;
3665 }
3666 else if (aop == 3 && aopcde == 11 && s == 0)
3667 {
3668 notethat ("A0 -= A1");
3669 OUTS (outf, "A0-=A1");
3670 return 2 * 2;
3671 }
3672 else if (aop == 3 && aopcde == 11 && s == 1)
3673 {
3674 notethat ("A0 -= A1 (W32)");
3675 OUTS (outf, "A0-=A1(W32)");
3676 return 2 * 2;
3677 }
3678 else if (aop == 3 && aopcde == 22 && HL == 1)
3679 {
3680 notethat ("dregs = BYTEOP2M ( dregs_pair , dregs_pair ) (TH , R)");
3681 OUTS (outf, dregs (dst0));
3682 OUTS (outf, "=BYTEOP2M(");
3683 OUTS (outf, dregs (src0 + 1));
3684 OUTS (outf, ":");
3685 OUTS (outf, imm5 (src0));
3686 OUTS (outf, ",");
3687 OUTS (outf, dregs (src1 + 1));
3688 OUTS (outf, ":");
3689 OUTS (outf, imm5 (src1));
3690 OUTS (outf, ")(TH");
3691 if (s == 1)
3692 OUTS (outf, ", R)");
3693 else
3694 OUTS (outf, ")");
3695 return 2 * 2;
3696 }
3697 else if (aop == 3 && aopcde == 22 && HL == 0)
3698 {
3699 notethat ("dregs = BYTEOP2M ( dregs_pair , dregs_pair ) (TL , R)");
3700 OUTS (outf, dregs (dst0));
3701 OUTS (outf, "=BYTEOP2M(");
3702 OUTS (outf, dregs (src0 + 1));
3703 OUTS (outf, ":");
3704 OUTS (outf, imm5 (src0));
3705 OUTS (outf, ",");
3706 OUTS (outf, dregs (src1 + 1));
3707 OUTS (outf, ":");
3708 OUTS (outf, imm5 (src1));
3709 OUTS (outf, ")(TL");
3710 if (s == 1)
3711 OUTS (outf, ", R)");
3712 else
3713 OUTS (outf, ")");
3714 return 2 * 2;
3715 }
3716 else if (aop == 2 && aopcde == 22 && HL == 1)
3717 {
3718 notethat ("dregs = BYTEOP2M ( dregs_pair , dregs_pair ) (RNDH , R)");
3719 OUTS (outf, dregs (dst0));
3720 OUTS (outf, "=BYTEOP2M(");
3721 OUTS (outf, dregs (src0 + 1));
3722 OUTS (outf, ":");
3723 OUTS (outf, imm5 (src0));
3724 OUTS (outf, ",");
3725 OUTS (outf, dregs (src1 + 1));
3726 OUTS (outf, ":");
3727 OUTS (outf, imm5 (src1));
3728 OUTS (outf, ")(RNDH");
3729 if (s == 1)
3730 OUTS (outf, ", R)");
3731 else
3732 OUTS (outf, ")");
3733 return 2 * 2;
3734 }
3735 else if (aop == 2 && aopcde == 22 && HL == 0)
3736 {
3737 notethat ("dregs = BYTEOP2M ( dregs_pair , dregs_pair ) (RNDL , R)");
3738 OUTS (outf, dregs (dst0));
3739 OUTS (outf, "=BYTEOP2M(");
3740 OUTS (outf, dregs (src0 + 1));
3741 OUTS (outf, ":");
3742 OUTS (outf, imm5 (src0));
3743 OUTS (outf, ",");
3744 OUTS (outf, dregs (src1 + 1));
3745 OUTS (outf, ":");
3746 OUTS (outf, imm5 (src1));
3747 OUTS (outf, ")(RNDL");
3748 if (s == 1)
3749 OUTS (outf, ", R)");
3750 else
3751 OUTS (outf, ")");
3752 return 2 * 2;
3753 }
3754 else if (aop == 1 && aopcde == 22 && HL == 1)
3755 {
3756 notethat ("dregs = BYTEOP2P ( dregs_pair , dregs_pair ) (TH , R)");
3757 OUTS (outf, dregs (dst0));
3758 OUTS (outf, "=BYTEOP2P(");
3759 OUTS (outf, dregs (src0 + 1));
3760 OUTS (outf, ":");
3761 OUTS (outf, imm5 (src0));
3762 OUTS (outf, ",");
3763 OUTS (outf, dregs (src1 + 1));
3764 OUTS (outf, ":");
3765 OUTS (outf, imm5 (src1));
3766 OUTS (outf, ")(TH");
3767 if (s == 1)
3768 OUTS (outf, ", R)");
3769 else
3770 OUTS (outf, ")");
3771 return 2 * 2;
3772 }
3773 else if (aop == 1 && aopcde == 22 && HL == 0)
3774 {
3775 notethat ("dregs = BYTEOP2P ( dregs_pair , dregs_pair ) (TL , R)");
3776 OUTS (outf, dregs (dst0));
3777 OUTS (outf, "=BYTEOP2P(");
3778 OUTS (outf, dregs (src0 + 1));
3779 OUTS (outf, ":");
3780 OUTS (outf, imm5 (src0));
3781 OUTS (outf, ",");
3782 OUTS (outf, dregs (src1 + 1));
3783 OUTS (outf, ":");
3784 OUTS (outf, imm5 (src1));
3785 OUTS (outf, ")(TL");
3786 if (s == 1)
3787 OUTS (outf, ", R)");
3788 else
3789 OUTS (outf, ")");
3790 return 2 * 2;
3791 }
3792 else if (aop == 0 && aopcde == 22 && HL == 1)
3793 {
3794 notethat ("dregs = BYTEOP2P ( dregs_pair , dregs_pair ) (RNDH , R)");
3795 OUTS (outf, dregs (dst0));
3796 OUTS (outf, "=BYTEOP2P(");
3797 OUTS (outf, dregs (src0 + 1));
3798 OUTS (outf, ":");
3799 OUTS (outf, imm5 (src0));
3800 OUTS (outf, ",");
3801 OUTS (outf, dregs (src1 + 1));
3802 OUTS (outf, ":");
3803 OUTS (outf, imm5 (src1));
3804 OUTS (outf, ")(RNDH");
3805 if (s == 1)
3806 OUTS (outf, ", R)");
3807 else
3808 OUTS (outf, ")");
3809 return 2 * 2;
3810 }
3811 else if (aop == 0 && aopcde == 22 && HL == 0)
3812 {
3813 notethat ("dregs = BYTEOP2P ( dregs_pair , dregs_pair ) (RNDL , aligndir)");
3814 OUTS (outf, dregs (dst0));
3815 OUTS (outf, "=BYTEOP2P(");
3816 OUTS (outf, dregs (src0 + 1));
3817 OUTS (outf, ":");
3818 OUTS (outf, imm5 (src0));
3819 OUTS (outf, ",");
3820 OUTS (outf, dregs (src1 + 1));
3821 OUTS (outf, ":");
3822 OUTS (outf, imm5 (src1));
3823 OUTS (outf, ")(RNDL");
3824 if (s == 1)
3825 OUTS (outf, ", R)");
3826 else
3827 OUTS (outf, ")");
3828 return 2 * 2;
3829 }
3830 else if (aop == 0 && s == 0 && aopcde == 8)
3831 {
3832 notethat ("A0 = 0");
3833 OUTS (outf, "A0=0");
3834 return 2 * 2;
3835 }
3836 else if (aop == 0 && s == 1 && aopcde == 8)
3837 {
3838 notethat ("A0 = A0 (S)");
3839 OUTS (outf, "A0=A0(S)");
3840 return 2 * 2;
3841 }
3842 else if (aop == 1 && s == 0 && aopcde == 8)
3843 {
3844 notethat ("A1 = 0");
3845 OUTS (outf, "A1=0");
3846 return 2 * 2;
3847 }
3848 else if (aop == 1 && s == 1 && aopcde == 8)
3849 {
3850 notethat ("A1 = A1 (S)");
3851 OUTS (outf, "A1=A1(S)");
3852 return 2 * 2;
3853 }
3854 else if (aop == 2 && s == 0 && aopcde == 8)
3855 {
3856 notethat ("A1 = A0 = 0");
3857 OUTS (outf, "A1=A0=0");
3858 return 2 * 2;
3859 }
3860 else if (aop == 2 && s == 1 && aopcde == 8)
3861 {
3862 notethat ("A1 = A1 (S) , A0 = A0 (S)");
3863 OUTS (outf, "A1=A1(S),A0=A0(S)");
3864 return 2 * 2;
3865 }
3866 else if (aop == 3 && s == 0 && aopcde == 8)
3867 {
3868 notethat ("A0 = A1");
3869 OUTS (outf, "A0=A1");
3870 return 2 * 2;
3871 }
3872 else if (aop == 3 && s == 1 && aopcde == 8)
3873 {
3874 notethat ("A1 = A0");
3875 OUTS (outf, "A1=A0");
3876 return 2 * 2;
3877 }
3878 else if (aop == 1 && aopcde == 9 && s == 0)
3879 {
3880 notethat ("A0.x = dregs_lo");
3881 OUTS (outf, "A0.x=");
3882 OUTS (outf, dregs_lo (src0));
3883 return 2 * 2;
3884 }
3885 else if (aop == 1 && HL == 0 && aopcde == 11)
3886 {
3887 notethat ("dregs_lo = ( A0 += A1 )");
3888 OUTS (outf, dregs_lo (dst0));
3889 OUTS (outf, "=(A0+=A1)");
3890 return 2 * 2;
3891 }
3892 else if (aop == 3 && HL == 0 && aopcde == 16)
3893 {
3894 notethat ("A1 = ABS A1, A0 = ABS A0");
3895 OUTS (outf, "A1= ABS A0,A0= ABS A0");
3896 return 2 * 2;
3897 }
3898 else if (aop == 0 && aopcde == 23 && HL == 1)
3899 {
3900 notethat ("dregs = BYTEOP3P ( dregs_pair , dregs_pair ) (HI , R)");
3901 OUTS (outf, dregs (dst0));
3902 OUTS (outf, "=BYTEOP3P(");
3903 OUTS (outf, dregs (src0 + 1));
3904 OUTS (outf, ":");
3905 OUTS (outf, imm5 (src0));
3906 OUTS (outf, ",");
3907 OUTS (outf, dregs (src1 + 1));
3908 OUTS (outf, ":");
3909 OUTS (outf, imm5 (src1));
3910 OUTS (outf, ")(HI");
3911 if (s == 1)
3912 OUTS (outf, ", R)");
3913 else
3914 OUTS (outf, ")");
3915 return 2 * 2;
3916 }
3917 else if (aop == 3 && aopcde == 9 && s == 0)
3918 {
3919 notethat ("A1.x = dregs_lo");
3920 OUTS (outf, "A1.x=");
3921 OUTS (outf, dregs_lo (src0));
3922 return 2 * 2;
3923 }
3924 else if (aop == 1 && HL == 1 && aopcde == 16)
3925 {
3926 notethat ("A1 = ABS A1");
3927 OUTS (outf, "A1= ABS A1");
3928 return 2 * 2;
3929 }
3930 else if (aop == 0 && HL == 1 && aopcde == 16)
3931 {
3932 notethat ("A1 = ABS A0");
3933 OUTS (outf, "A1= ABS A0");
3934 return 2 * 2;
3935 }
3936 else if (aop == 2 && aopcde == 9 && s == 1)
3937 {
3938 notethat ("A1 = dregs");
3939 OUTS (outf, "A1=");
3940 OUTS (outf, dregs (src0));
3941 return 2 * 2;
3942 }
3943 else if (HL == 0 && aop == 3 && aopcde == 12)
3944 {
3945 notethat ("dregs_lo = dregs (RND)");
3946 OUTS (outf, dregs_lo (dst0));
3947 OUTS (outf, "=");
3948 OUTS (outf, dregs (src0));
3949 OUTS (outf, "(RND)");
3950 return 2 * 2;
3951 }
3952 else if (aop == 1 && HL == 0 && aopcde == 16)
3953 {
3954 notethat ("A0 = ABS A1");
3955 OUTS (outf, "A0= ABS A1");
3956 return 2 * 2;
3957 }
3958 else if (aop == 0 && HL == 0 && aopcde == 16)
3959 {
3960 notethat ("A0 = ABS A0");
3961 OUTS (outf, "A0= ABS A0");
3962 return 2 * 2;
3963 }
3964 else if (aop == 3 && HL == 0 && aopcde == 15)
3965 {
3966 notethat ("dregs = - dregs (V)");
3967 OUTS (outf, dregs (dst0));
3968 OUTS (outf, "=-");
3969 OUTS (outf, dregs (src0));
3970 OUTS (outf, "(V)");
3971 return 2 * 2;
3972 }
3973 else if (aop == 3 && s == 1 && HL == 0 && aopcde == 7)
3974 {
3975 notethat ("dregs = - dregs (S)");
3976 OUTS (outf, dregs (dst0));
3977 OUTS (outf, "=-");
3978 OUTS (outf, dregs (src0));
3979 OUTS (outf, "(S)");
3980 return 2 * 2;
3981 }
3982 else if (aop == 3 && s == 0 && HL == 0 && aopcde == 7)
3983 {
3984 notethat ("dregs = - dregs (NS)");
3985 OUTS (outf, dregs (dst0));
3986 OUTS (outf, "=-");
3987 OUTS (outf, dregs (src0));
3988 OUTS (outf, "(NS)");
3989 return 2 * 2;
3990 }
3991 else if (aop == 1 && HL == 1 && aopcde == 11)
3992 {
3993 notethat ("dregs_hi = ( A0 += A1 )");
3994 OUTS (outf, dregs_hi (dst0));
3995 OUTS (outf, "=(A0+=A1)");
3996 return 2 * 2;
3997 }
3998 else if (aop == 2 && aopcde == 11 && s == 0)
3999 {
4000 notethat ("A0 += A1");
4001 OUTS (outf, "A0+=A1");
4002 return 2 * 2;
4003 }
4004 else if (aop == 2 && aopcde == 11 && s == 1)
4005 {
4006 notethat ("A0 += A1 (W32)");
4007 OUTS (outf, "A0+=A1(W32)");
4008 return 2 * 2;
4009 }
4010 else if (aop == 3 && HL == 0 && aopcde == 14)
4011 {
4012 notethat ("A1 = - A1 , A0 = - A0");
4013 OUTS (outf, "A1=-A1,A0=-A0");
4014 return 2 * 2;
4015 }
4016 else if (HL == 1 && aop == 3 && aopcde == 12)
4017 {
4018 notethat ("dregs_hi = dregs (RND)");
4019 OUTS (outf, dregs_hi (dst0));
4020 OUTS (outf, "=");
4021 OUTS (outf, dregs (src0));
4022 OUTS (outf, "(RND)");
4023 return 2 * 2;
4024 }
4025 else if (aop == 0 && aopcde == 23 && HL == 0)
4026 {
4027 notethat ("dregs = BYTEOP3P ( dregs_pair , dregs_pair ) (LO , R)");
4028 OUTS (outf, dregs (dst0));
4029 OUTS (outf, "=BYTEOP3P(");
4030 OUTS (outf, dregs (src0 + 1));
4031 OUTS (outf, ":");
4032 OUTS (outf, imm5 (src0));
4033 OUTS (outf, ",");
4034 OUTS (outf, dregs (src1 + 1));
4035 OUTS (outf, ":");
4036 OUTS (outf, imm5 (src1));
4037 OUTS (outf, ")(LO");
4038 if (s == 1)
4039 OUTS (outf, ", R)");
4040 else
4041 OUTS (outf, ")");
4042 return 2 * 2;
4043 }
4044 else if (aop == 0 && HL == 0 && aopcde == 14)
4045 {
4046 notethat ("A0 = - A0");
4047 OUTS (outf, "A0=-A0");
4048 return 2 * 2;
4049 }
4050 else if (aop == 1 && HL == 0 && aopcde == 14)
4051 {
4052 notethat ("A0 = - A1");
4053 OUTS (outf, "A0=-A1");
4054 return 2 * 2;
4055 }
4056 else if (aop == 0 && HL == 1 && aopcde == 14)
4057 {
4058 notethat ("A1 = - A0");
4059 OUTS (outf, "A1=-A0");
4060 return 2 * 2;
4061 }
4062 else if (aop == 1 && HL == 1 && aopcde == 14)
4063 {
4064 notethat ("A1 = - A1");
4065 OUTS (outf, "A1=-A1");
4066 return 2 * 2;
4067 }
4068 else if (aop == 0 && aopcde == 12)
4069 {
4070 notethat ("dregs_hi=dregs_lo=SIGN(dregs_hi)*dregs_hi + SIGN(dregs_lo)*dregs_lo)");
4071 OUTS (outf, dregs_hi (dst0));
4072 OUTS (outf, "=");
4073 OUTS (outf, dregs_lo (dst0));
4074 OUTS (outf, "=SIGN(");
4075 OUTS (outf, dregs_hi (src0));
4076 OUTS (outf, ")*");
4077 OUTS (outf, dregs_hi (src1));
4078 OUTS (outf, "+SIGN(");
4079 OUTS (outf, dregs_lo (src0));
4080 OUTS (outf, ")*");
4081 OUTS (outf, dregs_lo (src1));
4082 OUTS (outf, ")");
4083 return 2 * 2;
4084 }
4085 else if (aop == 2 && aopcde == 0)
4086 {
4087 notethat ("dregs = dregs -|+ dregs amod0");
4088 OUTS (outf, dregs (dst0));
4089 OUTS (outf, "=");
4090 OUTS (outf, dregs (src0));
4091 OUTS (outf, "-|+");
4092 OUTS (outf, dregs (src1));
4093 OUTS (outf, " ");
4094 amod0 (s, x, outf);
4095 return 2 * 2;
4096 }
4097 else if (aop == 1 && aopcde == 12)
4098 {
4099 notethat ("dregs = A1.L + A1.H , dregs = A0.L + A0.H");
4100 OUTS (outf, dregs (dst1));
4101 OUTS (outf, "=A1.L+A1.H,");
4102 OUTS (outf, dregs (dst0));
4103 OUTS (outf, "=A0.L+A0.H");
4104 return 2 * 2;
4105 }
4106 else if (aop == 2 && aopcde == 4)
4107 {
4108 notethat ("dregs = dregs + dregs , dregs = dregs - dregs amod1");
4109 OUTS (outf, dregs (dst1));
4110 OUTS (outf, "=");
4111 OUTS (outf, dregs (src0));
4112 OUTS (outf, "+");
4113 OUTS (outf, dregs (src1));
4114 OUTS (outf, ",");
4115 OUTS (outf, dregs (dst0));
4116 OUTS (outf, "=");
4117 OUTS (outf, dregs (src0));
4118 OUTS (outf, "-");
4119 OUTS (outf, dregs (src1));
4120 OUTS (outf, " ");
4121 amod1 (s, x, outf);
4122 return 2 * 2;
4123 }
4124 else if (HL == 0 && aopcde == 1)
4125 {
4126 notethat ("dregs = dregs +|+ dregs , dregs = dregs -|- dregs (amod0, amod2)");
4127 OUTS (outf, dregs (dst1));
4128 OUTS (outf, "=");
4129 OUTS (outf, dregs (src0));
4130 OUTS (outf, "+|+");
4131 OUTS (outf, dregs (src1));
4132 OUTS (outf, ",");
4133 OUTS (outf, dregs (dst0));
4134 OUTS (outf, "=");
4135 OUTS (outf, dregs (src0));
4136 OUTS (outf, "-|-");
4137 OUTS (outf, dregs (src1));
4138 amod0amod2 (s, x, aop, outf);
4139 return 2 * 2;
4140 }
4141 else if (aop == 0 && aopcde == 11)
4142 {
4143 notethat ("dregs = ( A0 += A1 )");
4144 OUTS (outf, dregs (dst0));
4145 OUTS (outf, "=(A0+=A1)");
4146 return 2 * 2;
4147 }
4148 else if (aop == 0 && aopcde == 10)
4149 {
4150 notethat ("dregs_lo = A0.x");
4151 OUTS (outf, dregs_lo (dst0));
4152 OUTS (outf, "=A0.x");
4153 return 2 * 2;
4154 }
4155 else if (aop == 1 && aopcde == 10)
4156 {
4157 notethat ("dregs_lo = A1.x");
4158 OUTS (outf, dregs_lo (dst0));
4159 OUTS (outf, "=A1.x");
4160 return 2 * 2;
4161 }
4162 else if (aop == 1 && aopcde == 0)
4163 {
4164 notethat ("dregs = dregs +|- dregs amod0");
4165 OUTS (outf, dregs (dst0));
4166 OUTS (outf, "=");
4167 OUTS (outf, dregs (src0));
4168 OUTS (outf, "+|-");
4169 OUTS (outf, dregs (src1));
4170 OUTS (outf, " ");
4171 amod0 (s, x, outf);
4172 return 2 * 2;
4173 }
4174 else if (aop == 3 && aopcde == 0)
4175 {
4176 notethat ("dregs = dregs -|- dregs amod0");
4177 OUTS (outf, dregs (dst0));
4178 OUTS (outf, "=");
4179 OUTS (outf, dregs (src0));
4180 OUTS (outf, "-|-");
4181 OUTS (outf, dregs (src1));
4182 OUTS (outf, " ");
4183 amod0 (s, x, outf);
4184 return 2 * 2;
4185 }
4186 else if (aop == 1 && aopcde == 4)
4187 {
4188 notethat ("dregs = dregs - dregs amod1");
4189 OUTS (outf, dregs (dst0));
4190 OUTS (outf, "=");
4191 OUTS (outf, dregs (src0));
4192 OUTS (outf, "-");
4193 OUTS (outf, dregs (src1));
4194 OUTS (outf, " ");
4195 amod1 (s, x, outf);
4196 return 2 * 2;
4197 }
4198 else if (aop == 0 && aopcde == 17)
4199 {
4200 notethat ("dregs = A1 + A0, dregs = A1 - A0 amod1");
4201 OUTS (outf, dregs (dst1));
4202 OUTS (outf, "=A1+A0,");
4203 OUTS (outf, dregs (dst0));
4204 OUTS (outf, "=A1-A0 ");
4205 amod1 (s, x, outf);
4206 return 2 * 2;
4207 }
4208 else if (aop == 1 && aopcde == 17)
4209 {
4210 notethat ("dregs = A0 + A1, dregs = A0 - A1 amod1");
4211 OUTS (outf, dregs (dst1));
4212 OUTS (outf, "=A0+A1,");
4213 OUTS (outf, dregs (dst0));
4214 OUTS (outf, "=A0-A1 ");
4215 amod1 (s, x, outf);
4216 return 2 * 2;
4217 }
4218 else if (aop == 0 && aopcde == 18)
4219 {
4220 notethat ("SAA ( dregs_pair , dregs_pair ) aligndir");
4221 OUTS (outf, "SAA(");
4222 OUTS (outf, dregs (src0 + 1));
4223 OUTS (outf, ":");
4224 OUTS (outf, imm5 (src0));
4225 OUTS (outf, ",");
4226 OUTS (outf, dregs (src1 + 1));
4227 OUTS (outf, ":");
4228 OUTS (outf, imm5 (src1));
4229 OUTS (outf, ") ");
4230 aligndir (s, outf);
4231 return 2 * 2;
4232 }
4233 else if (aop == 3 && aopcde == 18)
4234 {
4235 notethat ("DISALGNEXCPT");
4236 OUTS (outf, "DISALGNEXCPT");
4237 return 2 * 2;
4238 }
4239 else if (aop == 0 && aopcde == 20)
4240 {
4241 notethat ("dregs = BYTEOP1P ( dregs_pair , dregs_pair ) aligndir");
4242 OUTS (outf, dregs (dst0));
4243 OUTS (outf, "=BYTEOP1P(");
4244 OUTS (outf, dregs (src0 + 1));
4245 OUTS (outf, ":");
4246 OUTS (outf, imm5 (src0));
4247 OUTS (outf, ",");
4248 OUTS (outf, dregs (src1 + 1));
4249 OUTS (outf, ":");
4250 OUTS (outf, imm5 (src1));
4251 OUTS (outf, ")");
4252 aligndir (s, outf);
4253 return 2 * 2;
4254 }
4255 else if (aop == 1 && aopcde == 20)
4256 {
4257 notethat ("dregs = BYTEOP1P ( dregs_pair , dregs_pair ) (T, R)");
4258 OUTS (outf, dregs (dst0));
4259 OUTS (outf, "=BYTEOP1P(");
4260 OUTS (outf, dregs (src0 + 1));
4261 OUTS (outf, ":");
4262 OUTS (outf, imm5 (src0));
4263 OUTS (outf, ",");
4264 OUTS (outf, dregs (src1 + 1));
4265 OUTS (outf, ":");
4266 OUTS (outf, imm5 (src1));
4267 OUTS (outf, ")(T");
4268 if (s == 1)
4269 OUTS (outf, ", R)");
4270 else
4271 OUTS (outf, ")");
4272 return 2 * 2;
4273 }
4274 else if (aop == 0 && aopcde == 21)
4275 {
4276 notethat ("( dregs , dregs ) = BYTEOP16P ( dregs_pair , dregs_pair ) aligndir");
4277 OUTS (outf, "(");
4278 OUTS (outf, dregs (dst1));
4279 OUTS (outf, ",");
4280 OUTS (outf, dregs (dst0));
4281 OUTS (outf, ")=BYTEOP16P(");
4282 OUTS (outf, dregs (src0 + 1));
4283 OUTS (outf, ":");
4284 OUTS (outf, imm5 (src0));
4285 OUTS (outf, ",");
4286 OUTS (outf, dregs (src1 + 1));
4287 OUTS (outf, ":");
4288 OUTS (outf, imm5 (src1));
4289 OUTS (outf, ") ");
4290 aligndir (s, outf);
4291 return 2 * 2;
4292 }
4293 else if (aop == 1 && aopcde == 21)
4294 {
4295 notethat ("( dregs , dregs ) = BYTEOP16M ( dregs_pair , dregs_pair ) aligndir");
4296 OUTS (outf, "(");
4297 OUTS (outf, dregs (dst1));
4298 OUTS (outf, ",");
4299 OUTS (outf, dregs (dst0));
4300 OUTS (outf, ")=BYTEOP16M(");
4301 OUTS (outf, dregs (src0 + 1));
4302 OUTS (outf, ":");
4303 OUTS (outf, imm5 (src0));
4304 OUTS (outf, ",");
4305 OUTS (outf, dregs (src1 + 1));
4306 OUTS (outf, ":");
4307 OUTS (outf, imm5 (src1));
4308 OUTS (outf, ") ");
4309 aligndir (s, outf);
4310 return 2 * 2;
4311 }
4312 else if (aop == 2 && aopcde == 7)
4313 {
4314 notethat ("dregs = ABS dregs");
4315 OUTS (outf, dregs (dst0));
4316 OUTS (outf, "= ABS ");
4317 OUTS (outf, dregs (src0));
4318 return 2 * 2;
4319 }
4320 else if (aop == 1 && aopcde == 7)
4321 {
4322 notethat ("dregs = MIN ( dregs , dregs )");
4323 OUTS (outf, dregs (dst0));
4324 OUTS (outf, "=MIN(");
4325 OUTS (outf, dregs (src0));
4326 OUTS (outf, ",");
4327 OUTS (outf, dregs (src1));
4328 OUTS (outf, ")");
4329 return 2 * 2;
4330 }
4331 else if (aop == 0 && aopcde == 7)
4332 {
4333 notethat ("dregs = MAX ( dregs , dregs )");
4334 OUTS (outf, dregs (dst0));
4335 OUTS (outf, "=MAX(");
4336 OUTS (outf, dregs (src0));
4337 OUTS (outf, ",");
4338 OUTS (outf, dregs (src1));
4339 OUTS (outf, ")");
4340 return 2 * 2;
4341 }
4342 else if (aop == 2 && aopcde == 6)
4343 {
4344 notethat ("dregs = ABS dregs (V)");
4345 OUTS (outf, dregs (dst0));
4346 OUTS (outf, "= ABS ");
4347 OUTS (outf, dregs (src0));
4348 OUTS (outf, "(V)");
4349 return 2 * 2;
4350 }
4351 else if (aop == 1 && aopcde == 6)
4352 {
4353 notethat ("dregs = MIN ( dregs , dregs ) (V)");
4354 OUTS (outf, dregs (dst0));
4355 OUTS (outf, "=MIN(");
4356 OUTS (outf, dregs (src0));
4357 OUTS (outf, ",");
4358 OUTS (outf, dregs (src1));
4359 OUTS (outf, ")(V)");
4360 return 2 * 2;
4361 }
4362 else if (aop == 0 && aopcde == 6)
4363 {
4364 notethat ("dregs = MAX ( dregs , dregs ) (V)");
4365 OUTS (outf, dregs (dst0));
4366 OUTS (outf, "=MAX(");
4367 OUTS (outf, dregs (src0));
4368 OUTS (outf, ",");
4369 OUTS (outf, dregs (src1));
4370 OUTS (outf, ")(V)");
4371 return 2 * 2;
4372 }
4373 else if (HL == 1 && aopcde == 1)
4374 {
4375 notethat ("dregs = dregs +|- dregs, dregs = dregs -|+ dregs (amod0, amod2)");
4376 OUTS (outf, dregs (dst1));
4377 OUTS (outf, "=");
4378 OUTS (outf, dregs (src0));
4379 OUTS (outf, "+|-");
4380 OUTS (outf, dregs (src1));
4381 OUTS (outf, ",");
4382 OUTS (outf, dregs (dst0));
4383 OUTS (outf, "=");
4384 OUTS (outf, dregs (src0));
4385 OUTS (outf, "-|+");
4386 OUTS (outf, dregs (src1));
4387 amod0amod2 (s, x, aop, outf);
4388 return 2 * 2;
4389 }
4390 else if (aop == 0 && aopcde == 4)
4391 {
4392 notethat ("dregs = dregs + dregs amod1");
4393 OUTS (outf, dregs (dst0));
4394 OUTS (outf, "=");
4395 OUTS (outf, dregs (src0));
4396 OUTS (outf, "+");
4397 OUTS (outf, dregs (src1));
4398 OUTS (outf, " ");
4399 amod1 (s, x, outf);
4400 return 2 * 2;
4401 }
4402 else if (aop == 0 && aopcde == 0)
4403 {
4404 notethat ("dregs = dregs +|+ dregs amod0");
4405 OUTS (outf, dregs (dst0));
4406 OUTS (outf, "=");
4407 OUTS (outf, dregs (src0));
4408 OUTS (outf, "+|+");
4409 OUTS (outf, dregs (src1));
4410 OUTS (outf, " ");
4411 amod0 (s, x, outf);
4412 return 2 * 2;
4413 }
4414 else if (aop == 0 && aopcde == 24)
4415 {
4416 notethat ("dregs = BYTEPACK ( dregs , dregs )");
4417 OUTS (outf, dregs (dst0));
4418 OUTS (outf, "=BYTEPACK(");
4419 OUTS (outf, dregs (src0));
4420 OUTS (outf, ",");
4421 OUTS (outf, dregs (src1));
4422 OUTS (outf, ")");
4423 return 2 * 2;
4424 }
4425 else if (aop == 1 && aopcde == 24)
4426 {
4427 notethat ("( dregs , dregs ) = BYTEUNPACK dregs_pair aligndir");
4428 OUTS (outf, "(");
4429 OUTS (outf, dregs (dst1));
4430 OUTS (outf, ",");
4431 OUTS (outf, dregs (dst0));
4432 OUTS (outf, ") = BYTEUNPACK ");
4433 OUTS (outf, dregs (src0 + 1));
4434 OUTS (outf, ":");
4435 OUTS (outf, imm5 (src0));
4436 OUTS (outf, " ");
4437 aligndir (s, outf);
4438 return 2 * 2;
4439 }
4440 else if (aopcde == 13)
4441 {
4442 notethat ("( dregs , dregs ) = SEARCH dregs (searchmod)");
4443 OUTS (outf, "(");
4444 OUTS (outf, dregs (dst1));
4445 OUTS (outf, ",");
4446 OUTS (outf, dregs (dst0));
4447 OUTS (outf, ") = SEARCH ");
4448 OUTS (outf, dregs (src0));
4449 OUTS (outf, "(");
4450 searchmod (aop, outf);
4451 OUTS (outf, ")");
4452 return 2 * 2;
4453 }
4454 else
4455 goto illegal_instruction;
4456illegal_instruction:
4457 return 0;
4458}
4459
4460static int
4461decode_dsp32shift_0 (TIword iw0, TIword iw1, disassemble_info *outf)
4462{
4463/* dsp32shift
4464+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4465| 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............|
4466|.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......|
4467+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
4468*/
4469 int HLs = ((iw1 >> DSP32Shift_HLs_bits) & DSP32Shift_HLs_mask);
4470 int sop = ((iw1 >> DSP32Shift_sop_bits) & DSP32Shift_sop_mask);
4471 int src0 = ((iw1 >> DSP32Shift_src0_bits) & DSP32Shift_src0_mask);
4472 int src1 = ((iw1 >> DSP32Shift_src1_bits) & DSP32Shift_src1_mask);
4473 int dst0 = ((iw1 >> DSP32Shift_dst0_bits) & DSP32Shift_dst0_mask);
4474 int sopcde = ((iw0 >> (DSP32Shift_sopcde_bits - 16)) & DSP32Shift_sopcde_mask);
4475 const char *acc01 = (HLs & 1) == 0 ? "A0" : "A1";
4476
4477
4478 if (HLs == 0 && sop == 0 && sopcde == 0)
4479 {
4480 notethat ("dregs_lo = ASHIFT dregs_lo BY dregs_lo");
4481 OUTS (outf, dregs_lo (dst0));
4482 OUTS (outf, "= ASHIFT ");
4483 OUTS (outf, dregs_lo (src1));
4484 OUTS (outf, " BY ");
4485 OUTS (outf, dregs_lo (src0));
4486 return 2 * 2;
4487 }
4488 else if (HLs == 1 && sop == 0 && sopcde == 0)
4489 {
4490 notethat ("dregs_lo = ASHIFT dregs_hi BY dregs_lo");
4491 OUTS (outf, dregs_lo (dst0));
4492 OUTS (outf, "= ASHIFT ");
4493 OUTS (outf, dregs_hi (src1));
4494 OUTS (outf, " BY ");
4495 OUTS (outf, dregs_lo (src0));
4496 return 2 * 2;
4497 }
4498 else if (HLs == 2 && sop == 0 && sopcde == 0)
4499 {
4500 notethat ("dregs_hi = ASHIFT dregs_lo BY dregs_lo");
4501 OUTS (outf, dregs_hi (dst0));
4502 OUTS (outf, "= ASHIFT ");
4503 OUTS (outf, dregs_lo (src1));
4504 OUTS (outf, " BY ");
4505 OUTS (outf, dregs_lo (src0));
4506 return 2 * 2;
4507 }
4508 else if (HLs == 3 && sop == 0 && sopcde == 0)
4509 {
4510 notethat ("dregs_hi = ASHIFT dregs_hi BY dregs_lo");
4511 OUTS (outf, dregs_hi (dst0));
4512 OUTS (outf, "= ASHIFT ");
4513 OUTS (outf, dregs_hi (src1));
4514 OUTS (outf, " BY ");
4515 OUTS (outf, dregs_lo (src0));
4516 return 2 * 2;
4517 }
4518 else if (HLs == 0 && sop == 1 && sopcde == 0)
4519 {
4520 notethat ("dregs_lo = ASHIFT dregs_lo BY dregs_lo (S)");
4521 OUTS (outf, dregs_lo (dst0));
4522 OUTS (outf, "= ASHIFT ");
4523 OUTS (outf, dregs_lo (src1));
4524 OUTS (outf, " BY ");
4525 OUTS (outf, dregs_lo (src0));
4526 OUTS (outf, "(S)");
4527 return 2 * 2;
4528 }
4529 else if (HLs == 1 && sop == 1 && sopcde == 0)
4530 {
4531 notethat ("dregs_lo = ASHIFT dregs_hi BY dregs_lo (S)");
4532 OUTS (outf, dregs_lo (dst0));
4533 OUTS (outf, "= ASHIFT ");
4534 OUTS (outf, dregs_hi (src1));
4535 OUTS (outf, " BY ");
4536 OUTS (outf, dregs_lo (src0));
4537 OUTS (outf, "(S)");
4538 return 2 * 2;
4539 }
4540 else if (HLs == 2 && sop == 1 && sopcde == 0)
4541 {
4542 notethat ("dregs_hi = ASHIFT dregs_lo BY dregs_lo (S)");
4543 OUTS (outf, dregs_hi (dst0));
4544 OUTS (outf, "= ASHIFT ");
4545 OUTS (outf, dregs_lo (src1));
4546 OUTS (outf, " BY ");
4547 OUTS (outf, dregs_lo (src0));
4548 OUTS (outf, "(S)");
4549 return 2 * 2;
4550 }
4551 else if (HLs == 3 && sop == 1 && sopcde == 0)
4552 {
4553 notethat ("dregs_hi = ASHIFT dregs_hi BY dregs_lo (S)");
4554 OUTS (outf, dregs_hi (dst0));
4555 OUTS (outf, "= ASHIFT ");
4556 OUTS (outf, dregs_hi (src1));
4557 OUTS (outf, " BY ");
4558 OUTS (outf, dregs_lo (src0));
4559 OUTS (outf, "(S)");
4560 return 2 * 2;
4561 }
4562 else if (sop == 2 && sopcde == 0)
4563 {
4564 notethat ("dregs_hilo = LSHIFT dregs_hilo BY dregs_lo");
4565 OUTS (outf, (HLs & 2) == 0 ? dregs_lo (dst0) : dregs_hi (dst0));
4566 OUTS (outf, "= LSHIFT ");
4567 OUTS (outf, (HLs & 1) == 0 ? dregs_lo (src1) : dregs_hi (src1));
4568 OUTS (outf, " BY ");
4569 OUTS (outf, dregs_lo (src0));
4570 return 2 * 2;
4571 }
4572 else if (sop == 0 && sopcde == 3)
4573 {
4574 notethat ("An = ASHIFT An BY dregs_lo");
4575 OUTS (outf, acc01);
4576 OUTS (outf, "= ASHIFT ");
4577 OUTS (outf, acc01);
4578 OUTS (outf, " BY ");
4579 OUTS (outf, dregs_lo (src0));
4580 return 2 * 2;
4581 }
4582 else if (sop == 1 && sopcde == 3)
4583 {
4584 notethat ("An = LSHIFT An BY dregs_lo");
4585 OUTS (outf, acc01);
4586 OUTS (outf, "= LSHIFT ");
4587 OUTS (outf, acc01);
4588 OUTS (outf, " BY ");
4589 OUTS (outf, dregs_lo (src0));
4590 return 2 * 2;
4591 }
4592 else if (sop == 2 && sopcde == 3)
4593 {
4594 notethat ("An = ROT An BY dregs_lo");
4595 OUTS (outf, acc01);
4596 OUTS (outf, "= ROT ");
4597 OUTS (outf, acc01);
4598 OUTS (outf, " BY ");
4599 OUTS (outf, dregs_lo (src0));
4600 return 2 * 2;
4601 }
4602 else if (sop == 3 && sopcde == 3)
4603 {
4604 notethat ("dregs = ROT dregs BY dregs_lo");
4605 OUTS (outf, dregs (dst0));
4606 OUTS (outf, "= ROT ");
4607 OUTS (outf, dregs (src1));
4608 OUTS (outf, " BY ");
4609 OUTS (outf, dregs_lo (src0));
4610 return 2 * 2;
4611 }
4612 else if (sop == 1 && sopcde == 1)
4613 {
4614 notethat ("dregs = ASHIFT dregs BY dregs_lo (V, S)");
4615 OUTS (outf, dregs (dst0));
4616 OUTS (outf, "= ASHIFT ");
4617 OUTS (outf, dregs (src1));
4618 OUTS (outf, " BY ");
4619 OUTS (outf, dregs_lo (src0));
4620 OUTS (outf, "(V,S)");
4621 return 2 * 2;
4622 }
4623 else if (sop == 0 && sopcde == 1)
4624 {
4625 notethat ("dregs = ASHIFT dregs BY dregs_lo (V)");
4626 OUTS (outf, dregs (dst0));
4627 OUTS (outf, "= ASHIFT ");
4628 OUTS (outf, dregs (src1));
4629 OUTS (outf, " BY ");
4630 OUTS (outf, dregs_lo (src0));
4631 OUTS (outf, "(V)");
4632 return 2 * 2;
4633 }
4634 else if (sop == 0 && sopcde == 2)
4635 {
4636 notethat ("dregs = ASHIFT dregs BY dregs_lo");
4637 OUTS (outf, dregs (dst0));
4638 OUTS (outf, "= ASHIFT ");
4639 OUTS (outf, dregs (src1));
4640 OUTS (outf, " BY ");
4641 OUTS (outf, dregs_lo (src0));
4642 return 2 * 2;
4643 }
4644 else if (sop == 1 && sopcde == 2)
4645 {
4646 notethat ("dregs = ASHIFT dregs BY dregs_lo (S)");
4647 OUTS (outf, dregs (dst0));
4648 OUTS (outf, "= ASHIFT ");
4649 OUTS (outf, dregs (src1));
4650 OUTS (outf, " BY ");
4651 OUTS (outf, dregs_lo (src0));
4652 OUTS (outf, "(S)");
4653 return 2 * 2;
4654 }
4655 else if (sop == 2 && sopcde == 2)
4656 {
4657 notethat ("dregs = SHIFT dregs BY dregs_lo");
4658 OUTS (outf, dregs (dst0));
4659 OUTS (outf, "=SHIFT ");
4660 OUTS (outf, dregs (src1));
4661 OUTS (outf, " BY ");
4662 OUTS (outf, dregs_lo (src0));
4663 return 2 * 2;
4664 }
4665 else if (sop == 3 && sopcde == 2)
4666 {
4667 notethat ("dregs = ROT dregs BY dregs_lo");
4668 OUTS (outf, dregs (dst0));
4669 OUTS (outf, "= ROT ");
4670 OUTS (outf, dregs (src1));
4671 OUTS (outf, " BY ");
4672 OUTS (outf, dregs_lo (src0));
4673 return 2 * 2;
4674 }
4675 else if (sop == 2 && sopcde == 1)
4676 {
4677 notethat ("dregs = SHIFT dregs BY dregs_lo (V)");
4678 OUTS (outf, dregs (dst0));
4679 OUTS (outf, "=SHIFT ");
4680 OUTS (outf, dregs (src1));
4681 OUTS (outf, " BY ");
4682 OUTS (outf, dregs_lo (src0));
4683 OUTS (outf, "(V)");
4684 return 2 * 2;
4685 }
4686 else if (sop == 0 && sopcde == 4)
4687 {
4688 notethat ("dregs = PACK ( dregs_lo , dregs_lo )");
4689 OUTS (outf, dregs (dst0));
4690 OUTS (outf, "=PACK");
4691 OUTS (outf, "(");
4692 OUTS (outf, dregs_lo (src1));
4693 OUTS (outf, ",");
4694 OUTS (outf, dregs_lo (src0));
4695 OUTS (outf, ")");
4696 return 2 * 2;
4697 }
4698 else if (sop == 1 && sopcde == 4)
4699 {
4700 notethat ("dregs = PACK ( dregs_lo , dregs_hi )");
4701 OUTS (outf, dregs (dst0));
4702 OUTS (outf, "=PACK(");
4703 OUTS (outf, dregs_lo (src1));
4704 OUTS (outf, ",");
4705 OUTS (outf, dregs_hi (src0));
4706 OUTS (outf, ")");
4707 return 2 * 2;
4708 }
4709 else if (sop == 2 && sopcde == 4)
4710 {
4711 notethat ("dregs = PACK ( dregs_hi , dregs_lo )");
4712 OUTS (outf, dregs (dst0));
4713 OUTS (outf, "=PACK(");
4714 OUTS (outf, dregs_hi (src1));
4715 OUTS (outf, ",");
4716 OUTS (outf, dregs_lo (src0));
4717 OUTS (outf, ")");
4718 return 2 * 2;
4719 }
4720 else if (sop == 3 && sopcde == 4)
4721 {
4722 notethat ("dregs = PACK ( dregs_hi , dregs_hi )");
4723 OUTS (outf, dregs (dst0));
4724 OUTS (outf, "=PACK(");
4725 OUTS (outf, dregs_hi (src1));
4726 OUTS (outf, ",");
4727 OUTS (outf, dregs_hi (src0));
4728 OUTS (outf, ")");
4729 return 2 * 2;
4730 }
4731 else if (sop == 0 && sopcde == 5)
4732 {
4733 notethat ("dregs_lo = SIGNBITS dregs");
4734 OUTS (outf, dregs_lo (dst0));
4735 OUTS (outf, "=SIGNBITS ");
4736 OUTS (outf, dregs (src1));
4737 return 2 * 2;
4738 }
4739 else if (sop == 1 && sopcde == 5)
4740 {
4741 notethat ("dregs_lo = SIGNBITS dregs_lo");
4742 OUTS (outf, dregs_lo (dst0));
4743 OUTS (outf, "=SIGNBITS ");
4744 OUTS (outf, dregs_lo (src1));
4745 return 2 * 2;
4746 }
4747 else if (sop == 2 && sopcde == 5)
4748 {
4749 notethat ("dregs_lo = SIGNBITS dregs_hi");
4750 OUTS (outf, dregs_lo (dst0));
4751 OUTS (outf, "=SIGNBITS ");
4752 OUTS (outf, dregs_hi (src1));
4753 return 2 * 2;
4754 }
4755 else if (sop == 0 && sopcde == 6)
4756 {
4757 notethat ("dregs_lo = SIGNBITS A0");
4758 OUTS (outf, dregs_lo (dst0));
4759 OUTS (outf, "=SIGNBITS A0");
4760 return 2 * 2;
4761 }
4762 else if (sop == 1 && sopcde == 6)
4763 {
4764 notethat ("dregs_lo = SIGNBITS A1");
4765 OUTS (outf, dregs_lo (dst0));
4766 OUTS (outf, "=SIGNBITS A1");
4767 return 2 * 2;
4768 }
4769 else if (sop == 3 && sopcde == 6)
4770 {
4771 notethat ("dregs_lo = ONES dregs");
4772 OUTS (outf, dregs_lo (dst0));
4773 OUTS (outf, "=ONES ");
4774 OUTS (outf, dregs (src1));
4775 return 2 * 2;
4776 }
4777 else if (sop == 0 && sopcde == 7)
4778 {
4779 notethat ("dregs_lo = EXPADJ (dregs , dregs_lo)");
4780 OUTS (outf, dregs_lo (dst0));
4781 OUTS (outf, "=EXPADJ (");
4782 OUTS (outf, dregs (src1));
4783 OUTS (outf, ",");
4784 OUTS (outf, dregs_lo (src0));
4785 OUTS (outf, ")");
4786 return 2 * 2;
4787 }
4788 else if (sop == 1 && sopcde == 7)
4789 {
4790 notethat ("dregs_lo = EXPADJ (dregs , dregs_lo) (V)");
4791 OUTS (outf, dregs_lo (dst0));
4792 OUTS (outf, "=EXPADJ (");
4793 OUTS (outf, dregs (src1));
4794 OUTS (outf, ",");
4795 OUTS (outf, dregs_lo (src0));
4796 OUTS (outf, ") (V)");
4797 return 2 * 2;
4798 }
4799 else if (sop == 2 && sopcde == 7)
4800 {
4801 notethat ("dregs_lo = EXPADJ (dregs_lo , dregs_lo)");
4802 OUTS (outf, dregs_lo (dst0));
4803 OUTS (outf, "=EXPADJ (");
4804 OUTS (outf, dregs_lo (src1));
4805 OUTS (outf, ",");
4806 OUTS (outf, dregs_lo (src0));
4807 OUTS (outf, ")");
4808 return 2 * 2;
4809 }
4810 else if (sop == 3 && sopcde == 7)
4811 {
4812 notethat ("dregs_lo = EXPADJ (dregs_hi , dregs_lo)");
4813 OUTS (outf, dregs_lo (dst0));
4814 OUTS (outf, "=EXPADJ (");
4815 OUTS (outf, dregs_hi (src1));
4816 OUTS (outf, ",");
4817 OUTS (outf, dregs_lo (src0));
4818 OUTS (outf, ")");
4819 return 2 * 2;
4820 }
4821 else if (sop == 0 && sopcde == 8)
4822 {
4823 notethat ("BITMUX (dregs , dregs , A0) (ASR)");
4824 OUTS (outf, "BITMUX (");
4825 OUTS (outf, dregs (src0));
4826 OUTS (outf, ",");
4827 OUTS (outf, dregs (src1));
4828 OUTS (outf, ",A0 )(ASR)");
4829 return 2 * 2;
4830 }
4831 else if (sop == 1 && sopcde == 8)
4832 {
4833 notethat ("BITMUX (dregs , dregs , A0) (ASL)");
4834 OUTS (outf, "BITMUX (");
4835 OUTS (outf, dregs (src0));
4836 OUTS (outf, ",");
4837 OUTS (outf, dregs (src1));
4838 OUTS (outf, ",A0 )(ASL)");
4839 return 2 * 2;
4840 }
4841 else if (sop == 0 && sopcde == 9)
4842 {
4843 notethat ("dregs_lo = VIT_MAX (dregs) (ASL)");
4844 OUTS (outf, dregs_lo (dst0));
4845 OUTS (outf, "=VIT_MAX (");
4846 OUTS (outf, dregs (src1));
4847 OUTS (outf, ") (ASL)");
4848 return 2 * 2;
4849 }
4850 else if (sop == 1 && sopcde == 9)
4851 {
4852 notethat ("dregs_lo = VIT_MAX (dregs) (ASR)");
4853 OUTS (outf, dregs_lo (dst0));
4854 OUTS (outf, "=VIT_MAX (");
4855 OUTS (outf, dregs (src1));
4856 OUTS (outf, ") (ASR)");
4857 return 2 * 2;
4858 }
4859 else if (sop == 2 && sopcde == 9)
4860 {
4861 notethat ("dregs = VIT_MAX ( dregs , dregs ) (ASL)");
4862 OUTS (outf, dregs (dst0));
4863 OUTS (outf, "=VIT_MAX(");
4864 OUTS (outf, dregs (src1));
4865 OUTS (outf, ",");
4866 OUTS (outf, dregs (src0));
4867 OUTS (outf, ")(ASL)");
4868 return 2 * 2;
4869 }
4870 else if (sop == 3 && sopcde == 9)
4871 {
4872 notethat ("dregs = VIT_MAX ( dregs , dregs ) (ASR)");
4873 OUTS (outf, dregs (dst0));
4874 OUTS (outf, "=VIT_MAX(");
4875 OUTS (outf, dregs (src1));
4876 OUTS (outf, ",");
4877 OUTS (outf, dregs (src0));
4878 OUTS (outf, ")(ASR)");
4879 return 2 * 2;
4880 }
4881 else if (sop == 0 && sopcde == 10)
4882 {
4883 notethat ("dregs = EXTRACT ( dregs , dregs_lo ) (Z)");
4884 OUTS (outf, dregs (dst0));
4885 OUTS (outf, "=EXTRACT(");
4886 OUTS (outf, dregs (src1));
4887 OUTS (outf, ",");
4888 OUTS (outf, dregs_lo (src0));
4889 OUTS (outf, ") (Z)");
4890 return 2 * 2;
4891 }
4892 else if (sop == 1 && sopcde == 10)
4893 {
4894 notethat ("dregs = EXTRACT ( dregs , dregs_lo ) (X)");
4895 OUTS (outf, dregs (dst0));
4896 OUTS (outf, "=EXTRACT(");
4897 OUTS (outf, dregs (src1));
4898 OUTS (outf, ",");
4899 OUTS (outf, dregs_lo (src0));
4900 OUTS (outf, ")(X)");
4901 return 2 * 2;
4902 }
4903 else if (sop == 2 && sopcde == 10)
4904 {
4905 notethat ("dregs = DEPOSIT ( dregs , dregs )");
4906 OUTS (outf, dregs (dst0));
4907 OUTS (outf, "=DEPOSIT(");
4908 OUTS (outf, dregs (src1));
4909 OUTS (outf, ",");
4910 OUTS (outf, dregs (src0));
4911 OUTS (outf, ")");
4912 return 2 * 2;
4913 }
4914 else if (sop == 3 && sopcde == 10)
4915 {
4916 notethat ("dregs = DEPOSIT ( dregs , dregs ) (X)");
4917 OUTS (outf, dregs (dst0));
4918 OUTS (outf, "=DEPOSIT(");
4919 OUTS (outf, dregs (src1));
4920 OUTS (outf, ",");
4921 OUTS (outf, dregs (src0));
4922 OUTS (outf, ")(X)");
4923 return 2 * 2;
4924 }
4925 else if (sop == 0 && sopcde == 11)
4926 {
4927 notethat ("dregs_lo = CC = BXORSHIFT ( A0 , dregs )");
4928 OUTS (outf, dregs_lo (dst0));
4929 OUTS (outf, "=CC=BXORSHIFT(A0,");
4930 OUTS (outf, dregs (src0));
4931 OUTS (outf, ")");
4932 return 2 * 2;
4933 }
4934 else if (sop == 1 && sopcde == 11)
4935 {
4936 notethat ("dregs_lo = CC = BXOR (A0 , dregs)");
4937 OUTS (outf, dregs_lo (dst0));
4938 OUTS (outf, "=CC=BXOR(A0,");
4939 OUTS (outf, dregs (src0));
4940 OUTS (outf, ")");
4941 return 2 * 2;
4942 }
4943 else if (sop == 0 && sopcde == 12)
4944 {
4945 notethat ("A0 = BXORSHIFT ( A0 , A1 , CC )");
4946 OUTS (outf, "A0=BXORSHIFT(A0,A1 ,CC)");
4947 return 2 * 2;
4948 }
4949 else if (sop == 1 && sopcde == 12)
4950 {
4951 notethat ("dregs_lo = CC = BXOR (A0 , A1 , CC)");
4952 OUTS (outf, dregs_lo (dst0));
4953 OUTS (outf, "=CC=BXOR( A0,A1 ,CC )");
4954 return 2 * 2;
4955 }
4956 else if (sop == 0 && sopcde == 13)
4957 {
4958 notethat ("dregs = ALIGN8 ( dregs , dregs )");
4959 OUTS (outf, dregs (dst0));
4960 OUTS (outf, "=ALIGN8(");
4961 OUTS (outf, dregs (src1));
4962 OUTS (outf, ",");
4963 OUTS (outf, dregs (src0));
4964 OUTS (outf, ")");
4965 return 2 * 2;
4966 }
4967 else if (sop == 1 && sopcde == 13)
4968 {
4969 notethat ("dregs = ALIGN16 ( dregs , dregs )");
4970 OUTS (outf, dregs (dst0));
4971 OUTS (outf, "=ALIGN16(");
4972 OUTS (outf, dregs (src1));
4973 OUTS (outf, ",");
4974 OUTS (outf, dregs (src0));
4975 OUTS (outf, ")");
4976 return 2 * 2;
4977 }
4978 else if (sop == 2 && sopcde == 13)
4979 {
4980 notethat ("dregs = ALIGN24 ( dregs , dregs )");
4981 OUTS (outf, dregs (dst0));
4982 OUTS (outf, "=ALIGN24(");
4983 OUTS (outf, dregs (src1));
4984 OUTS (outf, ",");
4985 OUTS (outf, dregs (src0));
4986 OUTS (outf, ")");
4987 return 2 * 2;
4988 }
4989 else
4990 goto illegal_instruction;
4991illegal_instruction:
4992 return 0;
4993}
4994
4995static int
4996decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf)
4997{
4998/* dsp32shiftimm
4999+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
5000| 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............|
5001|.sop...|.HLs...|.dst0......|.immag.................|.src1......|
5002+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
5003*/
5004 int src1 = ((iw1 >> DSP32ShiftImm_src1_bits) & DSP32ShiftImm_src1_mask);
5005 int sop = ((iw1 >> DSP32ShiftImm_sop_bits) & DSP32ShiftImm_sop_mask);
5006 int bit8 = ((iw1 >> 8) & 0x1);
5007 int immag = ((iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask);
5008 int newimmag = (-(iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask);
5009 int dst0 = ((iw1 >> DSP32ShiftImm_dst0_bits) & DSP32ShiftImm_dst0_mask);
5010 int sopcde = ((iw0 >> (DSP32ShiftImm_sopcde_bits - 16)) & DSP32ShiftImm_sopcde_mask);
5011 int HLs = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask);
5012
5013
5014 if (HLs == 0 && sop == 0 && sopcde == 0)
5015 {
5016 notethat ("dregs_lo = dregs_lo >>> uimm4");
5017 OUTS (outf, dregs_lo (dst0));
5018 OUTS (outf, "=");
5019 OUTS (outf, dregs_lo (src1));
5020 OUTS (outf, ">>>");
5021 OUTS (outf, uimm4 (newimmag));
5022 return 2 * 2;
5023 }
5024 else if (HLs == 1 && sop == 0 && sopcde == 0)
5025 {
5026 notethat ("dregs_lo = dregs_hi >>> uimm4");
5027 OUTS (outf, dregs_lo (dst0));
5028 OUTS (outf, "=");
5029 OUTS (outf, dregs_hi (src1));
5030 OUTS (outf, ">>>");
5031 OUTS (outf, uimm4 (newimmag));
5032 return 2 * 2;
5033 }
5034 else if (HLs == 2 && sop == 0 && sopcde == 0)
5035 {
5036 notethat ("dregs_hi = dregs_lo >>> uimm4");
5037 OUTS (outf, dregs_hi (dst0));
5038 OUTS (outf, "=");
5039 OUTS (outf, dregs_lo (src1));
5040 OUTS (outf, ">>>");
5041 OUTS (outf, uimm4 (newimmag));
5042 return 2 * 2;
5043 }
5044 else if (HLs == 3 && sop == 0 && sopcde == 0)
5045 {
5046 notethat ("dregs_hi = dregs_hi >>> uimm4");
5047 OUTS (outf, dregs_hi (dst0));
5048 OUTS (outf, "=");
5049 OUTS (outf, dregs_hi (src1));
5050 OUTS (outf, ">>>");
5051 OUTS (outf, uimm4 (newimmag));
5052 return 2 * 2;
5053 }
5054 else if (HLs == 0 && sop == 1 && sopcde == 0)
5055 {
5056 notethat ("dregs_lo = dregs_lo << uimm4 (S)");
5057 OUTS (outf, dregs_lo (dst0));
5058 OUTS (outf, "=");
5059 OUTS (outf, dregs_lo (src1));
5060 OUTS (outf, "<<");
5061 OUTS (outf, uimm4 (immag));
5062 OUTS (outf, "(S)");
5063 return 2 * 2;
5064 }
5065 else if (HLs == 1 && sop == 1 && sopcde == 0)
5066 {
5067 notethat ("dregs_lo = dregs_hi << uimm4 (S)");
5068 OUTS (outf, dregs_lo (dst0));
5069 OUTS (outf, "=");
5070 OUTS (outf, dregs_hi (src1));
5071 OUTS (outf, "<<");
5072 OUTS (outf, uimm4 (immag));
5073 OUTS (outf, "(S)");
5074 return 2 * 2;
5075 }
5076 else if (HLs == 2 && sop == 1 && sopcde == 0)
5077 {
5078 notethat ("dregs_hi = dregs_lo << uimm4 (S)");
5079 OUTS (outf, dregs_hi (dst0));
5080 OUTS (outf, "=");
5081 OUTS (outf, dregs_lo (src1));
5082 OUTS (outf, "<<");
5083 OUTS (outf, uimm4 (immag));
5084 OUTS (outf, "(S)");
5085 return 2 * 2;
5086 }
5087 else if (HLs == 3 && sop == 1 && sopcde == 0)
5088 {
5089 notethat ("dregs_hi = dregs_hi << uimm4 (S)");
5090 OUTS (outf, dregs_hi (dst0));
5091 OUTS (outf, "=");
5092 OUTS (outf, dregs_hi (src1));
5093 OUTS (outf, "<<");
5094 OUTS (outf, uimm4 (immag));
5095 OUTS (outf, "(S)");
5096 return 2 * 2;
5097 }
5098 else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 0)
5099 {
5100 notethat ("dregs_lo = dregs_lo << uimm4");
5101 OUTS (outf, dregs_lo (dst0));
5102 OUTS (outf, "=");
5103 OUTS (outf, dregs_lo (src1));
5104 OUTS (outf, "<<");
5105 OUTS (outf, uimm4 (immag));
5106 return 2 * 2;
5107 }
5108 else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 1)
5109 {
5110 notethat ("dregs_lo = dregs_lo >> uimm4");
5111 OUTS (outf, dregs_lo (dst0));
5112 OUTS (outf, "=");
5113 OUTS (outf, dregs_lo (src1));
5114 OUTS (outf, ">>");
5115 OUTS (outf, uimm4 (newimmag));
5116 return 2 * 2;
5117 }
5118 else if (HLs == 1 && sop == 2 && sopcde == 0)
5119 {
5120 notethat ("dregs_lo = dregs_hi >> uimm4");
5121 OUTS (outf, dregs_lo (dst0));
5122 OUTS (outf, "=");
5123 OUTS (outf, dregs_hi (src1));
5124 OUTS (outf, ">>");
5125 OUTS (outf, uimm4 (newimmag));
5126 return 2 * 2;
5127 }
5128 else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 1)
5129 {
5130 notethat ("dregs_hi = dregs_lo >> uimm4");
5131 OUTS (outf, dregs_hi (dst0));
5132 OUTS (outf, "=");
5133 OUTS (outf, dregs_lo (src1));
5134 OUTS (outf, ">>");
5135 OUTS (outf, uimm4 (newimmag));
5136 return 2 * 2;
5137 }
5138 else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 0)
5139 {
5140 notethat ("dregs_hi = dregs_lo << uimm4");
5141 OUTS (outf, dregs_hi (dst0));
5142 OUTS (outf, "=");
5143 OUTS (outf, dregs_lo (src1));
5144 OUTS (outf, "<<");
5145 OUTS (outf, uimm4 (immag));
5146 return 2 * 2;
5147 }
5148 else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 1)
5149 {
5150 notethat ("dregs_hi = dregs_hi >> uimm4");
5151 OUTS (outf, dregs_hi (dst0));
5152 OUTS (outf, "=");
5153 OUTS (outf, dregs_hi (src1));
5154 OUTS (outf, ">>");
5155 OUTS (outf, uimm4 (newimmag));
5156 return 2 * 2;
5157 }
5158 else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 0)
5159 {
5160 notethat ("dregs_hi = dregs_hi << uimm4");
5161 OUTS (outf, dregs_hi (dst0));
5162 OUTS (outf, "=");
5163 OUTS (outf, dregs_hi (src1));
5164 OUTS (outf, "<<");
5165 OUTS (outf, uimm4 (immag));
5166 return 2 * 2;
5167 }
5168 else if (sop == 2 && sopcde == 3 && HLs == 1)
5169 {
5170 notethat ("A1 = ROT A1 BY imm6");
5171 OUTS (outf, "A1= ROT A1 BY ");
5172 OUTS (outf, imm6 (immag));
5173 return 2 * 2;
5174 }
5175 else if (sop == 0 && sopcde == 3 && HLs == 0 && bit8 == 0)
5176 {
5177 notethat ("A0 = A0 << uimm5");
5178 OUTS (outf, "A0=A0<<");
5179 OUTS (outf, uimm5 (immag));
5180 return 2 * 2;
5181 }
5182 else if (sop == 0 && sopcde == 3 && HLs == 0 && bit8 == 1)
5183 {
5184 notethat ("A0 = A0 >>> uimm5");
5185 OUTS (outf, "A0=A0>>>");
5186 OUTS (outf, uimm5 (newimmag));
5187 return 2 * 2;
5188 }
5189 else if (sop == 0 && sopcde == 3 && HLs == 1 && bit8 == 0)
5190 {
5191 notethat ("A1 = A1 << uimm5");
5192 OUTS (outf, "A1=A1<<");
5193 OUTS (outf, uimm5 (immag));
5194 return 2 * 2;
5195 }
5196 else if (sop == 0 && sopcde == 3 && HLs == 1 && bit8 == 1)
5197 {
5198 notethat ("A1 = A1 >>> uimm5");
5199 OUTS (outf, "A1=A1>>>");
5200 OUTS (outf, uimm5 (newimmag));
5201 return 2 * 2;
5202 }
5203 else if (sop == 1 && sopcde == 3 && HLs == 0)
5204 {
5205 notethat ("A0 = A0 >> uimm5");
5206 OUTS (outf, "A0=A0>>");
5207 OUTS (outf, uimm5 (newimmag));
5208 return 2 * 2;
5209 }
5210 else if (sop == 1 && sopcde == 3 && HLs == 1)
5211 {
5212 notethat ("A1 = A1 >> uimm5");
5213 OUTS (outf, "A1=A1>>");
5214 OUTS (outf, uimm5 (newimmag));
5215 return 2 * 2;
5216 }
5217 else if (sop == 2 && sopcde == 3 && HLs == 0)
5218 {
5219 notethat ("A0 = ROT A0 BY imm6");
5220 OUTS (outf, "A0= ROT A0 BY ");
5221 OUTS (outf, imm6 (immag));
5222 return 2 * 2;
5223 }
5224 else if (sop == 1 && sopcde == 1 && bit8 == 0)
5225 {
5226 notethat ("dregs = dregs << uimm5 (V, S)");
5227 OUTS (outf, dregs (dst0));
5228 OUTS (outf, "=");
5229 OUTS (outf, dregs (src1));
5230 OUTS (outf, "<<");
5231 OUTS (outf, uimm5 (immag));
5232 OUTS (outf, " (V, S)");
5233 return 2 * 2;
5234 }
5235 else if (sop == 1 && sopcde == 1 && bit8 == 1)
5236 {
5237 notethat ("dregs = dregs >>> uimm5 (V)");
5238 OUTS (outf, dregs (dst0));
5239 OUTS (outf, "=");
5240 OUTS (outf, dregs (src1));
5241 OUTS (outf, ">>>");
5242 OUTS (outf, imm5 (-immag));
5243 OUTS (outf, " (V)");
5244 return 2 * 2;
5245 }
5246 else if (sop == 2 && sopcde == 1 && bit8 == 1)
5247 {
5248 notethat ("dregs = dregs >> uimm5 (V)");
5249 OUTS (outf, dregs (dst0));
5250 OUTS (outf, "=");
5251 OUTS (outf, dregs (src1));
5252 OUTS (outf, " >> ");
5253 OUTS (outf, uimm5 (newimmag));
5254 OUTS (outf, " (V)");
5255 return 2 * 2;
5256 }
5257 else if (sop == 2 && sopcde == 1 && bit8 == 0)
5258 {
5259 notethat ("dregs = dregs << imm5 (V)");
5260 OUTS (outf, dregs (dst0));
5261 OUTS (outf, "=");
5262 OUTS (outf, dregs (src1));
5263 OUTS (outf, "<<");
5264 OUTS (outf, imm5 (immag));
5265 OUTS (outf, " (V)");
5266 return 2 * 2;
5267 }
5268 else if (sop == 0 && sopcde == 1)
5269 {
5270 notethat ("dregs = dregs >>> uimm5 (V)");
5271 OUTS (outf, dregs (dst0));
5272 OUTS (outf, "=");
5273 OUTS (outf, dregs (src1));
5274 OUTS (outf, ">>>");
5275 OUTS (outf, uimm5 (newimmag));
5276 OUTS (outf, " (V)");
5277 return 2 * 2;
5278 }
5279 else if (sop == 1 && sopcde == 2)
5280 {
5281 notethat ("dregs = dregs << uimm5 (S)");
5282 OUTS (outf, dregs (dst0));
5283 OUTS (outf, "=");
5284 OUTS (outf, dregs (src1));
5285 OUTS (outf, "<<");
5286 OUTS (outf, uimm5 (immag));
5287 OUTS (outf, "(S)");
5288 return 2 * 2;
5289 }
5290 else if (sop == 2 && sopcde == 2 && bit8 == 1)
5291 {
5292 notethat ("dregs = dregs >> uimm5");
5293 OUTS (outf, dregs (dst0));
5294 OUTS (outf, "=");
5295 OUTS (outf, dregs (src1));
5296 OUTS (outf, ">>");
5297 OUTS (outf, uimm5 (newimmag));
5298 return 2 * 2;
5299 }
5300 else if (sop == 2 && sopcde == 2 && bit8 == 0)
5301 {
5302 notethat ("dregs = dregs << uimm5");
5303 OUTS (outf, dregs (dst0));
5304 OUTS (outf, "=");
5305 OUTS (outf, dregs (src1));
5306 OUTS (outf, "<<");
5307 OUTS (outf, uimm5 (immag));
5308 return 2 * 2;
5309 }
5310 else if (sop == 3 && sopcde == 2)
5311 {
5312 notethat ("dregs = ROT dregs BY imm6");
5313 OUTS (outf, dregs (dst0));
5314 OUTS (outf, "= ROT ");
5315 OUTS (outf, dregs (src1));
5316 OUTS (outf, " BY ");
5317 OUTS (outf, imm6 (immag));
5318 return 2 * 2;
5319 }
5320 else if (sop == 0 && sopcde == 2)
5321 {
5322 notethat ("dregs = dregs >>> uimm5");
5323 OUTS (outf, dregs (dst0));
5324 OUTS (outf, "=");
5325 OUTS (outf, dregs (src1));
5326 OUTS (outf, ">>>");
5327 OUTS (outf, uimm5 (newimmag));
5328 return 2 * 2;
5329 }
5330 else
5331 goto illegal_instruction;
5332illegal_instruction:
5333 return 0;
5334}
5335
5336static int
5337decode_pseudoDEBUG_0 (TIword iw0, disassemble_info *outf)
5338{
5339/* pseudoDEBUG
5340+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
5341| 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......|
5342+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
5343*/
5344 int fn = ((iw0 >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask);
5345 int grp = ((iw0 >> PseudoDbg_grp_bits) & PseudoDbg_grp_mask);
5346 int reg = ((iw0 >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask);
5347
5348 if (reg == 0 && fn == 3)
5349 {
5350 notethat ("DBG A0");
5351 OUTS (outf, "DBG A0");
5352 return 1 * 2;
5353 }
5354 else if (reg == 1 && fn == 3)
5355 {
5356 notethat ("DBG A1");
5357 OUTS (outf, "DBG A1");
5358 return 1 * 2;
5359 }
5360 else if (reg == 3 && fn == 3)
5361 {
5362 notethat ("ABORT");
5363 OUTS (outf, "ABORT");
5364 return 1 * 2;
5365 }
5366 else if (reg == 4 && fn == 3)
5367 {
5368 notethat ("HLT");
5369 OUTS (outf, "HLT");
5370 return 1 * 2;
5371 }
5372 else if (reg == 5 && fn == 3)
5373 {
5374 notethat ("DBGHALT");
5375 OUTS (outf, "DBGHALT");
5376 return 1 * 2;
5377 }
5378 else if (reg == 6 && fn == 3)
5379 {
5380 notethat ("DBGCMPLX ( dregs )");
5381 OUTS (outf, "DBGCMPLX(");
5382 OUTS (outf, dregs (grp));
5383 OUTS (outf, ")");
5384 return 1 * 2;
5385 }
5386 else if (reg == 7 && fn == 3)
5387 {
5388 notethat ("DBG");
5389 OUTS (outf, "DBG");
5390 return 1 * 2;
5391 }
5392 else if (grp == 0 && fn == 2)
5393 {
5394 notethat ("OUTC dregs");
5395 OUTS (outf, "OUTC");
5396 OUTS (outf, dregs (reg));
5397 return 1 * 2;
5398 }
5399 else if (fn == 0)
5400 {
5401 notethat ("DBG allregs");
5402 OUTS (outf, "DBG");
5403 OUTS (outf, allregs (reg, grp));
5404 return 1 * 2;
5405 }
5406 else if (fn == 1)
5407 {
5408 notethat ("PRNT allregs");
5409 OUTS (outf, "PRNT");
5410 OUTS (outf, allregs (reg, grp));
5411 return 1 * 2;
5412 }
5413 else
5414 goto illegal_instruction;
5415illegal_instruction:
5416 return 0;
5417}
5418
5419static int
5420decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf)
5421{
5422/* pseudodbg_assert
5423+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
5424| 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...|
5425|.expected......................................................|
5426+---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+
5427*/
5428 int expected = ((iw1 >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask);
5429 int dbgop = ((iw0 >> (PseudoDbg_Assert_dbgop_bits - 16)) & PseudoDbg_Assert_dbgop_mask);
5430 int regtest = ((iw0 >> (PseudoDbg_Assert_regtest_bits - 16)) & PseudoDbg_Assert_regtest_mask);
5431
5432 if (dbgop == 0)
5433 {
5434 notethat ("DBGA ( dregs_lo , uimm16 )");
5435 OUTS (outf, "DBGA(");
5436 OUTS (outf, dregs_lo (regtest));
5437 OUTS (outf, ",");
5438 OUTS (outf, uimm16 (expected));
5439 OUTS (outf, ")");
5440 return 2 * 2;
5441 }
5442 else if (dbgop == 1)
5443 {
5444 notethat ("DBGA ( dregs_hi , uimm16 )");
5445 OUTS (outf, "DBGA(");
5446 OUTS (outf, dregs_hi (regtest));
5447 OUTS (outf, ",");
5448 OUTS (outf, uimm16 (expected));
5449 OUTS (outf, ")");
5450 return 2 * 2;
5451 }
5452 else if (dbgop == 2)
5453 {
5454 notethat ("DBGAL ( dregs , uimm16 )");
5455 OUTS (outf, "DBGAL(");
5456 OUTS (outf, dregs (regtest));
5457 OUTS (outf, ",");
5458 OUTS (outf, uimm16 (expected));
5459 OUTS (outf, ")");
5460 return 2 * 2;
5461 }
5462 else if (dbgop == 3)
5463 {
5464 notethat ("DBGAH ( dregs , uimm16 )");
5465 OUTS (outf, "DBGAH(");
5466 OUTS (outf, dregs (regtest));
5467 OUTS (outf, ",");
5468 OUTS (outf, uimm16 (expected));
5469 OUTS (outf, ")");
5470 return 2 * 2;
5471 }
5472 else
5473 goto illegal_instruction;
5474illegal_instruction:
5475 return 0;
5476}
5477
5478int
5479_print_insn_bfin (bfd_vma pc, disassemble_info *outf)
5480{
5481
5482 bfd_byte buf[4];
5483 TIword iw0;
5484 TIword iw1;
5485 int status;
5486 status = (*outf->read_memory_func) (pc & ~0x1, buf, 2, outf);
5487 status = (*outf->read_memory_func) ((pc + 2) & ~0x1, buf + 2, 2, outf);
5488
5489 iw0 = bfd_getl16 (buf);
5490 iw1 = bfd_getl16 (buf + 2);
5491
5492 if ((iw0 & 0xf7ff) == 0xc003 && iw1 == 0x1800)
5493 {
5494 OUTS (outf, "mnop");
5495 return 4;
5496 }
5497 else if ((iw0 & 0xff00) == 0x0000)
5498 {
5499 int rv = decode_ProgCtrl_0 (iw0, outf);
5500 if (rv)
5501 return rv;
5502 goto illegal_instruction;
5503 }
5504 else if ((iw0 & 0xffc0) == 0x0240)
5505 {
5506 int rv = decode_CaCTRL_0 (iw0, outf);
5507 if (rv)
5508 return rv;
5509 goto illegal_instruction;
5510 }
5511 else if ((iw0 & 0xff80) == 0x0100)
5512 {
5513 int rv = decode_PushPopReg_0 (iw0, outf);
5514 if (rv)
5515 return rv;
5516 goto illegal_instruction;
5517 }
5518 else if ((iw0 & 0xfe00) == 0x0400)
5519 {
5520 int rv = decode_PushPopMultiple_0 (iw0, outf);
5521 if (rv)
5522 return rv;
5523 goto illegal_instruction;
5524 }
5525 else if ((iw0 & 0xfe00) == 0x0600)
5526 {
5527 int rv = decode_ccMV_0 (iw0, outf);
5528 if (rv)
5529 return rv;
5530 goto illegal_instruction;
5531 }
5532 else if ((iw0 & 0xf800) == 0x0800)
5533 {
5534 int rv = decode_CCflag_0 (iw0, outf);
5535 if (rv)
5536 return rv;
5537 goto illegal_instruction;
5538 }
5539 else if ((iw0 & 0xffe0) == 0x0200)
5540 {
5541 int rv = decode_CC2dreg_0 (iw0, outf);
5542 if (rv)
5543 return rv;
5544 goto illegal_instruction;
5545 }
5546 else if ((iw0 & 0xff00) == 0x0300)
5547 {
5548 int rv = decode_CC2stat_0 (iw0, outf);
5549 if (rv)
5550 return rv;
5551 goto illegal_instruction;
5552 }
5553 else if ((iw0 & 0xf000) == 0x1000)
5554 {
5555 int rv = decode_BRCC_0 (iw0, pc, outf);
5556 if (rv)
5557 return rv;
5558 goto illegal_instruction;
5559 }
5560 else if ((iw0 & 0xf000) == 0x2000)
5561 {
5562 int rv = decode_UJUMP_0 (iw0, pc, outf);
5563 if (rv)
5564 return rv;
5565 goto illegal_instruction;
5566 }
5567 else if ((iw0 & 0xf000) == 0x3000)
5568 {
5569 int rv = decode_REGMV_0 (iw0, outf);
5570 if (rv)
5571 return rv;
5572 goto illegal_instruction;
5573 }
5574 else if ((iw0 & 0xfc00) == 0x4000)
5575 {
5576 int rv = decode_ALU2op_0 (iw0, outf);
5577 if (rv)
5578 return rv;
5579 goto illegal_instruction;
5580 }
5581 else if ((iw0 & 0xfe00) == 0x4400)
5582 {
5583 int rv = decode_PTR2op_0 (iw0, outf);
5584 if (rv)
5585 return rv;
5586 goto illegal_instruction;
5587 }
5588 else if ((iw0 & 0xf800) == 0x4800)
5589 {
5590 int rv = decode_LOGI2op_0 (iw0, outf);
5591 if (rv)
5592 return rv;
5593 goto illegal_instruction;
5594 }
5595 else if ((iw0 & 0xf000) == 0x5000)
5596 {
5597 int rv = decode_COMP3op_0 (iw0, outf);
5598 if (rv)
5599 return rv;
5600 goto illegal_instruction;
5601 }
5602 else if ((iw0 & 0xf800) == 0x6000)
5603 {
5604 int rv = decode_COMPI2opD_0 (iw0, outf);
5605 if (rv)
5606 return rv;
5607 goto illegal_instruction;
5608 }
5609 else if ((iw0 & 0xf800) == 0x6800)
5610 {
5611 int rv = decode_COMPI2opP_0 (iw0, outf);
5612 if (rv)
5613 return rv;
5614 goto illegal_instruction;
5615 }
5616 else if ((iw0 & 0xf000) == 0x8000)
5617 {
5618 int rv = decode_LDSTpmod_0 (iw0, outf);
5619 if (rv)
5620 return rv;
5621 goto illegal_instruction;
5622 }
5623 else if ((iw0 & 0xff60) == 0x9e60)
5624 {
5625 int rv = decode_dagMODim_0 (iw0, outf);
5626 if (rv)
5627 return rv;
5628 goto illegal_instruction;
5629 }
5630 else if ((iw0 & 0xfff0) == 0x9f60)
5631 {
5632 int rv = decode_dagMODik_0 (iw0, outf);
5633 if (rv)
5634 return rv;
5635 goto illegal_instruction;
5636 }
5637 else if ((iw0 & 0xfc00) == 0x9c00)
5638 {
5639 int rv = decode_dspLDST_0 (iw0, outf);
5640 if (rv)
5641 return rv;
5642 goto illegal_instruction;
5643 }
5644 else if ((iw0 & 0xf000) == 0x9000)
5645 {
5646 int rv = decode_LDST_0 (iw0, outf);
5647 if (rv)
5648 return rv;
5649 goto illegal_instruction;
5650 }
5651 else if ((iw0 & 0xfc00) == 0xb800)
5652 {
5653 int rv = decode_LDSTiiFP_0 (iw0, outf);
5654 if (rv)
5655 return rv;
5656 goto illegal_instruction;
5657 }
5658 else if ((iw0 & 0xe000) == 0xA000)
5659 {
5660 int rv = decode_LDSTii_0 (iw0, outf);
5661 if (rv)
5662 return rv;
5663 goto illegal_instruction;
5664 }
5665 else if ((iw0 & 0xff80) == 0xe080 && (iw1 & 0x0C00) == 0x0000)
5666 {
5667 int rv = decode_LoopSetup_0 (iw0, iw1, pc, outf);
5668 if (rv)
5669 return rv;
5670 goto illegal_instruction;
5671 }
5672 else if ((iw0 & 0xff00) == 0xe100 && (iw1 & 0x0000) == 0x0000)
5673 {
5674 int rv = decode_LDIMMhalf_0 (iw0, iw1, outf);
5675 if (rv)
5676 return rv;
5677 goto illegal_instruction;
5678 }
5679 else if ((iw0 & 0xfe00) == 0xe200 && (iw1 & 0x0000) == 0x0000)
5680 {
5681 int rv = decode_CALLa_0 (iw0, iw1, pc, outf);
5682 if (rv)
5683 return rv;
5684 goto illegal_instruction;
5685 }
5686 else if ((iw0 & 0xfc00) == 0xe400 && (iw1 & 0x0000) == 0x0000)
5687 {
5688 int rv = decode_LDSTidxI_0 (iw0, iw1, outf);
5689 if (rv)
5690 return rv;
5691 goto illegal_instruction;
5692 }
5693 else if ((iw0 & 0xfffe) == 0xe800 && (iw1 & 0x0000) == 0x0000)
5694 {
5695 int rv = decode_linkage_0 (iw0, iw1, outf);
5696 if (rv)
5697 return rv;
5698 goto illegal_instruction;
5699 }
5700 else if ((iw0 & 0xf600) == 0xc000 && (iw1 & 0x0000) == 0x0000)
5701 {
5702 int rv = decode_dsp32mac_0 (iw0, iw1, outf);
5703 if (rv)
5704 return rv;
5705 goto illegal_instruction;
5706 }
5707 else if ((iw0 & 0xf600) == 0xc200 && (iw1 & 0x0000) == 0x0000)
5708 {
5709 int rv = decode_dsp32mult_0 (iw0, iw1, outf);
5710 if (rv)
5711 return rv;
5712 goto illegal_instruction;
5713 }
5714 else if ((iw0 & 0xf7c0) == 0xc400 && (iw1 & 0x0000) == 0x0000)
5715 {
5716 int rv = decode_dsp32alu_0 (iw0, iw1, outf);
5717 if (rv)
5718 return rv;
5719 goto illegal_instruction;
5720 }
5721 else if ((iw0 & 0xf780) == 0xc600 && (iw1 & 0x01c0) == 0x0000)
5722 {
5723 int rv = decode_dsp32shift_0 (iw0, iw1, outf);
5724 if (rv)
5725 return rv;
5726 goto illegal_instruction;
5727 }
5728 else if ((iw0 & 0xf780) == 0xc680 && (iw1 & 0x0000) == 0x0000)
5729 {
5730 int rv = decode_dsp32shiftimm_0 (iw0, iw1, outf);
5731 if (rv)
5732 return rv;
5733 goto illegal_instruction;
5734 }
5735 else if ((iw0 & 0xff00) == 0xf800)
5736 {
5737 int rv = decode_pseudoDEBUG_0 (iw0, outf);
5738 if (rv)
5739 return rv;
5740 goto illegal_instruction;
5741#if 0
5742 }
5743 else if ((iw0 & 0xFF00) == 0xF900)
5744 {
5745
5746 int rv = decode_pseudoOChar_0 (iw0, iw1, pc, outf);
5747 if (rv)
5748 return rv;
5749 goto illegal_instruction;
5750#endif
5751 }
5752 else if ((iw0 & 0xFFC0) == 0xf000 && (iw1 & 0x0000) == 0x0000)
5753 {
5754 int rv = decode_pseudodbg_assert_0 (iw0, iw1, outf);
5755 if (rv)
5756 return rv;
5757 goto illegal_instruction;
5758 }
5759
5760illegal_instruction:
5761 return 0;
5762}
5763
5764
5765int
5766print_insn_bfin (bfd_vma pc, disassemble_info *outf)
5767{
471e4e36
JZ		 5768 bfd_byte buf[2];
5769 unsigned short iw0;
5770 int status;
4b7f6baa 5771 int count = 0;
471e4e36
JZ		 5772
5773 status = (*outf->read_memory_func) (pc & ~0x01, buf, 2, outf);
5774 iw0 = bfd_getl16 (buf);
4b7f6baa
CM		 5775
5776 count += _print_insn_bfin (pc, outf);
471e4e36 5777
4b7f6baa 5778 /* Proper display of multiple issue instructions. */
471e4e36 5779
4b7f6baa
CM		 5780 if ((iw0 & 0xc000) == 0xc000 && (iw0 & BIT_MULTI_INS)
5781 && ((iw0 & 0xe800) != 0xe800 /* not Linkage */ ))
5782 {
5783 outf->fprintf_func (outf->stream, " || ");
5784 count += _print_insn_bfin (pc + 4, outf);
5785 outf->fprintf_func (outf->stream, " || ");
5786 count += _print_insn_bfin (pc + 6, outf);
5787 }
5788 if (count == 0)
5789 {
5790 outf->fprintf_func (outf->stream, "ILLEGAL");
5791 return 2;
5792 }
5793 outf->fprintf_func (outf->stream, ";");
5794 return count;
5795}
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