[thirdparty/binutils-gdb.git] / opcodes / cgen-asm.in

/* Assembler interface for targets using CGEN. -*- C -*-
   CGEN: Cpu tools GENerator

THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-asm.in isn't

Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.

This file is part of the GNU Binutils and GDB, the GNU debugger.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */

/* ??? Eventually more and more of this stuff can go to cpu-independent files.
   Keep that in mind.  */

#include "sysdep.h"
#include <ctype.h>
#include <stdio.h>
#include "ansidecl.h"
#include "bfd.h"
#include "symcat.h"
#include "@prefix@-desc.h"
#include "@prefix@-opc.h"
#include "opintl.h"

#undef min
#define min(a,b) ((a) < (b) ? (a) : (b))
#undef max
#define max(a,b) ((a) > (b) ? (a) : (b))

static const char * parse_insn_normal
     PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *));
\f
/* -- assembler routines inserted here */
\f
/* Default insn parser.

   The syntax string is scanned and operands are parsed and stored in FIELDS.
   Relocs are queued as we go via other callbacks.

   ??? Note that this is currently an all-or-nothing parser.  If we fail to
   parse the instruction, we return 0 and the caller will start over from
   the beginning.  Backtracking will be necessary in parsing subexpressions,
   but that can be handled there.  Not handling backtracking here may get
   expensive in the case of the m68k.  Deal with later.

   Returns NULL for success, an error message for failure.
*/

static const char *
parse_insn_normal (cd, insn, strp, fields)
     CGEN_CPU_DESC cd;
     const CGEN_INSN *insn;
     const char **strp;
     CGEN_FIELDS *fields;
{
  /* ??? Runtime added insns not handled yet.  */
  const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
  const char *str = *strp;
  const char *errmsg;
  const char *p;
  const CGEN_SYNTAX_CHAR_TYPE * syn;
#ifdef CGEN_MNEMONIC_OPERANDS
  /* FIXME: wip */
  int past_opcode_p;
#endif

  /* For now we assume the mnemonic is first (there are no leading operands).
     We can parse it without needing to set up operand parsing.
     GAS's input scrubber will ensure mnemonics are lowercase, but we may
     not be called from GAS.  */
  p = CGEN_INSN_MNEMONIC (insn);
  while (*p && tolower (*p) == tolower (*str))
    ++p, ++str;

  if (* p)
    return _("unrecognized instruction");

#ifndef CGEN_MNEMONIC_OPERANDS
  if (* str && !isspace (* str))
    return _("unrecognized instruction");
#endif

  CGEN_INIT_PARSE (cd);
  cgen_init_parse_operand (cd);
#ifdef CGEN_MNEMONIC_OPERANDS
  past_opcode_p = 0;
#endif

  /* We don't check for (*str != '\0') here because we want to parse
     any trailing fake arguments in the syntax string.  */
  syn = CGEN_SYNTAX_STRING (syntax);

  /* Mnemonics come first for now, ensure valid string.  */
  if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
    abort ();

  ++syn;

  while (* syn != 0)
    {
      /* Non operand chars must match exactly.  */
      if (CGEN_SYNTAX_CHAR_P (* syn))
	{
	  /* FIXME: While we allow for non-GAS callers above, we assume the
	     first char after the mnemonic part is a space.  */
	  /* FIXME: We also take inappropriate advantage of the fact that
	     GAS's input scrubber will remove extraneous blanks.  */
	  if (tolower (*str) == tolower (CGEN_SYNTAX_CHAR (* syn)))
	    {
#ifdef CGEN_MNEMONIC_OPERANDS
	      if (CGEN_SYNTAX_CHAR(* syn) == ' ')
		past_opcode_p = 1;
#endif
	      ++ syn;
	      ++ str;
	    }
	  else if (*str)
	    {
	      /* Syntax char didn't match.  Can't be this insn.  */
	      static char msg [80];
	      /* xgettext:c-format */
	      sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
		       CGEN_SYNTAX_CHAR(*syn), *str);
	      return msg;
	    }
	  else
	    {
	      /* Ran out of input.  */
	      static char msg [80];
	      /* xgettext:c-format */
	      sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
		       CGEN_SYNTAX_CHAR(*syn));
	      return msg;
	    }
	  continue;
	}

      /* We have an operand of some sort.  */
      errmsg = @arch@_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
					  &str, fields);
      if (errmsg)
	return errmsg;

      /* Done with this operand, continue with next one.  */
      ++ syn;
    }

  /* If we're at the end of the syntax string, we're done.  */
  if (* syn == 0)
    {
      /* FIXME: For the moment we assume a valid `str' can only contain
	 blanks now.  IE: We needn't try again with a longer version of
	 the insn and it is assumed that longer versions of insns appear
	 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3).  */
      while (isspace (* str))
	++ str;

      if (* str != '\0')
	return _("junk at end of line"); /* FIXME: would like to include `str' */

      return NULL;
    }

  /* We couldn't parse it.  */
  return _("unrecognized instruction");
}
\f
/* Main entry point.
   This routine is called for each instruction to be assembled.
   STR points to the insn to be assembled.
   We assume all necessary tables have been initialized.
   The assembled instruction, less any fixups, is stored in BUF.
   Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
   still needs to be converted to target byte order, otherwise BUF is an array
   of bytes in target byte order.
   The result is a pointer to the insn's entry in the opcode table,
   or NULL if an error occured (an error message will have already been
   printed).

   Note that when processing (non-alias) macro-insns,
   this function recurses.

   ??? It's possible to make this cpu-independent.
   One would have to deal with a few minor things.
   At this point in time doing so would be more of a curiosity than useful
   [for example this file isn't _that_ big], but keeping the possibility in
   mind helps keep the design clean.  */

const CGEN_INSN *
@arch@_cgen_assemble_insn (cd, str, fields, buf, errmsg)
     CGEN_CPU_DESC cd;
     const char *str;
     CGEN_FIELDS *fields;
     CGEN_INSN_BYTES_PTR buf;
     char **errmsg;
{
  const char *start;
  CGEN_INSN_LIST *ilist;
  const char *parse_errmsg = NULL;
  const char *insert_errmsg = NULL;

  /* Skip leading white space.  */
  while (isspace (* str))
    ++ str;

  /* The instructions are stored in hashed lists.
     Get the first in the list.  */
  ilist = CGEN_ASM_LOOKUP_INSN (cd, str);

  /* Keep looking until we find a match.  */

  start = str;
  for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
    {
      const CGEN_INSN *insn = ilist->insn;

#ifdef CGEN_VALIDATE_INSN_SUPPORTED 
      /* not usually needed as unsupported opcodes shouldn't be in the hash lists */
      /* Is this insn supported by the selected cpu?  */
      if (! @arch@_cgen_insn_supported (cd, insn))
	continue;
#endif

      /* If the RELAX attribute is set, this is an insn that shouldn't be
	 chosen immediately.  Instead, it is used during assembler/linker
	 relaxation if possible.  */
      if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
	continue;

      str = start;

      /* Allow parse/insert handlers to obtain length of insn.  */
      CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);

      parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
      if (parse_errmsg != NULL)
	continue;

      /* ??? 0 is passed for `pc' */
      insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
						 (bfd_vma) 0);
      if (insert_errmsg != NULL)
        continue;

      /* It is up to the caller to actually output the insn and any
         queued relocs.  */
      return insn;
    }

  {
    static char errbuf[150];
#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
    const char *tmp_errmsg;

    /* If requesting verbose error messages, use insert_errmsg.
       Failing that, use parse_errmsg */
    tmp_errmsg = (insert_errmsg ? insert_errmsg :
		  parse_errmsg ? parse_errmsg :
		  _("unrecognized instruction"));

    if (strlen (start) > 50)
      /* xgettext:c-format */
      sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
    else 
      /* xgettext:c-format */
      sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
#else
    if (strlen (start) > 50)
      /* xgettext:c-format */
      sprintf (errbuf, _("bad instruction `%.50s...'"), start);
    else 
      /* xgettext:c-format */
      sprintf (errbuf, _("bad instruction `%.50s'"), start);
#endif
      
    *errmsg = errbuf;
    return NULL;
  }
}
\f
#if 0 /* This calls back to GAS which we can't do without care.  */

/* Record each member of OPVALS in the assembler's symbol table.
   This lets GAS parse registers for us.
   ??? Interesting idea but not currently used.  */

/* Record each member of OPVALS in the assembler's symbol table.
   FIXME: Not currently used.  */

void
@arch@_cgen_asm_hash_keywords (cd, opvals)
     CGEN_CPU_DESC cd;
     CGEN_KEYWORD *opvals;
{
  CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
  const CGEN_KEYWORD_ENTRY * ke;

  while ((ke = cgen_keyword_search_next (& search)) != NULL)
    {
#if 0 /* Unnecessary, should be done in the search routine.  */
      if (! @arch@_cgen_opval_supported (ke))
	continue;
#endif
      cgen_asm_record_register (cd, ke->name, ke->value);
    }
}

#endif /* 0 */
Commit	Line	Data
f6e6b40f BE	1	/* Assembler interface for targets using CGEN. -- C --
	2	CGEN: Cpu tools GENerator
	3
	4	THIS FILE IS MACHINE GENERATED WITH CGEN.
	5	- the resultant file is machine generated, cgen-asm.in isn't
	6
060d22b0	7	Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
f6e6b40f BE	8
	9	This file is part of the GNU Binutils and GDB, the GNU debugger.
	10
	11	This program is free software; you can redistribute it and/or modify
	12	it under the terms of the GNU General Public License as published by
	13	the Free Software Foundation; either version 2, or (at your option)
	14	any later version.
	15
	16	This program is distributed in the hope that it will be useful,
	17	but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	GNU General Public License for more details.
	20
	21	You should have received a copy of the GNU General Public License
	22	along with this program; if not, write to the Free Software Foundation, Inc.,
	23	59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	24
	25	/* ??? Eventually more and more of this stuff can go to cpu-independent files.
	26	Keep that in mind. */
	27
	28	#include "sysdep.h"
	29	#include <ctype.h>
	30	#include <stdio.h>
	31	#include "ansidecl.h"
	32	#include "bfd.h"
	33	#include "symcat.h"
	34	#include "@prefix@-desc.h"
	35	#include "@prefix@-opc.h"
	36	#include "opintl.h"
	37
	38	#undef min
	39	#define min(a,b) ((a) < (b) ? (a) : (b))
	40	#undef max
	41	#define max(a,b) ((a) > (b) ? (a) : (b))
	42
	43	static const char * parse_insn_normal
	44	PARAMS ((CGEN_CPU_DESC, const CGEN_INSN , const char , CGEN_FIELDS ));
	45	\f
	46	/* -- assembler routines inserted here */
	47	\f
	48	/* Default insn parser.
	49
	50	The syntax string is scanned and operands are parsed and stored in FIELDS.
	51	Relocs are queued as we go via other callbacks.
	52
	53	??? Note that this is currently an all-or-nothing parser. If we fail to
	54	parse the instruction, we return 0 and the caller will start over from
	55	the beginning. Backtracking will be necessary in parsing subexpressions,
	56	but that can be handled there. Not handling backtracking here may get
	57	expensive in the case of the m68k. Deal with later.
	58
	59	Returns NULL for success, an error message for failure.
	60	*/
	61
	62	static const char *
	63	parse_insn_normal (cd, insn, strp, fields)
	64	CGEN_CPU_DESC cd;
	65	const CGEN_INSN *insn;
	66	const char **strp;
	67	CGEN_FIELDS *fields;
	68	{
	69	/* ??? Runtime added insns not handled yet. */
	70	const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
	71	const char str = strp;
72	const char *errmsg;
73	const char *p;
4a9f416d	74	const CGEN_SYNTAX_CHAR_TYPE * syn;
f6e6b40f BE	75	#ifdef CGEN_MNEMONIC_OPERANDS
	76	/* FIXME: wip */
	77	int past_opcode_p;
	78	#endif
	79
	80	/* For now we assume the mnemonic is first (there are no leading operands).
	81	We can parse it without needing to set up operand parsing.
	82	GAS's input scrubber will ensure mnemonics are lowercase, but we may
	83	not be called from GAS. */
	84	p = CGEN_INSN_MNEMONIC (insn);
	85	while (p && tolower (p) == tolower (*str))
	86	++p, ++str;
	87
	88	if (* p)
	89	return _("unrecognized instruction");
	90
	91	#ifndef CGEN_MNEMONIC_OPERANDS
	92	if (* str && !isspace (* str))
	93	return _("unrecognized instruction");
	94	#endif
	95
	96	CGEN_INIT_PARSE (cd);
	97	cgen_init_parse_operand (cd);
	98	#ifdef CGEN_MNEMONIC_OPERANDS
	99	past_opcode_p = 0;
	100	#endif
	101
	102	/* We don't check for (*str != '\0') here because we want to parse
	103	any trailing fake arguments in the syntax string. */
	104	syn = CGEN_SYNTAX_STRING (syntax);
	105
	106	/* Mnemonics come first for now, ensure valid string. */
	107	if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
	108	abort ();
	109
	110	++syn;
	111
	112	while (* syn != 0)
	113	{
	114	/* Non operand chars must match exactly. */
	115	if (CGEN_SYNTAX_CHAR_P (* syn))
	116	{
	117	/* FIXME: While we allow for non-GAS callers above, we assume the
	118	first char after the mnemonic part is a space. */
	119	/* FIXME: We also take inappropriate advantage of the fact that
	120	GAS's input scrubber will remove extraneous blanks. */
	121	if (tolower (str) == tolower (CGEN_SYNTAX_CHAR ( syn)))
	122	{
	123	#ifdef CGEN_MNEMONIC_OPERANDS
4a9f416d	124	if (CGEN_SYNTAX_CHAR(* syn) == ' ')
f6e6b40f BE	125	past_opcode_p = 1;
	126	#endif
	127	++ syn;
	128	++ str;
	129	}
149fe25e	130	else if (*str)
f6e6b40f BE	131	{
	132	/* Syntax char didn't match. Can't be this insn. */
	133	static char msg [80];
	134	/* xgettext:c-format */
	135	sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
4a9f416d	136	CGEN_SYNTAX_CHAR(syn), str);
f6e6b40f BE	137	return msg;
f6e6b40f BE	138	}
149fe25e FCE	139	else
	140	{
	141	/* Ran out of input. */
	142	static char msg [80];
	143	/* xgettext:c-format */
	144	sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
4a9f416d	145	CGEN_SYNTAX_CHAR(*syn));
149fe25e FCE	146	return msg;
149fe25e FCE	147	}
f6e6b40f BE	148	continue;
	149	}
	150
	151	/* We have an operand of some sort. */
	152	errmsg = @arch@_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
	153	&str, fields);
	154	if (errmsg)
	155	return errmsg;
	156
	157	/* Done with this operand, continue with next one. */
	158	++ syn;
	159	}
	160
	161	/* If we're at the end of the syntax string, we're done. */
4a9f416d	162	if (* syn == 0)
f6e6b40f BE	163	{
	164	/* FIXME: For the moment we assume a valid `str' can only contain
	165	blanks now. IE: We needn't try again with a longer version of
	166	the insn and it is assumed that longer versions of insns appear
	167	before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
	168	while (isspace (* str))
	169	++ str;
	170
	171	if (* str != '\0')
	172	return _("junk at end of line"); /* FIXME: would like to include `str' */
	173
	174	return NULL;
	175	}
	176
	177	/* We couldn't parse it. */
	178	return _("unrecognized instruction");
	179	}
	180	\f
	181	/* Main entry point.
	182	This routine is called for each instruction to be assembled.
	183	STR points to the insn to be assembled.
	184	We assume all necessary tables have been initialized.
	185	The assembled instruction, less any fixups, is stored in BUF.
	186	Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
	187	still needs to be converted to target byte order, otherwise BUF is an array
	188	of bytes in target byte order.
	189	The result is a pointer to the insn's entry in the opcode table,
	190	or NULL if an error occured (an error message will have already been
	191	printed).
	192
	193	Note that when processing (non-alias) macro-insns,
	194	this function recurses.
	195
	196	??? It's possible to make this cpu-independent.
	197	One would have to deal with a few minor things.
	198	At this point in time doing so would be more of a curiosity than useful
	199	[for example this file isn't _that_ big], but keeping the possibility in
	200	mind helps keep the design clean. */
	201
	202	const CGEN_INSN *
	203	@arch@_cgen_assemble_insn (cd, str, fields, buf, errmsg)
	204	CGEN_CPU_DESC cd;
	205	const char *str;
	206	CGEN_FIELDS *fields;
	207	CGEN_INSN_BYTES_PTR buf;
	208	char **errmsg;
	209	{
	210	const char *start;
	211	CGEN_INSN_LIST *ilist;
606d55bc FCE	212	const char *parse_errmsg = NULL;
606d55bc FCE	213	const char *insert_errmsg = NULL;
f6e6b40f BE	214
	215	/* Skip leading white space. */
	216	while (isspace (* str))
	217	++ str;
	218
	219	/* The instructions are stored in hashed lists.
	220	Get the first in the list. */
	221	ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
	222
	223	/* Keep looking until we find a match. */
	224
	225	start = str;
	226	for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
	227	{
	228	const CGEN_INSN *insn = ilist->insn;
	229
	230	#ifdef CGEN_VALIDATE_INSN_SUPPORTED
	231	/* not usually needed as unsupported opcodes shouldn't be in the hash lists */
	232	/* Is this insn supported by the selected cpu? */
	233	if (! @arch@_cgen_insn_supported (cd, insn))
	234	continue;
	235	#endif
	236
	237	/* If the RELAX attribute is set, this is an insn that shouldn't be
	238	chosen immediately. Instead, it is used during assembler/linker
	239	relaxation if possible. */
	240	if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0)
	241	continue;
	242
	243	str = start;
	244
	245	/* Allow parse/insert handlers to obtain length of insn. */
	246	CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
	247
606d55bc FCE	248	parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
606d55bc FCE	249	if (parse_errmsg != NULL)
f6e6b40f BE	250	continue;
	251
	252	/* ??? 0 is passed for `pc' */
606d55bc FCE	253	insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
	254	(bfd_vma) 0);
	255	if (insert_errmsg != NULL)
f6e6b40f BE	256	continue;
	257
	258	/* It is up to the caller to actually output the insn and any
	259	queued relocs. */
	260	return insn;
	261	}
	262
f6e6b40f BE	263	{
f6e6b40f BE	264	static char errbuf[150];
fca2040b	265	#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
606d55bc	266	const char *tmp_errmsg;
f6e6b40f	267
606d55bc FCE	268	/* If requesting verbose error messages, use insert_errmsg.
	269	Failing that, use parse_errmsg */
	270	tmp_errmsg = (insert_errmsg ? insert_errmsg :
	271	parse_errmsg ? parse_errmsg :
	272	_("unrecognized instruction"));
	273
f6e6b40f BE	274	if (strlen (start) > 50)
	275	/* xgettext:c-format */
	276	sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
	277	else
	278	/* xgettext:c-format */
	279	sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
	280	#else
	281	if (strlen (start) > 50)
	282	/* xgettext:c-format */
	283	sprintf (errbuf, _("bad instruction `%.50s...'"), start);
	284	else
	285	/* xgettext:c-format */
	286	sprintf (errbuf, _("bad instruction `%.50s'"), start);
	287	#endif
	288
	289	*errmsg = errbuf;
	290	return NULL;
	291	}
	292	}
	293	\f
	294	#if 0 /* This calls back to GAS which we can't do without care. */
	295
	296	/* Record each member of OPVALS in the assembler's symbol table.
	297	This lets GAS parse registers for us.
	298	??? Interesting idea but not currently used. */
	299
	300	/* Record each member of OPVALS in the assembler's symbol table.
	301	FIXME: Not currently used. */
	302
	303	void
	304	@arch@_cgen_asm_hash_keywords (cd, opvals)
	305	CGEN_CPU_DESC cd;
	306	CGEN_KEYWORD *opvals;
	307	{
	308	CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
	309	const CGEN_KEYWORD_ENTRY * ke;
	310
	311	while ((ke = cgen_keyword_search_next (& search)) != NULL)
	312	{
	313	#if 0 /* Unnecessary, should be done in the search routine. */
	314	if (! @arch@_cgen_opval_supported (ke))
	315	continue;
	316	#endif
	317	cgen_asm_record_register (cd, ke->name, ke->value);
	318	}
	319	}
	320
	321	#endif /* 0 */