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CSKY: Refine literals pool dump process and float register parser.
[thirdparty/binutils-gdb.git] / opcodes / csky-opc.h
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b8891f8d 1/* Declarations for C-SKY opcode table
b3adc24a 2 Copyright (C) 2007-2020 Free Software Foundation, Inc.
b8891f8d
AJ		 3 Contributed by C-SKY Microsystems and Mentor Graphics.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22#include "opcode/csky.h"
23
24#define OP_TABLE_NUM 2
0c0577f6 25#define MAX_OPRND_NUM 5
b8891f8d
AJ		 26
27enum operand_type
28{
29 OPRND_TYPE_NONE = 0,
30 /* Control register. */
31 OPRND_TYPE_CTRLREG,
32 /* r0 - r7. */
33 OPRND_TYPE_GREG0_7,
34 /* r0 - r15. */
35 OPRND_TYPE_GREG0_15,
36 /* r16 - r31. */
37 OPRND_TYPE_GREG16_31,
38 /* r0 - r31. */
39 OPRND_TYPE_AREG,
40 /* (rx). */
41 OPRND_TYPE_AREG_WITH_BRACKET,
42 OPRND_TYPE_AREG_WITH_LSHIFT,
43 OPRND_TYPE_AREG_WITH_LSHIFT_FPU,
44
45 OPRND_TYPE_FREG_WITH_INDEX,
46 /* r1 only, for xtrb0(1)(2)(3) in csky v1 ISA. */
47 OPRND_TYPE_REG_r1a,
48 /* r1 only, for divs/divu in csky v1 ISA. */
49 OPRND_TYPE_REG_r1b,
50 /* r28. */
51 OPRND_TYPE_REG_r28,
52 OPRND_TYPE_REGr4_r7,
53 /* sp register with bracket. */
54 OPRND_TYPE_REGbsp,
55 /* sp register. */
56 OPRND_TYPE_REGsp,
57 /* Register with bracket. */
58 OPRND_TYPE_REGnr4_r7,
59 /* Not sp register. */
60 OPRND_TYPE_REGnsp,
61 /* Not lr register. */
62 OPRND_TYPE_REGnlr,
63 /* Not sp/lr register. */
64 OPRND_TYPE_REGnsplr,
65 /* hi/lo register. */
66 OPRND_TYPE_REGhilo,
67 /* VDSP register. */
68 OPRND_TYPE_VREG,
69
70 /* cp index. */
71 OPRND_TYPE_CPIDX,
72 /* cp regs. */
73 OPRND_TYPE_CPREG,
74 /* cp cregs. */
75 OPRND_TYPE_CPCREG,
76 /* fpu regs. */
77 OPRND_TYPE_FREG,
78 /* fpu even regs. */
79 OPRND_TYPE_FEREG,
80 /* Float round mode. */
81 OPRND_TYPE_RM,
82 /* PSR bits. */
83 OPRND_TYPE_PSR_BITS_LIST,
84
85 /* Constant. */
86 OPRND_TYPE_CONSTANT,
87 /* Floating Constant. */
88 OPRND_TYPE_FCONSTANT,
89 /* Extern lrw constant. */
90 OPRND_TYPE_ELRW_CONSTANT,
91 /* [label]. */
92 OPRND_TYPE_LABEL_WITH_BRACKET,
93 /* The operand is the same as first reg. It is a dummy reg that doesn't
94 appear in the binary code of the instruction. It is also used by
95 the disassembler.
96 For example: bclri rz, rz, imm5 -> bclri rz, imm5. */
97 OPRND_TYPE_DUMMY_REG,
98 /* The type of the operand is same as the first operand. If the value
99 of the operand is same as the first operand, we can use a 16-bit
100 instruction to represent the opcode.
101 For example: addc r1, r1, r2 -> addc16 r1, r2. */
102 OPRND_TYPE_2IN1_DUMMY,
103 /* Output a reg same as the first reg.
104 For example: addc r17, r1 -> addc32 r17, r17, r1.
105 The old "addc" cannot be represented by a 16-bit instruction because
106 16-bit "addc" only supports regs from r0 to r15. So we use "addc32"
107 which has 3 operands, and duplicate the first operand to the second. */
108 OPRND_TYPE_DUP_GREG0_7,
109 OPRND_TYPE_DUP_GREG0_15,
110 OPRND_TYPE_DUP_AREG,
111 /* Immediate. */
112 OPRND_TYPE_IMM1b,
113 OPRND_TYPE_IMM2b,
114 OPRND_TYPE_IMM3b,
115 OPRND_TYPE_IMM4b,
116 OPRND_TYPE_IMM5b,
117 OPRND_TYPE_IMM7b,
118 OPRND_TYPE_IMM8b,
119 OPRND_TYPE_IMM12b,
120 OPRND_TYPE_IMM15b,
121 OPRND_TYPE_IMM16b,
122 OPRND_TYPE_IMM18b,
123 OPRND_TYPE_IMM32b,
124 /* Immediate left shift 2 bits. */
125 OPRND_TYPE_IMM7b_LS2,
126 OPRND_TYPE_IMM8b_LS2,
127 /* OPRND_TYPE_IMM5b_a_b means: Immediate in (a, b). */
128 OPRND_TYPE_IMM5b_1_31,
129 OPRND_TYPE_IMM5b_7_31,
130 /* Operand type for rori and rotri. */
131 OPRND_TYPE_IMM5b_RORI,
132 OPRND_TYPE_IMM5b_POWER,
133 OPRND_TYPE_IMM5b_7_31_POWER,
134 OPRND_TYPE_IMM5b_BMASKI,
135 OPRND_TYPE_IMM8b_BMASKI,
136 /* For v2 movih. */
137 OPRND_TYPE_IMM16b_MOVIH,
138 /* For v2 ori. */
139 OPRND_TYPE_IMM16b_ORI,
140 /* For v2 ld/st. */
141 OPRND_TYPE_IMM_LDST,
142 OPRND_TYPE_IMM_FLDST,
143 OPRND_TYPE_IMM2b_JMPIX,
144 /* Offset for bloop. */
145 OPRND_TYPE_BLOOP_OFF4b,
146 OPRND_TYPE_BLOOP_OFF12b,
147 /* Offset for jump. */
148 OPRND_TYPE_OFF8b,
149 OPRND_TYPE_OFF10b,
150 OPRND_TYPE_OFF11b,
151 OPRND_TYPE_OFF16b,
152 OPRND_TYPE_OFF16b_LSL1,
153 OPRND_TYPE_OFF26b,
154 /* An immediate or label. */
155 OPRND_TYPE_IMM_OFF18b,
156 /* Offset immediate. */
157 OPRND_TYPE_OIMM3b,
158 OPRND_TYPE_OIMM4b,
159 OPRND_TYPE_OIMM5b,
160 OPRND_TYPE_OIMM8b,
161 OPRND_TYPE_OIMM12b,
162 OPRND_TYPE_OIMM16b,
163 OPRND_TYPE_OIMM18b,
164 /* For csky v2 idly. */
165 OPRND_TYPE_OIMM5b_IDLY,
166 /* For v2 bmaski. */
167 OPRND_TYPE_OIMM5b_BMASKI,
168 /* Constants. */
169 OPRND_TYPE_CONST1,
170 /* PC relative offset. */
171 OPRND_TYPE_PCR_OFFSET_16K,
172 OPRND_TYPE_PCR_OFFSET_64K,
173 OPRND_TYPE_PCR_OFFSET_64M,
174 OPRND_TYPE_CPFUNC,
175 OPRND_TYPE_GOT_PLT,
176 OPRND_TYPE_REGLIST_LDM,
177 OPRND_TYPE_REGLIST_DASH,
178 OPRND_TYPE_FREGLIST_DASH,
179 OPRND_TYPE_REGLIST_COMMA,
180 OPRND_TYPE_REGLIST_DASH_COMMA,
181 OPRND_TYPE_BRACKET,
182 OPRND_TYPE_ABRACKET,
183 OPRND_TYPE_JBTF,
184 OPRND_TYPE_JBR,
185 OPRND_TYPE_JBSR,
186 OPRND_TYPE_UNCOND10b,
187 OPRND_TYPE_UNCOND16b,
188 OPRND_TYPE_COND10b,
189 OPRND_TYPE_COND16b,
190 OPRND_TYPE_JCOMPZ,
191 OPRND_TYPE_LSB2SIZE,
192 OPRND_TYPE_MSB2SIZE,
193 OPRND_TYPE_LSB,
194 OPRND_TYPE_MSB,
195 /* Single float and double float. */
196 OPRND_TYPE_SFLOAT,
197 OPRND_TYPE_DFLOAT,
198};
199
200/* Operand descriptors. */
201struct operand
202{
203 /* Mask for suboperand. */
204 unsigned int mask;
205 /* Suboperand type. */
206 enum operand_type type;
207 /* Operand shift. */
208 int shift;
209};
210
211struct soperand
212{
213 /* Mask for operand. */
214 unsigned int mask;
215 /* Operand type. */
216 enum operand_type type;
217 /* Operand shift. */
218 int shift;
219 /* Suboperand. */
220 struct operand subs[3];
221};
222
223union csky_operand
224{
0c0577f6 225 struct operand oprnds[MAX_OPRND_NUM];
b8891f8d
AJ		 226 struct suboperand1
227 {
228 struct operand oprnd;
229 struct soperand soprnd;
230 } soprnd1;
231 struct suboperand2
232 {
233 struct soperand soprnd;
234 struct operand oprnd;
235 } soprnd2;
236};
237
238/* Describe a single instruction encoding. */
239struct csky_opcode_info
240{
241 /* How many operands. */
242 long operand_num;
243 /* The instruction opcode. */
244 unsigned int opcode;
245 /* Operand information. */
246 union csky_operand oprnd;
247};
248
249/* C-SKY instruction description. Each mnemonic can have multiple
250 16-bit and 32-bit encodings. */
251struct csky_opcode
252{
253 /* The instruction name. */
254 const char *mnemonic;
255 /* Whether this is an unconditional control transfer instruction,
256 for the purposes of placing literal pools after it.
257 0 = no, 1 = within function, 2 = end of function.
258 See check_literals in gas/config/tc-csky.c. */
259 int transfer;
260 /* Encodings for 16-bit opcodes. */
261 struct csky_opcode_info op16[OP_TABLE_NUM];
262 /* Encodings for 32-bit opcodes. */
263 struct csky_opcode_info op32[OP_TABLE_NUM];
264 /* Instruction set flag. */
0861f561
CQ		 265 BFD_HOST_U_64_BIT isa_flag16;
266 BFD_HOST_U_64_BIT isa_flag32;
b8891f8d
AJ		 267 /* Whether this insn needs relocation, 0: no, !=0: yes. */
268 signed int reloc16;
269 signed int reloc32;
270 /* Whether this insn needs relaxation, 0: no, != 0: yes. */
271 signed int relax;
272 /* Worker function to call when this instruction needs special assembler
273 handling. */
274 bfd_boolean (*work)(void);
275};
276
277/* The following are the opcodes used in relax/fix process. */
278#define CSKYV1_INST_JMPI 0x7000
279#define CSKYV1_INST_ADDI 0x2000
280#define CSKYV1_INST_SUBI 0x2400
281#define CSKYV1_INST_LDW 0x8000
282#define CSKYV1_INST_STW 0x9000
283#define CSKYV1_INST_BSR 0xf800
284#define CSKYV1_INST_LRW 0x7000
285#define CSKYV1_INST_ADDU 0x1c00
286#define CSKYV1_INST_JMP 0x00c0
287#define CSKYV1_INST_MOV_R1_RX 0x1201
288#define CSKYV1_INST_MOV_RX_R1 0x1210
289
290#define CSKYV2_INST_BT16 0x0800
291#define CSKYV2_INST_BF16 0x0c00
292#define CSKYV2_INST_BT32 0xe8600000
293#define CSKYV2_INST_BF32 0xe8400000
294#define CSKYV2_INST_BR32 0xe8000000
295#define CSKYV2_INST_NOP 0x6c03
296#define CSKYV2_INST_MOVI16 0x3000
297#define CSKYV2_INST_MOVI32 0xea000000
298#define CSKYV2_INST_MOVIH 0xea200000
299#define CSKYV2_INST_LRW16 0x1000
300#define CSKYV2_INST_LRW32 0xea800000
301#define CSKYV2_INST_BSR32 0xe0000000
302#define CSKYV2_INST_BR32 0xe8000000
303#define CSKYV2_INST_FLRW 0xf4003800
304#define CSKYV2_INST_JMPI32 0xeac00000
305#define CSKYV2_INST_JSRI32 0xeae00000
306#define CSKYV2_INST_JSRI_TO_LRW 0xea9a0000
307#define CSKYV2_INST_JSR_R26 0xe8fa0000
308#define CSKYV2_INST_MOV_R0_R0 0xc4004820
309
310#define OPRND_SHIFT_0_BIT 0
311#define OPRND_SHIFT_1_BIT 1
312#define OPRND_SHIFT_2_BIT 2
313#define OPRND_SHIFT_3_BIT 3
314#define OPRND_SHIFT_4_BIT 4
315
316#define OPRND_MASK_NONE 0x0
317#define OPRND_MASK_0_1 0x3
318#define OPRND_MASK_0_2 0x7
319#define OPRND_MASK_0_3 0xf
320#define OPRND_MASK_0_4 0x1f
321#define OPRND_MASK_0_7 0xff
322#define OPRND_MASK_0_8 0x1ff
323#define OPRND_MASK_0_9 0x3ff
324#define OPRND_MASK_0_10 0x7ff
325#define OPRND_MASK_0_11 0xfff
326#define OPRND_MASK_0_14 0x7fff
327#define OPRND_MASK_0_15 0xffff
328#define OPRND_MASK_0_17 0x3ffff
329#define OPRND_MASK_0_25 0x3ffffff
330#define OPRND_MASK_2_4 0x1c
331#define OPRND_MASK_2_5 0x3c
332#define OPRND_MASK_3_7 0xf8
333#define OPRND_MASK_4 0x10
334#define OPRND_MASK_4_6 0x70
335#define OPRND_MASK_4_7 0xf0
336#define OPRND_MASK_4_8 0x1f0
337#define OPRND_MASK_4_10 0x7f0
338#define OPRND_MASK_5 0x20
339#define OPRND_MASK_5_6 0x60
340#define OPRND_MASK_5_7 0xe0
341#define OPRND_MASK_5_8 0x1e0
342#define OPRND_MASK_5_9 0x3e0
343#define OPRND_MASK_6_9 0x3c0
344#define OPRND_MASK_6_10 0x7c0
345#define OPRND_MASK_8_9 0x300
346#define OPRND_MASK_8_10 0x700
347#define OPRND_MASK_8_11 0xf00
348#define OPRND_MASK_9_10 0x600
349#define OPRND_MASK_9_12 0x1e00
350#define OPRND_MASK_10_11 0xc00
351#define OPRND_MASK_10_14 0x7c00
352#define OPRND_MASK_12_15 0xf000
353#define OPRND_MASK_13_17 0x3e000
354#define OPRND_MASK_16_19 0xf0000
355#define OPRND_MASK_16_20 0x1f0000
356#define OPRND_MASK_16_25 0x3ff0000
357#define OPRND_MASK_21_24 0x1e00000
358#define OPRND_MASK_21_25 0x3e00000
359#define OPRND_MASK_25 0x2000000
360#define OPRND_MASK_RSV 0xffffffff
361#define OPRND_MASK_0_3or21_24 OPRND_MASK_0_3 | OPRND_MASK_21_24
362#define OPRND_MASK_0_4or21_25 OPRND_MASK_0_4 | OPRND_MASK_21_25
363#define OPRND_MASK_0_4or16_20 OPRND_MASK_0_4 | OPRND_MASK_16_20
364#define OPRND_MASK_0_4or8_10 OPRND_MASK_0_4 | OPRND_MASK_8_10
365#define OPRND_MASK_0_4or8_9 OPRND_MASK_0_4 | OPRND_MASK_8_9
366#define OPRND_MASK_0_14or16_20 OPRND_MASK_0_14 | OPRND_MASK_16_20
367#define OPRND_MASK_4or5_8 OPRND_MASK_4 | OPRND_MASK_5_8
368#define OPRND_MASK_5or21_24 OPRND_MASK_5 | OPRND_MASK_21_24
369#define OPRND_MASK_2_5or6_9 OPRND_MASK_2_5 | OPRND_MASK_6_9
370#define OPRND_MASK_4_6or21_25 OPRND_MASK_4_6 | OPRND_MASK_21_25
371#define OPRND_MASK_4_7or21_24 OPRND_MASK_4_7 | OPRND_MASK_21_24
372#define OPRND_MASK_5_6or21_25 OPRND_MASK_5_6 | OPRND_MASK_21_25
373#define OPRND_MASK_5_7or8_10 OPRND_MASK_5_7 | OPRND_MASK_8_10
374#define OPRND_MASK_5_9or21_25 OPRND_MASK_5_9 | OPRND_MASK_21_25
375#define OPRND_MASK_16_19or21_24 OPRND_MASK_16_19 | OPRND_MASK_21_24
376#define OPRND_MASK_16_20or21_25 OPRND_MASK_16_20 | OPRND_MASK_21_25
377#define OPRND_MASK_4or9_10or25 OPRND_MASK_4 | OPRND_MASK_9_10 | OPRND_MASK_25
378#define OPRND_MASK_4_7or16_24 OPRND_MASK_4_7 | OPRND_MASK_16_20 | OPRND_MASK_21_24
379
380#define OPERAND_INFO(mask, type, shift) \
381 {OPRND_MASK_##mask, OPRND_TYPE_##type, shift}
382
383#define OPCODE_INFO_NONE() \
384 {-2, 0, \
385 {{OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
386 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
387 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
388 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
389 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
390
391/* Here and in subsequent macros, the "oprnd" arguments are the
392 parenthesized arglist to the OPERAND_INFO macro above. */
393#define OPCODE_INFO(num, op, oprnd1, oprnd2, oprnd3, oprnd4, oprnd5) \
394 {num, op, \
395 {OPERAND_INFO oprnd1, OPERAND_INFO oprnd2, OPERAND_INFO oprnd3, \
396 OPERAND_INFO oprnd4, OPERAND_INFO oprnd5}}
397
398#define OPCODE_INFO0(op) \
399 {0, op, \
400 {{OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
401 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
402 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
403 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
404 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
405#define OPCODE_INFO1(op, oprnd) \
406 {1, op, \
407 {{OPERAND_INFO oprnd, \
408 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
409 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
410 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
411 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
412#define OPCODE_INFO2(op, oprnd1, oprnd2) \
413 {2, op, \
414 {{OPERAND_INFO oprnd1, \
415 OPERAND_INFO oprnd2, \
416 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
417 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
418 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
419#define OPCODE_INFO3(op, oprnd1, oprnd2, oprnd3) \
420 {3, op, \
421 {{OPERAND_INFO oprnd1, \
422 OPERAND_INFO oprnd2, \
423 OPERAND_INFO oprnd3, \
424 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
425 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
426#define OPCODE_INFO4(op, oprnd1, oprnd2, oprnd3, oprnd4) \
427 {4, op, \
428 {{OPERAND_INFO oprnd1, \
429 OPERAND_INFO oprnd2, \
430 OPERAND_INFO oprnd3, \
431 OPERAND_INFO oprnd4, \
432 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
433#define OPCODE_INFO_LIST(op, oprnd) \
434 {-1, op, \
435 {{OPERAND_INFO oprnd, \
436 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
437 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT) , \
438 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT), \
439 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
440#define OPCODE_INFO5(op, oprnd1, oprnd2, oprnd3, oprnd4, oprnd5) \
441 {5, op, \
442 {{OPERAND_INFO oprnd1, \
443 OPERAND_INFO oprnd2, \
444 OPERAND_INFO oprnd3, \
445 OPERAND_INFO oprnd4, \
446 OPERAND_INFO oprnd5}}}
447
448#define BRACKET_OPRND(oprnd1, oprnd2) \
449 OPERAND_INFO (RSV, BRACKET, OPRND_SHIFT_0_BIT), \
450 OPERAND_INFO oprnd1, \
451 OPERAND_INFO oprnd2, \
452 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)
453#define ABRACKET_OPRND(oprnd1, oprnd2) \
454 OPERAND_INFO (RSV, ABRACKET, OPRND_SHIFT_0_BIT), \
455 OPERAND_INFO oprnd1, \
456 OPERAND_INFO oprnd2, \
457 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)
458
459#define SOPCODE_INFO1(op, soprnd) \
460 {1, op, \
461 {{soprnd, \
462 OPERAND_INFO (NONE, NONE, OPRND_SHIFT_0_BIT)}}}
463#define SOPCODE_INFO2(op, oprnd, soprnd) \
464 {2, op, \
465 {{OPERAND_INFO oprnd, soprnd}}}
466
467
468/* Before using the opcode-defining macros, there need to be
469 #defines for _TRANSFER, _RELOC16, _RELOC32, and _RELAX. See
470 below. */
471/* FIXME: it is a wart that these parameters are not explicit. */
472
473#define OP16(mnem, opcode16, isa) \
474 {mnem, _TRANSFER, \
475 {opcode16, OPCODE_INFO_NONE ()}, \
476 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
477 isa, 0, _RELOC16, 0, _RELAX, NULL}
478
479#ifdef BUILD_AS
480
481#define OP16_WITH_WORK(mnem, opcode16, isa, work) \
482 {mnem, _TRANSFER, \
483 {opcode16, OPCODE_INFO_NONE ()}, \
484 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
485 isa, 0, _RELOC16, 0, _RELAX, work}
486#define OP32_WITH_WORK(mnem, opcode32, isa, work) \
487 {mnem, _TRANSFER, \
488 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
489 {opcode32, OPCODE_INFO_NONE ()}, \
490 0, isa, 0, _RELOC32, _RELAX, work}
491#define OP16_OP32_WITH_WORK(mnem, opcode16, isa16, opcode32, isa32, work) \
492 {mnem, _TRANSFER, \
493 {opcode16, OPCODE_INFO_NONE ()}, \
494 {opcode32, OPCODE_INFO_NONE ()}, \
495 isa16, isa32, _RELOC16, _RELOC32, _RELAX, work}
496#define DOP16_OP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32, isa32, work) \
497 {mnem, _TRANSFER, \
498 {opcode16a, opcode16b}, \
499 {opcode32, OPCODE_INFO_NONE ()}, \
500 isa16, isa32, _RELOC16, _RELOC32, _RELAX, work}
501#define DOP16_DOP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32a, opcode32b, isa32, work) \
502 {mnem, _TRANSFER, \
503 {opcode16a, opcode16b}, \
504 {opcode32a, opcode32b}, \
505 isa16, isa32, _RELOC16, _RELOC32, _RELAX, work}
506#define DOP32_WITH_WORK(mnem, opcode32a, opcode32b, isa, work) \
507 {mnem, _TRANSFER, \
508 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
509 {opcode32a, opcode32b}, \
510 0, isa, 0, _RELOC32, _RELAX, work}
511
512#else /* ifdef BUILD_AS */
513
514#define OP16_WITH_WORK(mnem, opcode16, isa, work) \
515 {mnem, _TRANSFER, \
516 {opcode16, OPCODE_INFO_NONE ()}, \
517 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
518 isa, 0, _RELOC16, 0, _RELAX, NULL}
519#define OP32_WITH_WORK(mnem, opcode32, isa, work) \
520 {mnem, _TRANSFER, \
521 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
522 {opcode32, OPCODE_INFO_NONE ()}, \
523 0, isa, 0, _RELOC32, _RELAX, NULL}
524#define OP16_OP32_WITH_WORK(mnem, opcode16, isa16, opcode32, isa32, work) \
525 {mnem, _TRANSFER, \
526 {opcode16, OPCODE_INFO_NONE ()}, \
527 {opcode32, OPCODE_INFO_NONE ()}, \
528 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
529#define DOP16_OP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32, isa32, work) \
530 {mnem, _TRANSFER, \
531 {opcode16a, opcode16b}, \
532 {opcode32, OPCODE_INFO_NONE ()}, \
533 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
534#define DOP16_DOP32_WITH_WORK(mnem, opcode16a, opcode16b, isa16, opcode32a, opcode32b, isa32, work) \
535 {mnem, _TRANSFER, \
536 {opcode16a, opcode16b}, \
537 {opcode32a, opcode32b}, \
538 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
539#define DOP32_WITH_WORK(mnem, opcode32a, opcode32b, isa, work) \
540 {mnem, _TRANSFER, \
541 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
542 {opcode32a, opcode32b}, \
543 0, isa, 0, _RELOC32, _RELAX, NULL}
544
545#endif /* ifdef BUILD_AS */
546
547#define DOP16(mnem, opcode16_1, opcode16_2, isa) \
548 {mnem, _TRANSFER, \
549 {opcode16_1, opcode16_2}, \
550 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
551 isa, 0, _RELOC16, 0, _RELAX, NULL}
552#define OP32(mnem, opcode32, isa) \
553 {mnem, _TRANSFER, \
554 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
555 {opcode32, OPCODE_INFO_NONE ()}, \
556 0, isa, 0, _RELOC32, _RELAX, NULL}
557#define DOP32(mnem, opcode32a, opcode32b, isa) \
558 {mnem, _TRANSFER, \
559 {OPCODE_INFO_NONE (), OPCODE_INFO_NONE ()}, \
560 {opcode32a, opcode32b}, \
561 0, isa, 0, _RELOC32, _RELAX, NULL}
562#define OP16_OP32(mnem, opcode16, isa16, opcode32, isa32) \
563 {mnem, _TRANSFER, \
564 {opcode16, OPCODE_INFO_NONE ()}, \
565 {opcode32, OPCODE_INFO_NONE ()}, \
566 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
567#define DOP16_OP32(mnem, opcode16a, opcode16b, isa16, opcode32, isa32) \
568 {mnem, _TRANSFER, \
569 {opcode16a, opcode16b}, \
570 {opcode32, OPCODE_INFO_NONE ()}, \
571 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
572#define OP16_DOP32(mnem, opcode16, isa16, opcode32a, opcode32b, isa32) \
573 {mnem, _TRANSFER, \
574 {opcode16, OPCODE_INFO_NONE ()}, \
575 {opcode32a, opcode32b}, \
576 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
577#define DOP16_DOP32(mnem, opcode16a, opcode16b, isa16, opcode32a, opcode32b, isa32) \
578 {mnem, _TRANSFER, \
579 {opcode16a, opcode16b}, \
580 {opcode32a, opcode32b}, \
581 isa16, isa32, _RELOC16, _RELOC32, _RELAX, NULL}
582
583
584/* Register names and numbers. */
585#define V1_REG_SP 0
586#define V1_REG_LR 15
587
588struct csky_reg
589{
590 const char *name;
591 int index;
592 int flag;
593};
594
595const char *csky_general_reg[] =
596{
597 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
598 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
599 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
600 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
601 NULL,
602};
603
604/* TODO: optimize. */
605const char *cskyv2_general_alias_reg[] =
606{
607 "a0", "a1", "a2", "a3", "l0", "l1", "l2", "l3",
608 "l4", "l5", "l6", "l7", "t0", "t1", "sp", "lr",
609 "l8", "l9", "t2", "t3", "t4", "t5", "t6", "t7",
610 "t8", "t9", "r26", "r27", "rdb", "gb", "r30", "r31",
611 NULL,
612};
613
614/* TODO: optimize. */
615const char *cskyv1_general_alias_reg[] =
616{
617 "sp", "r1", "a0", "a1", "a2", "a3", "a4", "a5",
618 "fp", "l0", "l1", "l2", "l3", "l4", "gb", "lr",
619 NULL,
620};
621
622/* TODO: optimize. */
623const char *csky_fpu_reg[] =
624{
625 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
626 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
627 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
628 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31",
629 NULL,
630};
631
632/* Control Registers. */
633struct csky_reg csky_ctrl_regs[] =
634{
635 {"psr", 0, 0}, {"vbr", 1, 0}, {"epsr", 2, 0}, {"fpsr", 3, 0},
636 {"epc", 4, 0}, {"fpc", 5, 0}, {"ss0", 6, 0}, {"ss1", 7, 0},
637 {"ss2", 8, 0}, {"ss3", 9, 0}, {"ss4", 10, 0}, {"gcr", 11, 0},
638 {"gsr", 12, 0}, {"cpuidr", 13, 0}, {"dcsr", 14, 0}, {"cwr", 15, 0},
639 {"cfr", 16, 0}, {"ccr", 17, 0}, {"capr", 19, 0}, {"pacr", 20, 0},
640 {"rid", 21, 0}, {"sedcr", 8, CSKY_ISA_TRUST}, {"sepcr", 9, CSKY_ISA_TRUST},
641 {NULL, 0, 0}
642};
643
644const char *csky_cp_idx[] =
645{
646 "cp0", "cp1", "cp2", "cp3", "cp4", "cp5", "cp6", "cp7",
647 "cp8", "cp9", "cp10", "cp11", "cp12", "cp13", "cp14", "cp15",
648 "cp16", "cp17", "cp18", "cp19", "cp20",
649 NULL,
650};
651
652const char *csky_cp_reg[] =
653{
654 "cpr0", "cpr1", "cpr2", "cpr3", "cpr4", "cpr5", "cpr6", "cpr7",
655 "cpr8", "cpr9", "cpr10", "cpr11", "cpr12", "cpr13", "cpr14", "cpr15",
656 "cpr16", "cpr17", "cpr18", "cpr19", "cpr20", "cpr21", "cpr22", "cpr23",
657 "cpr24", "cpr25", "cpr26", "cpr27", "cpr28", "cpr29", "cpr30", "cpr31",
658 "cpr32", "cpr33", "cpr34", "cpr35", "cpr36", "cpr37", "cpr38", "cpr39",
659 "cpr40", "cpr41", "cpr42", "cpr43", "cpr44", "cpr45", "cpr46", "cpr47",
660 "cpr48", "cpr49", "cpr50", "cpr51", "cpr52", "cpr53", "cpr54", "cpr55",
661 "cpr56", "cpr57", "cpr58", "cpr59", "cpr60", "cpr61", "cpr62", "cpr63",
662 NULL,
663};
664
665const char *csky_cp_creg[] =
666{
667 "cpcr0", "cpcr1", "cpcr2", "cpcr3",
668 "cpcr4", "cpcr5", "cpcr6", "cpcr7",
669 "cpcr8", "cpcr9", "cpcr10", "cpcr11",
670 "cpcr12", "cpcr13", "cpcr14", "cpcr15",
671 "cpcr16", "cpcr17", "cpcr18", "cpcr19",
672 "cpcr20", "cpcr21", "cpcr22", "cpcr23",
673 "cpcr24", "cpcr25", "cpcr26", "cpcr27",
674 "cpcr28", "cpcr29", "cpcr30", "cpcr31",
675 "cpcr32", "cpcr33", "cpcr34", "cpcr35",
676 "cpcr36", "cpcr37", "cpcr38", "cpcr39",
677 "cpcr40", "cpcr41", "cpcr42", "cpcr43",
678 "cpcr44", "cpcr45", "cpcr46", "cpcr47",
679 "cpcr48", "cpcr49", "cpcr50", "cpcr51",
680 "cpcr52", "cpcr53", "cpcr54", "cpcr55",
681 "cpcr56", "cpcr57", "cpcr58", "cpcr59",
682 "cpcr60", "cpcr61", "cpcr62", "cpcr63",
683 NULL,
684};
685
686struct psrbit
687{
688 int value;
689 int isa;
690 const char *name;
691};
692const struct psrbit cskyv1_psr_bits[] =
693{
694 {1, 0, "ie"},
695 {2, 0, "fe"},
696 {4, 0, "ee"},
697 {8, 0, "af"},
698 {0, 0, NULL},
699};
700const struct psrbit cskyv2_psr_bits[] =
701{
702 {8, 0, "ee"},
703 {4, 0, "ie"},
704 {2, 0, "fe"},
705 {1, 0, "af"},
706 {0x10, CSKY_ISA_TRUST, "sie"},
707 {0, 0, NULL},
708};
709
710
711/* C-SKY V1 opcodes. */
712const struct csky_opcode csky_v1_opcodes[] =
713{
714#define _TRANSFER 0
715#define _RELOC16 0
716#define _RELOC32 0
717#define _RELAX 0
718 OP16 ("bkpt",
719 OPCODE_INFO0 (0x0000),
720 CSKYV1_ISA_E1),
721 OP16 ("sync",
722 OPCODE_INFO0 (0x0001),
723 CSKYV1_ISA_E1),
724#undef _TRANSFER
725#define _TRANSFER 2
726 OP16 ("rfi",
727 OPCODE_INFO0 (0x0003),
728 CSKYV1_ISA_E1),
729#undef _TRANSFER
730#define _TRANSFER 0
731 OP16 ("stop",
732 OPCODE_INFO0 (0x0004),
733 CSKYV1_ISA_E1),
734 OP16 ("wait",
735 OPCODE_INFO0 (0x0005),
736 CSKYV1_ISA_E1),
737 OP16 ("doze",
738 OPCODE_INFO0 (0x0006),
739 CSKYV1_ISA_E1),
740 OP16 ("idly4",
741 OPCODE_INFO0 (0x0007),
742 CSKYV1_ISA_E1),
743 OP16 ("trap",
744 OPCODE_INFO1 (0x0008,
745 (0_1, IMM2b, OPRND_SHIFT_0_BIT)),
746 CSKYV1_ISA_E1),
747 OP16 ("mvtc",
748 OPCODE_INFO0 (0x000c),
749 CSKY_ISA_DSP),
750 OP16 ("cprc",
751 OPCODE_INFO0 (0x000d),
752 CSKY_ISA_CP),
753 OP16 ("cpseti",
754 OPCODE_INFO1 (0x0010,
755 (0_3, CPIDX, OPRND_SHIFT_0_BIT)),
756 CSKY_ISA_CP),
757 OP16 ("mvc",
758 OPCODE_INFO1 (0x0020,
759 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
760 CSKYV1_ISA_E1),
761 OP16 ("mvcv",
762 OPCODE_INFO1 (0x0030,
763 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
764 CSKYV1_ISA_E1),
765 OP16 ("ldq",
766 OPCODE_INFO2 (0x0040,
767 (NONE, REGr4_r7, OPRND_SHIFT_0_BIT),
768 (0_3, REGnr4_r7, OPRND_SHIFT_0_BIT)),
769 CSKYV1_ISA_E1),
770 OP16 ("stq",
771 OPCODE_INFO2 (0x0050,
772 (NONE, REGr4_r7, OPRND_SHIFT_0_BIT),
773 (0_3, REGnr4_r7, OPRND_SHIFT_0_BIT)),
774 CSKYV1_ISA_E1),
775 OP16 ("ldm",
776 OPCODE_INFO2 (0x0060,
777 (0_3, REGLIST_DASH, OPRND_SHIFT_0_BIT),
778 (NONE, REGbsp, OPRND_SHIFT_0_BIT)),
779 CSKYV1_ISA_E1),
780 OP16 ("stm",
781 OPCODE_INFO2 (0x0070,
782 (0_3, REGLIST_DASH, OPRND_SHIFT_0_BIT),
783 (NONE, REGbsp, OPRND_SHIFT_0_BIT)),
784 CSKYV1_ISA_E1),
785 DOP16 ("dect",
786 OPCODE_INFO3 (0x0080,
787 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
788 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
789 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
790 OPCODE_INFO1 (0x0080,
791 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
792 CSKYV1_ISA_E1),
793 DOP16 ("decf",
794 OPCODE_INFO3 (0x0090,
795 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
796 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
797 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
798 OPCODE_INFO1 (0x0090,
799 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
800 CSKYV1_ISA_E1),
801 DOP16 ("inct",
802 OPCODE_INFO3 (0x00a0,
803 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
804 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
805 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
806 OPCODE_INFO1 (0x00a0,
807 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
808 CSKYV1_ISA_E1),
809 DOP16 ("incf",
810 OPCODE_INFO3 (0x00b0,
811 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
812 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
813 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
814 OPCODE_INFO1 (0x00b0,
815 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
816 CSKYV1_ISA_E1),
817#undef _TRANSFER
818#define _TRANSFER 2
819 OP16 ("jmp",
820 OPCODE_INFO1 (0x00c0,
821 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
822 CSKYV1_ISA_E1),
823#undef _TRANSFER
824#define _TRANSFER 0
825 OP16 ("jsr",
826 OPCODE_INFO1 (0x00d0,
827 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
828 CSKYV1_ISA_E1),
829 DOP16 ("ff1",
830 OPCODE_INFO2 (0x00e0,
831 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
832 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
833 OPCODE_INFO1 (0x00e0,
834 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
835 CSKYV1_ISA_E1),
836 DOP16 ("brev",
837 OPCODE_INFO2 (0x00f0,
838 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
839 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
840 OPCODE_INFO1 (0x00f0,
841 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
842 CSKYV1_ISA_E1),
843 DOP16 ("xtrb3",
844 OPCODE_INFO2 (0x0100,
845 (NONE, REG_r1a, OPRND_SHIFT_0_BIT),
846 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
847 OPCODE_INFO1 (0x0100,
848 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
849 CSKYV1_ISA_E1),
850 DOP16 ("xtrb2",
851 OPCODE_INFO2 (0x0110,
852 (NONE, REG_r1a, OPRND_SHIFT_0_BIT),
853 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
854 OPCODE_INFO1 (0x0110,
855 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
856 CSKYV1_ISA_E1),
857 DOP16 ("xtrb1",
858 OPCODE_INFO2 (0x0120,
859 (NONE, REG_r1a, OPRND_SHIFT_0_BIT),
860 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
861 OPCODE_INFO1 (0x0120,
862 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
863 CSKYV1_ISA_E1),
864 DOP16 ("xtrb0",
865 OPCODE_INFO2 (0x0130,
866 (NONE, REG_r1a, OPRND_SHIFT_0_BIT),
867 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
868 OPCODE_INFO1 (0x0130,
869 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
870 CSKYV1_ISA_E1),
871 DOP16 ("zextb",
872 OPCODE_INFO2 (0x0140,
873 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
874 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
875 OPCODE_INFO1 (0x0140,
876 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
877 CSKYV1_ISA_E1),
878 DOP16 ("sextb",
879 OPCODE_INFO2 (0x0150,
880 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
881 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
882 OPCODE_INFO1 (0x0150,
883 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
884 CSKYV1_ISA_E1),
885 DOP16 ("zexth",
886 OPCODE_INFO2 (0x0160,
887 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
888 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
889 OPCODE_INFO1 (0x0160,
890 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
891 CSKYV1_ISA_E1),
892 DOP16 ("sexth",
893 OPCODE_INFO2 (0x0170,
894 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
895 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
896 OPCODE_INFO1 (0x0170,
897 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
898 CSKYV1_ISA_E1),
899 DOP16 ("declt",
900 OPCODE_INFO3 (0x0180,
901 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
902 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
903 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
904 OPCODE_INFO1 (0x0180,
905 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
906 CSKYV1_ISA_E1),
907 OP16 ("tstnbz",
908 OPCODE_INFO1 (0x0190,
909 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
910 CSKYV1_ISA_E1),
911 DOP16 ("decgt",
912 OPCODE_INFO3 (0x01a0,
913 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
914 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
915 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
916 OPCODE_INFO1 (0x01a0,
917 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
918 CSKYV1_ISA_E1),
919 DOP16 ("decne",
920 OPCODE_INFO3 (0x01b0,
921 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
922 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
923 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
924 OPCODE_INFO1 (0x01b0,
925 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
926 CSKYV1_ISA_E1),
927 OP16 ("clrt",
928 OPCODE_INFO1 (0x01c0,
929 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
930 CSKYV1_ISA_E1),
931 OP16 ("clrf",
932 OPCODE_INFO1 (0x01d0,
933 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
934 CSKYV1_ISA_E1),
935 DOP16 ("abs",
936 OPCODE_INFO2 (0x01e0,
937 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
938 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
939 OPCODE_INFO1 (0x01e0,
940 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
941 CSKYV1_ISA_E1),
942 DOP16 ("not",
943 OPCODE_INFO2 (0x01f0,
944 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
945 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT)),
946 OPCODE_INFO1 (0x01f0,
947 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
948 CSKYV1_ISA_E1),
949 OP16 ("movt",
950 OPCODE_INFO2 (0x0200,
951 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
952 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
953 CSKYV1_ISA_E1),
954 DOP16 ("mult",
955 OPCODE_INFO3 (0x0300,
956 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
957 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
958 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
959 OPCODE_INFO2 (0x0300,
960 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
961 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
962 CSKYV1_ISA_E1),
963 OP16 ("mac",
964 OPCODE_INFO2 (0x0400,
965 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
966 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
967 CSKY_ISA_MAC),
968 DOP16 ("subu",
969 OPCODE_INFO3 (0x0500,
970 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
971 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
972 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
973 OPCODE_INFO2 (0x0500,
974 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
975 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
976 CSKYV1_ISA_E1),
977 DOP16 ("sub",
978 OPCODE_INFO3 (0x0500,
979 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
980 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
981 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
982 OPCODE_INFO2 (0x0500,
983 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
984 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
985 CSKYV1_ISA_E1),
986 DOP16 ("addc",
987 OPCODE_INFO3 (0x0600,
988 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
989 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
990 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
991 OPCODE_INFO2 (0x0600,
992 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
993 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
994 CSKYV1_ISA_E1),
995 DOP16 ("subc",
996 OPCODE_INFO3 (0x0700,
997 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
998 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
999 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1000 OPCODE_INFO2 (0x0700,
1001 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1002 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1003 CSKYV1_ISA_E1),
1004 OP16 ("cprgr",
1005 OPCODE_INFO2 (0x0800,
1006 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1007 (4_8, CPREG, OPRND_SHIFT_0_BIT)),
1008 CSKY_ISA_CP),
1009 OP16 ("movf",
1010 OPCODE_INFO2 (0x0a00,
1011 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1012 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1013 CSKYV1_ISA_E1),
1014 DOP16 ("lsr",
1015 OPCODE_INFO3 (0x0b00,
1016 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1017 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1018 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1019 OPCODE_INFO2 (0x0b00,
1020 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1021 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1022 CSKYV1_ISA_E1),
1023 OP16 ("cmphs",
1024 OPCODE_INFO2 (0x0c00,
1025 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1026 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1027 CSKYV1_ISA_E1),
1028 OP16 ("cmplt",
1029 OPCODE_INFO2 (0x0d00,
1030 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1031 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1032 CSKYV1_ISA_E1),
1033 OP16 ("tst",
1034 OPCODE_INFO2 (0x0e00,
1035 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1036 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1037 CSKYV1_ISA_E1),
1038 OP16 ("cmpne",
1039 OPCODE_INFO2 (0x0f00,
1040 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1041 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1042 CSKYV1_ISA_E1),
1043 OP16 ("mfcr",
1044 OPCODE_INFO2 (0x1000,
1045 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1046 (4_8, CTRLREG, OPRND_SHIFT_0_BIT)),
1047 CSKYV1_ISA_E1),
1048 OP16 ("psrclr",
1049 OPCODE_INFO_LIST (0x11f0,
1050 (0_2, PSR_BITS_LIST, OPRND_SHIFT_0_BIT)),
1051 CSKYV1_ISA_E1),
1052 OP16 ("psrset",
1053 OPCODE_INFO_LIST (0x11f8,
1054 (0_2, PSR_BITS_LIST, OPRND_SHIFT_0_BIT)),
1055 CSKYV1_ISA_E1),
1056 OP16 ("mov",
1057 OPCODE_INFO2 (0x1200,
1058 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1059 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1060 CSKYV1_ISA_E1),
1061 OP16 ("bgenr",
1062 OPCODE_INFO2 (0x1300,
1063 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1064 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1065 CSKYV1_ISA_E1),
1066 DOP16 ("rsub",
1067 OPCODE_INFO3 (0x1400,
1068 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1069 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1070 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1071 OPCODE_INFO2 (0x1400,
1072 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1073 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1074 CSKYV1_ISA_E1),
1075 DOP16 ("ixw",
1076 OPCODE_INFO3 (0x1500,
1077 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1078 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1079 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1080 OPCODE_INFO2 (0x1500,
1081 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1082 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1083 CSKYV1_ISA_E1),
1084 DOP16 ("and",
1085 OPCODE_INFO3 (0x1600,
1086 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1087 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1088 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1089 OPCODE_INFO2 (0x1600,
1090 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1091 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1092 CSKYV1_ISA_E1),
1093 DOP16 ("xor",
1094 OPCODE_INFO3 (0x1700,
1095 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1096 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1097 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1098 OPCODE_INFO2 (0x1700,
1099 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1100 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1101 CSKYV1_ISA_E1),
1102 OP16 ("mtcr",
1103 OPCODE_INFO2 (0x1800,
1104 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1105 (4_8, CTRLREG, OPRND_SHIFT_0_BIT)),
1106 CSKYV1_ISA_E1),
1107 DOP16 ("asr",
1108 OPCODE_INFO3 (0x1a00,
1109 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1110 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1111 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1112 OPCODE_INFO2 (0x1a00,
1113 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1114 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1115 CSKYV1_ISA_E1),
1116 DOP16 ("lsl",
1117 OPCODE_INFO3 (0x1b00,
1118 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1119 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1120 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1121 OPCODE_INFO2 (0x1b00,
1122 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1123 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1124 CSKYV1_ISA_E1),
1125 DOP16 ("addu",
1126 OPCODE_INFO3 (0x1c00,
1127 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1128 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1129 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1130 OPCODE_INFO2 (0x1c00,
1131 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1132 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1133 CSKYV1_ISA_E1),
1134 OP16 ("add",
1135 OPCODE_INFO2 (0x1c00,
1136 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1137 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1138 CSKYV1_ISA_E1),
1139 DOP16 ("ixh",
1140 OPCODE_INFO3 (0x1d00,
1141 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1142 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1143 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1144 OPCODE_INFO2 (0x1d00,
1145 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1146 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1147 CSKYV1_ISA_E1),
1148 DOP16 ("or",
1149 OPCODE_INFO3 (0x1e00,
1150 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1151 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1152 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1153 OPCODE_INFO2 (0x1e00,
1154 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1155 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1156 CSKYV1_ISA_E1),
1157 DOP16 ("andn",
1158 OPCODE_INFO3 (0x1f00,
1159 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1160 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1161 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1162 OPCODE_INFO2 (0x1f00,
1163 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1164 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1165 CSKYV1_ISA_E1),
1166 DOP16 ("addi",
1167 OPCODE_INFO3 (0x2000,
1168 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1169 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1170 (4_8, OIMM5b, OPRND_SHIFT_0_BIT)),
1171 OPCODE_INFO2 (0x2000,
1172 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1173 (4_8, OIMM5b, OPRND_SHIFT_0_BIT)),
1174 CSKYV1_ISA_E1),
1175 OP16 ("cmplti",
1176 OPCODE_INFO2 (0x2200,
1177 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1178 (4_8, OIMM5b, OPRND_SHIFT_0_BIT)),
1179 CSKYV1_ISA_E1),
1180 DOP16 ("subi",
1181 OPCODE_INFO3 (0x2400,
1182 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1183 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1184 (4_8, OIMM5b, OPRND_SHIFT_0_BIT)),
1185 OPCODE_INFO2 (0x2400,
1186 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1187 (4_8, OIMM5b, OPRND_SHIFT_0_BIT)),
1188 CSKYV1_ISA_E1),
1189 OP16 ("cpwgr",
1190 OPCODE_INFO2 (0x2600,
1191 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1192 (4_8, CPREG, OPRND_SHIFT_0_BIT)),
1193 CSKY_ISA_CP),
1194 DOP16 ("rsubi",
1195 OPCODE_INFO3 (0x2800,
1196 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1197 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1198 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1199 OPCODE_INFO2 (0x2800,
1200 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1201 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1202 CSKYV1_ISA_E1),
1203 OP16 ("cmpnei",
1204 OPCODE_INFO2 (0x2a00,
1205 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1206 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1207 CSKYV1_ISA_E1),
1208 OP16 ("bmaski",
1209 OPCODE_INFO2 (0x2c00,
1210 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1211 (4_8, IMM5b_BMASKI, OPRND_SHIFT_0_BIT)),
1212 CSKYV1_ISA_E1),
1213 DOP16 ("divu",
1214 OPCODE_INFO3 (0x2c10,
1215 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1216 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1217 (NONE, REG_r1b, OPRND_SHIFT_0_BIT)),
1218 OPCODE_INFO2 (0x2c10,
1219 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1220 (NONE, REG_r1b, OPRND_SHIFT_0_BIT)),
1221 CSKYV1_ISA_E1),
1222 OP16 ("mflos",
1223 OPCODE_INFO1 (0x2c20,
1224 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1225 CSKY_ISA_MAC_DSP),
1226 OP16 ("mfhis",
1227 OPCODE_INFO1 (0x2c30,
1228 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1229 CSKY_ISA_MAC_DSP),
1230 OP16 ("mtlo",
1231 OPCODE_INFO1 (0x2c40,
1232 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1233 CSKY_ISA_MAC_DSP),
1234 OP16 ("mthi",
1235 OPCODE_INFO1 (0x2c50,
1236 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1237 CSKY_ISA_MAC_DSP),
1238 OP16 ("mflo",
1239 OPCODE_INFO1 (0x2c60,
1240 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1241 CSKY_ISA_MAC_DSP),
1242 OP16 ("mfhi",
1243 OPCODE_INFO1 (0x2c70,
1244 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1245 CSKY_ISA_MAC_DSP),
1246 DOP16 ("andi",
1247 OPCODE_INFO3 (0x2e00,
1248 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1249 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1250 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1251 OPCODE_INFO2 (0x2e00,
1252 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1253 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1254 CSKYV1_ISA_E1),
1255 DOP16 ("bclri",
1256 OPCODE_INFO3 (0x3000,
1257 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1258 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1259 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1260 OPCODE_INFO2 (0x3000,
1261 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1262 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1263 CSKYV1_ISA_E1),
1264 OP16 ("bgeni",
1265 OPCODE_INFO2 (0x3200,
1266 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1267 (4_8, IMM5b_7_31, OPRND_SHIFT_0_BIT)),
1268 CSKYV1_ISA_E1),
1269 OP16 ("cpwir",
1270 OPCODE_INFO1 (0x3200,
1271 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1272 CSKY_ISA_CP),
1273 DOP16 ("divs",
1274 OPCODE_INFO3 (0x3210,
1275 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1276 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1277 (NONE, REG_r1b, OPRND_SHIFT_0_BIT)),
1278 OPCODE_INFO2 (0x3210,
1279 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1280 (NONE, REG_r1b, OPRND_SHIFT_0_BIT)),
1281 CSKYV1_ISA_E1),
1282 OP16 ("cprsr",
1283 OPCODE_INFO1 (0x3220,
1284 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1285 CSKY_ISA_CP),
1286 OP16 ("cpwsr",
1287 OPCODE_INFO1 (0x3230,
1288 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1289 CSKY_ISA_CP),
1290 DOP16 ("bseti",
1291 OPCODE_INFO3 (0x3400,
1292 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1293 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1294 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1295 OPCODE_INFO2 (0x3400,
1296 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1297 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1298 CSKYV1_ISA_E1),
1299 OP16 ("btsti",
1300 OPCODE_INFO2 (0x3600,
1301 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1302 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1303 CSKYV1_ISA_E1),
1304 DOP16 ("rotli",
1305 OPCODE_INFO3 (0x3800,
1306 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1307 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1308 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1309 OPCODE_INFO2 (0x3800,
1310 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1311 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1312 CSKYV1_ISA_E1),
1313 DOP16 ("xsr",
1314 OPCODE_INFO3 (0x3800,
1315 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1316 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1317 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
1318 OPCODE_INFO1 (0x3800,
1319 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1320 CSKYV1_ISA_E1),
1321 DOP16 ("asrc",
1322 OPCODE_INFO3 (0x3a00,
1323 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1324 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1325 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
1326 OPCODE_INFO1 (0x3a00,
1327 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1328 CSKYV1_ISA_E1),
1329 DOP16 ("asri",
1330 OPCODE_INFO3 (0x3a00,
1331 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1332 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1333 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1334 OPCODE_INFO2 (0x3a00,
1335 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1336 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1337 CSKYV1_ISA_E1),
1338 DOP16 ("lslc",
1339 OPCODE_INFO3 (0x3c00,
1340 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1341 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1342 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
1343 OPCODE_INFO1 (0x3c00,
1344 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1345 CSKYV1_ISA_E1),
1346 DOP16 ("lsli",
1347 OPCODE_INFO3 (0x3c00,
1348 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1349 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1350 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1351 OPCODE_INFO2 (0x3c00,
1352 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1353 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1354 CSKYV1_ISA_E1),
1355 DOP16 ("lsrc",
1356 OPCODE_INFO3 (0x3e00,
1357 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1358 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1359 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
1360 OPCODE_INFO1 (0x3e00,
1361 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1362 CSKYV1_ISA_E1),
1363 DOP16 ("lsri",
1364 OPCODE_INFO3 (0x3e00,
1365 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1366 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1367 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1368 OPCODE_INFO2 (0x3e00,
1369 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1370 (4_8, IMM5b_1_31, OPRND_SHIFT_0_BIT)),
1371 CSKYV1_ISA_E1),
1372 OP16 ("ldex",
1373 SOPCODE_INFO2 (0x4000,
1374 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1375 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1376 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1377 CSKY_ISA_MP),
1378 OP16 ("ldex.w",
1379 SOPCODE_INFO2 (0x4000,
1380 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1381 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1382 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1383 CSKY_ISA_MP),
1384 OP16 ("ldwex",
1385 SOPCODE_INFO2 (0x4000,
1386 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1387 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1388 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1389 CSKY_ISA_MP),
1390 OP16 ("stex",
1391 SOPCODE_INFO2 (0x5000,
1392 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1393 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1394 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1395 CSKY_ISA_MP),
1396 OP16 ("stex.w",
1397 SOPCODE_INFO2 (0x5000,
1398 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1399 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1400 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1401 CSKY_ISA_MP),
1402 OP16 ("stwex",
1403 SOPCODE_INFO2 (0x5000,
1404 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1405 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1406 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1407 CSKY_ISA_MP),
1408 OP16 ("omflip0",
1409 OPCODE_INFO2 (0x4000,
1410 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1411 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1412 CSKY_ISA_MAC),
1413 OP16 ("omflip1",
1414 OPCODE_INFO2 (0x4100,
1415 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1416 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1417 CSKY_ISA_MAC),
1418 OP16 ("omflip2",
1419 OPCODE_INFO2 (0x4200,
1420 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1421 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1422 CSKY_ISA_MAC),
1423 OP16 ("omflip3",
1424 OPCODE_INFO2 (0x4300,
1425 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1426 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1427 CSKY_ISA_MAC),
1428 OP16 ("muls",
1429 OPCODE_INFO2 (0x5000,
1430 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1431 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1432 CSKY_ISA_DSP),
1433 OP16 ("mulsa",
1434 OPCODE_INFO2 (0x5100,
1435 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1436 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1437 CSKY_ISA_DSP),
1438 OP16 ("mulss",
1439 OPCODE_INFO2 (0x5200,
1440 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1441 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1442 CSKY_ISA_DSP),
1443 OP16 ("mulu",
1444 OPCODE_INFO2 (0x5400,
1445 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1446 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1447 CSKY_ISA_DSP),
1448 OP16 ("mulua",
1449 OPCODE_INFO2 (0x5500,
1450 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1451 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1452 CSKY_ISA_DSP),
1453 OP16 ("mulus",
1454 OPCODE_INFO2 (0x5600,
1455 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1456 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1457 CSKY_ISA_DSP),
1458 OP16 ("vmulsh",
1459 OPCODE_INFO2 (0x5800,
1460 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1461 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1462 CSKY_ISA_DSP),
1463 OP16 ("vmulsha",
1464 OPCODE_INFO2 (0x5900,
1465 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1466 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1467 CSKY_ISA_DSP),
1468 OP16 ("vmulshs",
1469 OPCODE_INFO2 (0x5a00,
1470 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1471 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1472 CSKY_ISA_DSP),
1473 OP16 ("vmulsw",
1474 OPCODE_INFO2 (0x5c00,
1475 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1476 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1477 CSKY_ISA_DSP),
1478 OP16 ("vmulswa",
1479 OPCODE_INFO2 (0x5d00,
1480 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1481 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1482 CSKY_ISA_DSP),
1483 OP16 ("vmulsws",
1484 OPCODE_INFO2 (0x5e00,
1485 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1486 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1487 CSKY_ISA_DSP),
1488 OP16 ("movi",
1489 OPCODE_INFO2 (0x6000,
1490 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1491 (4_10, IMM7b, OPRND_SHIFT_0_BIT)),
1492 CSKYV1_ISA_E1),
1493 DOP16 ("mulsh",
1494 OPCODE_INFO3 (0x6800,
1495 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1496 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1497 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1498 OPCODE_INFO2 (0x6800,
1499 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1500 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1501 CSKYV1_ISA_E1),
1502 DOP16 ("mulsh.h",
1503 OPCODE_INFO3 (0x6800,
1504 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1505 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
1506 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1507 OPCODE_INFO2 (0x6800,
1508 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1509 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1510 CSKYV1_ISA_E1),
1511 OP16 ("mulsha",
1512 OPCODE_INFO2 (0x6900,
1513 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1514 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1515 CSKY_ISA_DSP),
1516 OP16 ("mulshs",
1517 OPCODE_INFO2 (0x6a00,
1518 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1519 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1520 CSKY_ISA_DSP),
1521 OP16 ("cprcr",
1522 OPCODE_INFO2 (0x6b00,
1523 (0_2, GREG0_7, OPRND_SHIFT_0_BIT),
1524 (3_7, CPCREG, OPRND_SHIFT_0_BIT)),
1525 CSKY_ISA_CP),
1526 OP16 ("mulsw",
1527 OPCODE_INFO2 (0x6c00,
1528 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1529 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1530 CSKY_ISA_DSP),
1531 OP16 ("mulswa",
1532 OPCODE_INFO2 (0x6d00,
1533 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1534 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1535 CSKY_ISA_DSP),
1536 OP16 ("mulsws",
1537 OPCODE_INFO2 (0x6e00,
1538 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1539 (4_7, GREG0_15, OPRND_SHIFT_0_BIT)),
1540 CSKY_ISA_DSP),
1541 OP16 ("cpwcr",
1542 OPCODE_INFO2 (0x6f00,
1543 (0_2, GREG0_7, OPRND_SHIFT_0_BIT),
1544 (3_7, CPCREG, OPRND_SHIFT_0_BIT)),
1545 CSKY_ISA_CP),
1546#undef _RELOC16
1547#define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM8BY4
1548#undef _TRANSFER
1549#define _TRANSFER 1
1550 OP16 ("jmpi",
1551 OPCODE_INFO1 (0x7000,
1552 (0_7, OFF8b, OPRND_SHIFT_2_BIT)),
1553 CSKYV1_ISA_E1),
1554#undef _TRANSFER
1555#define _TRANSFER 0
1556 OP16 ("jsri",
1557 OPCODE_INFO1 (0x7f00,
1558 (0_7, OFF8b, OPRND_SHIFT_2_BIT)),
1559 CSKYV1_ISA_E1),
1560 OP16_WITH_WORK ("lrw",
1561 OPCODE_INFO2 (0x7000,
1562 (8_11, REGnsplr, OPRND_SHIFT_0_BIT),
1563 (0_7, CONSTANT, OPRND_SHIFT_2_BIT)),
1564 CSKYV1_ISA_E1,
1565 v1_work_lrw),
1566#undef _RELOC16
1567#define _RELOC16 0
1568 DOP16 ("ld.w",
1569 SOPCODE_INFO2 (0x8000,
1570 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1571 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1572 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1573 OPCODE_INFO2 (0x8000,
1574 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1575 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1576 CSKYV1_ISA_E1),
1577 DOP16 ("ldw",
1578 SOPCODE_INFO2 (0x8000,
1579 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1580 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1581 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1582 OPCODE_INFO2 (0x8000,
1583 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1584 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1585 CSKYV1_ISA_E1),
1586 DOP16 ("ld",
1587 SOPCODE_INFO2 (0x8000,
1588 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1589 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1590 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1591 OPCODE_INFO2 (0x8000,
1592 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1593 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1594 CSKYV1_ISA_E1),
1595 DOP16 ("st.w",
1596 SOPCODE_INFO2 (0x9000,
1597 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1598 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1599 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1600 OPCODE_INFO2 (0x9000,
1601 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1602 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1603 CSKYV1_ISA_E1),
1604 DOP16 ("stw",
1605 SOPCODE_INFO2 (0x9000,
1606 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1607 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1608 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1609 OPCODE_INFO2 (0x9000,
1610 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1611 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1612 CSKYV1_ISA_E1),
1613 DOP16 ("st",
1614 SOPCODE_INFO2 (0x9000,
1615 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1616 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1617 (4_7, IMM_LDST, OPRND_SHIFT_2_BIT))),
1618 OPCODE_INFO2 (0x9000,
1619 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1620 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1621 CSKYV1_ISA_E1),
1622 DOP16 ("ld.b",
1623 SOPCODE_INFO2 (0xa000,
1624 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1625 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1626 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1627 OPCODE_INFO2 (0xa000,
1628 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1629 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1630 CSKYV1_ISA_E1),
1631 DOP16 ("ldb",
1632 SOPCODE_INFO2 (0xa000,
1633 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1634 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1635 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1636 OPCODE_INFO2 (0xa000,
1637 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1638 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1639 CSKYV1_ISA_E1),
1640 DOP16 ("st.b",
1641 SOPCODE_INFO2 (0xb000,
1642 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1643 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1644 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1645 OPCODE_INFO2 (0xb000,
1646 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1647 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1648 CSKYV1_ISA_E1),
1649 DOP16 ("stb",
1650 SOPCODE_INFO2 (0xb000,
1651 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1652 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1653 (4_7, IMM_LDST, OPRND_SHIFT_0_BIT))),
1654 OPCODE_INFO2 (0xb000,
1655 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1656 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1657 CSKYV1_ISA_E1),
1658 DOP16 ("ld.h",
1659 SOPCODE_INFO2 (0xc000,
1660 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1661 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1662 (4_7, IMM_LDST, OPRND_SHIFT_1_BIT))),
1663 OPCODE_INFO2 (0xc000,
1664 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1665 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1666 CSKYV1_ISA_E1),
1667 DOP16 ("ldh",
1668 SOPCODE_INFO2 (0xc000,
1669 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1670 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1671 (4_7, IMM_LDST, OPRND_SHIFT_1_BIT))),
1672 OPCODE_INFO2 (0xc000,
1673 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1674 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1675 CSKYV1_ISA_E1),
1676 DOP16 ("st.h",
1677 SOPCODE_INFO2 (0xd000,
1678 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1679 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1680 (4_7, IMM_LDST, OPRND_SHIFT_1_BIT))),
1681 OPCODE_INFO2 (0xd000,
1682 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1683 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1684 CSKYV1_ISA_E1),
1685 DOP16 ("sth",
1686 SOPCODE_INFO2 (0xd000,
1687 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1688 BRACKET_OPRND ((0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1689 (4_7, IMM_LDST, OPRND_SHIFT_1_BIT))),
1690 OPCODE_INFO2 (0xd000,
1691 (8_11, GREG0_15, OPRND_SHIFT_0_BIT),
1692 (0_3, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
1693 CSKYV1_ISA_E1),
1694
1695#undef _RELOC16
1696#define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM11BY2
1697 OP16 ("bt",
1698 OPCODE_INFO1 (0xe000,
1699 (0_10, OFF11b, OPRND_SHIFT_1_BIT)),
1700 CSKYV1_ISA_E1),
1701 OP16 ("bf",
1702 OPCODE_INFO1 (0xe800,
1703 (0_10, OFF11b, OPRND_SHIFT_1_BIT)),
1704 CSKYV1_ISA_E1),
1705#undef _TRANSFER
1706#define _TRANSFER 1
1707 OP16 ("br",
1708 OPCODE_INFO1 (0xf000,
1709 (0_10, OFF11b, OPRND_SHIFT_1_BIT)),
1710 CSKYV1_ISA_E1),
1711#undef _TRANSFER
1712#define _TRANSFER 0
1713 OP16 ("bsr",
1714 OPCODE_INFO1 (0xf800,
1715 (0_10, OFF11b, OPRND_SHIFT_1_BIT)),
1716 CSKYV1_ISA_E1),
1717#undef _RELOC16
1718#define _RELOC16 0
1719
1720#undef _RELAX
1721#define _RELAX 1
1722 OP16 ("jbt",
1723 OPCODE_INFO1 (0xe000,
1724 (0_10, JBTF, OPRND_SHIFT_0_BIT)),
1725 CSKYV1_ISA_E1),
1726 OP16 ("jbf",
1727 OPCODE_INFO1 (0xe800,
1728 (0_10, JBTF, OPRND_SHIFT_0_BIT)),
1729 CSKYV1_ISA_E1),
1730#undef _TRANSFER
1731#define _TRANSFER 1
1732 OP16 ("jbr",
1733 OPCODE_INFO1 (0xf000,
1734 (0_10, JBR, OPRND_SHIFT_0_BIT)),
1735 CSKYV1_ISA_E1),
1736#undef _TRANSFER
1737#define _TRANSFER 0
1738#undef _RELAX
1739#define _RELAX 0
1740
1741 OP16_WITH_WORK ("jbsr",
1742 OPCODE_INFO1 (0xf800,
1743 (0_10, JBSR, OPRND_SHIFT_0_BIT)),
1744 CSKYV1_ISA_E1,
1745 v1_work_jbsr),
1746
1747 /* The following are aliases for other instructions. */
1748 /* rts -> jmp r15. */
1749#undef _TRANSFER
1750#define _TRANSFER 2
1751 OP16 ("rts",
1752 OPCODE_INFO0 (0x00CF),
1753 CSKYV1_ISA_E1),
1754 OP16 ("rte",
1755 OPCODE_INFO0 (0x0002),
1756 CSKYV1_ISA_E1),
1757 OP16 ("rfe",
1758 OPCODE_INFO0 (0x0002),
1759 CSKYV1_ISA_E1),
1760#undef _TRANSFER
1761#define _TRANSFER 0
1762
1763 /* cmphs r0,r0 */
1764 OP16 ("setc",
1765 OPCODE_INFO0 (0x0c00),
1766 CSKYV1_ISA_E1),
1767 /* cmpne r0,r0 */
1768 OP16 ("clrc",
1769 OPCODE_INFO0 (0x0f00),
1770 CSKYV1_ISA_E1),
1771 /* cmplti rd,1 */
1772 OP16 ("tstle",
1773 OPCODE_INFO1 (0x2200,
1774 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1775 CSKYV1_ISA_E1),
1776 /* cmplei rd,X -> cmplti rd,X+1 */
1777 OP16 ("cmplei",
1778 OPCODE_INFO2 (0x2200,
1779 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1780 (4_8, IMM5b, OPRND_SHIFT_0_BIT)),
1781 CSKYV1_ISA_E1),
1782 /* rsubi rd,0 */
1783 OP16 ("neg",
1784 OPCODE_INFO1 (0x2800,
1785 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1786 CSKYV1_ISA_E1),
1787 /* cmpnei rd,0. */
1788 OP16 ("tstne",
1789 OPCODE_INFO1 (0x2a00,
1790 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1791 CSKYV1_ISA_E1),
1792 /* btsti rx,31. */
1793 OP16 ("tstlt",
1794 OPCODE_INFO1 (0x37f0,
1795 (0_3, GREG0_15, OPRND_SHIFT_0_BIT)),
1796 CSKYV1_ISA_E1),
1797 /* bclri rx,log2(imm). */
1798 OP16 ("mclri",
1799 OPCODE_INFO2 (0x3000,
1800 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1801 (4_8, IMM5b_POWER, OPRND_SHIFT_0_BIT)),
1802 CSKYV1_ISA_E1),
1803 /* bgeni rx,log2(imm). */
1804 OP16 ("mgeni",
1805 OPCODE_INFO2 (0x3200,
1806 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1807 (4_8, IMM5b_7_31_POWER, OPRND_SHIFT_0_BIT)),
1808 CSKYV1_ISA_E1),
1809 /* bseti rx,log2(imm). */
1810 OP16 ("mseti",
1811 OPCODE_INFO2 (0x3400,
1812 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1813 (4_8, IMM5b_POWER, OPRND_SHIFT_0_BIT)),
1814 CSKYV1_ISA_E1),
1815 /* btsti rx,log2(imm). */
1816 OP16 ("mtsti",
1817 OPCODE_INFO2 (0x3600,
1818 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1819 (4_8, IMM5b_POWER, OPRND_SHIFT_0_BIT)),
1820 CSKYV1_ISA_E1),
1821 OP16 ("rori",
1822 OPCODE_INFO2 (0x3800,
1823 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1824 (4_8, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
1825 CSKYV1_ISA_E1),
1826 OP16 ("rotri",
1827 OPCODE_INFO2 (0x3800,
1828 (0_3, GREG0_15, OPRND_SHIFT_0_BIT),
1829 (4_8, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
1830 CSKYV1_ISA_E1),
1831 /* mov r0, r0. */
1832 OP16 ("nop",
1833 OPCODE_INFO0 (0x1200),
1834 CSKYV1_ISA_E1),
1835
1836 /* Float instruction with work. */
1837 OP16_WITH_WORK ("fabss",
1838 OPCODE_INFO3 (0xffe04400,
1839 (5_9, FREG, OPRND_SHIFT_0_BIT),
1840 (0_4, FREG, OPRND_SHIFT_0_BIT),
1841 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1842 CSKY_ISA_FLOAT_E1,
1843 v1_work_fpu_fo),
1844 OP16_WITH_WORK ("fnegs",
1845 OPCODE_INFO3 (0xffe04c00,
1846 (5_9, FREG, OPRND_SHIFT_0_BIT),
1847 (0_4, FREG, OPRND_SHIFT_0_BIT),
1848 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1849 CSKY_ISA_FLOAT_E1,
1850 v1_work_fpu_fo),
1851 OP16_WITH_WORK ("fsqrts",
1852 OPCODE_INFO3 (0xffe05400,
1853 (5_9, FREG, OPRND_SHIFT_0_BIT),
1854 (0_4, FREG, OPRND_SHIFT_0_BIT),
1855 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1856 CSKY_ISA_FLOAT_E1,
1857 v1_work_fpu_fo),
1858 OP16_WITH_WORK ("frecips",
1859 OPCODE_INFO3 (0xffe05c00,
1860 (5_9, FREG, OPRND_SHIFT_0_BIT),
1861 (0_4, FREG, OPRND_SHIFT_0_BIT),
1862 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1863 CSKY_ISA_FLOAT_E1,
1864 v1_work_fpu_fo),
1865 OP16_WITH_WORK ("fadds",
1866 OPCODE_INFO4 (0xffe38000,
1867 (5_9, FREG, OPRND_SHIFT_0_BIT),
1868 (0_4, FREG, OPRND_SHIFT_0_BIT),
1869 (10_14, FREG, OPRND_SHIFT_0_BIT),
1870 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1871 CSKY_ISA_FLOAT_E1,
1872 v1_work_fpu_fo),
1873 OP16_WITH_WORK ("fsubs",
1874 OPCODE_INFO4 (0xffe48000,
1875 (5_9, FREG, OPRND_SHIFT_0_BIT),
1876 (0_4, FREG, OPRND_SHIFT_0_BIT),
1877 (10_14, FREG, OPRND_SHIFT_0_BIT),
1878 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1879 CSKY_ISA_FLOAT_E1, v1_work_fpu_fo),
1880 OP16_WITH_WORK ("fmacs",
1881 OPCODE_INFO4 (0xffe58000,
1882 (5_9, FREG, OPRND_SHIFT_0_BIT),
1883 (0_4, FREG, OPRND_SHIFT_0_BIT),
1884 (10_14, FREG, OPRND_SHIFT_0_BIT),
1885 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1886 CSKY_ISA_FLOAT_E1,
1887 v1_work_fpu_fo),
1888 OP16_WITH_WORK ("fmscs",
1889 OPCODE_INFO4 (0xffe68000,
1890 (5_9, FREG, OPRND_SHIFT_0_BIT),
1891 (0_4, FREG, OPRND_SHIFT_0_BIT),
1892 (10_14, FREG, OPRND_SHIFT_0_BIT),
1893 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1894 CSKY_ISA_FLOAT_E1,
1895 v1_work_fpu_fo),
1896 OP16_WITH_WORK ("fmuls",
1897 OPCODE_INFO4 (0xffe78000,
1898 (5_9, FREG, OPRND_SHIFT_0_BIT),
1899 (0_4, FREG, OPRND_SHIFT_0_BIT),
1900 (10_14, FREG, OPRND_SHIFT_0_BIT),
1901 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1902 CSKY_ISA_FLOAT_E1,
1903 v1_work_fpu_fo),
1904 OP16_WITH_WORK ("fdivs",
1905 OPCODE_INFO4 (0xffe88000,
1906 (5_9, FREG, OPRND_SHIFT_0_BIT),
1907 (0_4, FREG, OPRND_SHIFT_0_BIT),
1908 (10_14, FREG, OPRND_SHIFT_0_BIT),
1909 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1910 CSKY_ISA_FLOAT_E1,
1911 v1_work_fpu_fo),
1912 OP16_WITH_WORK ("fnmacs",
1913 OPCODE_INFO4 (0xffe98000,
1914 (5_9, FREG, OPRND_SHIFT_0_BIT),
1915 (0_4, FREG, OPRND_SHIFT_0_BIT),
1916 (10_14, FREG, OPRND_SHIFT_0_BIT),
1917 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1918 CSKY_ISA_FLOAT_E1,
1919 v1_work_fpu_fo),
1920 OP16_WITH_WORK ("fnmscs",
1921 OPCODE_INFO4 (0xffea8000,
1922 (5_9, FREG, OPRND_SHIFT_0_BIT),
1923 (0_4, FREG, OPRND_SHIFT_0_BIT),
1924 (10_14, FREG, OPRND_SHIFT_0_BIT),
1925 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1926 CSKY_ISA_FLOAT_E1,
1927 v1_work_fpu_fo),
1928 OP16_WITH_WORK ("fnmuls",
1929 OPCODE_INFO4 (0xffeb8000,
1930 (5_9, FREG, OPRND_SHIFT_0_BIT),
1931 (0_4, FREG, OPRND_SHIFT_0_BIT),
1932 (10_14, FREG, OPRND_SHIFT_0_BIT),
1933 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1934 CSKY_ISA_FLOAT_E1,
1935 v1_work_fpu_fo),
1936 OP16_WITH_WORK ("fabsd",
1937 OPCODE_INFO3 (0xffe04000,
1938 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1939 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1940 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1941 CSKY_ISA_FLOAT_E1,
1942 v1_work_fpu_fo),
1943 OP16_WITH_WORK ("fnegd",
1944 OPCODE_INFO3 (0xffe04800,
1945 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1946 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1947 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1948 CSKY_ISA_FLOAT_E1,
1949 v1_work_fpu_fo),
1950 OP16_WITH_WORK ("fsqrtd",
1951 OPCODE_INFO3 (0xffe05000,
1952 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1953 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1954 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1955 CSKY_ISA_FLOAT_E1,
1956 v1_work_fpu_fo),
1957 OP16_WITH_WORK ("frecipd",
1958 OPCODE_INFO3 (0xffe05800,
1959 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1960 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1961 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1962 CSKY_ISA_FLOAT_E1,
1963 v1_work_fpu_fo),
1964 OP16_WITH_WORK ("faddd",
1965 OPCODE_INFO4 (0xffe30000,
1966 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1967 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1968 (10_14, FEREG, OPRND_SHIFT_0_BIT),
1969 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1970 CSKY_ISA_FLOAT_E1,
1971 v1_work_fpu_fo),
1972 OP16_WITH_WORK ("fsubd",
1973 OPCODE_INFO4 (0xffe40000,
1974 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1975 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1976 (10_14, FEREG, OPRND_SHIFT_0_BIT),
1977 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1978 CSKY_ISA_FLOAT_E1,
1979 v1_work_fpu_fo),
1980 OP16_WITH_WORK ("fmacd",
1981 OPCODE_INFO4 (0xffe50000,
1982 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1983 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1984 (10_14, FEREG, OPRND_SHIFT_0_BIT),
1985 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1986 CSKY_ISA_FLOAT_E1,
1987 v1_work_fpu_fo),
1988 OP16_WITH_WORK ("fmscd",
1989 OPCODE_INFO4 (0xffe60000,
1990 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1991 (0_4, FEREG, OPRND_SHIFT_0_BIT),
1992 (10_14, FEREG, OPRND_SHIFT_0_BIT),
1993 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
1994 CSKY_ISA_FLOAT_E1,
1995 v1_work_fpu_fo),
1996 OP16_WITH_WORK ("fmuld",
1997 OPCODE_INFO4 (0xffe70000,
1998 (5_9, FEREG, OPRND_SHIFT_0_BIT),
1999 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2000 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2001 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2002 CSKY_ISA_FLOAT_E1,
2003 v1_work_fpu_fo),
2004 OP16_WITH_WORK ("fdivd",
2005 OPCODE_INFO4 (0xffe80000,
2006 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2007 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2008 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2009 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2010 CSKY_ISA_FLOAT_E1,
2011 v1_work_fpu_fo),
2012 OP16_WITH_WORK ("fnmacd",
2013 OPCODE_INFO4 (0xffe90000,
2014 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2015 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2016 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2017 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2018 CSKY_ISA_FLOAT_E1,
2019 v1_work_fpu_fo),
2020 OP16_WITH_WORK ("fnmscd",
2021 OPCODE_INFO4 (0xffea0000,
2022 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2023 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2024 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2025 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2026 CSKY_ISA_FLOAT_E1,
2027 v1_work_fpu_fo),
2028 OP16_WITH_WORK ("fnmuld",
2029 OPCODE_INFO4 (0xffeb0000,
2030 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2031 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2032 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2033 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2034 CSKY_ISA_FLOAT_E1,
2035 v1_work_fpu_fo),
2036 OP16_WITH_WORK ("fabsm",
2037 OPCODE_INFO3 (0xffe06000,
2038 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2039 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2040 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2041 CSKY_ISA_FLOAT_E1,
2042 v1_work_fpu_fo),
2043 OP16_WITH_WORK ("fnegm",
2044 OPCODE_INFO3 (0xffe06400,
2045 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2046 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2047 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2048 CSKY_ISA_FLOAT_E1,
2049 v1_work_fpu_fo),
2050 OP16_WITH_WORK ("faddm",
2051 OPCODE_INFO4 (0xffec0000,
2052 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2053 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2054 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2055 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2056 CSKY_ISA_FLOAT_E1,
2057 v1_work_fpu_fo),
2058 OP16_WITH_WORK ("fsubm",
2059 OPCODE_INFO4 (0xffec8000,
2060 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2061 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2062 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2063 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2064 CSKY_ISA_FLOAT_E1,
2065 v1_work_fpu_fo),
2066 OP16_WITH_WORK ("fmacm",
2067 OPCODE_INFO4 (0xffed8000,
2068 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2069 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2070 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2071 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2072 CSKY_ISA_FLOAT_E1,
2073 v1_work_fpu_fo),
2074 OP16_WITH_WORK ("fmscm",
2075 OPCODE_INFO4 (0xffee0000,
2076 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2077 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2078 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2079 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2080 CSKY_ISA_FLOAT_E1,
2081 v1_work_fpu_fo),
2082 OP16_WITH_WORK ("fmulm",
2083 OPCODE_INFO4 (0xffed0000,
2084 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2085 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2086 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2087 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2088 CSKY_ISA_FLOAT_E1,
2089 v1_work_fpu_fo),
2090 OP16_WITH_WORK ("fnmacm",
2091 OPCODE_INFO4 (0xffee8000,
2092 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2093 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2094 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2095 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2096 CSKY_ISA_FLOAT_E1,
2097 v1_work_fpu_fo),
2098 OP16_WITH_WORK ("fnmscm",
2099 OPCODE_INFO4 (0xffef0000,
2100 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2101 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2102 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2103 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2104 CSKY_ISA_FLOAT_E1,
2105 v1_work_fpu_fo),
2106 OP16_WITH_WORK ("fnmulm",
2107 OPCODE_INFO4 (0xffef8000,
2108 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2109 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2110 (10_14, FEREG, OPRND_SHIFT_0_BIT),
2111 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2112 CSKY_ISA_FLOAT_E1,
2113 v1_work_fpu_fo),
2114 OP16_WITH_WORK ("fcmphsd",
2115 OPCODE_INFO3 (0xffe00800,
2116 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2117 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2118 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2119 CSKY_ISA_FLOAT_E1,
2120 v1_work_fpu_fo_fc),
2121 OP16_WITH_WORK ("fcmpltd",
2122 OPCODE_INFO3 (0xffe00c00,
2123 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2124 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2125 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2126 CSKY_ISA_FLOAT_E1,
2127 v1_work_fpu_fo_fc),
2128 OP16_WITH_WORK ("fcmpned",
2129 OPCODE_INFO3 (0xffe01000,
2130 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2131 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2132 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2133 CSKY_ISA_FLOAT_E1,
2134 v1_work_fpu_fo_fc),
2135 OP16_WITH_WORK ("fcmpuod",
2136 OPCODE_INFO3 (0xffe01400,
2137 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2138 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2139 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2140 CSKY_ISA_FLOAT_E1,
2141 v1_work_fpu_fo_fc),
2142 OP16_WITH_WORK ("fcmphss",
2143 OPCODE_INFO3 (0xffe01800,
2144 (0_4, FREG, OPRND_SHIFT_0_BIT),
2145 (5_9, FREG, OPRND_SHIFT_0_BIT),
2146 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2147 CSKY_ISA_FLOAT_E1,
2148 v1_work_fpu_fo_fc),
2149 OP16_WITH_WORK ("fcmplts",
2150 OPCODE_INFO3 (0xffe01c00,
2151 (0_4, FREG, OPRND_SHIFT_0_BIT),
2152 (5_9, FREG, OPRND_SHIFT_0_BIT),
2153 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2154 CSKY_ISA_FLOAT_E1,
2155 v1_work_fpu_fo_fc),
2156 OP16_WITH_WORK ("fcmpnes",
2157 OPCODE_INFO3 (0xffe02000,
2158 (0_4, FREG, OPRND_SHIFT_0_BIT),
2159 (5_9, FREG, OPRND_SHIFT_0_BIT),
2160 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2161 CSKY_ISA_FLOAT_E1,
2162 v1_work_fpu_fo_fc),
2163 OP16_WITH_WORK ("fcmpuos",
2164 OPCODE_INFO3 (0xffe02400,
2165 (0_4, FREG, OPRND_SHIFT_0_BIT),
2166 (5_9, FREG, OPRND_SHIFT_0_BIT),
2167 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2168 CSKY_ISA_FLOAT_E1,
2169 v1_work_fpu_fo_fc),
2170 OP16_WITH_WORK ("fcmpzhsd",
2171 OPCODE_INFO2 (0xffe00400,
2172 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2173 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2174 CSKY_ISA_FLOAT_E1,
2175 v1_work_fpu_fo_fc),
2176 OP16_WITH_WORK ("fcmpzltd",
2177 OPCODE_INFO2 (0xffe00480,
2178 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2179 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2180 CSKY_ISA_FLOAT_E1,
2181 v1_work_fpu_fo_fc),
2182 OP16_WITH_WORK ("fcmpzned",
2183 OPCODE_INFO2 (0xffe00500,
2184 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2185 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2186 CSKY_ISA_FLOAT_E1,
2187 v1_work_fpu_fo_fc),
2188 OP16_WITH_WORK ("fcmpzuod",
2189 OPCODE_INFO2 (0xffe00580,
2190 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2191 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2192 CSKY_ISA_FLOAT_E1,
2193 v1_work_fpu_fo_fc),
2194 OP16_WITH_WORK ("fcmpzhss",
2195 OPCODE_INFO2 (0xffe00600,
2196 (0_4, FREG, OPRND_SHIFT_0_BIT),
2197 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2198 CSKY_ISA_FLOAT_E1,
2199 v1_work_fpu_fo_fc),
2200 OP16_WITH_WORK ("fcmpzlts",
2201 OPCODE_INFO2 (0xffe00680,
2202 (0_4, FREG, OPRND_SHIFT_0_BIT),
2203 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2204 CSKY_ISA_FLOAT_E1,
2205 v1_work_fpu_fo_fc),
2206 OP16_WITH_WORK ("fcmpznes",
2207 OPCODE_INFO2 (0xffe00700,
2208 (0_4, FREG, OPRND_SHIFT_0_BIT),
2209 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2210 CSKY_ISA_FLOAT_E1,
2211 v1_work_fpu_fo_fc),
2212 OP16_WITH_WORK ("fcmpzuos",
2213 OPCODE_INFO2 (0xffe00780,
2214 (0_4, FREG, OPRND_SHIFT_0_BIT),
2215 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2216 CSKY_ISA_FLOAT_E1,
2217 v1_work_fpu_fo_fc),
2218 OP16_WITH_WORK ("fstod",
2219 OPCODE_INFO3 (0xffe02800,
2220 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2221 (0_4, FREG, OPRND_SHIFT_0_BIT),
2222 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2223 CSKY_ISA_FLOAT_E1,
2224 v1_work_fpu_fo),
2225 OP16_WITH_WORK ("fdtos",
2226 OPCODE_INFO3 (0xffe02c00,
2227 (5_9, FREG, OPRND_SHIFT_0_BIT),
2228 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2229 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2230 CSKY_ISA_FLOAT_E1,
2231 v1_work_fpu_fo),
2232 OP16_WITH_WORK ("fsitos",
2233 OPCODE_INFO3 (0xffe03400,
2234 (5_9, FREG, OPRND_SHIFT_0_BIT),
2235 (0_4, FREG, OPRND_SHIFT_0_BIT),
2236 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2237 CSKY_ISA_FLOAT_E1,
2238 v1_work_fpu_fo),
2239 OP16_WITH_WORK ("fsitod",
2240 OPCODE_INFO3 (0xffe03000,
2241 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2242 (0_4, FREG, OPRND_SHIFT_0_BIT),
2243 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2244 CSKY_ISA_FLOAT_E1,
2245 v1_work_fpu_fo),
2246 OP16_WITH_WORK ("fuitos",
2247 OPCODE_INFO3 (0xffe03c00,
2248 (5_9, FREG, OPRND_SHIFT_0_BIT),
2249 (0_4, FREG, OPRND_SHIFT_0_BIT),
2250 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2251 CSKY_ISA_FLOAT_E1,
2252 v1_work_fpu_fo),
2253 OP16_WITH_WORK ("fuitod",
2254 OPCODE_INFO3 (0xffe03800,
2255 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2256 (0_4, FREG, OPRND_SHIFT_0_BIT),
2257 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2258 CSKY_ISA_FLOAT_E1,
2259 v1_work_fpu_fo),
2260 OP16_WITH_WORK ("fstosi",
2261 OPCODE_INFO4 (0xffe10000,
2262 (5_9, FREG, OPRND_SHIFT_0_BIT),
2263 (0_4, FREG, OPRND_SHIFT_0_BIT),
2264 (13_17, RM, OPRND_SHIFT_0_BIT),
2265 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2266 CSKY_ISA_FLOAT_E1,
2267 v1_work_fpu_fo),
2268 OP16_WITH_WORK ("fdtosi",
2269 OPCODE_INFO4 (0xffe08000,
2270 (5_9, FREG, OPRND_SHIFT_0_BIT),
2271 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2272 (13_17, RM, OPRND_SHIFT_0_BIT),
2273 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2274 CSKY_ISA_FLOAT_E1,
2275 v1_work_fpu_fo),
2276 OP16_WITH_WORK ("fstoui",
2277 OPCODE_INFO4 (0xffe20000,
2278 (5_9, FREG, OPRND_SHIFT_0_BIT),
2279 (0_4, FREG, OPRND_SHIFT_0_BIT),
2280 (13_17, RM, OPRND_SHIFT_0_BIT),
2281 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2282 CSKY_ISA_FLOAT_E1,
2283 v1_work_fpu_fo),
2284 OP16_WITH_WORK ("fdtoui",
2285 OPCODE_INFO4 (0xffe18000,
2286 (5_9, FREG, OPRND_SHIFT_0_BIT),
2287 (0_4, FEREG, OPRND_SHIFT_0_BIT),
2288 (13_17, RM, OPRND_SHIFT_0_BIT),
2289 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2290 CSKY_ISA_FLOAT_E1,
2291 v1_work_fpu_fo),
2292 OP16_WITH_WORK ("fmovd",
2293 OPCODE_INFO3 (0xffe06800,
2294 (5_9, FEREG, OPRND_SHIFT_0_BIT),
2295 (0_4, FREG, OPRND_SHIFT_0_BIT),
2296 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2297 CSKY_ISA_FLOAT_E1,
2298 v1_work_fpu_fo),
2299 OP16_WITH_WORK ("fmovs",
2300 OPCODE_INFO3 (0xffe06c00,
2301 (5_9, FREG, OPRND_SHIFT_0_BIT),
2302 (0_4, FREG, OPRND_SHIFT_0_BIT),
2303 (NONE, GREG0_15, OPRND_SHIFT_0_BIT)),
2304 CSKY_ISA_FLOAT_E1,
2305 v1_work_fpu_fo),
2306 OP16_WITH_WORK ("fmts",
2307 OPCODE_INFO2 (0x00000000,
2308 (NONE, GREG0_15, OPRND_SHIFT_0_BIT),
2309 (NONE, FREG, OPRND_SHIFT_0_BIT)),
2310 CSKY_ISA_FLOAT_E1,
2311 v1_work_fpu_write),
2312 OP16_WITH_WORK ("fmfs",
2313 OPCODE_INFO2 (0x00000000,
2314 (NONE, GREG0_15, OPRND_SHIFT_0_BIT),
2315 (NONE, FREG, OPRND_SHIFT_0_BIT)),
2316 CSKY_ISA_FLOAT_E1,
2317 v1_work_fpu_read),
2318 OP16_WITH_WORK ("fmtd",
2319 OPCODE_INFO2 (0x00000000,
2320 (NONE, GREG0_15, OPRND_SHIFT_0_BIT),
2321 (NONE, FEREG, OPRND_SHIFT_0_BIT)),
2322 CSKY_ISA_FLOAT_E1,
2323 v1_work_fpu_writed),
2324 OP16_WITH_WORK ("fmfd",
2325 OPCODE_INFO2 (0x00000000,
2326 (NONE, GREG0_15, OPRND_SHIFT_0_BIT),
2327 (NONE, FEREG, OPRND_SHIFT_0_BIT)),
2328 CSKY_ISA_FLOAT_E1,
2329 v1_work_fpu_readd),
f24ff6e9 2330 {NULL, 0, {}, {}, 0, 0, 0, 0, 0, NULL}
b8891f8d
AJ		 2331};
2332
2333#undef _TRANSFER
2334#undef _RELOC16
2335#undef _RELOC32
2336#undef _RELAX
2337
2338/* C-SKY v2 opcodes. */
2339const struct csky_opcode csky_v2_opcodes[] =
2340 {
2341#define _TRANSFER 0
2342#define _RELOC16 0
2343#define _RELOC32 0
2344#define _RELAX 0
2345 OP16 ("bkpt",
2346 OPCODE_INFO0 (0x0000),
2347 CSKYV2_ISA_E1),
2348 OP16_WITH_WORK ("nie",
2349 OPCODE_INFO0 (0x1460),
2350 CSKYV2_ISA_E1,
2351 v2_work_istack),
2352 OP16_WITH_WORK ("nir",
2353 OPCODE_INFO0 (0x1461),
2354 CSKYV2_ISA_E1,
2355 v2_work_istack),
2356 OP16_WITH_WORK ("ipush",
2357 OPCODE_INFO0 (0x1462),
2358 CSKYV2_ISA_E1,
2359 v2_work_istack),
2360 OP16_WITH_WORK ("ipop",
2361 OPCODE_INFO0 (0x1463),
2362 CSKYV2_ISA_E1,
2363 v2_work_istack),
2364 OP16 ("bpop.h",
2365 OPCODE_INFO1 (0x14a0,
2366 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
2367 CSKY_ISA_JAVA),
2368 OP16 ("bpop.w",
2369 OPCODE_INFO1 (0x14a2,
2370 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
2371 CSKY_ISA_JAVA),
2372 OP16 ("bpush.h",
2373 OPCODE_INFO1 (0x14e0,
2374 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
2375 CSKY_ISA_JAVA),
2376 OP16 ("bpush.w",
2377 OPCODE_INFO1 (0x14e2,
2378 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
2379 CSKY_ISA_JAVA),
2380 OP32 ("bmset",
2381 OPCODE_INFO0 (0xc0001020),
2382 CSKY_ISA_JAVA),
2383 OP32 ("bmclr",
2384 OPCODE_INFO0 (0xc0001420),
2385 CSKY_ISA_JAVA),
2386 OP32 ("sce",
2387 OPCODE_INFO1 (0xc0001820,
2388 (21_24, IMM4b, OPRND_SHIFT_0_BIT)),
2389 CSKY_ISA_MP),
2390 OP32 ("trap",
2391 OPCODE_INFO1 (0xc0002020,
2392 (10_11, IMM2b, OPRND_SHIFT_0_BIT)),
2393 CSKYV2_ISA_E1),
2394 /* Secure/nsecure world switch. */
2395 OP32 ("wsc",
2396 OPCODE_INFO0 (0xc0003c20),
2397 CSKY_ISA_TRUST),
2398 OP32 ("mtcr",
2399 OPCODE_INFO2 (0xc0006420,
2400 (16_20, AREG, OPRND_SHIFT_0_BIT),
2401 (0_4or21_25, CTRLREG, OPRND_SHIFT_0_BIT)),
2402 CSKYV2_ISA_E1),
2403 OP32 ("mfcr",
2404 OPCODE_INFO2 (0xc0006020,
2405 (0_4, AREG, OPRND_SHIFT_0_BIT),
2406 (16_20or21_25, CTRLREG, OPRND_SHIFT_0_BIT)),
2407 CSKYV2_ISA_E1),
2408#undef _TRANSFER
2409#define _TRANSFER 2
2410 OP32 ("rte",
2411 OPCODE_INFO0 (0xc0004020),
2412 CSKYV2_ISA_E1),
2413 OP32 ("rfi",
2414 OPCODE_INFO0 (0xc0004420),
2415 CSKYV2_ISA_2E3),
2416#undef _TRANSFER
2417#define _TRANSFER 0
2418 OP32 ("stop",
2419 OPCODE_INFO0 (0xc0004820),
2420 CSKYV2_ISA_E1),
2421 OP32 ("wait",
2422 OPCODE_INFO0 (0xc0004c20),
2423 CSKYV2_ISA_E1),
2424 OP32 ("doze",
2425 OPCODE_INFO0 (0xc0005020),
2426 CSKYV2_ISA_E1),
2427 OP32 ("we",
2428 OPCODE_INFO0 (0xc0005420),
2429 CSKY_ISA_MP_1E2),
2430 OP32 ("se",
2431 OPCODE_INFO0 (0xc0005820),
2432 CSKY_ISA_MP_1E2),
2433 OP32 ("psrclr",
2434 OPCODE_INFO_LIST (0xc0007020,
2435 (21_25, PSR_BITS_LIST, OPRND_SHIFT_0_BIT)),
2436 CSKYV2_ISA_E1),
2437 OP32 ("psrset",
2438 OPCODE_INFO_LIST (0xc0007420,
2439 (21_25, PSR_BITS_LIST, OPRND_SHIFT_0_BIT)),
2440 CSKYV2_ISA_E1),
2441 DOP32 ("abs",
2442 OPCODE_INFO2 (0xc4000200,
2443 (0_4, AREG, OPRND_SHIFT_0_BIT),
2444 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2445 OPCODE_INFO1 (0xc4000200,
2446 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
2447 CSKYV2_ISA_2E3),
2448 OP32 ("mvc",
2449 OPCODE_INFO1 (0xc4000500,
2450 (0_4, AREG, OPRND_SHIFT_0_BIT)),
2451 CSKYV2_ISA_1E2),
2452 OP32 ("incf",
2453 OPCODE_INFO3 (0xc4000c20,
2454 (21_25, AREG, OPRND_SHIFT_0_BIT),
2455 (16_20, AREG, OPRND_SHIFT_0_BIT),
2456 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
2457 CSKYV2_ISA_1E2),
2458 OP32 ("movf",
2459 OPCODE_INFO2 (0xc4000c20,
2460 (21_25, AREG, OPRND_SHIFT_0_BIT),
2461 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2462 CSKYV2_ISA_1E2),
2463 OP32 ("inct",
2464 OPCODE_INFO3 (0xc4000c40,
2465 (21_25, AREG, OPRND_SHIFT_0_BIT),
2466 (16_20, AREG, OPRND_SHIFT_0_BIT),
2467 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
2468 CSKYV2_ISA_1E2),
2469 OP32 ("movt",
2470 OPCODE_INFO2 (0xc4000c40,
2471 (21_25, AREG, OPRND_SHIFT_0_BIT),
2472 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2473 CSKYV2_ISA_1E2),
2474 OP32 ("decf",
2475 OPCODE_INFO3 (0xc4000c80,
2476 (21_25, AREG, OPRND_SHIFT_0_BIT),
2477 (16_20, AREG, OPRND_SHIFT_0_BIT),
2478 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
2479 CSKYV2_ISA_1E2),
2480 OP32 ("dect",
2481 OPCODE_INFO3 (0xc4000d00,
2482 (21_25, AREG, OPRND_SHIFT_0_BIT),
2483 (16_20, AREG, OPRND_SHIFT_0_BIT),
2484 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
2485 CSKYV2_ISA_1E2),
2486 OP32 ("decgt",
2487 OPCODE_INFO3 (0xc4001020,
2488 (0_4, AREG, OPRND_SHIFT_0_BIT),
2489 (16_20, AREG, OPRND_SHIFT_0_BIT),
2490 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
2491 CSKYV2_ISA_2E3),
2492 OP32 ("declt",
2493 OPCODE_INFO3 (0xc4001040,
2494 (0_4, AREG, OPRND_SHIFT_0_BIT),
2495 (16_20, AREG, OPRND_SHIFT_0_BIT),
2496 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
2497 CSKYV2_ISA_2E3),
2498 OP32 ("decne",
2499 OPCODE_INFO3 (0xc4001080,
2500 (0_4, AREG, OPRND_SHIFT_0_BIT),
2501 (16_20, AREG, OPRND_SHIFT_0_BIT),
2502 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
2503 CSKYV2_ISA_2E3),
2504 OP32 ("clrf",
2505 OPCODE_INFO1 (0xc4002c20,
2506 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2507 CSKYV2_ISA_2E3),
2508 OP32 ("clrt",
2509 OPCODE_INFO1 (0xc4002c40,
2510 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2511 CSKYV2_ISA_2E3),
2512 DOP32 ("rotli",
2513 OPCODE_INFO3 (0xc4004900,
2514 (0_4, AREG, OPRND_SHIFT_0_BIT),
2515 (16_20, AREG, OPRND_SHIFT_0_BIT),
2516 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
2517 OPCODE_INFO2 (0xc4004900,
2518 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
2519 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
2520 CSKYV2_ISA_1E2),
2521 OP32 ("lslc",
2522 OPCODE_INFO3 (0xc4004c20,
2523 (0_4, AREG, OPRND_SHIFT_0_BIT),
2524 (16_20, AREG, OPRND_SHIFT_0_BIT),
2525 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
2526 CSKYV2_ISA_1E2),
2527 OP32 ("lsrc",
2528 OPCODE_INFO3 (0xc4004c40,
2529 (0_4, AREG, OPRND_SHIFT_0_BIT),
2530 (16_20, AREG, OPRND_SHIFT_0_BIT),
2531 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
2532 CSKYV2_ISA_1E2),
2533 DOP32 ("asrc",
2534 OPCODE_INFO3 (0xc4004c80,
2535 (0_4, AREG, OPRND_SHIFT_0_BIT),
2536 (16_20, AREG, OPRND_SHIFT_0_BIT),
2537 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
2538 OPCODE_INFO1 (0xc4004c80,
2539 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
2540 CSKYV2_ISA_1E2),
2541 OP32 ("xsr",
2542 OPCODE_INFO3 (0xc4004d00,
2543 (0_4, AREG, OPRND_SHIFT_0_BIT),
2544 (16_20, AREG, OPRND_SHIFT_0_BIT),
2545 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
2546 CSKYV2_ISA_1E2),
2547 OP32 ("bgenr",
2548 OPCODE_INFO2 (0xc4005040,
2549 (0_4, AREG, OPRND_SHIFT_0_BIT),
2550 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2551 CSKYV2_ISA_2E3),
2552 DOP32 ("brev",
2553 OPCODE_INFO2 (0xc4006200,
2554 (0_4, AREG, OPRND_SHIFT_0_BIT),
2555 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2556 OPCODE_INFO1 (0xc4006200,
2557 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
2558 CSKYV2_ISA_2E3),
2559 OP32 ("xtrb0",
2560 OPCODE_INFO2 (0xc4007020,
2561 (0_4, AREG, OPRND_SHIFT_0_BIT),
2562 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2563 CSKYV2_ISA_1E2),
2564 OP32 ("xtrb1",
2565 OPCODE_INFO2 (0xc4007040,
2566 (0_4, AREG, OPRND_SHIFT_0_BIT),
2567 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2568 CSKYV2_ISA_1E2),
2569 OP32 ("xtrb2",
2570 OPCODE_INFO2 (0xc4007080,
2571 (0_4, AREG, OPRND_SHIFT_0_BIT),
2572 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2573 CSKYV2_ISA_1E2),
2574 OP32 ("xtrb3",
2575 OPCODE_INFO2 (0xc4007100,
2576 (0_4, AREG, OPRND_SHIFT_0_BIT),
2577 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2578 CSKYV2_ISA_1E2),
2579 OP32 ("ff0",
2580 OPCODE_INFO2 (0xc4007c20,
2581 (0_4, AREG, OPRND_SHIFT_0_BIT),
2582 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2583 CSKYV2_ISA_1E2),
2584 DOP32 ("ff1",
2585 OPCODE_INFO2 (0xc4007c40,
2586 (0_4, AREG, OPRND_SHIFT_0_BIT),
2587 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2588 OPCODE_INFO1 (0xc4007c40,
2589 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
2590 CSKYV2_ISA_1E2),
2591 OP32 ("mulu",
2592 OPCODE_INFO2 (0xc4008820,
2593 (16_20, AREG, OPRND_SHIFT_0_BIT),
2594 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2595 CSKY_ISA_DSP),
2596 OP32 ("mulua",
2597 OPCODE_INFO2 (0xc4008840,
2598 (16_20, AREG, OPRND_SHIFT_0_BIT),
2599 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2600 CSKY_ISA_DSP),
2601 OP32 ("mulus",
2602 OPCODE_INFO2 (0xc4008880,
2603 (16_20, AREG, OPRND_SHIFT_0_BIT),
2604 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2605 CSKY_ISA_DSP),
2606 OP32 ("muls",
2607 OPCODE_INFO2 (0xc4008c20,
2608 (16_20, AREG, OPRND_SHIFT_0_BIT),
2609 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2610 CSKY_ISA_DSP),
2611 OP32 ("mulsa",
2612 OPCODE_INFO2 (0xc4008c40,
2613 (16_20, AREG, OPRND_SHIFT_0_BIT),
2614 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2615 CSKY_ISA_DSP),
2616 OP32 ("mulss",
2617 OPCODE_INFO2 (0xc4008c80,
2618 (16_20, AREG, OPRND_SHIFT_0_BIT),
2619 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2620 CSKY_ISA_DSP),
2621 OP32 ("mulsha",
2622 OPCODE_INFO2 (0xc4009040,
2623 (16_20, AREG, OPRND_SHIFT_0_BIT),
2624 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2625 CSKY_ISA_DSP),
2626 OP32 ("mulshs",
2627 OPCODE_INFO2 (0xc4009080,
2628 (16_20, AREG, OPRND_SHIFT_0_BIT),
2629 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2630 CSKY_ISA_DSP),
2631 OP32 ("mulswa",
2632 OPCODE_INFO2 (0xc4009440,
2633 (16_20, AREG, OPRND_SHIFT_0_BIT),
2634 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2635 CSKY_ISA_DSP),
2636 OP32 ("mulsws",
2637 OPCODE_INFO2 (0xc4009480,
2638 (16_20, AREG, OPRND_SHIFT_0_BIT),
2639 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2640 CSKY_ISA_DSP),
2641 OP32 ("mfhis",
2642 OPCODE_INFO1 (0xc4009820,
2643 (0_4, AREG, OPRND_SHIFT_0_BIT)),
2644 CSKY_ISA_DSP),
2645 OP32 ("mflos",
2646 OPCODE_INFO1 (0xc4009880,
2647 (0_4, AREG, OPRND_SHIFT_0_BIT)),
2648 CSKY_ISA_DSP),
2649 OP32 ("mvtc",
2650 OPCODE_INFO0 (0xc4009a00),
2651 CSKY_ISA_DSP),
2652 OP32 ("mfhi",
2653 OPCODE_INFO1 (0xc4009c20,
2654 (0_4, AREG, OPRND_SHIFT_0_BIT)),
2655 CSKY_ISA_DSP),
2656 OP32 ("mthi",
2657 OPCODE_INFO1 (0xc4009c40,
2658 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2659 CSKY_ISA_DSP),
2660 OP32 ("mflo",
2661 OPCODE_INFO1 (0xc4009c80,
2662 (0_4, AREG, OPRND_SHIFT_0_BIT)),
2663 CSKY_ISA_DSP),
2664 OP32 ("mtlo",
2665 OPCODE_INFO1 (0xc4009d00,
2666 (16_20, AREG, OPRND_SHIFT_0_BIT)),
2667 CSKY_ISA_DSP),
2668 OP32 ("vmulsh",
2669 OPCODE_INFO2 (0xc400b020,
2670 (16_20, AREG, OPRND_SHIFT_0_BIT),
2671 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2672 CSKY_ISA_DSP_1E2),
2673 OP32 ("vmulsha",
2674 OPCODE_INFO2 (0xc400b040,
2675 (16_20, AREG, OPRND_SHIFT_0_BIT),
2676 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2677 CSKY_ISA_DSP_1E2),
2678 OP32 ("vmulshs",
2679 OPCODE_INFO2 (0xc400b080,
2680 (16_20, AREG, OPRND_SHIFT_0_BIT),
2681 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2682 CSKY_ISA_DSP_1E2),
2683 OP32 ("vmulsw",
2684 OPCODE_INFO2 (0xc400b420,
2685 (16_20, AREG, OPRND_SHIFT_0_BIT),
2686 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2687 CSKY_ISA_DSP_1E2),
2688 OP32 ("vmulswa",
2689 OPCODE_INFO2 (0xc400b440,
2690 (16_20, AREG, OPRND_SHIFT_0_BIT),
2691 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2692 CSKY_ISA_DSP_1E2),
2693 OP32 ("vmulsws",
2694 OPCODE_INFO2 (0xc400b480,
2695 (16_20, AREG, OPRND_SHIFT_0_BIT),
2696 (21_25, AREG, OPRND_SHIFT_0_BIT)),
2697 CSKY_ISA_DSP_1E2),
2698 OP32 ("ldr.b",
2699 SOPCODE_INFO2 (0xd0000000,
2700 (0_4, AREG, OPRND_SHIFT_0_BIT),
2701 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2702 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2703 CSKYV2_ISA_2E3),
2704 OP32 ("ldr.bs",
2705 SOPCODE_INFO2 (0xd0001000,
2706 (0_4, AREG, OPRND_SHIFT_0_BIT),
2707 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2708 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2709 CSKYV2_ISA_2E3),
2710 OP32 ("ldr.h",
2711 SOPCODE_INFO2 (0xd0000400,
2712 (0_4, AREG, OPRND_SHIFT_0_BIT),
2713 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2714 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2715 CSKYV2_ISA_2E3),
2716 OP32 ("ldr.hs",
2717 SOPCODE_INFO2 (0xd0001400,
2718 (0_4, AREG, OPRND_SHIFT_0_BIT),
2719 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2720 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2721 CSKYV2_ISA_2E3),
2722 OP32 ("ldr.w",
2723 SOPCODE_INFO2 (0xd0000800,
2724 (0_4, AREG, OPRND_SHIFT_0_BIT),
2725 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2726 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2727 CSKYV2_ISA_2E3),
2728 OP32 ("ldm",
2729 OPCODE_INFO2 (0xd0001c20,
2730 (0_4or21_25, REGLIST_DASH, OPRND_SHIFT_0_BIT),
2731 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
2732 CSKYV2_ISA_1E2),
2733 OP32 ("ldq",
2734 OPCODE_INFO2 (0xd0801c23,
2735 (NONE, REGr4_r7, OPRND_SHIFT_0_BIT),
2736 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
2737 CSKYV2_ISA_2E3),
2738 OP32 ("str.b",
2739 SOPCODE_INFO2 (0xd4000000,
2740 (0_4, AREG, OPRND_SHIFT_0_BIT),
2741 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2742 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2743 CSKYV2_ISA_2E3),
2744 OP32 ("str.h",
2745 SOPCODE_INFO2 (0xd4000400,
2746 (0_4, AREG, OPRND_SHIFT_0_BIT),
2747 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2748 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2749 CSKYV2_ISA_2E3),
2750 OP32 ("str.w",
2751 SOPCODE_INFO2 (0xd4000800,
2752 (0_4, AREG, OPRND_SHIFT_0_BIT),
2753 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2754 (5_9or21_25, AREG_WITH_LSHIFT, OPRND_SHIFT_0_BIT))),
2755 CSKYV2_ISA_2E3),
2756 OP32 ("stm",
2757 OPCODE_INFO2 (0xd4001c20,
2758 (0_4or21_25, REGLIST_DASH, OPRND_SHIFT_0_BIT),
2759 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
2760 CSKYV2_ISA_1E2),
2761 OP32 ("stq",
2762 OPCODE_INFO2 (0xd4801c23,
2763 (NONE, REGr4_r7, OPRND_SHIFT_0_BIT),
2764 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
2765 CSKYV2_ISA_2E3),
2766 OP32 ("ld.bs",
2767 SOPCODE_INFO2 (0xd8004000,
2768 (21_25, AREG, OPRND_SHIFT_0_BIT),
2769 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2770 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
2771 CSKYV2_ISA_1E2),
2772 OP32 ("ldbs",
2773 SOPCODE_INFO2 (0xd8004000,
2774 (21_25, AREG, OPRND_SHIFT_0_BIT),
2775 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2776 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
2777 CSKYV2_ISA_1E2),
2778 OP32 ("ld.hs",
2779 SOPCODE_INFO2 (0xd8005000,
2780 (21_25, AREG, OPRND_SHIFT_0_BIT),
2781 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2782 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
2783 CSKYV2_ISA_1E2),
2784 OP32 ("ldhs",
2785 SOPCODE_INFO2 (0xd8005000,
2786 (21_25, AREG, OPRND_SHIFT_0_BIT),
2787 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2788 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
2789 CSKYV2_ISA_1E2),
2790 OP32 ("ld.d",
2791 SOPCODE_INFO2 (0xd8003000,
2792 (21_25, AREG, OPRND_SHIFT_0_BIT),
2793 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2794 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2795 CSKYV2_ISA_3E7),
2796 OP32 ("ldex.w",
2797 SOPCODE_INFO2 (0xd8007000,
2798 (21_25, AREG, OPRND_SHIFT_0_BIT),
2799 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2800 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2801 CSKY_ISA_MP_1E2),
2802 OP32 ("ldexw",
2803 SOPCODE_INFO2 (0xd8007000,
2804 (21_25, AREG, OPRND_SHIFT_0_BIT),
2805 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2806 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2807 CSKY_ISA_MP_1E2),
2808 OP32 ("ldex",
2809 SOPCODE_INFO2 (0xd8007000,
2810 (21_25, AREG, OPRND_SHIFT_0_BIT),
2811 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2812 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2813 CSKY_ISA_MP_1E2),
2814 OP32 ("st.d",
2815 SOPCODE_INFO2 (0xdc003000,
2816 (21_25, AREG, OPRND_SHIFT_0_BIT),
2817 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2818 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2819 CSKYV2_ISA_3E7),
2820 OP32 ("stex.w",
2821 SOPCODE_INFO2 (0xdc007000,
2822 (21_25, AREG, OPRND_SHIFT_0_BIT),
2823 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2824 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2825 CSKY_ISA_MP_1E2),
2826 OP32 ("stexw",
2827 SOPCODE_INFO2 (0xdc007000,
2828 (21_25, AREG, OPRND_SHIFT_0_BIT),
2829 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2830 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2831 CSKY_ISA_MP_1E2),
2832 OP32 ("stex",
2833 SOPCODE_INFO2 (0xdc007000,
2834 (21_25, AREG, OPRND_SHIFT_0_BIT),
2835 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
2836 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
2837 CSKY_ISA_MP_1E2),
2838 DOP32 ("andi",
2839 OPCODE_INFO3 (0xe4002000,
2840 (21_25, AREG, OPRND_SHIFT_0_BIT),
2841 (16_20, AREG, OPRND_SHIFT_0_BIT),
2842 (0_11, IMM12b, OPRND_SHIFT_0_BIT)),
2843 OPCODE_INFO2 (0xe4002000,
2844 (16_20or21_25, DUP_AREG, OPRND_SHIFT_0_BIT),
2845 (0_11, IMM12b, OPRND_SHIFT_0_BIT)),
2846 CSKYV2_ISA_1E2),
2847 OP32 ("andni",
2848 OPCODE_INFO3 (0xe4003000,
2849 (21_25, AREG, OPRND_SHIFT_0_BIT),
2850 (16_20, AREG, OPRND_SHIFT_0_BIT),
2851 (0_11, IMM12b, OPRND_SHIFT_0_BIT)),
2852 CSKYV2_ISA_1E2),
2853 OP32 ("xori",
2854 OPCODE_INFO3 (0xe4004000,
2855 (21_25, AREG, OPRND_SHIFT_0_BIT),
2856 (16_20, AREG, OPRND_SHIFT_0_BIT),
2857 (0_11, IMM12b, OPRND_SHIFT_0_BIT)),
2858 CSKYV2_ISA_1E2),
2859 OP32 ("ins",
2860 OPCODE_INFO4 (0xc4005c00,
2861 (21_25, AREG, OPRND_SHIFT_0_BIT),
2862 (16_20, AREG, OPRND_SHIFT_0_BIT),
2863 (5_9, MSB2SIZE, OPRND_SHIFT_0_BIT),
2864 (0_4, LSB2SIZE, OPRND_SHIFT_0_BIT)),
2865 CSKYV2_ISA_2E3),
2866#undef _TRANSFER
2867#undef _RELOC32
2868#define _TRANSFER 1
2869#define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY4
2870 OP32 ("jmpi",
2871 OPCODE_INFO1 (0xeac00000,
2872 (0_15, OFF16b, OPRND_SHIFT_2_BIT)),
2873 CSKYV2_ISA_2E3),
2874#undef _TRANSFER
2875#undef _RELOC32
2876#define _TRANSFER 0
2877#define _RELOC32 0
2878
2879 OP32 ("fadds",
2880 OPCODE_INFO3 (0xf4000000,
2881 (0_3, FREG, OPRND_SHIFT_0_BIT),
2882 (16_19, FREG, OPRND_SHIFT_0_BIT),
2883 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2884 CSKY_ISA_FLOAT_E1),
2885 OP32 ("fsubs",
2886 OPCODE_INFO3 (0xf4000020,
2887 (0_3, FREG, OPRND_SHIFT_0_BIT),
2888 (16_19, FREG, OPRND_SHIFT_0_BIT),
2889 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2890 CSKY_ISA_FLOAT_E1),
2891 OP32 ("fmovs",
2892 OPCODE_INFO2 (0xf4000080,
2893 (0_3, FREG, OPRND_SHIFT_0_BIT),
2894 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2895 CSKY_ISA_FLOAT_E1),
2896 OP32 ("fabss",
2897 OPCODE_INFO2 (0xf40000c0,
2898 (0_3, FREG, OPRND_SHIFT_0_BIT),
2899 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2900 CSKY_ISA_FLOAT_E1),
2901 OP32 ("fnegs",
2902 OPCODE_INFO2 (0xf40000e0,
2903 (0_3, FREG, OPRND_SHIFT_0_BIT),
2904 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2905 CSKY_ISA_FLOAT_E1),
2906 OP32 ("fcmpzhss",
2907 OPCODE_INFO1 (0xf4000100,
2908 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2909 CSKY_ISA_FLOAT_E1),
2910 OP32 ("fcmpzlss",
2911 OPCODE_INFO1 (0xf4000120,
2912 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2913 CSKY_ISA_FLOAT_E1),
2914 OP32 ("fcmpznes",
2915 OPCODE_INFO1 (0xf4000140,
2916 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2917 CSKY_ISA_FLOAT_E1),
2918 OP32 ("fcmpzuos",
2919 OPCODE_INFO1 (0xf4000160,
2920 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2921 CSKY_ISA_FLOAT_E1),
2922 OP32 ("fcmphss",
2923 OPCODE_INFO2 (0xf4000180,
2924 (16_19, FREG, OPRND_SHIFT_0_BIT),
2925 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2926 CSKY_ISA_FLOAT_E1),
2927 OP32 ("fcmplts",
2928 OPCODE_INFO2 (0xf40001a0,
2929 (16_19, FREG, OPRND_SHIFT_0_BIT),
2930 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2931 CSKY_ISA_FLOAT_E1),
2932 OP32 ("fcmpnes",
2933 OPCODE_INFO2 (0xf40001c0,
2934 (16_19, FREG, OPRND_SHIFT_0_BIT),
2935 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2936 CSKY_ISA_FLOAT_E1),
2937 OP32 ("fcmpuos",
2938 OPCODE_INFO2 (0xf40001e0,
2939 (16_19, FREG, OPRND_SHIFT_0_BIT),
2940 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2941 CSKY_ISA_FLOAT_E1),
2942 OP32 ("fmuls",
2943 OPCODE_INFO3 (0xf4000200,
2944 (0_3, FREG, OPRND_SHIFT_0_BIT),
2945 (16_19, FREG, OPRND_SHIFT_0_BIT),
2946 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2947 CSKY_ISA_FLOAT_E1),
2948 OP32 ("fmacs",
2949 OPCODE_INFO3 (0xf4000280,
2950 (0_3, FREG, OPRND_SHIFT_0_BIT),
2951 (16_19, FREG, OPRND_SHIFT_0_BIT),
2952 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2953 CSKY_ISA_FLOAT_E1),
2954 OP32 ("fmscs",
2955 OPCODE_INFO3 (0xf40002a0,
2956 (0_3, FREG, OPRND_SHIFT_0_BIT),
2957 (16_19, FREG, OPRND_SHIFT_0_BIT),
2958 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2959 CSKY_ISA_FLOAT_E1),
2960 OP32 ("fnmacs",
2961 OPCODE_INFO3 (0xf40002c0,
2962 (0_3, FREG, OPRND_SHIFT_0_BIT),
2963 (16_19, FREG, OPRND_SHIFT_0_BIT),
2964 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2965 CSKY_ISA_FLOAT_E1),
2966 OP32 ("fnmscs",
2967 OPCODE_INFO3 (0xf40002e0,
2968 (0_3, FREG, OPRND_SHIFT_0_BIT),
2969 (16_19, FREG, OPRND_SHIFT_0_BIT),
2970 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2971 CSKY_ISA_FLOAT_E1),
2972 OP32 ("fnmuls",
2973 OPCODE_INFO3 (0xf4000220,
2974 (0_3, FREG, OPRND_SHIFT_0_BIT),
2975 (16_19, FREG, OPRND_SHIFT_0_BIT),
2976 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2977 CSKY_ISA_FLOAT_E1),
2978 OP32 ("fdivs",
2979 OPCODE_INFO3 (0xf4000300,
2980 (0_3, FREG, OPRND_SHIFT_0_BIT),
2981 (16_19, FREG, OPRND_SHIFT_0_BIT),
2982 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2983 CSKY_ISA_FLOAT_E1),
2984 OP32 ("frecips",
2985 OPCODE_INFO2 (0xf4000320,
2986 (0_3, FREG, OPRND_SHIFT_0_BIT),
2987 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2988 CSKY_ISA_FLOAT_E1),
2989 OP32 ("fsqrts",
2990 OPCODE_INFO2 (0xf4000340,
2991 (0_3, FREG, OPRND_SHIFT_0_BIT),
2992 (16_19, FREG, OPRND_SHIFT_0_BIT)),
2993 CSKY_ISA_FLOAT_E1),
2994 OP32 ("faddd",
2995 OPCODE_INFO3 (0xf4000800,
2996 (0_3, FREG, OPRND_SHIFT_0_BIT),
2997 (16_19, FREG, OPRND_SHIFT_0_BIT),
2998 (21_24, FREG, OPRND_SHIFT_0_BIT)),
2999 CSKY_ISA_FLOAT_1E2),
3000 OP32 ("fsubd",
3001 OPCODE_INFO3 (0xf4000820,
3002 (0_3, FREG, OPRND_SHIFT_0_BIT),
3003 (16_19, FREG, OPRND_SHIFT_0_BIT),
3004 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3005 CSKY_ISA_FLOAT_1E2),
3006 OP32 ("fmovd",
3007 OPCODE_INFO2 (0xf4000880,
3008 (0_3, FREG, OPRND_SHIFT_0_BIT),
3009 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3010 CSKY_ISA_FLOAT_1E2),
3011 OP32 ("fabsd",
3012 OPCODE_INFO2 (0xf40008c0,
3013 (0_3, FREG, OPRND_SHIFT_0_BIT),
3014 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3015 CSKY_ISA_FLOAT_1E2),
3016 OP32 ("fnegd",
3017 OPCODE_INFO2 (0xf40008e0,
3018 (0_3, FREG, OPRND_SHIFT_0_BIT),
3019 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3020 CSKY_ISA_FLOAT_1E2),
3021 OP32 ("fcmpzhsd",
3022 OPCODE_INFO1 (0xf4000900,
3023 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3024 CSKY_ISA_FLOAT_1E2),
3025 OP32 ("fcmpzlsd",
3026 OPCODE_INFO1 (0xf4000920,
3027 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3028 CSKY_ISA_FLOAT_1E2),
3029 OP32 ("fcmpzned",
3030 OPCODE_INFO1 (0xf4000940,
3031 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3032 CSKY_ISA_FLOAT_1E2),
3033 OP32 ("fcmpzuod",
3034 OPCODE_INFO1 (0xf4000960,
3035 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3036 CSKY_ISA_FLOAT_1E2),
3037 OP32 ("fcmphsd",
3038 OPCODE_INFO2 (0xf4000980,
3039 (16_19, FREG, OPRND_SHIFT_0_BIT),
3040 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3041 CSKY_ISA_FLOAT_1E2),
3042 OP32 ("fcmpltd",
3043 OPCODE_INFO2 (0xf40009a0,
3044 (16_19, FREG, OPRND_SHIFT_0_BIT),
3045 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3046 CSKY_ISA_FLOAT_1E2),
3047 OP32 ("fcmpned",
3048 OPCODE_INFO2 (0xf40009c0,
3049 (16_19, FREG, OPRND_SHIFT_0_BIT),
3050 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3051 CSKY_ISA_FLOAT_1E2),
3052 OP32 ("fcmpuod",
3053 OPCODE_INFO2 (0xf40009e0,
3054 (16_19, FREG, OPRND_SHIFT_0_BIT),
3055 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3056 CSKY_ISA_FLOAT_1E2),
3057 OP32 ("fmuld",
3058 OPCODE_INFO3 (0xf4000a00,
3059 (0_3, FREG, OPRND_SHIFT_0_BIT),
3060 (16_19, FREG, OPRND_SHIFT_0_BIT),
3061 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3062 CSKY_ISA_FLOAT_1E2),
3063 OP32 ("fnmuld",
3064 OPCODE_INFO3 (0xf4000a20,
3065 (0_3, FREG, OPRND_SHIFT_0_BIT),
3066 (16_19, FREG, OPRND_SHIFT_0_BIT),
3067 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3068 CSKY_ISA_FLOAT_1E2),
3069 OP32 ("fmacd",
3070 OPCODE_INFO3 (0xf4000a80,
3071 (0_3, FREG, OPRND_SHIFT_0_BIT),
3072 (16_19, FREG, OPRND_SHIFT_0_BIT),
3073 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3074 CSKY_ISA_FLOAT_1E2),
3075 OP32 ("fmscd",
3076 OPCODE_INFO3 (0xf4000aa0,
3077 (0_3, FREG, OPRND_SHIFT_0_BIT),
3078 (16_19, FREG, OPRND_SHIFT_0_BIT),
3079 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3080 CSKY_ISA_FLOAT_1E2),
3081 OP32 ("fnmacd",
3082 OPCODE_INFO3 (0xf4000ac0,
3083 (0_3, FREG, OPRND_SHIFT_0_BIT),
3084 (16_19, FREG, OPRND_SHIFT_0_BIT),
3085 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3086 CSKY_ISA_FLOAT_1E2),
3087 OP32 ("fnmscd",
3088 OPCODE_INFO3 (0xf4000ae0,
3089 (0_3, FREG, OPRND_SHIFT_0_BIT),
3090 (16_19, FREG, OPRND_SHIFT_0_BIT),
3091 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3092 CSKY_ISA_FLOAT_1E2),
3093 OP32 ("fdivd",
3094 OPCODE_INFO3 (0xf4000b00,
3095 (0_3, FREG, OPRND_SHIFT_0_BIT),
3096 (16_19, FREG, OPRND_SHIFT_0_BIT),
3097 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3098 CSKY_ISA_FLOAT_1E2),
3099 OP32 ("frecipd",
3100 OPCODE_INFO2 (0xf4000b20,
3101 (0_3, FREG, OPRND_SHIFT_0_BIT),
3102 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3103 CSKY_ISA_FLOAT_1E2),
3104 OP32 ("fsqrtd",
3105 OPCODE_INFO2 (0xf4000b40,
3106 (0_3, FREG, OPRND_SHIFT_0_BIT),
3107 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3108 CSKY_ISA_FLOAT_1E2),
3109 OP32 ("faddm",
3110 OPCODE_INFO3 (0xf4001000,
3111 (0_3, FREG, OPRND_SHIFT_0_BIT),
3112 (16_19, FREG, OPRND_SHIFT_0_BIT),
3113 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3114 CSKY_ISA_FLOAT_1E2),
3115 OP32 ("fsubm",
3116 OPCODE_INFO3 (0xf4001020,
3117 (0_3, FREG, OPRND_SHIFT_0_BIT),
3118 (16_19, FREG, OPRND_SHIFT_0_BIT),
3119 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3120 CSKY_ISA_FLOAT_1E2),
3121 OP32 ("fmovm",
3122 OPCODE_INFO2 (0xf4001080,
3123 (0_3, FREG, OPRND_SHIFT_0_BIT),
3124 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3125 CSKY_ISA_FLOAT_1E2),
3126 OP32 ("fabsm",
3127 OPCODE_INFO2 (0xf40010c0,
3128 (0_3, FREG, OPRND_SHIFT_0_BIT),
3129 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3130 CSKY_ISA_FLOAT_1E2),
3131 OP32 ("fnegm",
3132 OPCODE_INFO2 (0xf40010e0,
3133 (0_3, FREG, OPRND_SHIFT_0_BIT),
3134 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3135 CSKY_ISA_FLOAT_1E2),
3136 OP32 ("fmulm",
3137 OPCODE_INFO3 (0xf4001200,
3138 (0_3, FREG, OPRND_SHIFT_0_BIT),
3139 (16_19, FREG, OPRND_SHIFT_0_BIT),
3140 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3141 CSKY_ISA_FLOAT_1E2),
3142 OP32 ("fnmulm",
3143 OPCODE_INFO3 (0xf4001220,
3144 (0_3, FREG, OPRND_SHIFT_0_BIT),
3145 (16_19, FREG, OPRND_SHIFT_0_BIT),
3146 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3147 CSKY_ISA_FLOAT_1E2),
3148 OP32 ("fmacm",
3149 OPCODE_INFO3 (0xf4001280,
3150 (0_3, FREG, OPRND_SHIFT_0_BIT),
3151 (16_19, FREG, OPRND_SHIFT_0_BIT),
3152 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3153 CSKY_ISA_FLOAT_1E2),
3154 OP32 ("fmscm",
3155 OPCODE_INFO3 (0xf40012a0,
3156 (0_3, FREG, OPRND_SHIFT_0_BIT),
3157 (16_19, FREG, OPRND_SHIFT_0_BIT),
3158 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3159 CSKY_ISA_FLOAT_1E2),
3160 OP32 ("fnmacm",
3161 OPCODE_INFO3 (0xf40012c0,
3162 (0_3, FREG, OPRND_SHIFT_0_BIT),
3163 (16_19, FREG, OPRND_SHIFT_0_BIT),
3164 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3165 CSKY_ISA_FLOAT_1E2),
3166 OP32 ("fnmscm",
3167 OPCODE_INFO3 (0xf40012e0,
3168 (0_3, FREG, OPRND_SHIFT_0_BIT),
3169 (16_19, FREG, OPRND_SHIFT_0_BIT),
3170 (21_24, FREG, OPRND_SHIFT_0_BIT)),
3171 CSKY_ISA_FLOAT_1E2),
3172 OP32 ("fstosi.rn",
3173 OPCODE_INFO2 (0xf4001800,
3174 (0_3, FREG, OPRND_SHIFT_0_BIT),
3175 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3176 CSKY_ISA_FLOAT_E1),
3177 OP32 ("fstosi.rz",
3178 OPCODE_INFO2 (0xf4001820,
3179 (0_3, FREG, OPRND_SHIFT_0_BIT),
3180 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3181 CSKY_ISA_FLOAT_E1),
3182 OP32 ("fstosi.rpi",
3183 OPCODE_INFO2 (0xf4001840,
3184 (0_3, FREG, OPRND_SHIFT_0_BIT),
3185 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3186 CSKY_ISA_FLOAT_E1),
3187 OP32 ("fstosi.rni",
3188 OPCODE_INFO2 (0xf4001860,
3189 (0_3, FREG, OPRND_SHIFT_0_BIT),
3190 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3191 CSKY_ISA_FLOAT_E1),
3192 OP32 ("fstoui.rn",
3193 OPCODE_INFO2 (0xf4001880,
3194 (0_3, FREG, OPRND_SHIFT_0_BIT),
3195 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3196 CSKY_ISA_FLOAT_E1),
3197 OP32 ("fstoui.rz",
3198 OPCODE_INFO2 (0xf40018a0,
3199 (0_3, FREG, OPRND_SHIFT_0_BIT),
3200 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3201 CSKY_ISA_FLOAT_E1),
3202 OP32 ("fstoui.rpi",
3203 OPCODE_INFO2 (0xf40018c0,
3204 (0_3, FREG, OPRND_SHIFT_0_BIT),
3205 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3206 CSKY_ISA_FLOAT_E1),
3207 OP32 ("fstoui.rni",
3208 OPCODE_INFO2 (0xf40018e0,
3209 (0_3, FREG, OPRND_SHIFT_0_BIT),
3210 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3211 CSKY_ISA_FLOAT_E1),
3212 OP32 ("fdtosi.rn",
3213 OPCODE_INFO2 (0xf4001900,
3214 (0_3, FREG, OPRND_SHIFT_0_BIT),
3215 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3216 CSKY_ISA_FLOAT_1E2),
3217 OP32 ("fdtosi.rz",
3218 OPCODE_INFO2 (0xf4001920,
3219 (0_3, FREG, OPRND_SHIFT_0_BIT),
3220 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3221 CSKY_ISA_FLOAT_1E2),
3222 OP32 ("fdtosi.rpi",
3223 OPCODE_INFO2 (0xf4001940,
3224 (0_3, FREG, OPRND_SHIFT_0_BIT),
3225 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3226 CSKY_ISA_FLOAT_1E2),
3227 OP32 ("fdtosi.rni",
3228 OPCODE_INFO2 (0xf4001960,
3229 (0_3, FREG, OPRND_SHIFT_0_BIT),
3230 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3231 CSKY_ISA_FLOAT_1E2),
3232 OP32 ("fdtoui.rn",
3233 OPCODE_INFO2 (0xf4001980,
3234 (0_3, FREG, OPRND_SHIFT_0_BIT),
3235 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3236 CSKY_ISA_FLOAT_1E2),
3237 OP32 ("fdtoui.rz",
3238 OPCODE_INFO2 (0xf40019a0,
3239 (0_3, FREG, OPRND_SHIFT_0_BIT),
3240 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3241 CSKY_ISA_FLOAT_1E2),
3242 OP32 ("fdtoui.rpi",
3243 OPCODE_INFO2 (0xf40019c0,
3244 (0_3, FREG, OPRND_SHIFT_0_BIT),
3245 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3246 CSKY_ISA_FLOAT_1E2),
3247 OP32 ("fdtoui.rni",
3248 OPCODE_INFO2 (0xf40019e0,
3249 (0_3, FREG, OPRND_SHIFT_0_BIT),
3250 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3251 CSKY_ISA_FLOAT_1E2),
3252 OP32 ("fsitos",
3253 OPCODE_INFO2 (0xf4001a00,
3254 (0_3, FREG, OPRND_SHIFT_0_BIT),
3255 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3256 CSKY_ISA_FLOAT_E1),
3257 OP32 ("fuitos",
3258 OPCODE_INFO2 (0xf4001a20,
3259 (0_3, FREG, OPRND_SHIFT_0_BIT),
3260 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3261 CSKY_ISA_FLOAT_E1),
3262 OP32 ("fsitod",
3263 OPCODE_INFO2 (0xf4001a80,
3264 (0_3, FREG, OPRND_SHIFT_0_BIT),
3265 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3266 CSKY_ISA_FLOAT_1E2),
3267 OP32 ("fuitod",
3268 OPCODE_INFO2 (0xf4001aa0,
3269 (0_3, FREG, OPRND_SHIFT_0_BIT),
3270 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3271 CSKY_ISA_FLOAT_1E2),
3272 OP32 ("fdtos",
3273 OPCODE_INFO2 (0xf4001ac0,
3274 (0_3, FREG, OPRND_SHIFT_0_BIT),
3275 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3276 CSKY_ISA_FLOAT_1E2),
3277 OP32 ("fstod",
3278 OPCODE_INFO2 (0xf4001ae0,
3279 (0_3, FREG, OPRND_SHIFT_0_BIT),
3280 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3281 CSKY_ISA_FLOAT_1E2),
3282 OP32 ("fmfvrh",
3283 OPCODE_INFO2 (0xf4001b00,
3284 (0_4, AREG, OPRND_SHIFT_0_BIT),
3285 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3286 CSKY_ISA_FLOAT_1E2),
3287 OP32 ("fmfvrl",
3288 OPCODE_INFO2 (0xf4001b20,
3289 (0_4, AREG, OPRND_SHIFT_0_BIT),
3290 (16_19, FREG, OPRND_SHIFT_0_BIT)),
3291 CSKY_ISA_FLOAT_E1),
3292 OP32 ("fmtvrh",
3293 OPCODE_INFO2 (0xf4001b40,
3294 (0_3, FREG, OPRND_SHIFT_0_BIT),
3295 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3296 CSKY_ISA_FLOAT_1E2),
3297 OP32 ("fmtvrl",
3298 OPCODE_INFO2 (0xf4001b60,
3299 (0_3, FREG, OPRND_SHIFT_0_BIT),
3300 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3301 CSKY_ISA_FLOAT_E1),
3302 OP32 ("flds",
3303 SOPCODE_INFO2 (0xf4002000,
3304 (0_3, FREG, OPRND_SHIFT_0_BIT),
3305 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3306 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_2_BIT))),
3307 CSKY_ISA_FLOAT_E1),
3308 OP32 ("fldd",
3309 SOPCODE_INFO2 (0xf4002100,
3310 (0_3, FREG, OPRND_SHIFT_0_BIT),
3311 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3312 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_2_BIT))),
3313 CSKY_ISA_FLOAT_1E2),
3314 OP32 ("fldm",
3315 SOPCODE_INFO2 (0xf4002200,
3316 (0_3, FREG, OPRND_SHIFT_0_BIT),
3317 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3318 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
3319 CSKY_ISA_FLOAT_1E2),
3320 OP32 ("fsts",
3321 SOPCODE_INFO2 (0xf4002400,
3322 (0_3, FREG, OPRND_SHIFT_0_BIT),
3323 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3324 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_2_BIT))),
3325 CSKY_ISA_FLOAT_E1),
3326 OP32 ("fstd",
3327 SOPCODE_INFO2 (0xf4002500,
3328 (0_3, FREG, OPRND_SHIFT_0_BIT),
3329 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3330 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_2_BIT))),
3331 CSKY_ISA_FLOAT_1E2),
3332 OP32 ("fstm",
3333 SOPCODE_INFO2 (0xf4002600,
3334 (0_3, FREG, OPRND_SHIFT_0_BIT),
3335 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3336 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
3337 CSKY_ISA_FLOAT_1E2),
3338 OP32 ("fldrs",
3339 SOPCODE_INFO2 (0xf4002800,
3340 (0_3, FREG, OPRND_SHIFT_0_BIT),
3341 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3342 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3343 CSKY_ISA_FLOAT_E1),
3344 OP32 ("fstrs",
3345 SOPCODE_INFO2 (0xf4002c00,
3346 (0_3, FREG, OPRND_SHIFT_0_BIT),
3347 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3348 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3349 CSKY_ISA_FLOAT_E1),
3350 OP32 ("fldrd",
3351 SOPCODE_INFO2 (0xf4002900,
3352 (0_3, FREG, OPRND_SHIFT_0_BIT),
3353 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3354 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3355 CSKY_ISA_FLOAT_1E2),
3356 OP32 ("fldrm",
3357 SOPCODE_INFO2 (0xf4002a00,
3358 (0_3, FREG, OPRND_SHIFT_0_BIT),
3359 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3360 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3361 CSKY_ISA_FLOAT_1E2),
3362 OP32 ("fstrd",
3363 SOPCODE_INFO2 (0xf4002d00,
3364 (0_3, FREG, OPRND_SHIFT_0_BIT),
3365 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3366 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3367 CSKY_ISA_FLOAT_1E2),
3368 OP32 ("fstrm",
3369 SOPCODE_INFO2 (0xf4002e00,
3370 (0_3, FREG, OPRND_SHIFT_0_BIT),
3371 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3372 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
3373 CSKY_ISA_FLOAT_1E2),
3374 OP32 ("fldms",
3375 OPCODE_INFO2 (0xf4003000,
3376 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3377 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3378 CSKY_ISA_FLOAT_E1),
3379 OP32 ("fldmd",
3380 OPCODE_INFO2 (0xf4003100,
3381 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3382 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3383 CSKY_ISA_FLOAT_1E2),
3384 OP32 ("fldmm",
3385 OPCODE_INFO2 (0xf4003200,
3386 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3387 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3388 CSKY_ISA_FLOAT_1E2),
3389 OP32 ("fstms",
3390 OPCODE_INFO2 (0xf4003400,
3391 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3392 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3393 CSKY_ISA_FLOAT_E1),
3394 OP32 ("fstmd",
3395 OPCODE_INFO2 (0xf4003500,
3396 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3397 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3398 CSKY_ISA_FLOAT_1E2),
3399 OP32 ("fstmm",
3400 OPCODE_INFO2 (0xf4003600,
3401 (0_3or21_24, FREGLIST_DASH, OPRND_SHIFT_0_BIT),
3402 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
3403 CSKY_ISA_FLOAT_1E2),
b8891f8d
AJ		 3404 DOP32 ("idly",
3405 OPCODE_INFO1 (0xc0001c20,
3406 (21_25, OIMM5b_IDLY, OPRND_SHIFT_0_BIT)),
3407 OPCODE_INFO0 (0xc0601c20),
3408 CSKYV2_ISA_E1),
3409
3410#undef _RELOC32
3411#define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM18BY2
3412 OP32 ("grs",
3413 OPCODE_INFO2 (0xcc0c0000,
3414 (21_25, AREG, OPRND_SHIFT_0_BIT),
3415 (0_17, IMM_OFF18b, OPRND_SHIFT_1_BIT)),
3416 CSKYV2_ISA_2E3),
3417#undef _RELOC32
3418#define _RELOC32 0
3419 DOP32 ("ixh",
3420 OPCODE_INFO3 (0xc4000820,
3421 (0_4, AREG, OPRND_SHIFT_0_BIT),
3422 (16_20, AREG, OPRND_SHIFT_0_BIT),
3423 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3424 OPCODE_INFO2 (0xc4000820,
3425 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3426 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3427 CSKYV2_ISA_1E2),
3428 DOP32 ("ixw",
3429 OPCODE_INFO3 (0xc4000840,
3430 (0_4, AREG, OPRND_SHIFT_0_BIT),
3431 (16_20, AREG, OPRND_SHIFT_0_BIT),
3432 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3433 OPCODE_INFO2 (0xc4000840,
3434 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3435 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3436 CSKYV2_ISA_1E2),
3437 OP32 ("ixd",
3438 OPCODE_INFO3 (0xc4000880,
3439 (0_4, AREG, OPRND_SHIFT_0_BIT),
3440 (16_20, AREG, OPRND_SHIFT_0_BIT),
3441 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3442 CSKYV2_ISA_2E3),
3443 DOP32 ("divu",
3444 OPCODE_INFO3 (0xc4008020,
3445 (0_4, AREG, OPRND_SHIFT_0_BIT),
3446 (16_20, AREG, OPRND_SHIFT_0_BIT),
3447 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3448 OPCODE_INFO2 (0xc4008020,
3449 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3450 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3451 CSKYV2_ISA_2E3),
3452 DOP32 ("divs",
3453 OPCODE_INFO3 (0xc4008040,
3454 (0_4, AREG, OPRND_SHIFT_0_BIT),
3455 (16_20, AREG, OPRND_SHIFT_0_BIT),
3456 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3457 OPCODE_INFO2 (0xc4008040,
3458 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3459 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3460 CSKYV2_ISA_2E3),
3461 OP32 ("pldr",
3462 SOPCODE_INFO1 (0xd8006000,
3463 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3464 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
3465 CSKY_ISA_CACHE),
3466 OP32 ("pldw",
3467 SOPCODE_INFO1 (0xdc006000,
3468 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
3469 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
3470 CSKY_ISA_CACHE),
3471 OP32 ("cprgr",
3472 SOPCODE_INFO2 (0xfc000000,
3473 (16_20, AREG, OPRND_SHIFT_0_BIT),
3474 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3475 (0_11 , IMM12b, OPRND_SHIFT_0_BIT))),
3476 CSKYV2_ISA_E1),
3477 OP32 ("cpwgr",
3478 SOPCODE_INFO2 (0xfc001000,
3479 (16_20, AREG, OPRND_SHIFT_0_BIT),
3480 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3481 (0_11 , IMM12b, OPRND_SHIFT_0_BIT))),
3482 CSKYV2_ISA_E1),
3483 OP32 ("cprcr",
3484 SOPCODE_INFO2 (0xfc002000,
3485 (16_20, AREG, OPRND_SHIFT_0_BIT),
3486 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3487 (0_11 , IMM12b, OPRND_SHIFT_0_BIT))),
3488 CSKYV2_ISA_E1),
3489 OP32 ("cpwcr",
3490 SOPCODE_INFO2 (0xfc003000,
3491 (16_20, AREG, OPRND_SHIFT_0_BIT),
3492 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3493 (0_11 , IMM12b, OPRND_SHIFT_0_BIT))),
3494 CSKYV2_ISA_E1),
3495 OP32 ("cprc",
3496 SOPCODE_INFO1 (0xfc004000,
3497 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3498 (0_11, IMM12b, OPRND_SHIFT_0_BIT))),
3499 CSKYV2_ISA_E1),
3500 OP32 ("cpop",
3501 SOPCODE_INFO1 (0xfc008000,
3502 ABRACKET_OPRND ((21_25, IMM5b, OPRND_SHIFT_0_BIT),
3503 (0_14or16_20 , IMM15b, OPRND_SHIFT_0_BIT))),
3504 CSKYV2_ISA_E1),
3505
3506 OP16_OP32 ("push",
3507 OPCODE_INFO_LIST (0x14c0,
3508 (0_4, REGLIST_DASH_COMMA, OPRND_SHIFT_0_BIT)),
3509 CSKYV2_ISA_E1,
3510 OPCODE_INFO_LIST (0xebe00000,
3511 (0_8, REGLIST_DASH_COMMA, OPRND_SHIFT_0_BIT)),
3512 CSKYV2_ISA_2E3),
3513#undef _TRANSFER
3514#define _TRANSFER 2
3515 OP16_OP32 ("pop",
3516 OPCODE_INFO_LIST (0x1480,
3517 (0_4, REGLIST_DASH_COMMA, OPRND_SHIFT_0_BIT)),
3518 CSKYV2_ISA_E1,
3519 OPCODE_INFO_LIST (0xebc00000,
3520 (0_8, REGLIST_DASH_COMMA, OPRND_SHIFT_0_BIT)),
3521 CSKYV2_ISA_2E3),
3522#undef _TRANSFER
3523#define _TRANSFER 0
3524 OP16_OP32 ("movi",
3525 OPCODE_INFO2 (0x3000,
3526 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3527 (0_7, IMM8b, OPRND_SHIFT_0_BIT)),
3528 CSKYV2_ISA_E1,
3529 OPCODE_INFO2 (0xea000000,
3530 (16_20, AREG, OPRND_SHIFT_0_BIT),
3531 (0_15, IMM16b, OPRND_SHIFT_0_BIT)),
3532 CSKYV2_ISA_1E2),
3533 /* bmaski will transfer to movi when imm < 17. */
3534 OP16_OP32 ("bmaski",
3535 OPCODE_INFO2 (0x3000,
3536 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3537 (0_7, IMM8b_BMASKI, OPRND_SHIFT_0_BIT)),
3538 CSKYV2_ISA_1E2,
3539 OPCODE_INFO2 (0xc4005020,
3540 (0_4, AREG, OPRND_SHIFT_0_BIT),
3541 (21_25, OIMM5b_BMASKI, OPRND_SHIFT_0_BIT)),
3542 CSKYV2_ISA_1E2),
3543 OP16_OP32 ("cmphsi",
3544 OPCODE_INFO2 (0x3800,
3545 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3546 (0_4, OIMM5b, OPRND_SHIFT_0_BIT)),
3547 CSKYV2_ISA_E1,
3548 OPCODE_INFO2 (0xeb000000,
3549 (16_20, AREG, OPRND_SHIFT_0_BIT),
3550 (0_15, OIMM16b, OPRND_SHIFT_0_BIT)),
3551 CSKYV2_ISA_1E2),
3552 OP16_OP32 ("cmplti",
3553 OPCODE_INFO2 (0x3820,
3554 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3555 (0_4, OIMM5b, OPRND_SHIFT_0_BIT)),
3556 CSKYV2_ISA_E1,
3557 OPCODE_INFO2 (0xeb200000,
3558 (16_20, AREG, OPRND_SHIFT_0_BIT),
3559 (0_15, OIMM16b, OPRND_SHIFT_0_BIT)),
3560 CSKYV2_ISA_1E2),
3561 OP16_OP32 ("cmpnei",
3562 OPCODE_INFO2 (0x3840,
3563 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3564 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3565 CSKYV2_ISA_E1,
3566 OPCODE_INFO2 (0xeb400000,
3567 (16_20, AREG, OPRND_SHIFT_0_BIT),
3568 (0_15, IMM16b, OPRND_SHIFT_0_BIT)),
3569 CSKYV2_ISA_1E2),
3570#undef _TRANSFER
3571#define _TRANSFER 1
3572 OP16_OP32 ("jmpix",
3573 OPCODE_INFO2 (0x38e0,
3574 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3575 (0_1, IMM2b_JMPIX, OPRND_SHIFT_0_BIT)),
3576 CSKY_ISA_JAVA,
3577 OPCODE_INFO2 (0xe9e00000,
3578 (16_20, GREG0_7, OPRND_SHIFT_0_BIT),
3579 (0_1, IMM2b_JMPIX, OPRND_SHIFT_0_BIT)),
3580 CSKY_ISA_JAVA),
3581#undef _TRANSFER
3582#define _TRANSFER 0
3583 DOP16_DOP32 ("bclri",
3584 OPCODE_INFO3 (0x3880,
3585 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3586 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3587 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3588 OPCODE_INFO2 (0x3880,
3589 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3590 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3591 CSKYV2_ISA_E1,
3592 OPCODE_INFO3 (0xc4002820,
3593 (0_4, AREG, OPRND_SHIFT_0_BIT),
3594 (16_20, AREG, OPRND_SHIFT_0_BIT),
3595 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3596 OPCODE_INFO2 (0xc4002820,
3597 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3598 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3599 CSKYV2_ISA_1E2),
3600 DOP16_DOP32 ("bseti",
3601 OPCODE_INFO3 (0x38a0,
3602 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3603 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3604 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3605 OPCODE_INFO2 (0x38a0,
3606 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3607 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3608 CSKYV2_ISA_E1,
3609 OPCODE_INFO3 (0xc4002840,
3610 (0_4, AREG, OPRND_SHIFT_0_BIT),
3611 (16_20, AREG, OPRND_SHIFT_0_BIT),
3612 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3613 OPCODE_INFO2 (0xc4002840,
3614 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3615 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3616 CSKYV2_ISA_1E2),
3617 OP16_OP32_WITH_WORK ("btsti",
3618 OPCODE_INFO2 (0x38c0,
3619 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3620 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3621 CSKYV2_ISA_E1,
3622 OPCODE_INFO2 (0xc4002880,
3623 (16_20, AREG, OPRND_SHIFT_0_BIT),
3624 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3625 CSKYV2_ISA_1E2, v2_work_btsti),
3626 DOP16_DOP32 ("lsli",
3627 OPCODE_INFO3 (0x4000,
3628 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
3629 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3630 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3631 OPCODE_INFO2 (0x4000,
3632 (5_7or8_10, DUP_GREG0_7, OPRND_SHIFT_0_BIT),
3633 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3634 CSKYV2_ISA_E1,
3635 OPCODE_INFO3 (0xc4004820,
3636 (0_4, AREG, OPRND_SHIFT_0_BIT),
3637 (16_20, AREG, OPRND_SHIFT_0_BIT),
3638 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3639 OPCODE_INFO2 (0xc4004820,
3640 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3641 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3642 CSKYV2_ISA_1E2),
3643 DOP16_DOP32 ("lsri",
3644 OPCODE_INFO3 (0x4800,
3645 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
3646 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3647 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3648 OPCODE_INFO2 (0x4800,
3649 (5_7or8_10, DUP_GREG0_7, OPRND_SHIFT_0_BIT),
3650 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3651 CSKYV2_ISA_E1,
3652 OPCODE_INFO3 (0xc4004840,
3653 (0_4, AREG, OPRND_SHIFT_0_BIT),
3654 (16_20, AREG, OPRND_SHIFT_0_BIT),
3655 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3656 OPCODE_INFO2 (0xc4004840,
3657 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3658 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3659 CSKYV2_ISA_1E2),
3660 OP16_OP32 ("asri",
3661 OPCODE_INFO3 (0x5000,
3662 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
3663 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
3664 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
3665 CSKYV2_ISA_E1,
3666 OPCODE_INFO3 (0xc4004880,
3667 (0_4, AREG, OPRND_SHIFT_0_BIT),
3668 (16_20, AREG, OPRND_SHIFT_0_BIT),
3669 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3670 CSKYV2_ISA_1E2),
3671 DOP16_DOP32 ("addc",
3672 OPCODE_INFO2 (0x6001,
3673 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3674 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3675 OPCODE_INFO3 (0x6001,
3676 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3677 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
3678 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
3679 CSKYV2_ISA_E1,
3680 OPCODE_INFO3 (0xc4000040,
3681 (0_4, AREG, OPRND_SHIFT_0_BIT),
3682 (16_20, AREG, OPRND_SHIFT_0_BIT),
3683 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3684 OPCODE_INFO2 (0xc4000040,
3685 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3686 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3687 CSKYV2_ISA_1E2),
3688 DOP16_DOP32 ("subc",
3689 OPCODE_INFO2 (0x6003,
3690 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3691 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3692 OPCODE_INFO3 (0x6003,
3693 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3694 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3695 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3696 CSKYV2_ISA_E1,
3697 OPCODE_INFO3 (0xc4000100,
3698 (0_4, AREG, OPRND_SHIFT_0_BIT),
3699 (16_20, AREG, OPRND_SHIFT_0_BIT),
3700 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3701 OPCODE_INFO2 (0xc4000100,
3702 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3703 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3704 CSKYV2_ISA_1E2),
3705 OP16_OP32 ("cmphs",
3706 OPCODE_INFO2 (0x6400,
3707 (2_5, GREG0_15, OPRND_SHIFT_0_BIT),
3708 (6_9, GREG0_15, OPRND_SHIFT_0_BIT)),
3709 CSKYV2_ISA_E1,
3710 OPCODE_INFO2 (0xc4000420,
3711 (16_20, AREG, OPRND_SHIFT_0_BIT),
3712 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3713 CSKYV2_ISA_2E3),
3714 OP16_OP32 ("cmplt",
3715 OPCODE_INFO2 (0x6401,
3716 (2_5, GREG0_15, OPRND_SHIFT_0_BIT),
3717 (6_9, GREG0_15, OPRND_SHIFT_0_BIT)),
3718 CSKYV2_ISA_E1,
3719 OPCODE_INFO2 (0xc4000440,
3720 (16_20, AREG, OPRND_SHIFT_0_BIT),
3721 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3722 CSKYV2_ISA_2E3),
3723 OP16_OP32 ("cmpne",
3724 OPCODE_INFO2 (0x6402,
3725 (2_5, GREG0_15, OPRND_SHIFT_0_BIT),
3726 (6_9, GREG0_15, OPRND_SHIFT_0_BIT)),
3727 CSKYV2_ISA_E1,
3728 OPCODE_INFO2 (0xc4000480,
3729 (16_20, AREG, OPRND_SHIFT_0_BIT),
3730 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3731 CSKYV2_ISA_2E3),
3732 OP16_OP32 ("mvcv",
3733 OPCODE_INFO1 (0x6403,
3734 (6_9, GREG0_15, OPRND_SHIFT_0_BIT)),
3735 CSKYV2_ISA_E1,
3736 OPCODE_INFO1 (0xc4000600,
3737 (0_4, AREG, OPRND_SHIFT_0_BIT)),
3738 CSKYV2_ISA_2E3),
3739 DOP16_DOP32 ("and",
3740 OPCODE_INFO2 (0x6800,
3741 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3742 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3743 OPCODE_INFO3 (0x6800,
3744 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3745 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
3746 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
3747 CSKYV2_ISA_E1,
3748 OPCODE_INFO3 (0xc4002020,
3749 (0_4, AREG, OPRND_SHIFT_0_BIT),
3750 (16_20, AREG, OPRND_SHIFT_0_BIT),
3751 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3752 OPCODE_INFO2 (0xc4002020,
3753 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3754 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3755 CSKYV2_ISA_1E2),
3756 DOP16_DOP32 ("andn",
3757 OPCODE_INFO2 (0x6801,
3758 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3759 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3760 OPCODE_INFO3 (0x6801,
3761 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3762 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3763 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3764 CSKYV2_ISA_E1,
3765 OPCODE_INFO3 (0xc4002040,
3766 (0_4, AREG, OPRND_SHIFT_0_BIT),
3767 (16_20, AREG, OPRND_SHIFT_0_BIT),
3768 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3769 OPCODE_INFO2 (0xc4002040,
3770 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3771 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3772 CSKYV2_ISA_1E2),
3773 OP16_OP32 ("tst",
3774 OPCODE_INFO2 (0x6802,
3775 (2_5, GREG0_15, OPRND_SHIFT_0_BIT),
3776 (6_9, GREG0_15, OPRND_SHIFT_0_BIT)),
3777 CSKYV2_ISA_E1,
3778 OPCODE_INFO2 (0xc4002080,
3779 (16_20, AREG, OPRND_SHIFT_0_BIT),
3780 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3781 CSKYV2_ISA_2E3),
3782 OP16_OP32 ("tstnbz",
3783 OPCODE_INFO1 (0x6803,
3784 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3785 CSKYV2_ISA_E1,
3786 OPCODE_INFO1 (0xc4002100,
3787 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3788 CSKYV2_ISA_2E3),
3789 DOP16_DOP32 ("or",
3790 OPCODE_INFO2 (0x6c00,
3791 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3792 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3793 OPCODE_INFO3 (0x6c00,
3794 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3795 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
3796 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
3797 CSKYV2_ISA_E1,
3798 OPCODE_INFO3 (0xc4002420,
3799 (0_4, AREG, OPRND_SHIFT_0_BIT),
3800 (16_20, AREG, OPRND_SHIFT_0_BIT),
3801 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3802 OPCODE_INFO2 (0xc4002420,
3803 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3804 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3805 CSKYV2_ISA_1E2),
3806 DOP16_DOP32 ("xor",
3807 OPCODE_INFO2 (0x6c01,
3808 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3809 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3810 OPCODE_INFO3 (0x6c01,
3811 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3812 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
3813 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
3814 CSKYV2_ISA_E1,
3815 OPCODE_INFO3 (0xc4002440,
3816 (0_4, AREG, OPRND_SHIFT_0_BIT),
3817 (16_20, AREG, OPRND_SHIFT_0_BIT),
3818 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3819 OPCODE_INFO2 (0xc4002440,
3820 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3821 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3822 CSKYV2_ISA_1E2),
3823 DOP16_DOP32 ("nor",
3824 OPCODE_INFO2 (0x6c02,
3825 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3826 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3827 OPCODE_INFO3 (0x6c02,
3828 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3829 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
3830 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
3831 CSKYV2_ISA_E1,
3832 OPCODE_INFO3 (0xc4002480,
3833 (0_4, AREG, OPRND_SHIFT_0_BIT),
3834 (16_20, AREG, OPRND_SHIFT_0_BIT),
3835 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3836 OPCODE_INFO2 (0xc4002480,
3837 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3838 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3839 CSKYV2_ISA_1E2),
3840 OP16_OP32 ("mov",
3841 OPCODE_INFO2 (0x6c03,
3842 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3843 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3844 CSKYV2_ISA_E1,
3845 OPCODE_INFO2 (0xc4004820,
3846 (0_4, AREG, OPRND_SHIFT_0_BIT),
3847 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3848 CSKYV2_ISA_1E2),
3849 OP16_OP32 ("nop",
3850 OPCODE_INFO0 (0x6c03),
3851 CSKYV2_ISA_E1,
3852 OPCODE_INFO0 (0xc4004820),
3853 CSKYV2_ISA_E1),
3854 DOP16_DOP32 ("lsl",
3855 OPCODE_INFO2 (0x7000,
3856 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3857 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3858 OPCODE_INFO3 (0x7000,
3859 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3860 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3861 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3862 CSKYV2_ISA_E1,
3863 OPCODE_INFO3 (0xc4004020,
3864 (0_4, AREG, OPRND_SHIFT_0_BIT),
3865 (16_20, AREG, OPRND_SHIFT_0_BIT),
3866 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3867 OPCODE_INFO2 (0xc4004020,
3868 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3869 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3870 CSKYV2_ISA_1E2),
3871 DOP16_DOP32 ("lsr",
3872 OPCODE_INFO2 (0x7001,
3873 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3874 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3875 OPCODE_INFO3 (0x7001,
3876 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3877 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3878 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3879 CSKYV2_ISA_E1,
3880 OPCODE_INFO3 (0xc4004040,
3881 (0_4, AREG, OPRND_SHIFT_0_BIT),
3882 (16_20, AREG, OPRND_SHIFT_0_BIT),
3883 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3884 OPCODE_INFO2 (0xc4004040,
3885 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3886 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3887 CSKYV2_ISA_1E2),
3888 DOP16_DOP32 ("asr",
3889 OPCODE_INFO2 (0x7002,
3890 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3891 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3892 OPCODE_INFO3 (0x7002,
3893 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3894 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3895 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3896 CSKYV2_ISA_E1,
3897 OPCODE_INFO3 (0xc4004080,
3898 (0_4, AREG, OPRND_SHIFT_0_BIT),
3899 (16_20, AREG, OPRND_SHIFT_0_BIT),
3900 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3901 OPCODE_INFO2 (0xc4004080,
3902 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3903 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3904 CSKYV2_ISA_1E2),
3905 DOP16_DOP32 ("rotl",
3906 OPCODE_INFO2 (0x7003,
3907 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3908 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3909 OPCODE_INFO3 (0x7003,
3910 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3911 (NONE, DUMMY_REG, OPRND_SHIFT_0_BIT),
3912 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3913 CSKYV2_ISA_E1,
3914 OPCODE_INFO3 (0xc4004100,
3915 (0_4, AREG, OPRND_SHIFT_0_BIT),
3916 (16_20, AREG, OPRND_SHIFT_0_BIT),
3917 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3918 OPCODE_INFO2 (0xc4004100,
3919 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
3920 (21_25, AREG, OPRND_SHIFT_0_BIT)),
3921 CSKYV2_ISA_1E2),
3922 DOP16_DOP32 ("zextb",
3923 OPCODE_INFO2 (0x7400,
3924 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3925 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3926 OPCODE_INFO1 (0x7400,
3927 (2_5or6_9, DUP_GREG0_15, OPRND_SHIFT_0_BIT)),
3928 CSKYV2_ISA_E1,
3929 OPCODE_INFO2 (0xc40054e0,
3930 (0_4, AREG, OPRND_SHIFT_0_BIT),
3931 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3932 OPCODE_INFO1 (0xc40054e0,
3933 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
3934 CSKYV2_ISA_2E3),
3935 DOP16_DOP32 ("zexth",
3936 OPCODE_INFO2 (0x7401,
3937 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3938 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3939 OPCODE_INFO1 (0x7401,
3940 (2_5or6_9, DUP_GREG0_15, OPRND_SHIFT_0_BIT)),
3941 CSKYV2_ISA_E1,
3942 OPCODE_INFO2 (0xc40055e0,
3943 (0_4, AREG, OPRND_SHIFT_0_BIT),
3944 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3945 OPCODE_INFO1 (0xc40055e0,
3946 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
3947 CSKYV2_ISA_2E3),
3948 DOP16_DOP32 ("sextb",
3949 OPCODE_INFO2 (0x7402,
3950 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3951 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3952 OPCODE_INFO1 (0x7402,
3953 (2_5or6_9, DUP_GREG0_15, OPRND_SHIFT_0_BIT)),
3954 CSKYV2_ISA_E1,
3955 OPCODE_INFO2 (0xc40058e0,
3956 (0_4, AREG, OPRND_SHIFT_0_BIT),
3957 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3958 OPCODE_INFO1 (0xc40058e0,
3959 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
3960 CSKYV2_ISA_2E3),
3961 DOP16_DOP32 ("sexth",
3962 OPCODE_INFO2 (0x7403,
3963 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
3964 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
3965 OPCODE_INFO1 (0x7403,
3966 (2_5or6_9, DUP_GREG0_15, OPRND_SHIFT_0_BIT)),
3967 CSKYV2_ISA_E1,
3968 OPCODE_INFO2 (0xc40059e0,
3969 (0_4, AREG, OPRND_SHIFT_0_BIT),
3970 (16_20, AREG, OPRND_SHIFT_0_BIT)),
3971 OPCODE_INFO1 (0xc40059e0,
3972 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
3973 CSKYV2_ISA_2E3),
3974 OP32 ("zext",
3975 OPCODE_INFO4 (0xc4005400,
3976 (0_4, AREG, OPRND_SHIFT_0_BIT),
3977 (16_20, AREG, OPRND_SHIFT_0_BIT),
3978 (5_9, IMM5b, OPRND_SHIFT_0_BIT),
3979 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3980 CSKYV2_ISA_2E3),
3981 OP32 ("sext",
3982 OPCODE_INFO4 (0xc4005800,
3983 (0_4, AREG, OPRND_SHIFT_0_BIT),
3984 (16_20, AREG, OPRND_SHIFT_0_BIT),
3985 (5_9, IMM5b, OPRND_SHIFT_0_BIT),
3986 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
3987 CSKYV2_ISA_2E3),
3988#undef _TRANSFER
3989#define _TRANSFER 2
3990 OP16_OP32 ("rts",
3991 OPCODE_INFO0 (0x783c),
3992 CSKYV2_ISA_E1,
3993 OPCODE_INFO0 (0xe8cf0000),
3994 CSKYV2_ISA_E1),
3995#undef _TRANSFER
3996#define _TRANSFER 1
3997 OP16_OP32 ("jmp",
3998 OPCODE_INFO1 (0x7800,
3999 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4000 CSKYV2_ISA_E1,
4001 OPCODE_INFO1 (0xe8c00000,
4002 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4003 CSKYV2_ISA_2E3),
4004#undef _TRANSFER
4005#define _TRANSFER 0
4006 OP16_OP32 ("revb",
4007 OPCODE_INFO2 (0x7802,
4008 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4009 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4010 CSKYV2_ISA_1E2,
4011 OPCODE_INFO2 (0xc4006080,
4012 (0_4, AREG, OPRND_SHIFT_0_BIT),
4013 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4014 CSKYV2_ISA_2E3),
4015 OP16_OP32 ("revh",
4016 OPCODE_INFO2 (0x7803,
4017 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4018 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4019 CSKYV2_ISA_1E2,
4020 OPCODE_INFO2 (0xc4006100,
4021 (0_4, AREG, OPRND_SHIFT_0_BIT),
4022 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4023 CSKYV2_ISA_2E3),
4024 OP16_OP32 ("jsr",
4025 OPCODE_INFO1 (0x7bc1,
4026 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4027 CSKYV2_ISA_E1,
4028 OPCODE_INFO1 (0xe8e00000,
4029 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4030 CSKYV2_ISA_2E3),
4031 DOP16_DOP32 ("mult",
4032 OPCODE_INFO2 (0x7c00,
4033 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4034 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4035 OPCODE_INFO3 (0x7c00,
4036 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4037 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
4038 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
4039 CSKYV2_ISA_E1,
4040 OPCODE_INFO3 (0xc4008420,
4041 (0_4, AREG, OPRND_SHIFT_0_BIT),
4042 (16_20, AREG, OPRND_SHIFT_0_BIT),
4043 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4044 OPCODE_INFO2 (0xc4008420,
4045 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4046 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4047 CSKYV2_ISA_1E2),
4048 OP16 ("mul",
4049 OPCODE_INFO2 (0x7c00,
4050 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4051 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4052 CSKYV2_ISA_E1),
4053 DOP16_DOP32 ("mulsh",
4054 OPCODE_INFO2 (0x7c01,
4055 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4056 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4057 OPCODE_INFO3 (0x7c01,
4058 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4059 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT),
4060 (2_5, 2IN1_DUMMY, OPRND_SHIFT_0_BIT)),
4061 CSKYV2_ISA_2E3,
4062 OPCODE_INFO3 (0xc4009020,
4063 (0_4, AREG, OPRND_SHIFT_0_BIT),
4064 (16_20, AREG, OPRND_SHIFT_0_BIT),
4065 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4066 OPCODE_INFO2 (0xc4009020,
4067 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4068 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4069 CSKYV2_ISA_2E3),
4070 OP16 ("muls.h",
4071 OPCODE_INFO2 (0x7c01,
4072 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4073 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4074 CSKYV2_ISA_2E3),
4075 DOP32 ("mulsw",
4076 OPCODE_INFO3 (0xc4009420,
4077 (0_4, AREG, OPRND_SHIFT_0_BIT),
4078 (16_20, AREG, OPRND_SHIFT_0_BIT),
4079 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4080 OPCODE_INFO2 (0xc4009420,
4081 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4082 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4083 CSKY_ISA_DSP),
4084 OP16_OP32 ("ld.b",
4085 SOPCODE_INFO2 (0x8000,
4086 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4087 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4088 (0_4, IMM_LDST, OPRND_SHIFT_0_BIT))),
4089 CSKYV2_ISA_E1,
4090 SOPCODE_INFO2 (0xd8000000,
4091 (21_25, AREG, OPRND_SHIFT_0_BIT),
4092 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4093 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
4094 CSKYV2_ISA_E1),
4095 OP16_OP32 ("ldb",
4096 SOPCODE_INFO2 (0x8000,
4097 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4098 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4099 (0_4, IMM_LDST, OPRND_SHIFT_0_BIT))),
4100 CSKYV2_ISA_E1,
4101 SOPCODE_INFO2 (0xd8000000,
4102 (21_25, AREG, OPRND_SHIFT_0_BIT),
4103 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4104 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
4105 CSKYV2_ISA_E1),
4106 OP16_OP32 ("st.b",
4107 SOPCODE_INFO2 (0xa000,
4108 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4109 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4110 (0_4, IMM_LDST, OPRND_SHIFT_0_BIT))),
4111 CSKYV2_ISA_E1,
4112 SOPCODE_INFO2 (0xdc000000,
4113 (21_25, AREG, OPRND_SHIFT_0_BIT),
4114 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4115 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
4116 CSKYV2_ISA_E1),
4117 OP16_OP32 ("stb",
4118 SOPCODE_INFO2 (0xa000,
4119 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4120 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4121 (0_4, IMM_LDST, OPRND_SHIFT_0_BIT))),
4122 CSKYV2_ISA_E1,
4123 SOPCODE_INFO2 (0xdc000000,
4124 (21_25, AREG, OPRND_SHIFT_0_BIT),
4125 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4126 (0_11, IMM_LDST, OPRND_SHIFT_0_BIT))),
4127 CSKYV2_ISA_E1),
4128
4129 OP16_OP32 ("ld.h",
4130 SOPCODE_INFO2 (0x8800,
4131 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4132 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4133 (0_4, IMM_LDST, OPRND_SHIFT_1_BIT))),
4134 CSKYV2_ISA_E1,
4135 SOPCODE_INFO2 (0xd8001000,
4136 (21_25, AREG, OPRND_SHIFT_0_BIT),
4137 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4138 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
4139 CSKYV2_ISA_E1),
4140 OP16_OP32 ("ldh",
4141 SOPCODE_INFO2 (0x8800,
4142 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4143 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4144 (0_4, IMM_LDST, OPRND_SHIFT_1_BIT))),
4145 CSKYV2_ISA_E1,
4146 SOPCODE_INFO2 (0xd8001000,
4147 (21_25, AREG, OPRND_SHIFT_0_BIT),
4148 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4149 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
4150 CSKYV2_ISA_E1),
4151 OP16_OP32 ("st.h",
4152 SOPCODE_INFO2 (0xa800,
4153 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4154 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4155 (0_4, IMM_LDST, OPRND_SHIFT_1_BIT))),
4156 CSKYV2_ISA_E1,
4157 SOPCODE_INFO2 (0xdc001000,
4158 (21_25, AREG, OPRND_SHIFT_0_BIT),
4159 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4160 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
4161 CSKYV2_ISA_E1),
4162 OP16_OP32 ("sth",
4163 SOPCODE_INFO2 (0xa800,
4164 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4165 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4166 (0_4, IMM_LDST, OPRND_SHIFT_1_BIT))),
4167 CSKYV2_ISA_E1,
4168 SOPCODE_INFO2 (0xdc001000,
4169 (21_25, AREG, OPRND_SHIFT_0_BIT),
4170 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4171 (0_11, IMM_LDST, OPRND_SHIFT_1_BIT))),
4172 CSKYV2_ISA_E1),
4173 DOP16_OP32 ("ld.w",
4174 SOPCODE_INFO2 (0x9000,
4175 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4176 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4177 (0_4, IMM_LDST, OPRND_SHIFT_2_BIT))),
4178 SOPCODE_INFO2 (0x9800,
4179 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4180 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4181 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4182 CSKYV2_ISA_E1,
4183 SOPCODE_INFO2 (0xd8002000,
4184 (21_25, AREG, OPRND_SHIFT_0_BIT),
4185 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4186 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4187 CSKYV2_ISA_E1),
4188 DOP16_OP32 ("ldw",
4189 SOPCODE_INFO2 (0x9000,
4190 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4191 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4192 (0_4, IMM_LDST, OPRND_SHIFT_2_BIT))),
4193 SOPCODE_INFO2 (0x9800,
4194 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4195 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4196 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4197 CSKYV2_ISA_E1,
4198 SOPCODE_INFO2 (0xd8002000,
4199 (21_25, AREG, OPRND_SHIFT_0_BIT),
4200 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4201 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4202 CSKYV2_ISA_E1),
4203 DOP16_OP32 ("ld",
4204 SOPCODE_INFO2 (0x9000,
4205 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4206 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4207 (0_4, IMM_LDST, OPRND_SHIFT_0_BIT))),
4208 SOPCODE_INFO2 (0x9800,
4209 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4210 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4211 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4212 CSKYV2_ISA_E1,
4213 SOPCODE_INFO2 (0xd8002000,
4214 (21_25, AREG, OPRND_SHIFT_0_BIT),
4215 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4216 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4217 CSKYV2_ISA_E1),
4218 DOP16_OP32 ("st.w",
4219 SOPCODE_INFO2 (0xb000,
4220 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4221 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4222 (0_4, IMM_LDST, OPRND_SHIFT_2_BIT))),
4223 SOPCODE_INFO2 (0xb800,
4224 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4225 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4226 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4227 CSKYV2_ISA_E1,
4228 SOPCODE_INFO2 (0xdc002000,
4229 (21_25, AREG, OPRND_SHIFT_0_BIT),
4230 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4231 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4232 CSKYV2_ISA_E1),
4233 DOP16_OP32 ("stw",
4234 SOPCODE_INFO2 (0xb000,
4235 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4236 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4237 (0_4, IMM_LDST, OPRND_SHIFT_2_BIT))),
4238 SOPCODE_INFO2 (0xb800,
4239 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4240 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4241 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4242 CSKYV2_ISA_E1,
4243 SOPCODE_INFO2 (0xdc002000,
4244 (21_25, AREG, OPRND_SHIFT_0_BIT),
4245 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4246 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4247 CSKYV2_ISA_E1),
4248 DOP16_OP32 ("st",
4249 SOPCODE_INFO2 (0xb000,
4250 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4251 BRACKET_OPRND ((8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4252 (0_4, IMM_LDST, OPRND_SHIFT_2_BIT))),
4253 SOPCODE_INFO2 (0xb800,
4254 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4255 BRACKET_OPRND ((NONE, REGsp, OPRND_SHIFT_0_BIT),
4256 (0_4or8_10, IMM_LDST, OPRND_SHIFT_2_BIT))),
4257 CSKYV2_ISA_E1,
4258 SOPCODE_INFO2 (0xdc002000,
4259 (21_25, AREG, OPRND_SHIFT_0_BIT),
4260 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
4261 (0_11, IMM_LDST, OPRND_SHIFT_2_BIT))),
4262 CSKYV2_ISA_E1),
4263#ifdef BUILD_AS
4264 DOP16_DOP32_WITH_WORK ("addi",
4265 OPCODE_INFO2 (0x2000,
4266 (NONE, AREG, OPRND_SHIFT_0_BIT),
4267 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4268 OPCODE_INFO3 (0x2000,
4269 (NONE, AREG, OPRND_SHIFT_0_BIT),
4270 (NONE, AREG, OPRND_SHIFT_0_BIT),
4271 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4272 CSKYV2_ISA_E1,
4273 OPCODE_INFO2 (0xe4000000,
4274 (NONE, AREG, OPRND_SHIFT_0_BIT),
4275 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4276 OPCODE_INFO3 (0xe4000000,
4277 (NONE, AREG, OPRND_SHIFT_0_BIT),
4278 (NONE, AREG, OPRND_SHIFT_0_BIT),
4279 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4280 CSKYV2_ISA_1E2,
4281 v2_work_addi),
4282#else
4283 DOP16 ("addi",
4284 OPCODE_INFO2 (0x2000,
4285 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4286 (0_7, OIMM8b, OPRND_SHIFT_0_BIT)),
4287 OPCODE_INFO3 (0x5802,
4288 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4289 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4290 (2_4, OIMM3b, OPRND_SHIFT_0_BIT)),
4291 CSKYV2_ISA_E1),
4292 DOP16 ("addi",
4293 OPCODE_INFO3 (0x1800,
4294 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4295 (NONE, REGsp, OPRND_SHIFT_0_BIT),
4296 (0_7, IMM8b_LS2, OPRND_SHIFT_0_BIT)),
4297 OPCODE_INFO3 (0x1400,
4298 (NONE, REGsp, OPRND_SHIFT_0_BIT),
4299 (NONE, REGsp, OPRND_SHIFT_0_BIT),
4300 (0_4or8_9, IMM7b_LS2, OPRND_SHIFT_0_BIT)),
4301 CSKYV2_ISA_E1),
4302 DOP32 ("addi",
4303 OPCODE_INFO3 (0xe4000000,
4304 (21_25, AREG, OPRND_SHIFT_0_BIT),
4305 (16_20, AREG, OPRND_SHIFT_0_BIT),
4306 (0_11, OIMM12b, OPRND_SHIFT_0_BIT)),
4307 OPCODE_INFO3 (0xcc1c0000,
4308 (21_25, AREG, OPRND_SHIFT_0_BIT),
4309 (NONE, REG_r28, OPRND_SHIFT_0_BIT),
4310 (0_17, OIMM18b, OPRND_SHIFT_0_BIT)),
4311 CSKYV2_ISA_1E2),
4312#endif
4313#ifdef BUILD_AS
4314 DOP16_DOP32_WITH_WORK ("subi",
4315 OPCODE_INFO2 (0x2800,
4316 (NONE, AREG, OPRND_SHIFT_0_BIT),
4317 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4318 OPCODE_INFO3 (0x2800,
4319 (NONE, AREG, OPRND_SHIFT_0_BIT),
4320 (NONE, AREG, OPRND_SHIFT_0_BIT),
4321 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4322 CSKYV2_ISA_E1,
4323 OPCODE_INFO2 (0xe4001000,
4324 (NONE, AREG, OPRND_SHIFT_0_BIT),
4325 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4326 OPCODE_INFO3 (0xe4001000,
4327 (NONE, AREG, OPRND_SHIFT_0_BIT),
4328 (NONE, AREG, OPRND_SHIFT_0_BIT),
4329 (NONE, IMM32b, OPRND_SHIFT_0_BIT)),
4330 CSKYV2_ISA_1E2, v2_work_subi),
4331#else
4332 DOP16 ("subi",
4333 OPCODE_INFO2 (0x2800,
4334 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4335 (0_7, OIMM8b, OPRND_SHIFT_0_BIT)),
4336 OPCODE_INFO3 (0x5803,
4337 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4338 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4339 (2_4, OIMM3b, OPRND_SHIFT_0_BIT)),
4340 CSKYV2_ISA_E1),
4341 OP32 ("subi",
4342 OPCODE_INFO3 (0xe4001000,
4343 (21_25, AREG, OPRND_SHIFT_0_BIT),
4344 (16_20, AREG, OPRND_SHIFT_0_BIT),
4345 (0_11, OIMM12b, OPRND_SHIFT_0_BIT)),
4346 CSKYV2_ISA_1E2),
4347 OP16 ("subi",
4348 OPCODE_INFO3 (0x1420,
4349 (NONE, REGsp, OPRND_SHIFT_0_BIT),
4350 (NONE, REGsp, OPRND_SHIFT_0_BIT),
4351 (0_4or8_9, IMM7b_LS2, OPRND_SHIFT_0_BIT)),
4352 CSKYV2_ISA_E1),
4353#endif
4354 DOP16_DOP32_WITH_WORK ("addu",
4355 OPCODE_INFO2 (0x6000,
4356 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4357 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4358 OPCODE_INFO3 (0x5800,
4359 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4360 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4361 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
4362 CSKYV2_ISA_E1,
4363 OPCODE_INFO3 (0xc4000020,
4364 (0_4, AREG, OPRND_SHIFT_0_BIT),
4365 (16_20, AREG, OPRND_SHIFT_0_BIT),
4366 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4367 OPCODE_INFO2 (0xc4000020,
4368 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4369 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4370 CSKYV2_ISA_E1,
4371 v2_work_add_sub),
4372 DOP16_DOP32_WITH_WORK ("add",
4373 OPCODE_INFO2 (0x6000,
4374 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4375 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4376 OPCODE_INFO3 (0x5800,
4377 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4378 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4379 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
4380 CSKYV2_ISA_E1,
4381 OPCODE_INFO3 (0xc4000020,
4382 (0_4, AREG, OPRND_SHIFT_0_BIT),
4383 (16_20, AREG, OPRND_SHIFT_0_BIT),
4384 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4385 OPCODE_INFO2 (0xc4000020,
4386 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4387 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4388 CSKYV2_ISA_E1,
4389 v2_work_add_sub),
4390 DOP16_DOP32_WITH_WORK ("subu",
4391 OPCODE_INFO2 (0x6002,
4392 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4393 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4394 OPCODE_INFO3 (0x5801,
4395 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4396 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4397 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
4398 CSKYV2_ISA_E1,
4399 OPCODE_INFO3 (0xc4000080,
4400 (0_4, AREG, OPRND_SHIFT_0_BIT),
4401 (16_20, AREG, OPRND_SHIFT_0_BIT),
4402 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4403 OPCODE_INFO2 (0xc4000080,
4404 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4405 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4406 CSKYV2_ISA_E1,
4407 v2_work_add_sub),
4408 DOP16_DOP32_WITH_WORK ("sub",
4409 OPCODE_INFO2 (0x6002,
4410 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
4411 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
4412 OPCODE_INFO3 (0x5801,
4413 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4414 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
4415 (2_4, GREG0_7, OPRND_SHIFT_0_BIT)),
4416 CSKYV2_ISA_E1,
4417 OPCODE_INFO3 (0xc4000080,
4418 (0_4, AREG, OPRND_SHIFT_0_BIT),
4419 (16_20, AREG, OPRND_SHIFT_0_BIT),
4420 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4421 OPCODE_INFO2 (0xc4000080,
4422 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
4423 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4424 CSKYV2_ISA_E1,
4425 v2_work_add_sub),
4426 OP32_WITH_WORK ("fmovis",
4427 OPCODE_INFO2 (0xf4001c00,
4428 (0_3, FREG, OPRND_SHIFT_0_BIT),
4429 (4_7or16_24, SFLOAT, OPRND_SHIFT_2_BIT)),
4430 CSKY_ISA_FLOAT_1E3,
4431 float_work_fmovi),
4432 OP32_WITH_WORK ("fmovid",
4433 OPCODE_INFO2 (0xf4001e00,
4434 (0_3, FREG, OPRND_SHIFT_0_BIT),
4435 (4_7or16_24, DFLOAT, OPRND_SHIFT_2_BIT)),
4436 CSKY_ISA_FLOAT_3E4,
4437 float_work_fmovi),
4438#undef _RELOC32
4439#define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM26BY2
4440 OP32 ("bsr",
4441 OPCODE_INFO1 (0xe0000000,
4442 (0_25, OFF26b, OPRND_SHIFT_1_BIT)),
4443 CSKYV2_ISA_E1),
4444#undef _RELOC32
4445#define _RELOC32 BFD_RELOC_CKCORE_DOFFSET_IMM18
4446 OP32 ("lrs.b",
4447 OPCODE_INFO2 (0xcc000000,
4448 (21_25, AREG, OPRND_SHIFT_0_BIT),
4449 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4450 CSKYV2_ISA_2E3),
4451 OP32 ("srs.b",
4452 OPCODE_INFO2 (0xcc100000,
4453 (21_25, AREG, OPRND_SHIFT_0_BIT),
4454 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4455 CSKYV2_ISA_2E3),
4456#undef _RELOC32
4457#define _RELOC32 BFD_RELOC_CKCORE_DOFFSET_IMM18BY2
4458 OP32 ("lrs.h",
4459 OPCODE_INFO2 (0xcc040000,
4460 (21_25, AREG, OPRND_SHIFT_0_BIT),
4461 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4462 CSKYV2_ISA_2E3),
4463 OP32 ("srs.h",
4464 OPCODE_INFO2 (0xcc140000,
4465 (21_25, AREG, OPRND_SHIFT_0_BIT),
4466 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4467 CSKYV2_ISA_2E3),
4468#undef _RELOC32
4469#define _RELOC32 BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
4470 OP32 ("flrws",
4471 OPCODE_INFO2 (0xf4003800,
4472 (0_3, FREG, OPRND_SHIFT_0_BIT),
4473 (4_7or21_24, FCONSTANT, OPRND_SHIFT_2_BIT)),
4474 CSKY_ISA_FLOAT_1E3),
4475 OP32 ("flrwd",
4476 OPCODE_INFO2 (0xf4003900,
4477 (0_3, FREG, OPRND_SHIFT_0_BIT),
4478 (4_7or21_24, FCONSTANT, OPRND_SHIFT_2_BIT)),
4479 CSKY_ISA_FLOAT_3E4),
4480#undef _RELOC32
4481#define _RELOC32 BFD_RELOC_CKCORE_DOFFSET_IMM18BY4
4482 OP32_WITH_WORK ("lrs.w",
4483 OPCODE_INFO2 (0xcc080000,
4484 (21_25, AREG, OPRND_SHIFT_0_BIT),
4485 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4486 CSKYV2_ISA_2E3,
4487 v2_work_lrsrsw),
4488 OP32_WITH_WORK ("srs.w",
4489 OPCODE_INFO2 (0xcc180000,
4490 (21_25, AREG, OPRND_SHIFT_0_BIT),
4491 (0_17, LABEL_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4492 CSKYV2_ISA_2E3,
4493 v2_work_lrsrsw),
4494
4495#undef _RELOC32
4496#define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY4
4497 OP32_WITH_WORK ("jsri",
4498 OPCODE_INFO1 (0xeae00000,
4499 (0_15, OFF16b, OPRND_SHIFT_2_BIT)),
4500 CSKYV2_ISA_2E3,
4501 v2_work_jsri),
4502#undef _RELOC32
4503#define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY2
4504 OP32 ("bez",
4505 OPCODE_INFO2 (0xe9000000,
4506 (16_20, AREG, OPRND_SHIFT_0_BIT),
4507 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4508 CSKYV2_ISA_2E3),
4509 OP32 ("bnez",
4510 OPCODE_INFO2 (0xe9200000,
4511 (16_20, AREG, OPRND_SHIFT_0_BIT),
4512 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4513 CSKYV2_ISA_2E3),
4514 OP32 ("bhz",
4515 OPCODE_INFO2 (0xe9400000,
4516 (16_20, AREG, OPRND_SHIFT_0_BIT),
4517 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4518 CSKYV2_ISA_2E3),
4519 OP32 ("blsz",
4520 OPCODE_INFO2 (0xe9600000,
4521 (16_20, AREG, OPRND_SHIFT_0_BIT),
4522 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4523 CSKYV2_ISA_2E3),
4524 OP32 ("blz",
4525 OPCODE_INFO2 (0xe9800000,
4526 (16_20, AREG, OPRND_SHIFT_0_BIT),
4527 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4528 CSKYV2_ISA_2E3),
4529 OP32 ("bhsz",
4530 OPCODE_INFO2 (0xe9a00000,
4531 (16_20, AREG, OPRND_SHIFT_0_BIT),
4532 (0_15, OFF16b_LSL1, OPRND_SHIFT_1_BIT)),
4533 CSKYV2_ISA_2E3),
4534#undef _RELAX
4535#undef _RELOC16
4536#undef _TRANSFER
4537#define _TRANSFER 1
4538#define _RELAX 1
4539#define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM10BY2
4540 OP16_OP32 ("br",
4541 OPCODE_INFO1 (0x0400,
4542 (0_9, UNCOND10b, OPRND_SHIFT_1_BIT)),
4543 CSKYV2_ISA_E1,
4544 OPCODE_INFO1 (0xe8000000,
4545 (0_15, UNCOND16b, OPRND_SHIFT_1_BIT)),
4546 CSKYV2_ISA_E1),
4547#undef _TRANSFER
4548#define _TRANSFER 0
4549 OP16_OP32 ("bt",
4550 OPCODE_INFO1 (0x0800,
4551 (0_9, COND10b, OPRND_SHIFT_1_BIT)),
4552 CSKYV2_ISA_E1,
4553 OPCODE_INFO1 (0xe8600000,
4554 (0_15, COND16b, OPRND_SHIFT_1_BIT)),
4555 CSKYV2_ISA_1E2),
4556 OP16_OP32 ("bf",
4557 OPCODE_INFO1 (0x0c00,
4558 (0_9, COND10b, OPRND_SHIFT_1_BIT)),
4559 CSKYV2_ISA_E1,
4560 OPCODE_INFO1 (0xe8400000,
4561 (0_15, COND16b, OPRND_SHIFT_1_BIT)),
4562 CSKYV2_ISA_1E2),
d04aee0f
CQ		 4563#undef _RELAX
4564#undef _RELOC16
4565#define _RELAX 0
4566#define _RELOC16 0
4567 OP32 ("bnezad",
4568 OPCODE_INFO2 (0xe8200000,
4569 (16_20, AREG, OPRND_SHIFT_0_BIT),
4570 (0_15, COND16b, OPRND_SHIFT_1_BIT)),
4571 CSKYV2_ISA_3E3R2),
b8891f8d
AJ		 4572#undef _RELOC16
4573#undef _RELOC32
b8891f8d
AJ		 4574#define _RELOC16 0
4575#define _RELOC32 0
b8891f8d
AJ		 4576#undef _TRANSFER
4577#define _TRANSFER 1
4578 OP16_WITH_WORK ("jbr",
4579 OPCODE_INFO1 (0x0400,
4580 (0_10, UNCOND10b, OPRND_SHIFT_1_BIT)),
4581 CSKYV2_ISA_E1,
4582 v2_work_jbr),
4583#undef _TRANSFER
4584#define _TRANSFER 0
4585 OP16_WITH_WORK ("jbt",
4586 OPCODE_INFO1 (0x0800,
4587 (0_10, COND10b, OPRND_SHIFT_1_BIT)),
4588 CSKYV2_ISA_E1,
4589 v2_work_jbtf),
4590 OP16_WITH_WORK ("jbf",
4591 OPCODE_INFO1 (0x0c00,
4592 (0_10, COND10b, OPRND_SHIFT_1_BIT)),
4593 CSKYV2_ISA_E1,
4594 v2_work_jbtf),
4595 OP32_WITH_WORK ("jbsr",
4596 OPCODE_INFO1 (0xe0000000,
4597 (0_25, OFF26b, OPRND_SHIFT_1_BIT)),
4598 CSKYV2_ISA_E1,
4599 v2_work_jbsr),
4600 OP32_WITH_WORK ("movih",
4601 OPCODE_INFO2 (0xea200000,
4602 (16_20, AREG, OPRND_SHIFT_0_BIT),
4603 (0_15, IMM16b_MOVIH, OPRND_SHIFT_0_BIT)),
4604 CSKYV2_ISA_1E2,
4605 v2_work_movih),
4606 OP32_WITH_WORK ("ori",
4607 OPCODE_INFO3 (0xec000000,
4608 (21_25, AREG, OPRND_SHIFT_0_BIT),
4609 (16_20, AREG, OPRND_SHIFT_0_BIT),
4610 (0_15, IMM16b_ORI, OPRND_SHIFT_0_BIT)),
4611 CSKYV2_ISA_1E2,
4612 v2_work_ori),
4613 DOP32_WITH_WORK ("bgeni",
4614 OPCODE_INFO2 (0xea000000,
4615 (16_20, AREG, OPRND_SHIFT_0_BIT),
4616 (0_4, IMM4b, OPRND_SHIFT_0_BIT)),
4617 OPCODE_INFO2 (0xea200000,
4618 (16_20, AREG, OPRND_SHIFT_0_BIT),
4619 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
4620 CSKYV2_ISA_E1,
4621 v2_work_bgeni),
4622#undef _RELOC16
4623#undef _RELOC32
4624#define _RELOC16 BFD_RELOC_CKCORE_PCREL_IMM7BY4
4625#define _RELOC32 BFD_RELOC_CKCORE_PCREL_IMM16BY4
4626 DOP16_OP32_WITH_WORK ("lrw",
4627 OPCODE_INFO2 (0x1000,
4628 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4629 (0_4or8_9, CONSTANT, OPRND_SHIFT_2_BIT)),
4630 OPCODE_INFO2 (0x0000,
4631 (5_7, GREG0_7, OPRND_SHIFT_0_BIT),
4632 (0_4or8_9, ELRW_CONSTANT, OPRND_SHIFT_2_BIT)),
4633 CSKYV2_ISA_E1,
4634 OPCODE_INFO2 (0xea800000,
4635 (16_20, AREG, OPRND_SHIFT_0_BIT),
4636 (0_15, CONSTANT, OPRND_SHIFT_2_BIT)),
4637 CSKYV2_ISA_E1,
4638 v2_work_lrw),
4639#undef _RELOC16
4640#undef _RELOC32
4641#define _RELOC16 0
4642#define _RELOC32 0
4643
4644#undef _RELAX
4645#define _RELAX 1
4646 OP32 ("jbez",
4647 OPCODE_INFO2 (0xe9000000,
4648 (16_20, AREG, OPRND_SHIFT_0_BIT),
4649 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4650 CSKYV2_ISA_2E3),
4651 OP32 ("jbnez",
4652 OPCODE_INFO2 (0xe9200000,
4653 (16_20, AREG, OPRND_SHIFT_0_BIT),
4654 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4655 CSKYV2_ISA_2E3),
4656 OP32 ("jbhz",
4657 OPCODE_INFO2 (0xe9400000,
4658 (16_20, AREG, OPRND_SHIFT_0_BIT),
4659 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4660 CSKYV2_ISA_2E3),
4661 OP32 ("jblsz",
4662 OPCODE_INFO2 (0xe9600000,
4663 (16_20, AREG, OPRND_SHIFT_0_BIT),
4664 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4665 CSKYV2_ISA_2E3),
4666 OP32 ("jblz",
4667 OPCODE_INFO2 (0xe9800000,
4668 (16_20, AREG, OPRND_SHIFT_0_BIT),
4669 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4670 CSKYV2_ISA_2E3),
4671 OP32 ("jbhsz",
4672 OPCODE_INFO2 (0xe9a00000,
4673 (16_20, AREG, OPRND_SHIFT_0_BIT),
4674 (0_15, JCOMPZ, OPRND_SHIFT_0_BIT)),
4675 CSKYV2_ISA_2E3),
4676#undef _RELAX
4677#define _RELAX 0
4678
531c73a3
CQ		 4679 /* CK860 instructions. */
4680 OP32("sync.is",
4681 OPCODE_INFO0(0xc2200420),
4682 CSKYV2_ISA_10E60),
4683 OP32("sync.i",
4684 OPCODE_INFO0(0xc0200420),
4685 CSKYV2_ISA_10E60),
4686 OP32("sync.s",
4687 OPCODE_INFO0(0xc2000420),
4688 CSKYV2_ISA_10E60),
4689 OP32("bar.brwarw",
4690 OPCODE_INFO0(0xc000842f),
4691 CSKYV2_ISA_10E60),
4692 OP32("bar.brwarws",
4693 OPCODE_INFO0(0xc200842f),
4694 CSKYV2_ISA_10E60),
4695 OP32("bar.brar",
4696 OPCODE_INFO0(0xc0008425),
4697 CSKYV2_ISA_10E60),
4698 OP32("bar.brars",
4699 OPCODE_INFO0(0xc2008425),
4700 CSKYV2_ISA_10E60),
4701 OP32("bar.bwaw",
4702 OPCODE_INFO0(0xc000842a),
4703 CSKYV2_ISA_10E60),
4704 OP32("bar.bwaws",
4705 OPCODE_INFO0(0xc200842a),
4706 CSKYV2_ISA_10E60),
4707 OP32("icache.iall",
4708 OPCODE_INFO0(0xc1009020),
4709 CSKYV2_ISA_10E60),
4710 OP32("icache.ialls",
4711 OPCODE_INFO0(0xc3009020),
4712 CSKYV2_ISA_10E60),
4713 OP32("icache.iva",
4714 OPCODE_INFO1(0xc0a09020,
4715 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4716 CSKYV2_ISA_10E60),
4717 OP32("dcache.iall",
4718 OPCODE_INFO0(0xc1009420),
4719 CSKYV2_ISA_10E60),
4720 OP32("dcache.iva",
4721 OPCODE_INFO1(0xc1609420,
4722 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4723 CSKYV2_ISA_10E60),
4724 OP32("dcache.isw",
4725 OPCODE_INFO1(0xc1409420,
4726 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4727 CSKYV2_ISA_10E60),
4728 OP32("dcache.call",
4729 OPCODE_INFO0(0xc0809420),
4730 CSKYV2_ISA_10E60),
4731 OP32("dcache.cva",
4732 OPCODE_INFO1(0xc0e09420,
4733 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4734 CSKYV2_ISA_10E60),
4735 OP32("dcache.cval1",
4736 OPCODE_INFO1(0xc2e09420,
4737 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4738 CSKYV2_ISA_10E60),
4739 OP32("dcache.csw",
4740 OPCODE_INFO1(0xc0c09420,
4741 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4742 CSKYV2_ISA_10E60),
4743 OP32("dcache.ciall",
4744 OPCODE_INFO0(0xc1809420),
4745 CSKYV2_ISA_10E60),
4746 OP32("dcache.civa",
4747 OPCODE_INFO1(0xc1e09420,
4748 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4749 CSKYV2_ISA_10E60),
4750 OP32("dcache.cisw",
4751 OPCODE_INFO1(0xc1c09420,
4752 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4753 CSKYV2_ISA_10E60),
4754 OP32("tlbi.vaa",
4755 OPCODE_INFO1(0xc0408820,
4756 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4757 CSKYV2_ISA_10E60),
4758 OP32("tlbi.vaas",
4759 OPCODE_INFO1(0xc2408820,
4760 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4761 CSKYV2_ISA_10E60),
4762 OP32("tlbi.asid",
4763 OPCODE_INFO1(0xc0208820,
4764 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4765 CSKYV2_ISA_10E60),
4766 OP32("tlbi.asids",
4767 OPCODE_INFO1(0xc2208820,
4768 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4769 CSKYV2_ISA_10E60),
4770 OP32("tlbi.va",
4771 OPCODE_INFO1(0xc0608820,
4772 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4773 CSKYV2_ISA_10E60),
4774 OP32("tlbi.vas",
4775 OPCODE_INFO1(0xc2608820,
4776 (16_20, AREG, OPRND_SHIFT_0_BIT)),
4777 CSKYV2_ISA_10E60),
4778 OP32("tlbi.all",
4779 OPCODE_INFO0(0xc0008820),
4780 CSKYV2_ISA_10E60),
4781 OP32("tlbi.alls",
4782 OPCODE_INFO0(0xc2008820),
4783 CSKYV2_ISA_10E60),
4784 DOP32("sync",
4785 OPCODE_INFO0(0xc0000420),
4786 OPCODE_INFO1(0xc0000420,
4787 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
4788 CSKYV2_ISA_E1),
4789
b8891f8d 4790 /* The followings are enhance DSP instructions. */
d285ba8d
CQ		 4791 DOP32_WITH_WORK ("bloop",
4792 OPCODE_INFO3 (0xe9c00000,
b8891f8d
AJ		 4793 (16_20, AREG, OPRND_SHIFT_0_BIT),
4794 (0_11, BLOOP_OFF12b, OPRND_SHIFT_1_BIT),
4795 (12_15, BLOOP_OFF4b, OPRND_SHIFT_1_BIT)),
d285ba8d
CQ		 4796 OPCODE_INFO2 (0xe9c00000,
4797 (16_20, AREG, OPRND_SHIFT_0_BIT),
4798 (0_11, BLOOP_OFF12b, OPRND_SHIFT_1_BIT)),
4799 CSKY_ISA_DSP_ENHANCE,
4800 dsp_work_bloop),
b8891f8d
AJ		 4801 /* The followings are ld/st instructions. */
4802 OP32 ("ldbi.b",
4803 OPCODE_INFO2 (0xd0008000,
4804 (0_4, AREG, OPRND_SHIFT_0_BIT),
4805 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4806 CSKY_ISA_DSP_ENHANCE),
4807 OP32 ("ldbi.h",
4808 OPCODE_INFO2 (0xd0008400,
4809 (0_4, AREG, OPRND_SHIFT_0_BIT),
4810 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4811 CSKY_ISA_DSP_ENHANCE),
4812 OP32 ("ldbi.w",
4813 OPCODE_INFO2 (0xd0008800,
4814 (0_4, AREG, OPRND_SHIFT_0_BIT),
4815 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4816 CSKY_ISA_DSP_ENHANCE),
4817 OP32 ("pldbi.d",
4818 OPCODE_INFO2 (0xd0008c00,
4819 (0_4, AREG, OPRND_SHIFT_0_BIT),
4820 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4821 CSKY_ISA_DSP_ENHANCE),
4822 OP32 ("ldbi.hs",
4823 OPCODE_INFO2 (0xd0009000,
4824 (0_4, AREG, OPRND_SHIFT_0_BIT),
4825 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4826 CSKY_ISA_DSP_ENHANCE),
4827 OP32 ("ldbi.bs",
4828 OPCODE_INFO2 (0xd0009400,
4829 (0_4, AREG, OPRND_SHIFT_0_BIT),
4830 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4831 CSKY_ISA_DSP_ENHANCE),
4832 OP32 ("stbi.b",
4833 OPCODE_INFO2 (0xd4008000,
4834 (0_4, AREG, OPRND_SHIFT_0_BIT),
4835 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4836 CSKY_ISA_DSP_ENHANCE),
4837 OP32 ("stbi.h",
4838 OPCODE_INFO2 (0xd4008400,
4839 (0_4, AREG, OPRND_SHIFT_0_BIT),
4840 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4841 CSKY_ISA_DSP_ENHANCE),
4842 OP32 ("stbi.w",
4843 OPCODE_INFO2 (0xd4008800,
4844 (0_4, AREG, OPRND_SHIFT_0_BIT),
4845 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT)),
4846 CSKY_ISA_DSP_ENHANCE),
4847 OP32 ("ldbir.b",
4848 OPCODE_INFO3 (0xd000a000,
4849 (0_4, AREG, OPRND_SHIFT_0_BIT),
4850 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4851 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4852 CSKY_ISA_DSP_ENHANCE),
4853 OP32 ("ldbir.h",
4854 OPCODE_INFO3 (0xd000a400,
4855 (0_4, AREG, OPRND_SHIFT_0_BIT),
4856 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4857 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4858 CSKY_ISA_DSP_ENHANCE),
4859 OP32 ("ldbir.w",
4860 OPCODE_INFO3 (0xd000a800,
4861 (0_4, AREG, OPRND_SHIFT_0_BIT),
4862 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4863 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4864 CSKY_ISA_DSP_ENHANCE),
4865 OP32 ("pldbir.d",
4866 OPCODE_INFO3 (0xd000ac00,
4867 (0_4, AREG, OPRND_SHIFT_0_BIT),
4868 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4869 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4870 CSKY_ISA_DSP_ENHANCE),
4871 OP32 ("ldbir.bs",
4872 OPCODE_INFO3 (0xd000b000,
4873 (0_4, AREG, OPRND_SHIFT_0_BIT),
4874 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4875 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4876 CSKY_ISA_DSP_ENHANCE),
4877 OP32 ("ldbir.hs",
4878 OPCODE_INFO3 (0xd000b400,
4879 (0_4, AREG, OPRND_SHIFT_0_BIT),
4880 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4881 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4882 CSKY_ISA_DSP_ENHANCE),
4883 OP32 ("stbir.b",
4884 OPCODE_INFO3 (0xd400a000,
4885 (0_4, AREG, OPRND_SHIFT_0_BIT),
4886 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4887 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4888 CSKY_ISA_DSP_ENHANCE),
4889 OP32 ("stbir.h",
4890 OPCODE_INFO3 (0xd400a400,
4891 (0_4, AREG, OPRND_SHIFT_0_BIT),
4892 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4893 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4894 CSKY_ISA_DSP_ENHANCE),
4895 OP32 ("stbir.w",
4896 OPCODE_INFO3 (0xd400a800,
4897 (0_4, AREG, OPRND_SHIFT_0_BIT),
4898 (16_20, AREG_WITH_BRACKET, OPRND_SHIFT_0_BIT),
4899 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4900 CSKY_ISA_DSP_ENHANCE),
4901 /* The followings are add/sub instructions. */
4902 OP32 ("padd.8",
4903 OPCODE_INFO3 (0xf800c040,
4904 (0_4, AREG, OPRND_SHIFT_0_BIT),
4905 (16_20, AREG, OPRND_SHIFT_0_BIT),
4906 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4907 CSKY_ISA_DSP_ENHANCE),
4908 OP32 ("padd.16",
4909 OPCODE_INFO3 (0xf800c000,
4910 (0_4, AREG, OPRND_SHIFT_0_BIT),
4911 (16_20, AREG, OPRND_SHIFT_0_BIT),
4912 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4913 CSKY_ISA_DSP_ENHANCE),
4914 OP32 ("padd.u8.s",
4915 OPCODE_INFO3 (0xf800c140,
4916 (0_4, AREG, OPRND_SHIFT_0_BIT),
4917 (16_20, AREG, OPRND_SHIFT_0_BIT),
4918 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4919 CSKY_ISA_DSP_ENHANCE),
4920 OP32 ("padd.s8.s",
4921 OPCODE_INFO3 (0xf800c1c0,
4922 (0_4, AREG, OPRND_SHIFT_0_BIT),
4923 (16_20, AREG, OPRND_SHIFT_0_BIT),
4924 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4925 CSKY_ISA_DSP_ENHANCE),
4926 OP32 ("padd.u16.s",
4927 OPCODE_INFO3 (0xf800c100,
4928 (0_4, AREG, OPRND_SHIFT_0_BIT),
4929 (16_20, AREG, OPRND_SHIFT_0_BIT),
4930 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4931 CSKY_ISA_DSP_ENHANCE),
4932 OP32 ("padd.s16.s",
4933 OPCODE_INFO3 (0xf800c180,
4934 (0_4, AREG, OPRND_SHIFT_0_BIT),
4935 (16_20, AREG, OPRND_SHIFT_0_BIT),
4936 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4937 CSKY_ISA_DSP_ENHANCE),
4938 OP32 ("add.u32.s",
4939 OPCODE_INFO3 (0xf800c120,
4940 (0_4, AREG, OPRND_SHIFT_0_BIT),
4941 (16_20, AREG, OPRND_SHIFT_0_BIT),
4942 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4943 CSKY_ISA_DSP_ENHANCE),
4944 OP32 ("add.s32.s",
4945 OPCODE_INFO3 (0xf800c1a0,
4946 (0_4, AREG, OPRND_SHIFT_0_BIT),
4947 (16_20, AREG, OPRND_SHIFT_0_BIT),
4948 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4949 CSKY_ISA_DSP_ENHANCE),
4950 OP32 ("psub.8",
4951 OPCODE_INFO3 (0xf800c440,
4952 (0_4, AREG, OPRND_SHIFT_0_BIT),
4953 (16_20, AREG, OPRND_SHIFT_0_BIT),
4954 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4955 CSKY_ISA_DSP_ENHANCE),
4956 OP32 ("psub.16",
4957 OPCODE_INFO3 (0xf800c400,
4958 (0_4, AREG, OPRND_SHIFT_0_BIT),
4959 (16_20, AREG, OPRND_SHIFT_0_BIT),
4960 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4961 CSKY_ISA_DSP_ENHANCE),
4962 OP32 ("psub.u8.s",
4963 OPCODE_INFO3 (0xf800c540,
4964 (0_4, AREG, OPRND_SHIFT_0_BIT),
4965 (16_20, AREG, OPRND_SHIFT_0_BIT),
4966 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4967 CSKY_ISA_DSP_ENHANCE),
4968 OP32 ("psub.s8.s",
4969 OPCODE_INFO3 (0xf800c5c0,
4970 (0_4, AREG, OPRND_SHIFT_0_BIT),
4971 (16_20, AREG, OPRND_SHIFT_0_BIT),
4972 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4973 CSKY_ISA_DSP_ENHANCE),
4974 OP32 ("psub.u16.s",
4975 OPCODE_INFO3 (0xf800c500,
4976 (0_4, AREG, OPRND_SHIFT_0_BIT),
4977 (16_20, AREG, OPRND_SHIFT_0_BIT),
4978 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4979 CSKY_ISA_DSP_ENHANCE),
4980 OP32 ("psub.s16.s",
4981 OPCODE_INFO3 (0xf800c580,
4982 (0_4, AREG, OPRND_SHIFT_0_BIT),
4983 (16_20, AREG, OPRND_SHIFT_0_BIT),
4984 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4985 CSKY_ISA_DSP_ENHANCE),
4986 OP32 ("sub.u32.s",
4987 OPCODE_INFO3 (0xf800c520,
4988 (0_4, AREG, OPRND_SHIFT_0_BIT),
4989 (16_20, AREG, OPRND_SHIFT_0_BIT),
4990 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4991 CSKY_ISA_DSP_ENHANCE),
4992 OP32 ("sub.s32.s",
4993 OPCODE_INFO3 (0xf800c5a0,
4994 (0_4, AREG, OPRND_SHIFT_0_BIT),
4995 (16_20, AREG, OPRND_SHIFT_0_BIT),
4996 (21_25, AREG, OPRND_SHIFT_0_BIT)),
4997 CSKY_ISA_DSP_ENHANCE),
4998 OP32 ("paddh.u8",
4999 OPCODE_INFO3 (0xf800c240,
5000 (0_4, AREG, OPRND_SHIFT_0_BIT),
5001 (16_20, AREG, OPRND_SHIFT_0_BIT),
5002 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5003 CSKY_ISA_DSP_ENHANCE),
5004 OP32 ("paddh.s8",
5005 OPCODE_INFO3 (0xf800c2c0,
5006 (0_4, AREG, OPRND_SHIFT_0_BIT),
5007 (16_20, AREG, OPRND_SHIFT_0_BIT),
5008 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5009 CSKY_ISA_DSP_ENHANCE),
5010 OP32 ("paddh.u16",
5011 OPCODE_INFO3 (0xf800c200,
5012 (0_4, AREG, OPRND_SHIFT_0_BIT),
5013 (16_20, AREG, OPRND_SHIFT_0_BIT),
5014 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5015 CSKY_ISA_DSP_ENHANCE),
5016 OP32 ("paddh.s16",
5017 OPCODE_INFO3 (0xf800c280,
5018 (0_4, AREG, OPRND_SHIFT_0_BIT),
5019 (16_20, AREG, OPRND_SHIFT_0_BIT),
5020 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5021 CSKY_ISA_DSP_ENHANCE),
5022 OP32 ("addh.u32",
5023 OPCODE_INFO3 (0xf800c220,
5024 (0_4, AREG, OPRND_SHIFT_0_BIT),
5025 (16_20, AREG, OPRND_SHIFT_0_BIT),
5026 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5027 CSKY_ISA_DSP_ENHANCE),
5028 OP32 ("addh.s32",
5029 OPCODE_INFO3 (0xf800c2a0,
5030 (0_4, AREG, OPRND_SHIFT_0_BIT),
5031 (16_20, AREG, OPRND_SHIFT_0_BIT),
5032 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5033 CSKY_ISA_DSP_ENHANCE),
5034 OP32 ("psubh.u8",
5035 OPCODE_INFO3 (0xf800c640,
5036 (0_4, AREG, OPRND_SHIFT_0_BIT),
5037 (16_20, AREG, OPRND_SHIFT_0_BIT),
5038 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5039 CSKY_ISA_DSP_ENHANCE),
5040 OP32 ("psubh.s8",
5041 OPCODE_INFO3 (0xf800c6c0,
5042 (0_4, AREG, OPRND_SHIFT_0_BIT),
5043 (16_20, AREG, OPRND_SHIFT_0_BIT),
5044 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5045 CSKY_ISA_DSP_ENHANCE),
5046 OP32 ("psubh.u16",
5047 OPCODE_INFO3 (0xf800c600,
5048 (0_4, AREG, OPRND_SHIFT_0_BIT),
5049 (16_20, AREG, OPRND_SHIFT_0_BIT),
5050 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5051 CSKY_ISA_DSP_ENHANCE),
5052 OP32 ("psubh.s16",
5053 OPCODE_INFO3 (0xf800c680,
5054 (0_4, AREG, OPRND_SHIFT_0_BIT),
5055 (16_20, AREG, OPRND_SHIFT_0_BIT),
5056 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5057 CSKY_ISA_DSP_ENHANCE),
5058 OP32 ("subh.u32",
5059 OPCODE_INFO3 (0xf800c620,
5060 (0_4, AREG, OPRND_SHIFT_0_BIT),
5061 (16_20, AREG, OPRND_SHIFT_0_BIT),
5062 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5063 CSKY_ISA_DSP_ENHANCE),
5064 OP32 ("subh.s32",
5065 OPCODE_INFO3 (0xf800c6a0,
5066 (0_4, AREG, OPRND_SHIFT_0_BIT),
5067 (16_20, AREG, OPRND_SHIFT_0_BIT),
5068 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5069 CSKY_ISA_DSP_ENHANCE),
5070 OP32 ("add.64",
5071 OPCODE_INFO3 (0xf800c060,
5072 (0_4, AREG, OPRND_SHIFT_0_BIT),
5073 (16_20, AREG, OPRND_SHIFT_0_BIT),
5074 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5075 CSKY_ISA_DSP_ENHANCE),
5076 OP32 ("sub.64",
5077 OPCODE_INFO3 (0xf800c460,
5078 (0_4, AREG, OPRND_SHIFT_0_BIT),
5079 (16_20, AREG, OPRND_SHIFT_0_BIT),
5080 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5081 CSKY_ISA_DSP_ENHANCE),
5082 OP32 ("add.u64.s",
5083 OPCODE_INFO3 (0xf800c160,
5084 (0_4, AREG, OPRND_SHIFT_0_BIT),
5085 (16_20, AREG, OPRND_SHIFT_0_BIT),
5086 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5087 CSKY_ISA_DSP_ENHANCE),
5088 OP32 ("add.s64.s",
5089 OPCODE_INFO3 (0xf800c1e0,
5090 (0_4, AREG, OPRND_SHIFT_0_BIT),
5091 (16_20, AREG, OPRND_SHIFT_0_BIT),
5092 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5093 CSKY_ISA_DSP_ENHANCE),
5094 OP32 ("sub.u64.s",
5095 OPCODE_INFO3 (0xf800c560,
5096 (0_4, AREG, OPRND_SHIFT_0_BIT),
5097 (16_20, AREG, OPRND_SHIFT_0_BIT),
5098 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5099 CSKY_ISA_DSP_ENHANCE),
5100 OP32 ("sub.s64.s",
5101 OPCODE_INFO3 (0xf800c5e0,
5102 (0_4, AREG, OPRND_SHIFT_0_BIT),
5103 (16_20, AREG, OPRND_SHIFT_0_BIT),
5104 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5105 CSKY_ISA_DSP_ENHANCE),
5106 /* The following are comparison instructions. */
5107 OP32 ("pasx.16",
5108 OPCODE_INFO3 (0xf800c860,
5109 (0_4, AREG, OPRND_SHIFT_0_BIT),
5110 (16_20, AREG, OPRND_SHIFT_0_BIT),
5111 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5112 CSKY_ISA_DSP_ENHANCE),
5113 OP32 ("psax.16",
5114 OPCODE_INFO3 (0xf800cc60,
5115 (0_4, AREG, OPRND_SHIFT_0_BIT),
5116 (16_20, AREG, OPRND_SHIFT_0_BIT),
5117 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5118 CSKY_ISA_DSP_ENHANCE),
5119 OP32 ("pasx.u16.s",
5120 OPCODE_INFO3 (0xf800c960,
5121 (0_4, AREG, OPRND_SHIFT_0_BIT),
5122 (16_20, AREG, OPRND_SHIFT_0_BIT),
5123 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5124 CSKY_ISA_DSP_ENHANCE),
5125 OP32 ("pasx.s16.s",
5126 OPCODE_INFO3 (0xf800c9e0,
5127 (0_4, AREG, OPRND_SHIFT_0_BIT),
5128 (16_20, AREG, OPRND_SHIFT_0_BIT),
5129 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5130 CSKY_ISA_DSP_ENHANCE),
5131 OP32 ("psax.u16.s",
5132 OPCODE_INFO3 (0xf800cd60,
5133 (0_4, AREG, OPRND_SHIFT_0_BIT),
5134 (16_20, AREG, OPRND_SHIFT_0_BIT),
5135 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5136 CSKY_ISA_DSP_ENHANCE),
5137 OP32 ("psax.s16.s",
5138 OPCODE_INFO3 (0xf800cde0,
5139 (0_4, AREG, OPRND_SHIFT_0_BIT),
5140 (16_20, AREG, OPRND_SHIFT_0_BIT),
5141 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5142 CSKY_ISA_DSP_ENHANCE),
5143 OP32 ("pasxh.u16",
5144 OPCODE_INFO3 (0xf800ca60,
5145 (0_4, AREG, OPRND_SHIFT_0_BIT),
5146 (16_20, AREG, OPRND_SHIFT_0_BIT),
5147 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5148 CSKY_ISA_DSP_ENHANCE),
5149 OP32 ("pasxh.s16",
5150 OPCODE_INFO3 (0xf800cae0,
5151 (0_4, AREG, OPRND_SHIFT_0_BIT),
5152 (16_20, AREG, OPRND_SHIFT_0_BIT),
5153 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5154 CSKY_ISA_DSP_ENHANCE),
5155 OP32 ("psaxh.u16",
5156 OPCODE_INFO3 (0xf800ce60,
5157 (0_4, AREG, OPRND_SHIFT_0_BIT),
5158 (16_20, AREG, OPRND_SHIFT_0_BIT),
5159 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5160 CSKY_ISA_DSP_ENHANCE),
5161 OP32 ("psaxh.s16",
5162 OPCODE_INFO3 (0xf800cee0,
5163 (0_4, AREG, OPRND_SHIFT_0_BIT),
5164 (16_20, AREG, OPRND_SHIFT_0_BIT),
5165 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5166 CSKY_ISA_DSP_ENHANCE),
5167 OP32 ("pcmpne.8",
5168 OPCODE_INFO3 (0xf800c840,
5169 (0_4, AREG, OPRND_SHIFT_0_BIT),
5170 (16_20, AREG, OPRND_SHIFT_0_BIT),
5171 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5172 CSKY_ISA_DSP_ENHANCE),
5173 OP32 ("pcmpne.16",
5174 OPCODE_INFO3 (0xf800c800,
5175 (0_4, AREG, OPRND_SHIFT_0_BIT),
5176 (16_20, AREG, OPRND_SHIFT_0_BIT),
5177 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5178 CSKY_ISA_DSP_ENHANCE),
5179 OP32 ("pcmphs.u8",
5180 OPCODE_INFO3 (0xf800c940,
5181 (0_4, AREG, OPRND_SHIFT_0_BIT),
5182 (16_20, AREG, OPRND_SHIFT_0_BIT),
5183 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5184 CSKY_ISA_DSP_ENHANCE),
5185 OP32 ("pcmphs.s8",
5186 OPCODE_INFO3 (0xf800c9c0,
5187 (0_4, AREG, OPRND_SHIFT_0_BIT),
5188 (16_20, AREG, OPRND_SHIFT_0_BIT),
5189 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5190 CSKY_ISA_DSP_ENHANCE),
5191 OP32 ("pcmphs.u16",
5192 OPCODE_INFO3 (0xf800c900,
5193 (0_4, AREG, OPRND_SHIFT_0_BIT),
5194 (16_20, AREG, OPRND_SHIFT_0_BIT),
5195 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5196 CSKY_ISA_DSP_ENHANCE),
5197 OP32 ("pcmphs.s16",
5198 OPCODE_INFO3 (0xf800c980,
5199 (0_4, AREG, OPRND_SHIFT_0_BIT),
5200 (16_20, AREG, OPRND_SHIFT_0_BIT),
5201 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5202 CSKY_ISA_DSP_ENHANCE),
5203 OP32 ("pcmplt.u8",
5204 OPCODE_INFO3 (0xf800ca40,
5205 (0_4, AREG, OPRND_SHIFT_0_BIT),
5206 (16_20, AREG, OPRND_SHIFT_0_BIT),
5207 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5208 CSKY_ISA_DSP_ENHANCE),
5209 OP32 ("pcmplt.s8",
5210 OPCODE_INFO3 (0xf800cac0,
5211 (0_4, AREG, OPRND_SHIFT_0_BIT),
5212 (16_20, AREG, OPRND_SHIFT_0_BIT),
5213 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5214 CSKY_ISA_DSP_ENHANCE),
5215 OP32 ("pcmplt.u16",
5216 OPCODE_INFO3 (0xf800ca00,
5217 (0_4, AREG, OPRND_SHIFT_0_BIT),
5218 (16_20, AREG, OPRND_SHIFT_0_BIT),
5219 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5220 CSKY_ISA_DSP_ENHANCE),
5221 OP32 ("pcmplt.s16",
5222 OPCODE_INFO3 (0xf800ca80,
5223 (0_4, AREG, OPRND_SHIFT_0_BIT),
5224 (16_20, AREG, OPRND_SHIFT_0_BIT),
5225 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5226 CSKY_ISA_DSP_ENHANCE),
5227 OP32 ("pmax.u8",
5228 OPCODE_INFO3 (0xf800cc40,
5229 (0_4, AREG, OPRND_SHIFT_0_BIT),
5230 (16_20, AREG, OPRND_SHIFT_0_BIT),
5231 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5232 CSKY_ISA_DSP_ENHANCE),
5233 OP32 ("pmax.s8",
5234 OPCODE_INFO3 (0xf800ccc0,
5235 (0_4, AREG, OPRND_SHIFT_0_BIT),
5236 (16_20, AREG, OPRND_SHIFT_0_BIT),
5237 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5238 CSKY_ISA_DSP_ENHANCE),
5239 OP32 ("pmax.u16",
5240 OPCODE_INFO3 (0xf800cc00,
5241 (0_4, AREG, OPRND_SHIFT_0_BIT),
5242 (16_20, AREG, OPRND_SHIFT_0_BIT),
5243 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5244 CSKY_ISA_DSP_ENHANCE),
5245 OP32 ("pmax.s16",
5246 OPCODE_INFO3 (0xf800cc80,
5247 (0_4, AREG, OPRND_SHIFT_0_BIT),
5248 (16_20, AREG, OPRND_SHIFT_0_BIT),
5249 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5250 CSKY_ISA_DSP_ENHANCE),
5251 OP32 ("max.u32",
5252 OPCODE_INFO3 (0xf800cc20,
5253 (0_4, AREG, OPRND_SHIFT_0_BIT),
5254 (16_20, AREG, OPRND_SHIFT_0_BIT),
5255 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5256 CSKY_ISA_DSP_ENHANCE),
5257 OP32 ("max.s32",
5258 OPCODE_INFO3 (0xf800cca0,
5259 (0_4, AREG, OPRND_SHIFT_0_BIT),
5260 (16_20, AREG, OPRND_SHIFT_0_BIT),
5261 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5262 CSKY_ISA_DSP_ENHANCE),
5263 OP32 ("pmin.u8",
5264 OPCODE_INFO3 (0xf800cd40,
5265 (0_4, AREG, OPRND_SHIFT_0_BIT),
5266 (16_20, AREG, OPRND_SHIFT_0_BIT),
5267 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5268 CSKY_ISA_DSP_ENHANCE),
5269 OP32 ("pmin.s8",
5270 OPCODE_INFO3 (0xf800cdc0,
5271 (0_4, AREG, OPRND_SHIFT_0_BIT),
5272 (16_20, AREG, OPRND_SHIFT_0_BIT),
5273 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5274 CSKY_ISA_DSP_ENHANCE),
5275 OP32 ("pmin.u16",
5276 OPCODE_INFO3 (0xf800cd00,
5277 (0_4, AREG, OPRND_SHIFT_0_BIT),
5278 (16_20, AREG, OPRND_SHIFT_0_BIT),
5279 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5280 CSKY_ISA_DSP_ENHANCE),
5281 OP32 ("pmin.s16",
5282 OPCODE_INFO3 (0xf800cd80,
5283 (0_4, AREG, OPRND_SHIFT_0_BIT),
5284 (16_20, AREG, OPRND_SHIFT_0_BIT),
5285 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5286 CSKY_ISA_DSP_ENHANCE),
5287 OP32 ("min.u32",
5288 OPCODE_INFO3 (0xf800cd20,
5289 (0_4, AREG, OPRND_SHIFT_0_BIT),
5290 (16_20, AREG, OPRND_SHIFT_0_BIT),
5291 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5292 CSKY_ISA_DSP_ENHANCE),
5293 OP32 ("min.s32",
5294 OPCODE_INFO3 (0xf800cda0,
5295 (0_4, AREG, OPRND_SHIFT_0_BIT),
5296 (16_20, AREG, OPRND_SHIFT_0_BIT),
5297 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5298 CSKY_ISA_DSP_ENHANCE),
5299 OP32 ("sel",
5300 OPCODE_INFO4 (0xf8009000,
5301 (0_4, AREG, OPRND_SHIFT_0_BIT),
5302 (16_20, AREG, OPRND_SHIFT_0_BIT),
5303 (21_25, AREG, OPRND_SHIFT_0_BIT),
5304 (5_9, AREG, OPRND_SHIFT_0_BIT)),
5305 CSKY_ISA_DSP_ENHANCE),
5306 /* The followings are miscs. */
5307 OP32 ("psabsa.u8",
5308 OPCODE_INFO3 (0xf800e040,
5309 (0_4, AREG, OPRND_SHIFT_0_BIT),
5310 (16_20, AREG, OPRND_SHIFT_0_BIT),
5311 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5312 CSKY_ISA_DSP_ENHANCE),
5313 OP32 ("psabsaa.u8",
5314 OPCODE_INFO3 (0xf800e140,
5315 (0_4, AREG, OPRND_SHIFT_0_BIT),
5316 (16_20, AREG, OPRND_SHIFT_0_BIT),
5317 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5318 CSKY_ISA_DSP_ENHANCE),
5319 OP32 ("divul",
5320 OPCODE_INFO3 (0xf800e260,
5321 (0_4, AREG, OPRND_SHIFT_0_BIT),
5322 (16_20, AREG, OPRND_SHIFT_0_BIT),
5323 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5324 CSKY_ISA_DSP_ENHANCE),
5325 OP32 ("divsl",
5326 OPCODE_INFO3 (0xf800e2e0,
5327 (0_4, AREG, OPRND_SHIFT_0_BIT),
5328 (16_20, AREG, OPRND_SHIFT_0_BIT),
5329 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5330 CSKY_ISA_DSP_ENHANCE),
5331 OP32 ("mulaca.s8",
5332 OPCODE_INFO3 (0xf800e4c0,
5333 (0_4, AREG, OPRND_SHIFT_0_BIT),
5334 (16_20, AREG, OPRND_SHIFT_0_BIT),
5335 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5336 CSKY_ISA_DSP_ENHANCE),
5337 /* The followings are shift instructions. */
5338 OP32 ("asri.s32.r",
5339 OPCODE_INFO3 (0xf800d1a0,
5340 (0_4, AREG, OPRND_SHIFT_0_BIT),
5341 (16_20, AREG, OPRND_SHIFT_0_BIT),
5342 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
5343 CSKY_ISA_DSP_ENHANCE),
5344 OP32 ("asr.s32.r",
5345 OPCODE_INFO3 (0xf800d1e0,
5346 (0_4, AREG, OPRND_SHIFT_0_BIT),
5347 (16_20, AREG, OPRND_SHIFT_0_BIT),
5348 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5349 CSKY_ISA_DSP_ENHANCE),
5350 OP32 ("lsri.u32.r",
5351 OPCODE_INFO3 (0xf800d320,
5352 (0_4, AREG, OPRND_SHIFT_0_BIT),
5353 (16_20, AREG, OPRND_SHIFT_0_BIT),
5354 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
5355 CSKY_ISA_DSP_ENHANCE),
5356 OP32 ("lsr.u32.r",
5357 OPCODE_INFO3 (0xf800d360,
5358 (0_4, AREG, OPRND_SHIFT_0_BIT),
5359 (16_20, AREG, OPRND_SHIFT_0_BIT),
5360 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5361 CSKY_ISA_DSP_ENHANCE),
5362 OP32 ("lsli.u32.s",
5363 OPCODE_INFO3 (0xf800d520,
5364 (0_4, AREG, OPRND_SHIFT_0_BIT),
5365 (16_20, AREG, OPRND_SHIFT_0_BIT),
5366 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
5367 CSKY_ISA_DSP_ENHANCE),
5368 OP32 ("lsli.s32.s",
5369 OPCODE_INFO3 (0xf800d5a0,
5370 (0_4, AREG, OPRND_SHIFT_0_BIT),
5371 (16_20, AREG, OPRND_SHIFT_0_BIT),
5372 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
5373 CSKY_ISA_DSP_ENHANCE),
5374 OP32 ("lsl.u32.s",
5375 OPCODE_INFO3 (0xf800d560,
5376 (0_4, AREG, OPRND_SHIFT_0_BIT),
5377 (16_20, AREG, OPRND_SHIFT_0_BIT),
5378 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5379 CSKY_ISA_DSP_ENHANCE),
5380 OP32 ("lsl.s32.s",
5381 OPCODE_INFO3 (0xf800d5e0,
5382 (0_4, AREG, OPRND_SHIFT_0_BIT),
5383 (16_20, AREG, OPRND_SHIFT_0_BIT),
5384 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5385 CSKY_ISA_DSP_ENHANCE),
5386 OP32 ("pasri.s16",
5387 OPCODE_INFO3 (0xf800d080,
5388 (0_4, AREG, OPRND_SHIFT_0_BIT),
5389 (16_20, AREG, OPRND_SHIFT_0_BIT),
5390 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5391 CSKY_ISA_DSP_ENHANCE),
5392 OP32 ("pasr.s16",
5393 OPCODE_INFO3 (0xf800d0c0,
5394 (0_4, AREG, OPRND_SHIFT_0_BIT),
5395 (16_20, AREG, OPRND_SHIFT_0_BIT),
5396 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5397 CSKY_ISA_DSP_ENHANCE),
5398 OP32 ("pasri.s16.r",
5399 OPCODE_INFO3 (0xf800d180,
5400 (0_4, AREG, OPRND_SHIFT_0_BIT),
5401 (16_20, AREG, OPRND_SHIFT_0_BIT),
5402 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5403 CSKY_ISA_DSP_ENHANCE),
5404 OP32 ("pasr.s16.r",
5405 OPCODE_INFO3 (0xf800d1c0,
5406 (0_4, AREG, OPRND_SHIFT_0_BIT),
5407 (16_20, AREG, OPRND_SHIFT_0_BIT),
5408 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5409 CSKY_ISA_DSP_ENHANCE),
5410 OP32 ("plsri.u16",
5411 OPCODE_INFO3 (0xf800d200,
5412 (0_4, AREG, OPRND_SHIFT_0_BIT),
5413 (16_20, AREG, OPRND_SHIFT_0_BIT),
5414 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5415 CSKY_ISA_DSP_ENHANCE),
5416 OP32 ("plsr.u16",
5417 OPCODE_INFO3 (0xf800d240,
5418 (0_4, AREG, OPRND_SHIFT_0_BIT),
5419 (16_20, AREG, OPRND_SHIFT_0_BIT),
5420 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5421 CSKY_ISA_DSP_ENHANCE),
5422 OP32 ("plsri.u16.r",
5423 OPCODE_INFO3 (0xf800d300,
5424 (0_4, AREG, OPRND_SHIFT_0_BIT),
5425 (16_20, AREG, OPRND_SHIFT_0_BIT),
5426 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5427 CSKY_ISA_DSP_ENHANCE),
5428 OP32 ("plsr.u16.r",
5429 OPCODE_INFO3 (0xf800d340,
5430 (0_4, AREG, OPRND_SHIFT_0_BIT),
5431 (16_20, AREG, OPRND_SHIFT_0_BIT),
5432 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5433 CSKY_ISA_DSP_ENHANCE),
531c73a3 5434 OP32 ("plsli.16",
b8891f8d
AJ		 5435 OPCODE_INFO3 (0xf800d400,
5436 (0_4, AREG, OPRND_SHIFT_0_BIT),
5437 (16_20, AREG, OPRND_SHIFT_0_BIT),
5438 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5439 CSKY_ISA_DSP_ENHANCE),
5440 OP32 ("plsl.u16",
5441 OPCODE_INFO3 (0xf800d440,
5442 (0_4, AREG, OPRND_SHIFT_0_BIT),
5443 (16_20, AREG, OPRND_SHIFT_0_BIT),
5444 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5445 CSKY_ISA_DSP_ENHANCE),
5446 OP32 ("plsli.u16.s",
5447 OPCODE_INFO3 (0xf800d500,
5448 (0_4, AREG, OPRND_SHIFT_0_BIT),
5449 (16_20, AREG, OPRND_SHIFT_0_BIT),
5450 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5451 CSKY_ISA_DSP_ENHANCE),
5452 OP32 ("plsli.s16.s",
5453 OPCODE_INFO3 (0xf800d580,
5454 (0_4, AREG, OPRND_SHIFT_0_BIT),
5455 (16_20, AREG, OPRND_SHIFT_0_BIT),
5456 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5457 CSKY_ISA_DSP_ENHANCE),
5458 OP32 ("plsl.u16.s",
5459 OPCODE_INFO3 (0xf800d540,
5460 (0_4, AREG, OPRND_SHIFT_0_BIT),
5461 (16_20, AREG, OPRND_SHIFT_0_BIT),
5462 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5463 CSKY_ISA_DSP_ENHANCE),
5464 OP32 ("plsl.s16.s",
5465 OPCODE_INFO3 (0xf800d5c0,
5466 (0_4, AREG, OPRND_SHIFT_0_BIT),
5467 (16_20, AREG, OPRND_SHIFT_0_BIT),
5468 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5469 CSKY_ISA_DSP_ENHANCE),
5470 /* The following are package & unpackage instructions. */
5471 OP32 ("pkg",
5472 OPCODE_INFO5 (0xf800a000,
5473 (0_4, AREG, OPRND_SHIFT_0_BIT),
5474 (16_20, AREG, OPRND_SHIFT_0_BIT),
5475 (5_8, IMM4b, OPRND_SHIFT_0_BIT),
5476 (21_25, AREG, OPRND_SHIFT_0_BIT),
5477 (9_12, OIMM4b, OPRND_SHIFT_0_BIT)),
5478 CSKY_ISA_DSP_ENHANCE),
5479 OP32 ("dexti",
5480 OPCODE_INFO4 (0xf8009800,
5481 (0_4, AREG, OPRND_SHIFT_0_BIT),
5482 (16_20, AREG, OPRND_SHIFT_0_BIT),
5483 (21_25, AREG, OPRND_SHIFT_0_BIT),
5484 (5_9, IMM5b, OPRND_SHIFT_0_BIT)),
5485 CSKY_ISA_DSP_ENHANCE),
5486 OP32 ("dext",
5487 OPCODE_INFO4 (0xf8009c00,
5488 (0_4, AREG, OPRND_SHIFT_0_BIT),
5489 (16_20, AREG, OPRND_SHIFT_0_BIT),
5490 (21_25, AREG, OPRND_SHIFT_0_BIT),
5491 (5_9, AREG, OPRND_SHIFT_0_BIT)),
5492 CSKY_ISA_DSP_ENHANCE),
5493 OP32 ("pkgll",
5494 OPCODE_INFO3 (0xf800d840,
5495 (0_4, AREG, OPRND_SHIFT_0_BIT),
5496 (16_20, AREG, OPRND_SHIFT_0_BIT),
5497 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5498 CSKY_ISA_DSP_ENHANCE),
5499 OP32 ("pkghh",
5500 OPCODE_INFO3 (0xf800d860,
5501 (0_4, AREG, OPRND_SHIFT_0_BIT),
5502 (16_20, AREG, OPRND_SHIFT_0_BIT),
5503 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5504 CSKY_ISA_DSP_ENHANCE),
5505 OP32 ("pext.u8.e",
5506 OPCODE_INFO2 (0xf800d900,
5507 (0_4, AREG, OPRND_SHIFT_0_BIT),
5508 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5509 CSKY_ISA_DSP_ENHANCE),
5510 OP32 ("pext.s8.e",
5511 OPCODE_INFO2 (0xf800d980,
5512 (0_4, AREG, OPRND_SHIFT_0_BIT),
5513 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5514 CSKY_ISA_DSP_ENHANCE),
5515 OP32 ("pextx.u8.e",
5516 OPCODE_INFO2 (0xf800d920,
5517 (0_4, AREG, OPRND_SHIFT_0_BIT),
5518 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5519 CSKY_ISA_DSP_ENHANCE),
5520 OP32 ("pextx.s8.e",
5521 OPCODE_INFO2 (0xf800d9a0,
5522 (0_4, AREG, OPRND_SHIFT_0_BIT),
5523 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5524 CSKY_ISA_DSP_ENHANCE),
5525 OP32 ("narl",
5526 OPCODE_INFO3 (0xf800da00,
5527 (0_4, AREG, OPRND_SHIFT_0_BIT),
5528 (16_20, AREG, OPRND_SHIFT_0_BIT),
5529 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5530 CSKY_ISA_DSP_ENHANCE),
5531 OP32 ("narh",
5532 OPCODE_INFO3 (0xf800da20,
5533 (0_4, AREG, OPRND_SHIFT_0_BIT),
5534 (16_20, AREG, OPRND_SHIFT_0_BIT),
5535 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5536 CSKY_ISA_DSP_ENHANCE),
5537 OP32 ("narlx",
5538 OPCODE_INFO3 (0xf800da40,
5539 (0_4, AREG, OPRND_SHIFT_0_BIT),
5540 (16_20, AREG, OPRND_SHIFT_0_BIT),
5541 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5542 CSKY_ISA_DSP_ENHANCE),
5543 OP32 ("narhx",
5544 OPCODE_INFO3 (0xf800da60,
5545 (0_4, AREG, OPRND_SHIFT_0_BIT),
5546 (16_20, AREG, OPRND_SHIFT_0_BIT),
5547 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5548 CSKY_ISA_DSP_ENHANCE),
5549 OP32 ("clipi.u32",
5550 OPCODE_INFO3 (0xf800db00,
5551 (0_4, AREG, OPRND_SHIFT_0_BIT),
5552 (16_20, AREG, OPRND_SHIFT_0_BIT),
5553 (21_25, IMM5b, OPRND_SHIFT_0_BIT)),
5554 CSKY_ISA_DSP_ENHANCE),
5555 OP32 ("clipi.s32",
5556 OPCODE_INFO3 (0xf800db80,
5557 (0_4, AREG, OPRND_SHIFT_0_BIT),
5558 (16_20, AREG, OPRND_SHIFT_0_BIT),
5559 (21_25, OIMM5b, OPRND_SHIFT_0_BIT)),
5560 CSKY_ISA_DSP_ENHANCE),
5561 OP32 ("clip.u32",
5562 OPCODE_INFO3 (0xf800db20,
5563 (0_4, AREG, OPRND_SHIFT_0_BIT),
5564 (16_20, AREG, OPRND_SHIFT_0_BIT),
5565 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5566 CSKY_ISA_DSP_ENHANCE),
5567 OP32 ("clip.s32",
5568 OPCODE_INFO3 (0xf800dba0,
5569 (0_4, AREG, OPRND_SHIFT_0_BIT),
5570 (16_20, AREG, OPRND_SHIFT_0_BIT),
5571 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5572 CSKY_ISA_DSP_ENHANCE),
5573 OP32 ("pclipi.u16",
5574 OPCODE_INFO3 (0xf800db40,
5575 (0_4, AREG, OPRND_SHIFT_0_BIT),
5576 (16_20, AREG, OPRND_SHIFT_0_BIT),
5577 (21_25, IMM4b, OPRND_SHIFT_0_BIT)),
5578 CSKY_ISA_DSP_ENHANCE),
5579 OP32 ("pclipi.s16",
5580 OPCODE_INFO3 (0xf800dbc0,
5581 (0_4, AREG, OPRND_SHIFT_0_BIT),
5582 (16_20, AREG, OPRND_SHIFT_0_BIT),
5583 (21_25, OIMM4b, OPRND_SHIFT_0_BIT)),
5584 CSKY_ISA_DSP_ENHANCE),
5585 OP32 ("pclip.u16",
5586 OPCODE_INFO3 (0xf800db60,
5587 (0_4, AREG, OPRND_SHIFT_0_BIT),
5588 (16_20, AREG, OPRND_SHIFT_0_BIT),
5589 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5590 CSKY_ISA_DSP_ENHANCE),
5591 OP32 ("pclip.s16",
5592 OPCODE_INFO3 (0xf800dbe0,
5593 (0_4, AREG, OPRND_SHIFT_0_BIT),
5594 (16_20, AREG, OPRND_SHIFT_0_BIT),
5595 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5596 CSKY_ISA_DSP_ENHANCE),
5597 OP32 ("pabs.s8.s",
5598 OPCODE_INFO2 (0xf800dc80,
5599 (0_4, AREG, OPRND_SHIFT_0_BIT),
5600 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5601 CSKY_ISA_DSP_ENHANCE),
5602 OP32 ("pabs.s16.s",
5603 OPCODE_INFO2 (0xf800dca0,
5604 (0_4, AREG, OPRND_SHIFT_0_BIT),
5605 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5606 CSKY_ISA_DSP_ENHANCE),
5607 OP32 ("abs.s32.s",
5608 OPCODE_INFO2 (0xf800dcc0,
5609 (0_4, AREG, OPRND_SHIFT_0_BIT),
5610 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5611 CSKY_ISA_DSP_ENHANCE),
5612 OP32 ("pneg.s8.s",
5613 OPCODE_INFO2 (0xf800dd80,
5614 (0_4, AREG, OPRND_SHIFT_0_BIT),
5615 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5616 CSKY_ISA_DSP_ENHANCE),
5617 OP32 ("pneg.s16.s",
5618 OPCODE_INFO2 (0xf800dda0,
5619 (0_4, AREG, OPRND_SHIFT_0_BIT),
5620 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5621 CSKY_ISA_DSP_ENHANCE),
5622 OP32 ("neg.s32.s",
5623 OPCODE_INFO2 (0xf800ddc0,
5624 (0_4, AREG, OPRND_SHIFT_0_BIT),
5625 (16_20, AREG, OPRND_SHIFT_0_BIT)),
5626 CSKY_ISA_DSP_ENHANCE),
5627 OP32 ("dup.8",
5628 OPCODE_INFO3 (0xf800de00,
5629 (0_4, AREG, OPRND_SHIFT_0_BIT),
5630 (16_20, AREG, OPRND_SHIFT_0_BIT),
5631 (5_6, IMM2b, OPRND_SHIFT_0_BIT)),
5632 CSKY_ISA_DSP_ENHANCE),
5633 OP32 ("dup.16",
5634 OPCODE_INFO3 (0xf800df00,
5635 (0_4, AREG, OPRND_SHIFT_0_BIT),
5636 (16_20, AREG, OPRND_SHIFT_0_BIT),
5637 (5_6, IMM1b, OPRND_SHIFT_0_BIT)),
5638 CSKY_ISA_DSP_ENHANCE),
5639 /* The followings are multiplication instructions. */
5640 OP32 ("mul.u32",
5641 OPCODE_INFO3 (0xf8008000,
5642 (0_4, AREG, OPRND_SHIFT_0_BIT),
5643 (16_20, AREG, OPRND_SHIFT_0_BIT),
5644 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5645 CSKYV2_ISA_3E3R1),
5646 OP32 ("mul.s32",
5647 OPCODE_INFO3 (0xf8008200,
5648 (0_4, AREG, OPRND_SHIFT_0_BIT),
5649 (16_20, AREG, OPRND_SHIFT_0_BIT),
5650 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5651 CSKYV2_ISA_3E3R1),
5652 OP32 ("mula.u32",
5653 OPCODE_INFO3 (0xf8008080,
5654 (0_4, AREG, OPRND_SHIFT_0_BIT),
5655 (16_20, AREG, OPRND_SHIFT_0_BIT),
5656 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5657 CSKYV2_ISA_3E3R1),
5658 OP32 ("mula.s32",
5659 OPCODE_INFO3 (0xf8008280,
5660 (0_4, AREG, OPRND_SHIFT_0_BIT),
5661 (16_20, AREG, OPRND_SHIFT_0_BIT),
5662 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5663 CSKYV2_ISA_3E3R1),
5664 OP32 ("mula.32.l",
5665 OPCODE_INFO3 (0xf8008440,
5666 (0_4, AREG, OPRND_SHIFT_0_BIT),
5667 (16_20, AREG, OPRND_SHIFT_0_BIT),
5668 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5669 CSKYV2_ISA_3E3R1),
5670 OP32 ("mulall.s16.s",
5671 OPCODE_INFO3 (0xf80081a0,
5672 (0_4, AREG, OPRND_SHIFT_0_BIT),
5673 (16_20, AREG, OPRND_SHIFT_0_BIT),
5674 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5675 CSKYV2_ISA_3E3R1),
5676 OP32 ("muls.u32",
5677 OPCODE_INFO3 (0xf80080c0,
5678 (0_4, AREG, OPRND_SHIFT_0_BIT),
5679 (16_20, AREG, OPRND_SHIFT_0_BIT),
5680 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5681 CSKY_ISA_DSP_ENHANCE),
5682 OP32 ("muls.s32",
5683 OPCODE_INFO3 (0xf80082c0,
5684 (0_4, AREG, OPRND_SHIFT_0_BIT),
5685 (16_20, AREG, OPRND_SHIFT_0_BIT),
5686 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5687 CSKY_ISA_DSP_ENHANCE),
5688 OP32 ("mula.u32.s",
5689 OPCODE_INFO3 (0xf8008180,
5690 (0_4, AREG, OPRND_SHIFT_0_BIT),
5691 (16_20, AREG, OPRND_SHIFT_0_BIT),
5692 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5693 CSKY_ISA_DSP_ENHANCE),
5694 OP32 ("mula.s32.s",
5695 OPCODE_INFO3 (0xf8008380,
5696 (0_4, AREG, OPRND_SHIFT_0_BIT),
5697 (16_20, AREG, OPRND_SHIFT_0_BIT),
5698 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5699 CSKY_ISA_DSP_ENHANCE),
5700 OP32 ("muls.u32.s",
5701 OPCODE_INFO3 (0xf80081c0,
5702 (0_4, AREG, OPRND_SHIFT_0_BIT),
5703 (16_20, AREG, OPRND_SHIFT_0_BIT),
5704 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5705 CSKY_ISA_DSP_ENHANCE),
5706 OP32 ("muls.s32.s",
5707 OPCODE_INFO3 (0xf80083c0,
5708 (0_4, AREG, OPRND_SHIFT_0_BIT),
5709 (16_20, AREG, OPRND_SHIFT_0_BIT),
5710 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5711 CSKY_ISA_DSP_ENHANCE),
5712 OP32 ("mul.s32.h",
5713 OPCODE_INFO3 (0xf8008400,
5714 (0_4, AREG, OPRND_SHIFT_0_BIT),
5715 (16_20, AREG, OPRND_SHIFT_0_BIT),
5716 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5717 CSKY_ISA_DSP_ENHANCE),
5718 OP32 ("mul.s32.rh",
5719 OPCODE_INFO3 (0xf8008600,
5720 (0_4, AREG, OPRND_SHIFT_0_BIT),
5721 (16_20, AREG, OPRND_SHIFT_0_BIT),
5722 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5723 CSKY_ISA_DSP_ENHANCE),
5724 OP32 ("rmul.s32.h",
5725 OPCODE_INFO3 (0xf8008500,
5726 (0_4, AREG, OPRND_SHIFT_0_BIT),
5727 (16_20, AREG, OPRND_SHIFT_0_BIT),
5728 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5729 CSKY_ISA_DSP_ENHANCE),
5730 OP32 ("rmul.s32.rh",
5731 OPCODE_INFO3 (0xf8008700,
5732 (0_4, AREG, OPRND_SHIFT_0_BIT),
5733 (16_20, AREG, OPRND_SHIFT_0_BIT),
5734 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5735 CSKY_ISA_DSP_ENHANCE),
5736 OP32 ("mula.s32.hs",
5737 OPCODE_INFO3 (0xf8008580,
5738 (0_4, AREG, OPRND_SHIFT_0_BIT),
5739 (16_20, AREG, OPRND_SHIFT_0_BIT),
5740 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5741 CSKY_ISA_DSP_ENHANCE),
5742 OP32 ("muls.s32.hs",
5743 OPCODE_INFO3 (0xf80085c0,
5744 (0_4, AREG, OPRND_SHIFT_0_BIT),
5745 (16_20, AREG, OPRND_SHIFT_0_BIT),
5746 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5747 CSKY_ISA_DSP_ENHANCE),
5748 OP32 ("mula.s32.rhs",
5749 OPCODE_INFO3 (0xf8008780,
5750 (0_4, AREG, OPRND_SHIFT_0_BIT),
5751 (16_20, AREG, OPRND_SHIFT_0_BIT),
5752 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5753 CSKY_ISA_DSP_ENHANCE),
5754 OP32 ("muls.s32.rhs",
5755 OPCODE_INFO3 (0xf80087c0,
5756 (0_4, AREG, OPRND_SHIFT_0_BIT),
5757 (16_20, AREG, OPRND_SHIFT_0_BIT),
5758 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5759 CSKY_ISA_DSP_ENHANCE),
5760 OP32 ("mulxl.s32",
5761 OPCODE_INFO3 (0xf8008800,
5762 (0_4, AREG, OPRND_SHIFT_0_BIT),
5763 (16_20, AREG, OPRND_SHIFT_0_BIT),
5764 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5765 CSKY_ISA_DSP_ENHANCE),
5766 OP32 ("mulxl.s32.r",
5767 OPCODE_INFO3 (0xf8008a00,
5768 (0_4, AREG, OPRND_SHIFT_0_BIT),
5769 (16_20, AREG, OPRND_SHIFT_0_BIT),
5770 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5771 CSKY_ISA_DSP_ENHANCE),
5772 OP32 ("mulxh.s32",
5773 OPCODE_INFO3 (0xf8008c00,
5774 (0_4, AREG, OPRND_SHIFT_0_BIT),
5775 (16_20, AREG, OPRND_SHIFT_0_BIT),
5776 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5777 CSKY_ISA_DSP_ENHANCE),
5778 OP32 ("mulxh.s32.r",
5779 OPCODE_INFO3 (0xf8008e00,
5780 (0_4, AREG, OPRND_SHIFT_0_BIT),
5781 (16_20, AREG, OPRND_SHIFT_0_BIT),
5782 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5783 CSKY_ISA_DSP_ENHANCE),
5784 OP32 ("rmulxl.s32",
5785 OPCODE_INFO3 (0xf8008900,
5786 (0_4, AREG, OPRND_SHIFT_0_BIT),
5787 (16_20, AREG, OPRND_SHIFT_0_BIT),
5788 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5789 CSKY_ISA_DSP_ENHANCE),
5790 OP32 ("rmulxl.s32.r",
5791 OPCODE_INFO3 (0xf8008b00,
5792 (0_4, AREG, OPRND_SHIFT_0_BIT),
5793 (16_20, AREG, OPRND_SHIFT_0_BIT),
5794 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5795 CSKY_ISA_DSP_ENHANCE),
5796 OP32 ("rmulxh.s32",
5797 OPCODE_INFO3 (0xf8008d00,
5798 (0_4, AREG, OPRND_SHIFT_0_BIT),
5799 (16_20, AREG, OPRND_SHIFT_0_BIT),
5800 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5801 CSKY_ISA_DSP_ENHANCE),
5802 OP32 ("rmulxh.s32.r",
5803 OPCODE_INFO3 (0xf8008f00,
5804 (0_4, AREG, OPRND_SHIFT_0_BIT),
5805 (16_20, AREG, OPRND_SHIFT_0_BIT),
5806 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5807 CSKY_ISA_DSP_ENHANCE),
5808 OP32 ("mulaxl.s32.s",
5809 OPCODE_INFO3 (0xf8008980,
5810 (0_4, AREG, OPRND_SHIFT_0_BIT),
5811 (16_20, AREG, OPRND_SHIFT_0_BIT),
5812 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5813 CSKY_ISA_DSP_ENHANCE),
5814 OP32 ("mulaxl.s32.rs",
5815 OPCODE_INFO3 (0xf8008b80,
5816 (0_4, AREG, OPRND_SHIFT_0_BIT),
5817 (16_20, AREG, OPRND_SHIFT_0_BIT),
5818 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5819 CSKY_ISA_DSP_ENHANCE),
5820 OP32 ("mulaxh.s32.s",
5821 OPCODE_INFO3 (0xf8008d80,
5822 (0_4, AREG, OPRND_SHIFT_0_BIT),
5823 (16_20, AREG, OPRND_SHIFT_0_BIT),
5824 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5825 CSKY_ISA_DSP_ENHANCE),
5826 OP32 ("mulaxh.s32.rs",
5827 OPCODE_INFO3 (0xf8008f80,
5828 (0_4, AREG, OPRND_SHIFT_0_BIT),
5829 (16_20, AREG, OPRND_SHIFT_0_BIT),
5830 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5831 CSKY_ISA_DSP_ENHANCE),
5832 OP32 ("mulll.s16",
5833 OPCODE_INFO3 (0xf8008020,
5834 (0_4, AREG, OPRND_SHIFT_0_BIT),
5835 (16_20, AREG, OPRND_SHIFT_0_BIT),
5836 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5837 CSKY_ISA_DSP_ENHANCE),
5838 OP32 ("mulhh.s16",
5839 OPCODE_INFO3 (0xf8008260,
5840 (0_4, AREG, OPRND_SHIFT_0_BIT),
5841 (16_20, AREG, OPRND_SHIFT_0_BIT),
5842 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5843 CSKY_ISA_DSP_ENHANCE),
5844 OP32 ("mulhl.s16",
5845 OPCODE_INFO3 (0xf8008220,
5846 (0_4, AREG, OPRND_SHIFT_0_BIT),
5847 (16_20, AREG, OPRND_SHIFT_0_BIT),
5848 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5849 CSKY_ISA_DSP_ENHANCE),
5850 OP32 ("rmulll.s16",
5851 OPCODE_INFO3 (0xf8008120,
5852 (0_4, AREG, OPRND_SHIFT_0_BIT),
5853 (16_20, AREG, OPRND_SHIFT_0_BIT),
5854 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5855 CSKY_ISA_DSP_ENHANCE),
5856 OP32 ("rmulhh.s16",
5857 OPCODE_INFO3 (0xf8008360,
5858 (0_4, AREG, OPRND_SHIFT_0_BIT),
5859 (16_20, AREG, OPRND_SHIFT_0_BIT),
5860 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5861 CSKY_ISA_DSP_ENHANCE),
5862 OP32 ("rmulhl.s16",
5863 OPCODE_INFO3 (0xf8008320,
5864 (0_4, AREG, OPRND_SHIFT_0_BIT),
5865 (16_20, AREG, OPRND_SHIFT_0_BIT),
5866 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5867 CSKY_ISA_DSP_ENHANCE),
5868 OP32 ("mulahh.s16.s",
5869 OPCODE_INFO3 (0xf80083e0,
5870 (0_4, AREG, OPRND_SHIFT_0_BIT),
5871 (16_20, AREG, OPRND_SHIFT_0_BIT),
5872 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5873 CSKY_ISA_DSP_ENHANCE),
5874 OP32 ("mulahl.s16.s",
5875 OPCODE_INFO3 (0xf80083a0,
5876 (0_4, AREG, OPRND_SHIFT_0_BIT),
5877 (16_20, AREG, OPRND_SHIFT_0_BIT),
5878 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5879 CSKY_ISA_DSP_ENHANCE),
5880 OP32 ("mulall.s16.e",
5881 OPCODE_INFO3 (0xf80080a0,
5882 (0_4, AREG, OPRND_SHIFT_0_BIT),
5883 (16_20, AREG, OPRND_SHIFT_0_BIT),
5884 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5885 CSKY_ISA_DSP_ENHANCE),
5886 OP32 ("mulahh.s16.e",
5887 OPCODE_INFO3 (0xf80082e0,
5888 (0_4, AREG, OPRND_SHIFT_0_BIT),
5889 (16_20, AREG, OPRND_SHIFT_0_BIT),
5890 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5891 CSKY_ISA_DSP_ENHANCE),
5892 OP32 ("mulahl.s16.e",
5893 OPCODE_INFO3 (0xf80080e0,
5894 (0_4, AREG, OPRND_SHIFT_0_BIT),
5895 (16_20, AREG, OPRND_SHIFT_0_BIT),
5896 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5897 CSKY_ISA_DSP_ENHANCE),
5898 OP32 ("pmul.u16",
5899 OPCODE_INFO3 (0xf80084a0,
5900 (0_4, AREG, OPRND_SHIFT_0_BIT),
5901 (16_20, AREG, OPRND_SHIFT_0_BIT),
5902 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5903 CSKY_ISA_DSP_ENHANCE),
5904 OP32 ("pmulx.u16",
5905 OPCODE_INFO3 (0xf80084e0,
5906 (0_4, AREG, OPRND_SHIFT_0_BIT),
5907 (16_20, AREG, OPRND_SHIFT_0_BIT),
5908 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5909 CSKY_ISA_DSP_ENHANCE),
5910 OP32 ("pmul.s16",
5911 OPCODE_INFO3 (0xf8008420,
5912 (0_4, AREG, OPRND_SHIFT_0_BIT),
5913 (16_20, AREG, OPRND_SHIFT_0_BIT),
5914 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5915 CSKY_ISA_DSP_ENHANCE),
5916 OP32 ("pmulx.s16",
5917 OPCODE_INFO3 (0xf8008460,
5918 (0_4, AREG, OPRND_SHIFT_0_BIT),
5919 (16_20, AREG, OPRND_SHIFT_0_BIT),
5920 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5921 CSKY_ISA_DSP_ENHANCE),
5922 OP32 ("prmul.s16",
5923 OPCODE_INFO3 (0xf8008520,
5924 (0_4, AREG, OPRND_SHIFT_0_BIT),
5925 (16_20, AREG, OPRND_SHIFT_0_BIT),
5926 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5927 CSKY_ISA_DSP_ENHANCE),
5928 OP32 ("prmulx.s16",
5929 OPCODE_INFO3 (0xf8008560,
5930 (0_4, AREG, OPRND_SHIFT_0_BIT),
5931 (16_20, AREG, OPRND_SHIFT_0_BIT),
5932 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5933 CSKY_ISA_DSP_ENHANCE),
5934 OP32 ("prmul.s16.h",
5935 OPCODE_INFO3 (0xf80085a0,
5936 (0_4, AREG, OPRND_SHIFT_0_BIT),
5937 (16_20, AREG, OPRND_SHIFT_0_BIT),
5938 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5939 CSKY_ISA_DSP_ENHANCE),
5940 OP32 ("prmul.s16.rh",
5941 OPCODE_INFO3 (0xf80087a0,
5942 (0_4, AREG, OPRND_SHIFT_0_BIT),
5943 (16_20, AREG, OPRND_SHIFT_0_BIT),
5944 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5945 CSKY_ISA_DSP_ENHANCE),
5946 OP32 ("prmulx.s16.h",
5947 OPCODE_INFO3 (0xf80085e0,
5948 (0_4, AREG, OPRND_SHIFT_0_BIT),
5949 (16_20, AREG, OPRND_SHIFT_0_BIT),
5950 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5951 CSKY_ISA_DSP_ENHANCE),
5952 OP32 ("prmulx.s16.rh",
5953 OPCODE_INFO3 (0xf80087e0,
5954 (0_4, AREG, OPRND_SHIFT_0_BIT),
5955 (16_20, AREG, OPRND_SHIFT_0_BIT),
5956 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5957 CSKY_ISA_DSP_ENHANCE),
5958 OP32 ("mulca.s16.s",
5959 OPCODE_INFO3 (0xf8008920,
5960 (0_4, AREG, OPRND_SHIFT_0_BIT),
5961 (16_20, AREG, OPRND_SHIFT_0_BIT),
5962 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5963 CSKY_ISA_DSP_ENHANCE),
5964 OP32 ("mulcax.s16.s",
5965 OPCODE_INFO3 (0xf8008960,
5966 (0_4, AREG, OPRND_SHIFT_0_BIT),
5967 (16_20, AREG, OPRND_SHIFT_0_BIT),
5968 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5969 CSKY_ISA_DSP_ENHANCE),
5970 OP32 ("mulcs.s16",
5971 OPCODE_INFO3 (0xf8008a20,
5972 (0_4, AREG, OPRND_SHIFT_0_BIT),
5973 (16_20, AREG, OPRND_SHIFT_0_BIT),
5974 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5975 CSKY_ISA_DSP_ENHANCE),
5976 OP32 ("mulcsr.s16",
5977 OPCODE_INFO3 (0xf8008a60,
5978 (0_4, AREG, OPRND_SHIFT_0_BIT),
5979 (16_20, AREG, OPRND_SHIFT_0_BIT),
5980 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5981 CSKY_ISA_DSP_ENHANCE),
5982 OP32 ("mulcsx.s16",
5983 OPCODE_INFO3 (0xf8008c20,
5984 (0_4, AREG, OPRND_SHIFT_0_BIT),
5985 (16_20, AREG, OPRND_SHIFT_0_BIT),
5986 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5987 CSKY_ISA_DSP_ENHANCE),
5988 OP32 ("mulaca.s16.s",
5989 OPCODE_INFO3 (0xf80089a0,
5990 (0_4, AREG, OPRND_SHIFT_0_BIT),
5991 (16_20, AREG, OPRND_SHIFT_0_BIT),
5992 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5993 CSKY_ISA_DSP_ENHANCE),
5994 OP32 ("mulacax.s16.s",
5995 OPCODE_INFO3 (0xf80089e0,
5996 (0_4, AREG, OPRND_SHIFT_0_BIT),
5997 (16_20, AREG, OPRND_SHIFT_0_BIT),
5998 (21_25, AREG, OPRND_SHIFT_0_BIT)),
5999 CSKY_ISA_DSP_ENHANCE),
6000 OP32 ("mulacs.s16.s",
6001 OPCODE_INFO3 (0xf8008ba0,
6002 (0_4, AREG, OPRND_SHIFT_0_BIT),
6003 (16_20, AREG, OPRND_SHIFT_0_BIT),
6004 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6005 CSKY_ISA_DSP_ENHANCE),
6006 OP32 ("mulacsr.s16.s",
6007 OPCODE_INFO3 (0xf8008be0,
6008 (0_4, AREG, OPRND_SHIFT_0_BIT),
6009 (16_20, AREG, OPRND_SHIFT_0_BIT),
6010 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6011 CSKY_ISA_DSP_ENHANCE),
6012 OP32 ("mulacsx.s16.s",
6013 OPCODE_INFO3 (0xf8008da0,
6014 (0_4, AREG, OPRND_SHIFT_0_BIT),
6015 (16_20, AREG, OPRND_SHIFT_0_BIT),
6016 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6017 CSKY_ISA_DSP_ENHANCE),
6018 OP32 ("mulsca.s16.s",
6019 OPCODE_INFO3 (0xf8008de0,
6020 (0_4, AREG, OPRND_SHIFT_0_BIT),
6021 (16_20, AREG, OPRND_SHIFT_0_BIT),
6022 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6023 CSKY_ISA_DSP_ENHANCE),
6024 OP32 ("mulscax.s16.s",
6025 OPCODE_INFO3 (0xf8008fa0,
6026 (0_4, AREG, OPRND_SHIFT_0_BIT),
6027 (16_20, AREG, OPRND_SHIFT_0_BIT),
6028 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6029 CSKY_ISA_DSP_ENHANCE),
6030 OP32 ("mulaca.s16.e",
6031 OPCODE_INFO3 (0xf80088a0,
6032 (0_4, AREG, OPRND_SHIFT_0_BIT),
6033 (16_20, AREG, OPRND_SHIFT_0_BIT),
6034 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6035 CSKY_ISA_DSP_ENHANCE),
6036 OP32 ("mulacax.s16.e",
6037 OPCODE_INFO3 (0xf80088e0,
6038 (0_4, AREG, OPRND_SHIFT_0_BIT),
6039 (16_20, AREG, OPRND_SHIFT_0_BIT),
6040 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6041 CSKY_ISA_DSP_ENHANCE),
6042 OP32 ("mulacs.s16.e",
6043 OPCODE_INFO3 (0xf8008aa0,
6044 (0_4, AREG, OPRND_SHIFT_0_BIT),
6045 (16_20, AREG, OPRND_SHIFT_0_BIT),
6046 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6047 CSKY_ISA_DSP_ENHANCE),
6048 OP32 ("mulacsr.s16.e",
6049 OPCODE_INFO3 (0xf8008ae0,
6050 (0_4, AREG, OPRND_SHIFT_0_BIT),
6051 (16_20, AREG, OPRND_SHIFT_0_BIT),
6052 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6053 CSKY_ISA_DSP_ENHANCE),
6054 OP32 ("mulacsx.s16.e",
6055 OPCODE_INFO3 (0xf8008ca0,
6056 (0_4, AREG, OPRND_SHIFT_0_BIT),
6057 (16_20, AREG, OPRND_SHIFT_0_BIT),
6058 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6059 CSKY_ISA_DSP_ENHANCE),
6060 OP32 ("mulsca.s16.e",
6061 OPCODE_INFO3 (0xf8008ce0,
6062 (0_4, AREG, OPRND_SHIFT_0_BIT),
6063 (16_20, AREG, OPRND_SHIFT_0_BIT),
6064 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6065 CSKY_ISA_DSP_ENHANCE),
6066 OP32 ("mulscax.s16.e",
6067 OPCODE_INFO3 (0xf8008ea0,
6068 (0_4, AREG, OPRND_SHIFT_0_BIT),
6069 (16_20, AREG, OPRND_SHIFT_0_BIT),
6070 (21_25, AREG, OPRND_SHIFT_0_BIT)),
6071 CSKY_ISA_DSP_ENHANCE),
6072
6073 /* The followings are vdsp instructions for ck810. */
6074 OP32 ("vdup.8",
6075 OPCODE_INFO2 (0xf8000e80,
6076 (0_3, FREG, OPRND_SHIFT_0_BIT),
6077 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6078 CSKY_ISA_VDSP),
6079 OP32 ("vdup.16",
6080 OPCODE_INFO2 (0xf8100e80,
6081 (0_3, FREG, OPRND_SHIFT_0_BIT),
6082 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6083 CSKY_ISA_VDSP),
6084 OP32 ("vdup.32",
6085 OPCODE_INFO2 (0xfa000e80,
6086 (0_3, FREG, OPRND_SHIFT_0_BIT),
6087 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6088 CSKY_ISA_VDSP),
6089 OP32 ("vmfvr.u8",
6090 OPCODE_INFO2 (0xf8001200,
6091 (0_4, AREG, OPRND_SHIFT_0_BIT),
6092 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6093 CSKY_ISA_VDSP),
6094 OP32 ("vmfvr.u16",
6095 OPCODE_INFO2 (0xf8001220,
6096 (0_4, AREG, OPRND_SHIFT_0_BIT),
6097 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6098 CSKY_ISA_VDSP),
6099 OP32 ("vmfvr.u32",
6100 OPCODE_INFO2 (0xf8001240,
6101 (0_4, AREG, OPRND_SHIFT_0_BIT),
6102 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6103 CSKY_ISA_VDSP),
6104 OP32 ("vmfvr.s8",
6105 OPCODE_INFO2 (0xf8001280,
6106 (0_4, AREG, OPRND_SHIFT_0_BIT),
6107 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6108 CSKY_ISA_VDSP),
6109 OP32 ("vmfvr.s16",
6110 OPCODE_INFO2 (0xf80012a0,
6111 (0_4, AREG, OPRND_SHIFT_0_BIT),
6112 (16_19or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT)),
6113 CSKY_ISA_VDSP),
6114 OP32 ("vmtvr.u8",
6115 OPCODE_INFO2 (0xf8001300,
6116 (0_3or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT),
6117 (16_20, AREG, OPRND_SHIFT_0_BIT)),
6118 CSKY_ISA_VDSP),
6119 OP32 ("vmtvr.u16",
6120 OPCODE_INFO2 (0xf8001320,
6121 (0_3or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT),
6122 (16_20, AREG, OPRND_SHIFT_0_BIT)),
6123 CSKY_ISA_VDSP),
6124 OP32 ("vmtvr.u32",
6125 OPCODE_INFO2 (0xf8001340,
6126 (0_3or21_24, FREG_WITH_INDEX, OPRND_SHIFT_0_BIT),
6127 (16_20, AREG, OPRND_SHIFT_0_BIT)),
6128 CSKY_ISA_VDSP),
6129 OP32 ("vldd.8",
6130 SOPCODE_INFO2 (0xf8002000,
6131 (0_3, FREG, OPRND_SHIFT_0_BIT),
6132 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6133 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6134 CSKY_ISA_VDSP),
6135 OP32 ("vldd.16",
6136 SOPCODE_INFO2 (0xf8002100,
6137 (0_3, FREG, OPRND_SHIFT_0_BIT),
6138 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6139 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6140 CSKY_ISA_VDSP),
6141 OP32 ("vldd.32",
6142 SOPCODE_INFO2 (0xf8002200,
6143 (0_3, FREG, OPRND_SHIFT_0_BIT),
6144 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6145 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6146 CSKY_ISA_VDSP),
6147 OP32 ("vldq.8",
6148 SOPCODE_INFO2 (0xf8002400,
6149 (0_3, FREG, OPRND_SHIFT_0_BIT),
6150 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6151 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6152 CSKY_ISA_VDSP),
6153 OP32 ("vldq.16",
6154 SOPCODE_INFO2 (0xf8002500,
6155 (0_3, FREG, OPRND_SHIFT_0_BIT),
6156 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6157 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6158 CSKY_ISA_VDSP),
6159 OP32 ("vldq.32",
6160 SOPCODE_INFO2 (0xf8002600,
6161 (0_3, FREG, OPRND_SHIFT_0_BIT),
6162 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6163 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6164 CSKY_ISA_VDSP),
6165 OP32 ("vstd.8",
6166 SOPCODE_INFO2 (0xf8002800,
6167 (0_3, FREG, OPRND_SHIFT_0_BIT),
6168 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6169 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6170 CSKY_ISA_VDSP),
6171 OP32 ("vstd.16",
6172 SOPCODE_INFO2 (0xf8002900,
6173 (0_3, FREG, OPRND_SHIFT_0_BIT),
6174 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6175 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6176 CSKY_ISA_VDSP),
6177 OP32 ("vstd.32",
6178 SOPCODE_INFO2 (0xf8002a00,
6179 (0_3, FREG, OPRND_SHIFT_0_BIT),
6180 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6181 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_3_BIT))),
6182 CSKY_ISA_VDSP),
6183 OP32 ("vstq.8",
6184 SOPCODE_INFO2 (0xf8002c00,
6185 (0_3, FREG, OPRND_SHIFT_0_BIT),
6186 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6187 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6188 CSKY_ISA_VDSP),
6189 OP32 ("vstq.16",
6190 SOPCODE_INFO2 (0xf8002d00,
6191 (0_3, FREG, OPRND_SHIFT_0_BIT),
6192 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6193 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6194 CSKY_ISA_VDSP),
6195 OP32 ("vstq.32",
6196 SOPCODE_INFO2 (0xf8002e00,
6197 (0_3, FREG, OPRND_SHIFT_0_BIT),
6198 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6199 (4_7or21_24, IMM_FLDST, OPRND_SHIFT_4_BIT))),
6200 CSKY_ISA_VDSP),
6201 OP32 ("vldrd.8",
6202 SOPCODE_INFO2 (0xf8003000,
6203 (0_3, FREG, OPRND_SHIFT_0_BIT),
6204 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6205 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6206 CSKY_ISA_VDSP),
6207 OP32 ("vldrd.16",
6208 SOPCODE_INFO2 (0xf8003100,
6209 (0_3, FREG, OPRND_SHIFT_0_BIT),
6210 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6211 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6212 CSKY_ISA_VDSP),
6213 OP32 ("vldrd.32",
6214 SOPCODE_INFO2 (0xf8003200,
6215 (0_3, FREG, OPRND_SHIFT_0_BIT),
6216 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6217 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6218 CSKY_ISA_VDSP),
6219 OP32 ("vldrq.8",
6220 SOPCODE_INFO2 (0xf8003400,
6221 (0_3, FREG, OPRND_SHIFT_0_BIT),
6222 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6223 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6224 CSKY_ISA_VDSP),
6225 OP32 ("vldrq.16",
6226 SOPCODE_INFO2 (0xf8003500,
6227 (0_3, FREG, OPRND_SHIFT_0_BIT),
6228 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6229 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6230 CSKY_ISA_VDSP),
6231 OP32 ("vldrq.32",
6232 SOPCODE_INFO2 (0xf8003600,
6233 (0_3, FREG, OPRND_SHIFT_0_BIT),
6234 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6235 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6236 CSKY_ISA_VDSP),
6237 OP32 ("vstrd.8",
6238 SOPCODE_INFO2 (0xf8003800,
6239 (0_3, FREG, OPRND_SHIFT_0_BIT),
6240 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6241 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6242 CSKY_ISA_VDSP),
6243 OP32 ("vstrd.16",
6244 SOPCODE_INFO2 (0xf8003900,
6245 (0_3, FREG, OPRND_SHIFT_0_BIT),
6246 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6247 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6248 CSKY_ISA_VDSP),
6249 OP32 ("vstrd.32",
6250 SOPCODE_INFO2 (0xf8003a00,
6251 (0_3, FREG, OPRND_SHIFT_0_BIT),
6252 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6253 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6254 CSKY_ISA_VDSP),
6255 OP32 ("vstrq.8",
6256 SOPCODE_INFO2 (0xf8003c00,
6257 (0_3, FREG, OPRND_SHIFT_0_BIT),
6258 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6259 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6260 CSKY_ISA_VDSP),
6261 OP32 ("vstrq.16",
6262 SOPCODE_INFO2 (0xf8003d00,
6263 (0_3, FREG, OPRND_SHIFT_0_BIT),
6264 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6265 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6266 CSKY_ISA_VDSP),
6267 OP32 ("vstrq.32",
6268 SOPCODE_INFO2 (0xf8003e00,
6269 (0_3, FREG, OPRND_SHIFT_0_BIT),
6270 BRACKET_OPRND ((16_20, AREG, OPRND_SHIFT_0_BIT),
6271 (5_6or21_25, AREG_WITH_LSHIFT_FPU, OPRND_SHIFT_0_BIT))),
6272 CSKY_ISA_VDSP),
6273 OP32 ("vmov",
6274 OPCODE_INFO2 (0xf8000c00,
6275 (0_3, VREG, OPRND_SHIFT_0_BIT),
6276 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6277 CSKY_ISA_VDSP),
6278 OP32 ("vcadd.eu8",
6279 OPCODE_INFO2 (0xf8000060,
6280 (0_3, VREG, OPRND_SHIFT_0_BIT),
6281 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6282 CSKY_ISA_VDSP),
6283 OP32 ("vcadd.eu16",
6284 OPCODE_INFO2 (0xf8100060,
6285 (0_3, VREG, OPRND_SHIFT_0_BIT),
6286 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6287 CSKY_ISA_VDSP),
6288 OP32 ("vcadd.es8",
6289 OPCODE_INFO2 (0xf8000070,
6290 (0_3, VREG, OPRND_SHIFT_0_BIT),
6291 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6292 CSKY_ISA_VDSP),
6293 OP32 ("vcadd.es16",
6294 OPCODE_INFO2 (0xf8100070,
6295 (0_3, VREG, OPRND_SHIFT_0_BIT),
6296 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6297 CSKY_ISA_VDSP),
6298 OP32 ("vmov.eu8",
6299 OPCODE_INFO2 (0xf8000c20,
6300 (0_3, VREG, OPRND_SHIFT_0_BIT),
6301 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6302 CSKY_ISA_VDSP),
6303 OP32 ("vmov.eu16",
6304 OPCODE_INFO2 (0xf8100c20,
6305 (0_3, VREG, OPRND_SHIFT_0_BIT),
6306 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6307 CSKY_ISA_VDSP),
6308 OP32 ("vmov.es8",
6309 OPCODE_INFO2 (0xf8000c30,
6310 (0_3, VREG, OPRND_SHIFT_0_BIT),
6311 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6312 CSKY_ISA_VDSP),
6313 OP32 ("vmov.es16",
6314 OPCODE_INFO2 (0xf8100c30,
6315 (0_3, VREG, OPRND_SHIFT_0_BIT),
6316 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6317 CSKY_ISA_VDSP),
6318 OP32 ("vmov.u16.l",
6319 OPCODE_INFO2 (0xf8100d00,
6320 (0_3, VREG, OPRND_SHIFT_0_BIT),
6321 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6322 CSKY_ISA_VDSP),
6323 OP32 ("vmov.u32.l",
6324 OPCODE_INFO2 (0xfa000d00,
6325 (0_3, VREG, OPRND_SHIFT_0_BIT),
6326 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6327 CSKY_ISA_VDSP),
6328 OP32 ("vmov.s16.l",
6329 OPCODE_INFO2 (0xf8100d10,
6330 (0_3, VREG, OPRND_SHIFT_0_BIT),
6331 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6332 CSKY_ISA_VDSP),
6333 OP32 ("vmov.s32.l",
6334 OPCODE_INFO2 (0xfa000d10,
6335 (0_3, VREG, OPRND_SHIFT_0_BIT),
6336 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6337 CSKY_ISA_VDSP),
6338 OP32 ("vmov.u16.sl",
6339 OPCODE_INFO2 (0xf8100d40,
6340 (0_3, VREG, OPRND_SHIFT_0_BIT),
6341 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6342 CSKY_ISA_VDSP),
6343 OP32 ("vmov.u32.sl",
6344 OPCODE_INFO2 (0xfa000d40,
6345 (0_3, VREG, OPRND_SHIFT_0_BIT),
6346 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6347 CSKY_ISA_VDSP),
6348 OP32 ("vmov.s16.sl",
6349 OPCODE_INFO2 (0xf8100d50,
6350 (0_3, VREG, OPRND_SHIFT_0_BIT),
6351 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6352 CSKY_ISA_VDSP),
6353 OP32 ("vmov.s32.sl",
6354 OPCODE_INFO2 (0xfa000d50,
6355 (0_3, VREG, OPRND_SHIFT_0_BIT),
6356 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6357 CSKY_ISA_VDSP),
6358 OP32 ("vmov.u16.h",
6359 OPCODE_INFO2 (0xf8100d60,
6360 (0_3, VREG, OPRND_SHIFT_0_BIT),
6361 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6362 CSKY_ISA_VDSP),
6363 OP32 ("vmov.u32.h",
6364 OPCODE_INFO2 (0xfa000d60,
6365 (0_3, VREG, OPRND_SHIFT_0_BIT),
6366 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6367 CSKY_ISA_VDSP),
6368 OP32 ("vmov.s16.h",
6369 OPCODE_INFO2 (0xf8100d70,
6370 (0_3, VREG, OPRND_SHIFT_0_BIT),
6371 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6372 CSKY_ISA_VDSP),
6373 OP32 ("vmov.s32.h",
6374 OPCODE_INFO2 (0xfa000d70,
6375 (0_3, VREG, OPRND_SHIFT_0_BIT),
6376 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6377 CSKY_ISA_VDSP),
6378 OP32 ("vmov.u16.rh",
6379 OPCODE_INFO2 (0xf8100d80,
6380 (0_3, VREG, OPRND_SHIFT_0_BIT),
6381 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6382 CSKY_ISA_VDSP),
6383 OP32 ("vmov.u32.rh",
6384 OPCODE_INFO2 (0xfa000d80,
6385 (0_3, VREG, OPRND_SHIFT_0_BIT),
6386 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6387 CSKY_ISA_VDSP),
6388 OP32 ("vmov.s16.rh",
6389 OPCODE_INFO2 (0xf8100d90,
6390 (0_3, VREG, OPRND_SHIFT_0_BIT),
6391 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6392 CSKY_ISA_VDSP),
6393 OP32 ("vmov.s32.rh",
6394 OPCODE_INFO2 (0xfa000d90,
6395 (0_3, VREG, OPRND_SHIFT_0_BIT),
6396 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6397 CSKY_ISA_VDSP),
6398 OP32 ("vstou.u16.sl",
6399 OPCODE_INFO2 (0xf8100dc0,
6400 (0_3, VREG, OPRND_SHIFT_0_BIT),
6401 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6402 CSKY_ISA_VDSP),
6403 OP32 ("vstou.u32.sl",
6404 OPCODE_INFO2 (0xfa000dc0,
6405 (0_3, VREG, OPRND_SHIFT_0_BIT),
6406 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6407 CSKY_ISA_VDSP),
6408 OP32 ("vstou.s16.sl",
6409 OPCODE_INFO2 (0xf8100dd0,
6410 (0_3, VREG, OPRND_SHIFT_0_BIT),
6411 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6412 CSKY_ISA_VDSP),
6413 OP32 ("vstou.s32.sl",
6414 OPCODE_INFO2 (0xfa000dd0,
6415 (0_3, VREG, OPRND_SHIFT_0_BIT),
6416 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6417 CSKY_ISA_VDSP),
6418 OP32 ("vrev.8",
6419 OPCODE_INFO2 (0xf8000e60,
6420 (0_3, VREG, OPRND_SHIFT_0_BIT),
6421 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6422 CSKY_ISA_VDSP),
6423 OP32 ("vrev.16",
6424 OPCODE_INFO2 (0xf8100e60,
6425 (0_3, VREG, OPRND_SHIFT_0_BIT),
6426 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6427 CSKY_ISA_VDSP),
6428 OP32 ("vrev.32",
6429 OPCODE_INFO2 (0xfa000e60,
6430 (0_3, VREG, OPRND_SHIFT_0_BIT),
6431 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6432 CSKY_ISA_VDSP),
6433 OP32 ("vcnt1.8",
6434 OPCODE_INFO2 (0xf8000ea0,
6435 (0_3, VREG, OPRND_SHIFT_0_BIT),
6436 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6437 CSKY_ISA_VDSP),
6438 OP32 ("vclz.8",
6439 OPCODE_INFO2 (0xf8000ec0,
6440 (0_3, VREG, OPRND_SHIFT_0_BIT),
6441 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6442 CSKY_ISA_VDSP),
6443 OP32 ("vclz.16",
6444 OPCODE_INFO2 (0xf8100ec0,
6445 (0_3, VREG, OPRND_SHIFT_0_BIT),
6446 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6447 CSKY_ISA_VDSP),
6448 OP32 ("vclz.32",
6449 OPCODE_INFO2 (0xfa000ec0,
6450 (0_3, VREG, OPRND_SHIFT_0_BIT),
6451 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6452 CSKY_ISA_VDSP),
6453 OP32 ("vcls.u8",
6454 OPCODE_INFO2 (0xf8000ee0,
6455 (0_3, VREG, OPRND_SHIFT_0_BIT),
6456 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6457 CSKY_ISA_VDSP),
6458 OP32 ("vcls.u16",
6459 OPCODE_INFO2 (0xf8100ee0,
6460 (0_3, VREG, OPRND_SHIFT_0_BIT),
6461 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6462 CSKY_ISA_VDSP),
6463 OP32 ("vcls.u32",
6464 OPCODE_INFO2 (0xfa000ee0,
6465 (0_3, VREG, OPRND_SHIFT_0_BIT),
6466 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6467 CSKY_ISA_VDSP),
6468 OP32 ("vcls.s8",
6469 OPCODE_INFO2 (0xf8000ef0,
6470 (0_3, VREG, OPRND_SHIFT_0_BIT),
6471 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6472 CSKY_ISA_VDSP),
6473 OP32 ("vcls.s16",
6474 OPCODE_INFO2 (0xf8100ef0,
6475 (0_3, VREG, OPRND_SHIFT_0_BIT),
6476 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6477 CSKY_ISA_VDSP),
6478 OP32 ("vcls.s32",
6479 OPCODE_INFO2 (0xfa000ef0,
6480 (0_3, VREG, OPRND_SHIFT_0_BIT),
6481 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6482 CSKY_ISA_VDSP),
6483 OP32 ("vabs.s8",
6484 OPCODE_INFO2 (0xf8001010,
6485 (0_3, VREG, OPRND_SHIFT_0_BIT),
6486 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6487 CSKY_ISA_VDSP),
6488 OP32 ("vabs.s16",
6489 OPCODE_INFO2 (0xf8101010,
6490 (0_3, VREG, OPRND_SHIFT_0_BIT),
6491 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6492 CSKY_ISA_VDSP),
6493 OP32 ("vabs.s32",
6494 OPCODE_INFO2 (0xfa001010,
6495 (0_3, VREG, OPRND_SHIFT_0_BIT),
6496 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6497 CSKY_ISA_VDSP),
6498 OP32 ("vabs.u8.s",
6499 OPCODE_INFO2 (0xf8001040,
6500 (0_3, VREG, OPRND_SHIFT_0_BIT),
6501 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6502 CSKY_ISA_VDSP),
6503 OP32 ("vabs.u16.s",
6504 OPCODE_INFO2 (0xf8101040,
6505 (0_3, VREG, OPRND_SHIFT_0_BIT),
6506 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6507 CSKY_ISA_VDSP),
6508 OP32 ("vabs.u32.s",
6509 OPCODE_INFO2 (0xfa001040,
6510 (0_3, VREG, OPRND_SHIFT_0_BIT),
6511 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6512 CSKY_ISA_VDSP),
6513 OP32 ("vabs.s8.s",
6514 OPCODE_INFO2 (0xf8001050,
6515 (0_3, VREG, OPRND_SHIFT_0_BIT),
6516 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6517 CSKY_ISA_VDSP),
6518 OP32 ("vabs.s16.s",
6519 OPCODE_INFO2 (0xf8101050,
6520 (0_3, VREG, OPRND_SHIFT_0_BIT),
6521 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6522 CSKY_ISA_VDSP),
6523 OP32 ("vabs.s32.s",
6524 OPCODE_INFO2 (0xfa001050,
6525 (0_3, VREG, OPRND_SHIFT_0_BIT),
6526 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6527 CSKY_ISA_VDSP),
6528 OP32 ("vneg.u8",
6529 OPCODE_INFO2 (0xf8001080,
6530 (0_3, VREG, OPRND_SHIFT_0_BIT),
6531 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6532 CSKY_ISA_VDSP),
6533 OP32 ("vneg.u16",
6534 OPCODE_INFO2 (0xf8101080,
6535 (0_3, VREG, OPRND_SHIFT_0_BIT),
6536 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6537 CSKY_ISA_VDSP),
6538 OP32 ("vneg.u32",
6539 OPCODE_INFO2 (0xfa001080,
6540 (0_3, VREG, OPRND_SHIFT_0_BIT),
6541 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6542 CSKY_ISA_VDSP),
6543 OP32 ("vneg.s8",
6544 OPCODE_INFO2 (0xf8001090,
6545 (0_3, VREG, OPRND_SHIFT_0_BIT),
6546 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6547 CSKY_ISA_VDSP),
6548 OP32 ("vneg.s16",
6549 OPCODE_INFO2 (0xf8101090,
6550 (0_3, VREG, OPRND_SHIFT_0_BIT),
6551 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6552 CSKY_ISA_VDSP),
6553 OP32 ("vneg.s32",
6554 OPCODE_INFO2 (0xfa001090,
6555 (0_3, VREG, OPRND_SHIFT_0_BIT),
6556 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6557 CSKY_ISA_VDSP),
6558 OP32 ("vneg.u8.s",
6559 OPCODE_INFO2 (0xf80010c0,
6560 (0_3, VREG, OPRND_SHIFT_0_BIT),
6561 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6562 CSKY_ISA_VDSP),
6563 OP32 ("vneg.u16.s",
6564 OPCODE_INFO2 (0xf81010c0,
6565 (0_3, VREG, OPRND_SHIFT_0_BIT),
6566 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6567 CSKY_ISA_VDSP),
6568 OP32 ("vneg.u32.s",
6569 OPCODE_INFO2 (0xfa0010c0,
6570 (0_3, VREG, OPRND_SHIFT_0_BIT),
6571 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6572 CSKY_ISA_VDSP),
6573 OP32 ("vneg.s8.s",
6574 OPCODE_INFO2 (0xf80010d0,
6575 (0_3, VREG, OPRND_SHIFT_0_BIT),
6576 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6577 CSKY_ISA_VDSP),
6578 OP32 ("vneg.s16.s",
6579 OPCODE_INFO2 (0xf81010d0,
6580 (0_3, VREG, OPRND_SHIFT_0_BIT),
6581 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6582 CSKY_ISA_VDSP),
6583 OP32 ("vneg.s32.s",
6584 OPCODE_INFO2 (0xfa0010d0,
6585 (0_3, VREG, OPRND_SHIFT_0_BIT),
6586 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6587 CSKY_ISA_VDSP),
6588 OP32 ("vcmphsz.u8",
6589 OPCODE_INFO2 (0xf8000880,
6590 (0_3, VREG, OPRND_SHIFT_0_BIT),
6591 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6592 CSKY_ISA_VDSP),
6593 OP32 ("vcmphsz.u16",
6594 OPCODE_INFO2 (0xf8100880,
6595 (0_3, VREG, OPRND_SHIFT_0_BIT),
6596 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6597 CSKY_ISA_VDSP),
6598 OP32 ("vcmphsz.u32",
6599 OPCODE_INFO2 (0xfa000880,
6600 (0_3, VREG, OPRND_SHIFT_0_BIT),
6601 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6602 CSKY_ISA_VDSP),
6603 OP32 ("vcmphsz.s8",
6604 OPCODE_INFO2 (0xf8000890,
6605 (0_3, VREG, OPRND_SHIFT_0_BIT),
6606 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6607 CSKY_ISA_VDSP),
6608 OP32 ("vcmphsz.s16",
6609 OPCODE_INFO2 (0xf8100890,
6610 (0_3, VREG, OPRND_SHIFT_0_BIT),
6611 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6612 CSKY_ISA_VDSP),
6613 OP32 ("vcmphsz.s32",
6614 OPCODE_INFO2 (0xfa000890,
6615 (0_3, VREG, OPRND_SHIFT_0_BIT),
6616 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6617 CSKY_ISA_VDSP),
6618 OP32 ("vcmpltz.u8",
6619 OPCODE_INFO2 (0xf80008a0,
6620 (0_3, VREG, OPRND_SHIFT_0_BIT),
6621 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6622 CSKY_ISA_VDSP),
6623 OP32 ("vcmpltz.u16",
6624 OPCODE_INFO2 (0xf81008a0,
6625 (0_3, VREG, OPRND_SHIFT_0_BIT),
6626 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6627 CSKY_ISA_VDSP),
6628 OP32 ("vcmpltz.u32",
6629 OPCODE_INFO2 (0xfa0008a0,
6630 (0_3, VREG, OPRND_SHIFT_0_BIT),
6631 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6632 CSKY_ISA_VDSP),
6633 OP32 ("vcmpltz.s8",
6634 OPCODE_INFO2 (0xf80008b0,
6635 (0_3, VREG, OPRND_SHIFT_0_BIT),
6636 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6637 CSKY_ISA_VDSP),
6638 OP32 ("vcmpltz.s16",
6639 OPCODE_INFO2 (0xf81008b0,
6640 (0_3, VREG, OPRND_SHIFT_0_BIT),
6641 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6642 CSKY_ISA_VDSP),
6643 OP32 ("vcmpltz.s32",
6644 OPCODE_INFO2 (0xfa0008b0,
6645 (0_3, VREG, OPRND_SHIFT_0_BIT),
6646 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6647 CSKY_ISA_VDSP),
6648 OP32 ("vcmpnez.u8",
6649 OPCODE_INFO2 (0xf80008c0,
6650 (0_3, VREG, OPRND_SHIFT_0_BIT),
6651 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6652 CSKY_ISA_VDSP),
6653 OP32 ("vcmpnez.u16",
6654 OPCODE_INFO2 (0xf81008c0,
6655 (0_3, VREG, OPRND_SHIFT_0_BIT),
6656 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6657 CSKY_ISA_VDSP),
6658 OP32 ("vcmpnez.u32",
6659 OPCODE_INFO2 (0xfa0008c0,
6660 (0_3, VREG, OPRND_SHIFT_0_BIT),
6661 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6662 CSKY_ISA_VDSP),
6663 OP32 ("vcmpnez.s8",
6664 OPCODE_INFO2 (0xf80008d0,
6665 (0_3, VREG, OPRND_SHIFT_0_BIT),
6666 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6667 CSKY_ISA_VDSP),
6668 OP32 ("vcmpnez.s16",
6669 OPCODE_INFO2 (0xf81008d0,
6670 (0_3, VREG, OPRND_SHIFT_0_BIT),
6671 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6672 CSKY_ISA_VDSP),
6673 OP32 ("vcmpnez.s32",
6674 OPCODE_INFO2 (0xfa0008d0,
6675 (0_3, VREG, OPRND_SHIFT_0_BIT),
6676 (16_19, VREG, OPRND_SHIFT_0_BIT)),
6677 CSKY_ISA_VDSP),
6678 OP32 ("vtrch.8",
6679 OPCODE_INFO3 (0xf8000f40,
6680 (0_3, VREG, OPRND_SHIFT_0_BIT),
6681 (16_19, VREG, OPRND_SHIFT_0_BIT),
6682 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6683 CSKY_ISA_VDSP),
6684 OP32 ("vtrch.16",
6685 OPCODE_INFO3 (0xf8100f40,
6686 (0_3, VREG, OPRND_SHIFT_0_BIT),
6687 (16_19, VREG, OPRND_SHIFT_0_BIT),
6688 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6689 CSKY_ISA_VDSP),
6690 OP32 ("vtrch.32",
6691 OPCODE_INFO3 (0xfa000f40,
6692 (0_3, VREG, OPRND_SHIFT_0_BIT),
6693 (16_19, VREG, OPRND_SHIFT_0_BIT),
6694 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6695 CSKY_ISA_VDSP),
6696 OP32 ("vtrcl.8",
6697 OPCODE_INFO3 (0xf8000f60,
6698 (0_3, VREG, OPRND_SHIFT_0_BIT),
6699 (16_19, VREG, OPRND_SHIFT_0_BIT),
6700 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6701 CSKY_ISA_VDSP),
6702 OP32 ("vtrcl.16",
6703 OPCODE_INFO3 (0xf8100f60,
6704 (0_3, VREG, OPRND_SHIFT_0_BIT),
6705 (16_19, VREG, OPRND_SHIFT_0_BIT),
6706 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6707 CSKY_ISA_VDSP),
6708 OP32 ("vtrcl.32",
6709 OPCODE_INFO3 (0xfa000f60,
6710 (0_3, VREG, OPRND_SHIFT_0_BIT),
6711 (16_19, VREG, OPRND_SHIFT_0_BIT),
6712 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6713 CSKY_ISA_VDSP),
6714 OP32 ("vadd.u8",
6715 OPCODE_INFO3 (0xf8000000,
6716 (0_3, VREG, OPRND_SHIFT_0_BIT),
6717 (16_19, VREG, OPRND_SHIFT_0_BIT),
6718 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6719 CSKY_ISA_VDSP),
6720 OP32 ("vadd.u16",
6721 OPCODE_INFO3 (0xf8100000,
6722 (0_3, VREG, OPRND_SHIFT_0_BIT),
6723 (16_19, VREG, OPRND_SHIFT_0_BIT),
6724 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6725 CSKY_ISA_VDSP),
6726 OP32 ("vadd.u32",
6727 OPCODE_INFO3 (0xfa000000,
6728 (0_3, VREG, OPRND_SHIFT_0_BIT),
6729 (16_19, VREG, OPRND_SHIFT_0_BIT),
6730 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6731 CSKY_ISA_VDSP),
6732 OP32 ("vadd.s8",
6733 OPCODE_INFO3 (0xf8000010,
6734 (0_3, VREG, OPRND_SHIFT_0_BIT),
6735 (16_19, VREG, OPRND_SHIFT_0_BIT),
6736 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6737 CSKY_ISA_VDSP),
6738 OP32 ("vadd.s16",
6739 OPCODE_INFO3 (0xf8100010,
6740 (0_3, VREG, OPRND_SHIFT_0_BIT),
6741 (16_19, VREG, OPRND_SHIFT_0_BIT),
6742 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6743 CSKY_ISA_VDSP),
6744 OP32 ("vadd.s32",
6745 OPCODE_INFO3 (0xfa000010,
6746 (0_3, VREG, OPRND_SHIFT_0_BIT),
6747 (16_19, VREG, OPRND_SHIFT_0_BIT),
6748 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6749 CSKY_ISA_VDSP),
6750 OP32 ("vadd.eu8",
6751 OPCODE_INFO3 (0xf8000020,
6752 (0_3, VREG, OPRND_SHIFT_0_BIT),
6753 (16_19, VREG, OPRND_SHIFT_0_BIT),
6754 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6755 CSKY_ISA_VDSP),
6756 OP32 ("vadd.eu16",
6757 OPCODE_INFO3 (0xf8100020,
6758 (0_3, VREG, OPRND_SHIFT_0_BIT),
6759 (16_19, VREG, OPRND_SHIFT_0_BIT),
6760 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6761 CSKY_ISA_VDSP),
6762 OP32 ("vadd.es8",
6763 OPCODE_INFO3 (0xf8000030,
6764 (0_3, VREG, OPRND_SHIFT_0_BIT),
6765 (16_19, VREG, OPRND_SHIFT_0_BIT),
6766 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6767 CSKY_ISA_VDSP),
6768 OP32 ("vadd.es16",
6769 OPCODE_INFO3 (0xf8100030,
6770 (0_3, VREG, OPRND_SHIFT_0_BIT),
6771 (16_19, VREG, OPRND_SHIFT_0_BIT),
6772 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6773 CSKY_ISA_VDSP),
6774 OP32 ("vcadd.u8",
6775 OPCODE_INFO3 (0xf8000040,
6776 (0_3, VREG, OPRND_SHIFT_0_BIT),
6777 (16_19, VREG, OPRND_SHIFT_0_BIT),
6778 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6779 CSKY_ISA_VDSP),
6780 OP32 ("vcadd.u16",
6781 OPCODE_INFO3 (0xf8100040,
6782 (0_3, VREG, OPRND_SHIFT_0_BIT),
6783 (16_19, VREG, OPRND_SHIFT_0_BIT),
6784 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6785 CSKY_ISA_VDSP),
6786 OP32 ("vcadd.u32",
6787 OPCODE_INFO3 (0xfa000040,
6788 (0_3, VREG, OPRND_SHIFT_0_BIT),
6789 (16_19, VREG, OPRND_SHIFT_0_BIT),
6790 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6791 CSKY_ISA_VDSP),
6792 OP32 ("vcadd.s8",
6793 OPCODE_INFO3 (0xf8000050,
6794 (0_3, VREG, OPRND_SHIFT_0_BIT),
6795 (16_19, VREG, OPRND_SHIFT_0_BIT),
6796 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6797 CSKY_ISA_VDSP),
6798 OP32 ("vcadd.s16",
6799 OPCODE_INFO3 (0xf8100050,
6800 (0_3, VREG, OPRND_SHIFT_0_BIT),
6801 (16_19, VREG, OPRND_SHIFT_0_BIT),
6802 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6803 CSKY_ISA_VDSP),
6804 OP32 ("vcadd.s32",
6805 OPCODE_INFO3 (0xfa000050,
6806 (0_3, VREG, OPRND_SHIFT_0_BIT),
6807 (16_19, VREG, OPRND_SHIFT_0_BIT),
6808 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6809 CSKY_ISA_VDSP),
6810 OP32 ("vadd.xu16.sl",
6811 OPCODE_INFO3 (0xf8100140,
6812 (0_3, VREG, OPRND_SHIFT_0_BIT),
6813 (16_19, VREG, OPRND_SHIFT_0_BIT),
6814 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6815 CSKY_ISA_VDSP),
6816 OP32 ("vadd.xu32.sl",
6817 OPCODE_INFO3 (0xfa000140,
6818 (0_3, VREG, OPRND_SHIFT_0_BIT),
6819 (16_19, VREG, OPRND_SHIFT_0_BIT),
6820 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6821 CSKY_ISA_VDSP),
6822 OP32 ("vadd.xs16.sl",
6823 OPCODE_INFO3 (0xf8100150,
6824 (0_3, VREG, OPRND_SHIFT_0_BIT),
6825 (16_19, VREG, OPRND_SHIFT_0_BIT),
6826 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6827 CSKY_ISA_VDSP),
6828 OP32 ("vadd.xs32.sl",
6829 OPCODE_INFO3 (0xfa000150,
6830 (0_3, VREG, OPRND_SHIFT_0_BIT),
6831 (16_19, VREG, OPRND_SHIFT_0_BIT),
6832 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6833 CSKY_ISA_VDSP),
6834 OP32 ("vadd.xu16",
6835 OPCODE_INFO3 (0xf8100160,
6836 (0_3, VREG, OPRND_SHIFT_0_BIT),
6837 (16_19, VREG, OPRND_SHIFT_0_BIT),
6838 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6839 CSKY_ISA_VDSP),
6840 OP32 ("vadd.xu32",
6841 OPCODE_INFO3 (0xfa000160,
6842 (0_3, VREG, OPRND_SHIFT_0_BIT),
6843 (16_19, VREG, OPRND_SHIFT_0_BIT),
6844 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6845 CSKY_ISA_VDSP),
6846 OP32 ("vadd.xs16",
6847 OPCODE_INFO3 (0xf8100170,
6848 (0_3, VREG, OPRND_SHIFT_0_BIT),
6849 (16_19, VREG, OPRND_SHIFT_0_BIT),
6850 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6851 CSKY_ISA_VDSP),
6852 OP32 ("vadd.xs32",
6853 OPCODE_INFO3 (0xfa000170,
6854 (0_3, VREG, OPRND_SHIFT_0_BIT),
6855 (16_19, VREG, OPRND_SHIFT_0_BIT),
6856 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6857 CSKY_ISA_VDSP),
6858 OP32 ("vaddh.u8",
6859 OPCODE_INFO3 (0xf8000180,
6860 (0_3, VREG, OPRND_SHIFT_0_BIT),
6861 (16_19, VREG, OPRND_SHIFT_0_BIT),
6862 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6863 CSKY_ISA_VDSP),
6864 OP32 ("vaddh.u16",
6865 OPCODE_INFO3 (0xf8100180,
6866 (0_3, VREG, OPRND_SHIFT_0_BIT),
6867 (16_19, VREG, OPRND_SHIFT_0_BIT),
6868 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6869 CSKY_ISA_VDSP),
6870 OP32 ("vaddh.u32",
6871 OPCODE_INFO3 (0xfa000180,
6872 (0_3, VREG, OPRND_SHIFT_0_BIT),
6873 (16_19, VREG, OPRND_SHIFT_0_BIT),
6874 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6875 CSKY_ISA_VDSP),
6876 OP32 ("vaddh.s8",
6877 OPCODE_INFO3 (0xf8000190,
6878 (0_3, VREG, OPRND_SHIFT_0_BIT),
6879 (16_19, VREG, OPRND_SHIFT_0_BIT),
6880 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6881 CSKY_ISA_VDSP),
6882 OP32 ("vaddh.s16",
6883 OPCODE_INFO3 (0xf8100190,
6884 (0_3, VREG, OPRND_SHIFT_0_BIT),
6885 (16_19, VREG, OPRND_SHIFT_0_BIT),
6886 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6887 CSKY_ISA_VDSP),
6888 OP32 ("vaddh.s32",
6889 OPCODE_INFO3 (0xfa000190,
6890 (0_3, VREG, OPRND_SHIFT_0_BIT),
6891 (16_19, VREG, OPRND_SHIFT_0_BIT),
6892 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6893 CSKY_ISA_VDSP),
6894 OP32 ("vaddh.u8.r",
6895 OPCODE_INFO3 (0xf80001a0,
6896 (0_3, VREG, OPRND_SHIFT_0_BIT),
6897 (16_19, VREG, OPRND_SHIFT_0_BIT),
6898 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6899 CSKY_ISA_VDSP),
6900 OP32 ("vaddh.u16.r",
6901 OPCODE_INFO3 (0xf81001a0,
6902 (0_3, VREG, OPRND_SHIFT_0_BIT),
6903 (16_19, VREG, OPRND_SHIFT_0_BIT),
6904 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6905 CSKY_ISA_VDSP),
6906 OP32 ("vaddh.u32.r",
6907 OPCODE_INFO3 (0xfa0001a0,
6908 (0_3, VREG, OPRND_SHIFT_0_BIT),
6909 (16_19, VREG, OPRND_SHIFT_0_BIT),
6910 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6911 CSKY_ISA_VDSP),
6912 OP32 ("vaddh.s8.r",
6913 OPCODE_INFO3 (0xf80001b0,
6914 (0_3, VREG, OPRND_SHIFT_0_BIT),
6915 (16_19, VREG, OPRND_SHIFT_0_BIT),
6916 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6917 CSKY_ISA_VDSP),
6918 OP32 ("vaddh.s16.r",
6919 OPCODE_INFO3 (0xf81001b0,
6920 (0_3, VREG, OPRND_SHIFT_0_BIT),
6921 (16_19, VREG, OPRND_SHIFT_0_BIT),
6922 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6923 CSKY_ISA_VDSP),
6924 OP32 ("vaddh.s32.r",
6925 OPCODE_INFO3 (0xfa0001b0,
6926 (0_3, VREG, OPRND_SHIFT_0_BIT),
6927 (16_19, VREG, OPRND_SHIFT_0_BIT),
6928 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6929 CSKY_ISA_VDSP),
6930 OP32 ("vadd.u8.s",
6931 OPCODE_INFO3 (0xf80001c0,
6932 (0_3, VREG, OPRND_SHIFT_0_BIT),
6933 (16_19, VREG, OPRND_SHIFT_0_BIT),
6934 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6935 CSKY_ISA_VDSP),
6936 OP32 ("vadd.u16.s",
6937 OPCODE_INFO3 (0xf81001c0,
6938 (0_3, VREG, OPRND_SHIFT_0_BIT),
6939 (16_19, VREG, OPRND_SHIFT_0_BIT),
6940 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6941 CSKY_ISA_VDSP),
6942 OP32 ("vadd.u32.s",
6943 OPCODE_INFO3 (0xfa0001c0,
6944 (0_3, VREG, OPRND_SHIFT_0_BIT),
6945 (16_19, VREG, OPRND_SHIFT_0_BIT),
6946 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6947 CSKY_ISA_VDSP),
6948 OP32 ("vadd.s8.s",
6949 OPCODE_INFO3 (0xf80001d0,
6950 (0_3, VREG, OPRND_SHIFT_0_BIT),
6951 (16_19, VREG, OPRND_SHIFT_0_BIT),
6952 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6953 CSKY_ISA_VDSP),
6954 OP32 ("vadd.s16.s",
6955 OPCODE_INFO3 (0xf81001d0,
6956 (0_3, VREG, OPRND_SHIFT_0_BIT),
6957 (16_19, VREG, OPRND_SHIFT_0_BIT),
6958 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6959 CSKY_ISA_VDSP),
6960 OP32 ("vadd.s32.s",
6961 OPCODE_INFO3 (0xfa0001d0,
6962 (0_3, VREG, OPRND_SHIFT_0_BIT),
6963 (16_19, VREG, OPRND_SHIFT_0_BIT),
6964 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6965 CSKY_ISA_VDSP),
6966 OP32 ("vsub.u8",
6967 OPCODE_INFO3 (0xf8000200,
6968 (0_3, VREG, OPRND_SHIFT_0_BIT),
6969 (16_19, VREG, OPRND_SHIFT_0_BIT),
6970 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6971 CSKY_ISA_VDSP),
6972 OP32 ("vsub.u16",
6973 OPCODE_INFO3 (0xf8100200,
6974 (0_3, VREG, OPRND_SHIFT_0_BIT),
6975 (16_19, VREG, OPRND_SHIFT_0_BIT),
6976 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6977 CSKY_ISA_VDSP),
6978 OP32 ("vsub.u32",
6979 OPCODE_INFO3 (0xfa000200,
6980 (0_3, VREG, OPRND_SHIFT_0_BIT),
6981 (16_19, VREG, OPRND_SHIFT_0_BIT),
6982 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6983 CSKY_ISA_VDSP),
6984 OP32 ("vsub.s8",
6985 OPCODE_INFO3 (0xf8000210,
6986 (0_3, VREG, OPRND_SHIFT_0_BIT),
6987 (16_19, VREG, OPRND_SHIFT_0_BIT),
6988 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6989 CSKY_ISA_VDSP),
6990 OP32 ("vsub.s16",
6991 OPCODE_INFO3 (0xf8100210,
6992 (0_3, VREG, OPRND_SHIFT_0_BIT),
6993 (16_19, VREG, OPRND_SHIFT_0_BIT),
6994 (21_24, VREG, OPRND_SHIFT_0_BIT)),
6995 CSKY_ISA_VDSP),
6996 OP32 ("vsub.s32",
6997 OPCODE_INFO3 (0xfa000210,
6998 (0_3, VREG, OPRND_SHIFT_0_BIT),
6999 (16_19, VREG, OPRND_SHIFT_0_BIT),
7000 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7001 CSKY_ISA_VDSP),
7002 OP32 ("vsub.eu8",
7003 OPCODE_INFO3 (0xf8000220,
7004 (0_3, VREG, OPRND_SHIFT_0_BIT),
7005 (16_19, VREG, OPRND_SHIFT_0_BIT),
7006 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7007 CSKY_ISA_VDSP),
7008 OP32 ("vsub.eu16",
7009 OPCODE_INFO3 (0xf8100220,
7010 (0_3, VREG, OPRND_SHIFT_0_BIT),
7011 (16_19, VREG, OPRND_SHIFT_0_BIT),
7012 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7013 CSKY_ISA_VDSP),
7014 OP32 ("vsub.eu32",
7015 OPCODE_INFO3 (0xfa000220,
7016 (0_3, VREG, OPRND_SHIFT_0_BIT),
7017 (16_19, VREG, OPRND_SHIFT_0_BIT),
7018 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7019 CSKY_ISA_VDSP),
7020 OP32 ("vsub.es8",
7021 OPCODE_INFO3 (0xf8000230,
7022 (0_3, VREG, OPRND_SHIFT_0_BIT),
7023 (16_19, VREG, OPRND_SHIFT_0_BIT),
7024 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7025 CSKY_ISA_VDSP),
7026 OP32 ("vsub.es16",
7027 OPCODE_INFO3 (0xf8100230,
7028 (0_3, VREG, OPRND_SHIFT_0_BIT),
7029 (16_19, VREG, OPRND_SHIFT_0_BIT),
7030 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7031 CSKY_ISA_VDSP),
7032 OP32 ("vsub.es32",
7033 OPCODE_INFO3 (0xfa000230,
7034 (0_3, VREG, OPRND_SHIFT_0_BIT),
7035 (16_19, VREG, OPRND_SHIFT_0_BIT),
7036 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7037 CSKY_ISA_VDSP),
7038 OP32 ("vsabs.u8",
7039 OPCODE_INFO3 (0xf8000240,
7040 (0_3, VREG, OPRND_SHIFT_0_BIT),
7041 (16_19, VREG, OPRND_SHIFT_0_BIT),
7042 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7043 CSKY_ISA_VDSP),
7044 OP32 ("vsabs.u16",
7045 OPCODE_INFO3 (0xf8100240,
7046 (0_3, VREG, OPRND_SHIFT_0_BIT),
7047 (16_19, VREG, OPRND_SHIFT_0_BIT),
7048 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7049 CSKY_ISA_VDSP),
7050 OP32 ("vsabs.u32",
7051 OPCODE_INFO3 (0xfa000240,
7052 (0_3, VREG, OPRND_SHIFT_0_BIT),
7053 (16_19, VREG, OPRND_SHIFT_0_BIT),
7054 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7055 CSKY_ISA_VDSP),
7056 OP32 ("vsabs.s8",
7057 OPCODE_INFO3 (0xf8000250,
7058 (0_3, VREG, OPRND_SHIFT_0_BIT),
7059 (16_19, VREG, OPRND_SHIFT_0_BIT),
7060 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7061 CSKY_ISA_VDSP),
7062 OP32 ("vsabs.s16",
7063 OPCODE_INFO3 (0xf8100250,
7064 (0_3, VREG, OPRND_SHIFT_0_BIT),
7065 (16_19, VREG, OPRND_SHIFT_0_BIT),
7066 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7067 CSKY_ISA_VDSP),
7068 OP32 ("vsabs.s32",
7069 OPCODE_INFO3 (0xfa000250,
7070 (0_3, VREG, OPRND_SHIFT_0_BIT),
7071 (16_19, VREG, OPRND_SHIFT_0_BIT),
7072 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7073 CSKY_ISA_VDSP),
7074 OP32 ("vsabs.eu8",
7075 OPCODE_INFO3 (0xf8000260,
7076 (0_3, VREG, OPRND_SHIFT_0_BIT),
7077 (16_19, VREG, OPRND_SHIFT_0_BIT),
7078 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7079 CSKY_ISA_VDSP),
7080 OP32 ("vsabs.eu16",
7081 OPCODE_INFO3 (0xf8100260,
7082 (0_3, VREG, OPRND_SHIFT_0_BIT),
7083 (16_19, VREG, OPRND_SHIFT_0_BIT),
7084 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7085 CSKY_ISA_VDSP),
7086 OP32 ("vsabs.es8",
7087 OPCODE_INFO3 (0xf8000270,
7088 (0_3, VREG, OPRND_SHIFT_0_BIT),
7089 (16_19, VREG, OPRND_SHIFT_0_BIT),
7090 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7091 CSKY_ISA_VDSP),
7092 OP32 ("vsabs.es16",
7093 OPCODE_INFO3 (0xf8100270,
7094 (0_3, VREG, OPRND_SHIFT_0_BIT),
7095 (16_19, VREG, OPRND_SHIFT_0_BIT),
7096 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7097 CSKY_ISA_VDSP),
7098 OP32 ("vsabsa.u8",
7099 OPCODE_INFO3 (0xf8000280,
7100 (0_3, VREG, OPRND_SHIFT_0_BIT),
7101 (16_19, VREG, OPRND_SHIFT_0_BIT),
7102 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7103 CSKY_ISA_VDSP),
7104 OP32 ("vsabsa.u16",
7105 OPCODE_INFO3 (0xf8100280,
7106 (0_3, VREG, OPRND_SHIFT_0_BIT),
7107 (16_19, VREG, OPRND_SHIFT_0_BIT),
7108 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7109 CSKY_ISA_VDSP),
7110 OP32 ("vsabsa.u32",
7111 OPCODE_INFO3 (0xfa000280,
7112 (0_3, VREG, OPRND_SHIFT_0_BIT),
7113 (16_19, VREG, OPRND_SHIFT_0_BIT),
7114 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7115 CSKY_ISA_VDSP),
7116 OP32 ("vsabsa.s8",
7117 OPCODE_INFO3 (0xf8000290,
7118 (0_3, VREG, OPRND_SHIFT_0_BIT),
7119 (16_19, VREG, OPRND_SHIFT_0_BIT),
7120 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7121 CSKY_ISA_VDSP),
7122 OP32 ("vsabsa.s16",
7123 OPCODE_INFO3 (0xf8100290,
7124 (0_3, VREG, OPRND_SHIFT_0_BIT),
7125 (16_19, VREG, OPRND_SHIFT_0_BIT),
7126 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7127 CSKY_ISA_VDSP),
7128 OP32 ("vsabsa.s32",
7129 OPCODE_INFO3 (0xfa000290,
7130 (0_3, VREG, OPRND_SHIFT_0_BIT),
7131 (16_19, VREG, OPRND_SHIFT_0_BIT),
7132 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7133 CSKY_ISA_VDSP),
7134 OP32 ("vsabsa.eu8",
7135 OPCODE_INFO3 (0xf80002a0,
7136 (0_3, VREG, OPRND_SHIFT_0_BIT),
7137 (16_19, VREG, OPRND_SHIFT_0_BIT),
7138 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7139 CSKY_ISA_VDSP),
7140 OP32 ("vsabsa.eu16",
7141 OPCODE_INFO3 (0xf81002a0,
7142 (0_3, VREG, OPRND_SHIFT_0_BIT),
7143 (16_19, VREG, OPRND_SHIFT_0_BIT),
7144 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7145 CSKY_ISA_VDSP),
7146 OP32 ("vsabsa.es8",
7147 OPCODE_INFO3 (0xf80002b0,
7148 (0_3, VREG, OPRND_SHIFT_0_BIT),
7149 (16_19, VREG, OPRND_SHIFT_0_BIT),
7150 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7151 CSKY_ISA_VDSP),
7152 OP32 ("vsabsa.es16",
7153 OPCODE_INFO3 (0xf81002b0,
7154 (0_3, VREG, OPRND_SHIFT_0_BIT),
7155 (16_19, VREG, OPRND_SHIFT_0_BIT),
7156 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7157 CSKY_ISA_VDSP),
7158 OP32 ("vsub.xu16",
7159 OPCODE_INFO3 (0xf8100360,
7160 (0_3, VREG, OPRND_SHIFT_0_BIT),
7161 (16_19, VREG, OPRND_SHIFT_0_BIT),
7162 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7163 CSKY_ISA_VDSP),
7164 OP32 ("vsub.xu32",
7165 OPCODE_INFO3 (0xfa000360,
7166 (0_3, VREG, OPRND_SHIFT_0_BIT),
7167 (16_19, VREG, OPRND_SHIFT_0_BIT),
7168 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7169 CSKY_ISA_VDSP),
7170 OP32 ("vsub.xs16",
7171 OPCODE_INFO3 (0xf8100370,
7172 (0_3, VREG, OPRND_SHIFT_0_BIT),
7173 (16_19, VREG, OPRND_SHIFT_0_BIT),
7174 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7175 CSKY_ISA_VDSP),
7176 OP32 ("vsub.xs32",
7177 OPCODE_INFO3 (0xfa000370,
7178 (0_3, VREG, OPRND_SHIFT_0_BIT),
7179 (16_19, VREG, OPRND_SHIFT_0_BIT),
7180 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7181 CSKY_ISA_VDSP),
7182 OP32 ("vsubh.u8",
7183 OPCODE_INFO3 (0xf8000380,
7184 (0_3, VREG, OPRND_SHIFT_0_BIT),
7185 (16_19, VREG, OPRND_SHIFT_0_BIT),
7186 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7187 CSKY_ISA_VDSP),
7188 OP32 ("vsubh.u16",
7189 OPCODE_INFO3 (0xf8100380,
7190 (0_3, VREG, OPRND_SHIFT_0_BIT),
7191 (16_19, VREG, OPRND_SHIFT_0_BIT),
7192 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7193 CSKY_ISA_VDSP),
7194 OP32 ("vsubh.u32",
7195 OPCODE_INFO3 (0xfa000380,
7196 (0_3, VREG, OPRND_SHIFT_0_BIT),
7197 (16_19, VREG, OPRND_SHIFT_0_BIT),
7198 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7199 CSKY_ISA_VDSP),
7200 OP32 ("vsubh.s8",
7201 OPCODE_INFO3 (0xf8000390,
7202 (0_3, VREG, OPRND_SHIFT_0_BIT),
7203 (16_19, VREG, OPRND_SHIFT_0_BIT),
7204 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7205 CSKY_ISA_VDSP),
7206 OP32 ("vsubh.s16",
7207 OPCODE_INFO3 (0xf8100390,
7208 (0_3, VREG, OPRND_SHIFT_0_BIT),
7209 (16_19, VREG, OPRND_SHIFT_0_BIT),
7210 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7211 CSKY_ISA_VDSP),
7212 OP32 ("vsubh.s32",
7213 OPCODE_INFO3 (0xfa000390,
7214 (0_3, VREG, OPRND_SHIFT_0_BIT),
7215 (16_19, VREG, OPRND_SHIFT_0_BIT),
7216 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7217 CSKY_ISA_VDSP),
7218 OP32 ("vsubh.u8.r",
7219 OPCODE_INFO3 (0xf80003a0,
7220 (0_3, VREG, OPRND_SHIFT_0_BIT),
7221 (16_19, VREG, OPRND_SHIFT_0_BIT),
7222 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7223 CSKY_ISA_VDSP),
7224 OP32 ("vsubh.u16.r",
7225 OPCODE_INFO3 (0xf81003a0,
7226 (0_3, VREG, OPRND_SHIFT_0_BIT),
7227 (16_19, VREG, OPRND_SHIFT_0_BIT),
7228 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7229 CSKY_ISA_VDSP),
7230 OP32 ("vsubh.u32.r",
7231 OPCODE_INFO3 (0xfa0003a0,
7232 (0_3, VREG, OPRND_SHIFT_0_BIT),
7233 (16_19, VREG, OPRND_SHIFT_0_BIT),
7234 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7235 CSKY_ISA_VDSP),
7236 OP32 ("vsubh.s8.r",
7237 OPCODE_INFO3 (0xf80003b0,
7238 (0_3, VREG, OPRND_SHIFT_0_BIT),
7239 (16_19, VREG, OPRND_SHIFT_0_BIT),
7240 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7241 CSKY_ISA_VDSP),
7242 OP32 ("vsubh.s16.r",
7243 OPCODE_INFO3 (0xf81003b0,
7244 (0_3, VREG, OPRND_SHIFT_0_BIT),
7245 (16_19, VREG, OPRND_SHIFT_0_BIT),
7246 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7247 CSKY_ISA_VDSP),
7248 OP32 ("vsubh.s32.r",
7249 OPCODE_INFO3 (0xfa0003b0,
7250 (0_3, VREG, OPRND_SHIFT_0_BIT),
7251 (16_19, VREG, OPRND_SHIFT_0_BIT),
7252 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7253 CSKY_ISA_VDSP),
7254 OP32 ("vsub.u8.s",
7255 OPCODE_INFO3 (0xf80003c0,
7256 (0_3, VREG, OPRND_SHIFT_0_BIT),
7257 (16_19, VREG, OPRND_SHIFT_0_BIT),
7258 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7259 CSKY_ISA_VDSP),
7260 OP32 ("vsub.u16.s",
7261 OPCODE_INFO3 (0xf81003c0,
7262 (0_3, VREG, OPRND_SHIFT_0_BIT),
7263 (16_19, VREG, OPRND_SHIFT_0_BIT),
7264 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7265 CSKY_ISA_VDSP),
7266 OP32 ("vsub.u32.s",
7267 OPCODE_INFO3 (0xfa0003c0,
7268 (0_3, VREG, OPRND_SHIFT_0_BIT),
7269 (16_19, VREG, OPRND_SHIFT_0_BIT),
7270 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7271 CSKY_ISA_VDSP),
7272 OP32 ("vsub.s8.s",
7273 OPCODE_INFO3 (0xf80003d0,
7274 (0_3, VREG, OPRND_SHIFT_0_BIT),
7275 (16_19, VREG, OPRND_SHIFT_0_BIT),
7276 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7277 CSKY_ISA_VDSP),
7278 OP32 ("vsub.s16.s",
7279 OPCODE_INFO3 (0xf81003d0,
7280 (0_3, VREG, OPRND_SHIFT_0_BIT),
7281 (16_19, VREG, OPRND_SHIFT_0_BIT),
7282 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7283 CSKY_ISA_VDSP),
7284 OP32 ("vsub.s32.s",
7285 OPCODE_INFO3 (0xfa0003d0,
7286 (0_3, VREG, OPRND_SHIFT_0_BIT),
7287 (16_19, VREG, OPRND_SHIFT_0_BIT),
7288 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7289 CSKY_ISA_VDSP),
7290 OP32 ("vmul.u8",
7291 OPCODE_INFO3 (0xf8000400,
7292 (0_3, VREG, OPRND_SHIFT_0_BIT),
7293 (16_19, VREG, OPRND_SHIFT_0_BIT),
7294 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7295 CSKY_ISA_VDSP),
7296 OP32 ("vmul.u16",
7297 OPCODE_INFO3 (0xf8100400,
7298 (0_3, VREG, OPRND_SHIFT_0_BIT),
7299 (16_19, VREG, OPRND_SHIFT_0_BIT),
7300 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7301 CSKY_ISA_VDSP),
7302 OP32 ("vmul.u32",
7303 OPCODE_INFO3 (0xfa000400,
7304 (0_3, VREG, OPRND_SHIFT_0_BIT),
7305 (16_19, VREG, OPRND_SHIFT_0_BIT),
7306 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7307 CSKY_ISA_VDSP),
7308 OP32 ("vmul.s8",
7309 OPCODE_INFO3 (0xf8000410,
7310 (0_3, VREG, OPRND_SHIFT_0_BIT),
7311 (16_19, VREG, OPRND_SHIFT_0_BIT),
7312 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7313 CSKY_ISA_VDSP),
7314 OP32 ("vmul.s16",
7315 OPCODE_INFO3 (0xf8100410,
7316 (0_3, VREG, OPRND_SHIFT_0_BIT),
7317 (16_19, VREG, OPRND_SHIFT_0_BIT),
7318 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7319 CSKY_ISA_VDSP),
7320 OP32 ("vmul.s32",
7321 OPCODE_INFO3 (0xfa000410,
7322 (0_3, VREG, OPRND_SHIFT_0_BIT),
7323 (16_19, VREG, OPRND_SHIFT_0_BIT),
7324 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7325 CSKY_ISA_VDSP),
7326 OP32 ("vmul.eu8",
7327 OPCODE_INFO3 (0xf8000420,
7328 (0_3, VREG, OPRND_SHIFT_0_BIT),
7329 (16_19, VREG, OPRND_SHIFT_0_BIT),
7330 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7331 CSKY_ISA_VDSP),
7332 OP32 ("vmul.eu16",
7333 OPCODE_INFO3 (0xf8100420,
7334 (0_3, VREG, OPRND_SHIFT_0_BIT),
7335 (16_19, VREG, OPRND_SHIFT_0_BIT),
7336 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7337 CSKY_ISA_VDSP),
7338 OP32 ("vmul.es8",
7339 OPCODE_INFO3 (0xf8000430,
7340 (0_3, VREG, OPRND_SHIFT_0_BIT),
7341 (16_19, VREG, OPRND_SHIFT_0_BIT),
7342 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7343 CSKY_ISA_VDSP),
7344 OP32 ("vmul.es16",
7345 OPCODE_INFO3 (0xf8100430,
7346 (0_3, VREG, OPRND_SHIFT_0_BIT),
7347 (16_19, VREG, OPRND_SHIFT_0_BIT),
7348 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7349 CSKY_ISA_VDSP),
7350 OP32 ("vmula.u8",
7351 OPCODE_INFO3 (0xf8000440,
7352 (0_3, VREG, OPRND_SHIFT_0_BIT),
7353 (16_19, VREG, OPRND_SHIFT_0_BIT),
7354 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7355 CSKY_ISA_VDSP),
7356 OP32 ("vmula.u16",
7357 OPCODE_INFO3 (0xf8100440,
7358 (0_3, VREG, OPRND_SHIFT_0_BIT),
7359 (16_19, VREG, OPRND_SHIFT_0_BIT),
7360 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7361 CSKY_ISA_VDSP),
7362 OP32 ("vmula.u32",
7363 OPCODE_INFO3 (0xfa000440,
7364 (0_3, VREG, OPRND_SHIFT_0_BIT),
7365 (16_19, VREG, OPRND_SHIFT_0_BIT),
7366 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7367 CSKY_ISA_VDSP),
7368 OP32 ("vmula.s8",
7369 OPCODE_INFO3 (0xf8000450,
7370 (0_3, VREG, OPRND_SHIFT_0_BIT),
7371 (16_19, VREG, OPRND_SHIFT_0_BIT),
7372 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7373 CSKY_ISA_VDSP),
7374 OP32 ("vmula.s16",
7375 OPCODE_INFO3 (0xf8100450,
7376 (0_3, VREG, OPRND_SHIFT_0_BIT),
7377 (16_19, VREG, OPRND_SHIFT_0_BIT),
7378 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7379 CSKY_ISA_VDSP),
7380 OP32 ("vmula.s32",
7381 OPCODE_INFO3 (0xfa000450,
7382 (0_3, VREG, OPRND_SHIFT_0_BIT),
7383 (16_19, VREG, OPRND_SHIFT_0_BIT),
7384 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7385 CSKY_ISA_VDSP),
7386 OP32 ("vmula.eu8",
7387 OPCODE_INFO3 (0xf8000460,
7388 (0_3, VREG, OPRND_SHIFT_0_BIT),
7389 (16_19, VREG, OPRND_SHIFT_0_BIT),
7390 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7391 CSKY_ISA_VDSP),
7392 OP32 ("vmula.eu16",
7393 OPCODE_INFO3 (0xf8100460,
7394 (0_3, VREG, OPRND_SHIFT_0_BIT),
7395 (16_19, VREG, OPRND_SHIFT_0_BIT),
7396 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7397 CSKY_ISA_VDSP),
7398 OP32 ("vmula.eu32",
7399 OPCODE_INFO3 (0xfa000460,
7400 (0_3, VREG, OPRND_SHIFT_0_BIT),
7401 (16_19, VREG, OPRND_SHIFT_0_BIT),
7402 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7403 CSKY_ISA_VDSP),
7404 OP32 ("vmula.es8",
7405 OPCODE_INFO3 (0xf8000470,
7406 (0_3, VREG, OPRND_SHIFT_0_BIT),
7407 (16_19, VREG, OPRND_SHIFT_0_BIT),
7408 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7409 CSKY_ISA_VDSP),
7410 OP32 ("vmula.es16",
7411 OPCODE_INFO3 (0xf8100470,
7412 (0_3, VREG, OPRND_SHIFT_0_BIT),
7413 (16_19, VREG, OPRND_SHIFT_0_BIT),
7414 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7415 CSKY_ISA_VDSP),
7416 OP32 ("vmula.es32",
7417 OPCODE_INFO3 (0xfa000470,
7418 (0_3, VREG, OPRND_SHIFT_0_BIT),
7419 (16_19, VREG, OPRND_SHIFT_0_BIT),
7420 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7421 CSKY_ISA_VDSP),
7422 OP32 ("vmuls.u8",
7423 OPCODE_INFO3 (0xf8000480,
7424 (0_3, VREG, OPRND_SHIFT_0_BIT),
7425 (16_19, VREG, OPRND_SHIFT_0_BIT),
7426 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7427 CSKY_ISA_VDSP),
7428 OP32 ("vmuls.u16",
7429 OPCODE_INFO3 (0xf8100480,
7430 (0_3, VREG, OPRND_SHIFT_0_BIT),
7431 (16_19, VREG, OPRND_SHIFT_0_BIT),
7432 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7433 CSKY_ISA_VDSP),
7434 OP32 ("vmuls.u32",
7435 OPCODE_INFO3 (0xfa000480,
7436 (0_3, VREG, OPRND_SHIFT_0_BIT),
7437 (16_19, VREG, OPRND_SHIFT_0_BIT),
7438 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7439 CSKY_ISA_VDSP),
7440 OP32 ("vmuls.s8",
7441 OPCODE_INFO3 (0xf8000490,
7442 (0_3, VREG, OPRND_SHIFT_0_BIT),
7443 (16_19, VREG, OPRND_SHIFT_0_BIT),
7444 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7445 CSKY_ISA_VDSP),
7446 OP32 ("vmuls.s16",
7447 OPCODE_INFO3 (0xf8100490,
7448 (0_3, VREG, OPRND_SHIFT_0_BIT),
7449 (16_19, VREG, OPRND_SHIFT_0_BIT),
7450 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7451 CSKY_ISA_VDSP),
7452 OP32 ("vmuls.s32",
7453 OPCODE_INFO3 (0xfa000490,
7454 (0_3, VREG, OPRND_SHIFT_0_BIT),
7455 (16_19, VREG, OPRND_SHIFT_0_BIT),
7456 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7457 CSKY_ISA_VDSP),
7458 OP32 ("vmuls.eu8",
7459 OPCODE_INFO3 (0xf80004a0,
7460 (0_3, VREG, OPRND_SHIFT_0_BIT),
7461 (16_19, VREG, OPRND_SHIFT_0_BIT),
7462 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7463 CSKY_ISA_VDSP),
7464 OP32 ("vmuls.eu16",
7465 OPCODE_INFO3 (0xf81004a0,
7466 (0_3, VREG, OPRND_SHIFT_0_BIT),
7467 (16_19, VREG, OPRND_SHIFT_0_BIT),
7468 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7469 CSKY_ISA_VDSP),
7470 OP32 ("vmuls.es8",
7471 OPCODE_INFO3 (0xf80004b0,
7472 (0_3, VREG, OPRND_SHIFT_0_BIT),
7473 (16_19, VREG, OPRND_SHIFT_0_BIT),
7474 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7475 CSKY_ISA_VDSP),
7476 OP32 ("vmuls.es16",
7477 OPCODE_INFO3 (0xf81004b0,
7478 (0_3, VREG, OPRND_SHIFT_0_BIT),
7479 (16_19, VREG, OPRND_SHIFT_0_BIT),
7480 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7481 CSKY_ISA_VDSP),
7482 OP32 ("vshr.u8",
7483 OPCODE_INFO3 (0xf8000680,
7484 (0_3, VREG, OPRND_SHIFT_0_BIT),
7485 (16_19, VREG, OPRND_SHIFT_0_BIT),
7486 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7487 CSKY_ISA_VDSP),
7488 OP32 ("vshr.u16",
7489 OPCODE_INFO3 (0xf8100680,
7490 (0_3, VREG, OPRND_SHIFT_0_BIT),
7491 (16_19, VREG, OPRND_SHIFT_0_BIT),
7492 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7493 CSKY_ISA_VDSP),
7494 OP32 ("vshr.u32",
7495 OPCODE_INFO3 (0xfa000680,
7496 (0_3, VREG, OPRND_SHIFT_0_BIT),
7497 (16_19, VREG, OPRND_SHIFT_0_BIT),
7498 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7499 CSKY_ISA_VDSP),
7500 OP32 ("vshr.s8",
7501 OPCODE_INFO3 (0xf8000690,
7502 (0_3, VREG, OPRND_SHIFT_0_BIT),
7503 (16_19, VREG, OPRND_SHIFT_0_BIT),
7504 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7505 CSKY_ISA_VDSP),
7506 OP32 ("vshr.s16",
7507 OPCODE_INFO3 (0xf8100690,
7508 (0_3, VREG, OPRND_SHIFT_0_BIT),
7509 (16_19, VREG, OPRND_SHIFT_0_BIT),
7510 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7511 CSKY_ISA_VDSP),
7512 OP32 ("vshr.s32",
7513 OPCODE_INFO3 (0xfa000690,
7514 (0_3, VREG, OPRND_SHIFT_0_BIT),
7515 (16_19, VREG, OPRND_SHIFT_0_BIT),
7516 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7517 CSKY_ISA_VDSP),
7518 OP32 ("vshr.u8.r",
7519 OPCODE_INFO3 (0xf80006c0,
7520 (0_3, VREG, OPRND_SHIFT_0_BIT),
7521 (16_19, VREG, OPRND_SHIFT_0_BIT),
7522 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7523 CSKY_ISA_VDSP),
7524 OP32 ("vshr.u16.r",
7525 OPCODE_INFO3 (0xf81006c0,
7526 (0_3, VREG, OPRND_SHIFT_0_BIT),
7527 (16_19, VREG, OPRND_SHIFT_0_BIT),
7528 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7529 CSKY_ISA_VDSP),
7530 OP32 ("vshr.u32.r",
7531 OPCODE_INFO3 (0xfa0006c0,
7532 (0_3, VREG, OPRND_SHIFT_0_BIT),
7533 (16_19, VREG, OPRND_SHIFT_0_BIT),
7534 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7535 CSKY_ISA_VDSP),
7536 OP32 ("vshr.s8.r",
7537 OPCODE_INFO3 (0xf80006d0,
7538 (0_3, VREG, OPRND_SHIFT_0_BIT),
7539 (16_19, VREG, OPRND_SHIFT_0_BIT),
7540 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7541 CSKY_ISA_VDSP),
7542 OP32 ("vshr.s16.r",
7543 OPCODE_INFO3 (0xf81006d0,
7544 (0_3, VREG, OPRND_SHIFT_0_BIT),
7545 (16_19, VREG, OPRND_SHIFT_0_BIT),
7546 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7547 CSKY_ISA_VDSP),
7548 OP32 ("vshr.s32.r",
7549 OPCODE_INFO3 (0xfa0006d0,
7550 (0_3, VREG, OPRND_SHIFT_0_BIT),
7551 (16_19, VREG, OPRND_SHIFT_0_BIT),
7552 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7553 CSKY_ISA_VDSP),
7554 OP32 ("vshl.u8",
7555 OPCODE_INFO3 (0xf8000780,
7556 (0_3, VREG, OPRND_SHIFT_0_BIT),
7557 (16_19, VREG, OPRND_SHIFT_0_BIT),
7558 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7559 CSKY_ISA_VDSP),
7560 OP32 ("vshl.u16",
7561 OPCODE_INFO3 (0xf8100780,
7562 (0_3, VREG, OPRND_SHIFT_0_BIT),
7563 (16_19, VREG, OPRND_SHIFT_0_BIT),
7564 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7565 CSKY_ISA_VDSP),
7566 OP32 ("vshl.u32",
7567 OPCODE_INFO3 (0xfa000780,
7568 (0_3, VREG, OPRND_SHIFT_0_BIT),
7569 (16_19, VREG, OPRND_SHIFT_0_BIT),
7570 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7571 CSKY_ISA_VDSP),
7572 OP32 ("vshl.s8",
7573 OPCODE_INFO3 (0xf8000790,
7574 (0_3, VREG, OPRND_SHIFT_0_BIT),
7575 (16_19, VREG, OPRND_SHIFT_0_BIT),
7576 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7577 CSKY_ISA_VDSP),
7578 OP32 ("vshl.s16",
7579 OPCODE_INFO3 (0xf8100790,
7580 (0_3, VREG, OPRND_SHIFT_0_BIT),
7581 (16_19, VREG, OPRND_SHIFT_0_BIT),
7582 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7583 CSKY_ISA_VDSP),
7584 OP32 ("vshl.s32",
7585 OPCODE_INFO3 (0xfa000790,
7586 (0_3, VREG, OPRND_SHIFT_0_BIT),
7587 (16_19, VREG, OPRND_SHIFT_0_BIT),
7588 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7589 CSKY_ISA_VDSP),
7590 OP32 ("vshl.u8.s",
7591 OPCODE_INFO3 (0xf80007c0,
7592 (0_3, VREG, OPRND_SHIFT_0_BIT),
7593 (16_19, VREG, OPRND_SHIFT_0_BIT),
7594 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7595 CSKY_ISA_VDSP),
7596 OP32 ("vshl.u16.s",
7597 OPCODE_INFO3 (0xf81007c0,
7598 (0_3, VREG, OPRND_SHIFT_0_BIT),
7599 (16_19, VREG, OPRND_SHIFT_0_BIT),
7600 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7601 CSKY_ISA_VDSP),
7602 OP32 ("vshl.u32.s",
7603 OPCODE_INFO3 (0xfa0007c0,
7604 (0_3, VREG, OPRND_SHIFT_0_BIT),
7605 (16_19, VREG, OPRND_SHIFT_0_BIT),
7606 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7607 CSKY_ISA_VDSP),
7608 OP32 ("vshl.s8.s",
7609 OPCODE_INFO3 (0xf80007d0,
7610 (0_3, VREG, OPRND_SHIFT_0_BIT),
7611 (16_19, VREG, OPRND_SHIFT_0_BIT),
7612 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7613 CSKY_ISA_VDSP),
7614 OP32 ("vshl.s16.s",
7615 OPCODE_INFO3 (0xf81007d0,
7616 (0_3, VREG, OPRND_SHIFT_0_BIT),
7617 (16_19, VREG, OPRND_SHIFT_0_BIT),
7618 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7619 CSKY_ISA_VDSP),
7620 OP32 ("vshl.s32.s",
7621 OPCODE_INFO3 (0xfa0007d0,
7622 (0_3, VREG, OPRND_SHIFT_0_BIT),
7623 (16_19, VREG, OPRND_SHIFT_0_BIT),
7624 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7625 CSKY_ISA_VDSP),
7626 OP32 ("vcmphs.u8",
7627 OPCODE_INFO3 (0xf8000800,
7628 (0_3, VREG, OPRND_SHIFT_0_BIT),
7629 (16_19, VREG, OPRND_SHIFT_0_BIT),
7630 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7631 CSKY_ISA_VDSP),
7632 OP32 ("vcmphs.u16",
7633 OPCODE_INFO3 (0xf8100800,
7634 (0_3, VREG, OPRND_SHIFT_0_BIT),
7635 (16_19, VREG, OPRND_SHIFT_0_BIT),
7636 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7637 CSKY_ISA_VDSP),
7638 OP32 ("vcmphs.u32",
7639 OPCODE_INFO3 (0xfa000800,
7640 (0_3, VREG, OPRND_SHIFT_0_BIT),
7641 (16_19, VREG, OPRND_SHIFT_0_BIT),
7642 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7643 CSKY_ISA_VDSP),
7644 OP32 ("vcmphs.s8",
7645 OPCODE_INFO3 (0xf8000810,
7646 (0_3, VREG, OPRND_SHIFT_0_BIT),
7647 (16_19, VREG, OPRND_SHIFT_0_BIT),
7648 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7649 CSKY_ISA_VDSP),
7650 OP32 ("vcmphs.s16",
7651 OPCODE_INFO3 (0xf8100810,
7652 (0_3, VREG, OPRND_SHIFT_0_BIT),
7653 (16_19, VREG, OPRND_SHIFT_0_BIT),
7654 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7655 CSKY_ISA_VDSP),
7656 OP32 ("vcmphs.s32",
7657 OPCODE_INFO3 (0xfa000810,
7658 (0_3, VREG, OPRND_SHIFT_0_BIT),
7659 (16_19, VREG, OPRND_SHIFT_0_BIT),
7660 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7661 CSKY_ISA_VDSP),
7662 OP32 ("vcmplt.u8",
7663 OPCODE_INFO3 (0xf8000820,
7664 (0_3, VREG, OPRND_SHIFT_0_BIT),
7665 (16_19, VREG, OPRND_SHIFT_0_BIT),
7666 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7667 CSKY_ISA_VDSP),
7668 OP32 ("vcmplt.u16",
7669 OPCODE_INFO3 (0xf8100820,
7670 (0_3, VREG, OPRND_SHIFT_0_BIT),
7671 (16_19, VREG, OPRND_SHIFT_0_BIT),
7672 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7673 CSKY_ISA_VDSP),
7674 OP32 ("vcmplt.u32",
7675 OPCODE_INFO3 (0xfa000820,
7676 (0_3, VREG, OPRND_SHIFT_0_BIT),
7677 (16_19, VREG, OPRND_SHIFT_0_BIT),
7678 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7679 CSKY_ISA_VDSP),
7680 OP32 ("vcmplt.s8",
7681 OPCODE_INFO3 (0xf8000830,
7682 (0_3, VREG, OPRND_SHIFT_0_BIT),
7683 (16_19, VREG, OPRND_SHIFT_0_BIT),
7684 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7685 CSKY_ISA_VDSP),
7686 OP32 ("vcmplt.s16",
7687 OPCODE_INFO3 (0xf8100830,
7688 (0_3, VREG, OPRND_SHIFT_0_BIT),
7689 (16_19, VREG, OPRND_SHIFT_0_BIT),
7690 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7691 CSKY_ISA_VDSP),
7692 OP32 ("vcmplt.s32",
7693 OPCODE_INFO3 (0xfa000830,
7694 (0_3, VREG, OPRND_SHIFT_0_BIT),
7695 (16_19, VREG, OPRND_SHIFT_0_BIT),
7696 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7697 CSKY_ISA_VDSP),
7698 OP32 ("vcmpne.u8",
7699 OPCODE_INFO3 (0xf8000840,
7700 (0_3, VREG, OPRND_SHIFT_0_BIT),
7701 (16_19, VREG, OPRND_SHIFT_0_BIT),
7702 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7703 CSKY_ISA_VDSP),
7704 OP32 ("vcmpne.u16",
7705 OPCODE_INFO3 (0xf8100840,
7706 (0_3, VREG, OPRND_SHIFT_0_BIT),
7707 (16_19, VREG, OPRND_SHIFT_0_BIT),
7708 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7709 CSKY_ISA_VDSP),
7710 OP32 ("vcmpne.u32",
7711 OPCODE_INFO3 (0xfa000840,
7712 (0_3, VREG, OPRND_SHIFT_0_BIT),
7713 (16_19, VREG, OPRND_SHIFT_0_BIT),
7714 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7715 CSKY_ISA_VDSP),
7716 OP32 ("vcmpne.s8",
7717 OPCODE_INFO3 (0xf8000850,
7718 (0_3, VREG, OPRND_SHIFT_0_BIT),
7719 (16_19, VREG, OPRND_SHIFT_0_BIT),
7720 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7721 CSKY_ISA_VDSP),
7722 OP32 ("vcmpne.s16",
7723 OPCODE_INFO3 (0xf8100850,
7724 (0_3, VREG, OPRND_SHIFT_0_BIT),
7725 (16_19, VREG, OPRND_SHIFT_0_BIT),
7726 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7727 CSKY_ISA_VDSP),
7728 OP32 ("vcmpne.s32",
7729 OPCODE_INFO3 (0xfa000850,
7730 (0_3, VREG, OPRND_SHIFT_0_BIT),
7731 (16_19, VREG, OPRND_SHIFT_0_BIT),
7732 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7733 CSKY_ISA_VDSP),
7734 OP32 ("vmax.u8",
7735 OPCODE_INFO3 (0xf8000900,
7736 (0_3, VREG, OPRND_SHIFT_0_BIT),
7737 (16_19, VREG, OPRND_SHIFT_0_BIT),
7738 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7739 CSKY_ISA_VDSP),
7740 OP32 ("vmax.u16",
7741 OPCODE_INFO3 (0xf8100900,
7742 (0_3, VREG, OPRND_SHIFT_0_BIT),
7743 (16_19, VREG, OPRND_SHIFT_0_BIT),
7744 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7745 CSKY_ISA_VDSP),
7746 OP32 ("vmax.u32",
7747 OPCODE_INFO3 (0xfa000900,
7748 (0_3, VREG, OPRND_SHIFT_0_BIT),
7749 (16_19, VREG, OPRND_SHIFT_0_BIT),
7750 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7751 CSKY_ISA_VDSP),
7752 OP32 ("vmax.s8",
7753 OPCODE_INFO3 (0xf8000910,
7754 (0_3, VREG, OPRND_SHIFT_0_BIT),
7755 (16_19, VREG, OPRND_SHIFT_0_BIT),
7756 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7757 CSKY_ISA_VDSP),
7758 OP32 ("vmax.s16",
7759 OPCODE_INFO3 (0xf8100910,
7760 (0_3, VREG, OPRND_SHIFT_0_BIT),
7761 (16_19, VREG, OPRND_SHIFT_0_BIT),
7762 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7763 CSKY_ISA_VDSP),
7764 OP32 ("vmax.s32",
7765 OPCODE_INFO3 (0xfa000910,
7766 (0_3, VREG, OPRND_SHIFT_0_BIT),
7767 (16_19, VREG, OPRND_SHIFT_0_BIT),
7768 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7769 CSKY_ISA_VDSP),
7770 OP32 ("vmin.u8",
7771 OPCODE_INFO3 (0xf8000920,
7772 (0_3, VREG, OPRND_SHIFT_0_BIT),
7773 (16_19, VREG, OPRND_SHIFT_0_BIT),
7774 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7775 CSKY_ISA_VDSP),
7776 OP32 ("vmin.u16",
7777 OPCODE_INFO3 (0xf8100920,
7778 (0_3, VREG, OPRND_SHIFT_0_BIT),
7779 (16_19, VREG, OPRND_SHIFT_0_BIT),
7780 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7781 CSKY_ISA_VDSP),
7782 OP32 ("vmin.u32",
7783 OPCODE_INFO3 (0xfa000920,
7784 (0_3, VREG, OPRND_SHIFT_0_BIT),
7785 (16_19, VREG, OPRND_SHIFT_0_BIT),
7786 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7787 CSKY_ISA_VDSP),
7788 OP32 ("vmin.s8",
7789 OPCODE_INFO3 (0xf8000930,
7790 (0_3, VREG, OPRND_SHIFT_0_BIT),
7791 (16_19, VREG, OPRND_SHIFT_0_BIT),
7792 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7793 CSKY_ISA_VDSP),
7794 OP32 ("vmin.s16",
7795 OPCODE_INFO3 (0xf8100930,
7796 (0_3, VREG, OPRND_SHIFT_0_BIT),
7797 (16_19, VREG, OPRND_SHIFT_0_BIT),
7798 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7799 CSKY_ISA_VDSP),
7800 OP32 ("vmin.s32",
7801 OPCODE_INFO3 (0xfa000930,
7802 (0_3, VREG, OPRND_SHIFT_0_BIT),
7803 (16_19, VREG, OPRND_SHIFT_0_BIT),
7804 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7805 CSKY_ISA_VDSP),
7806 OP32 ("vcmax.u8",
7807 OPCODE_INFO3 (0xf8000980,
7808 (0_3, VREG, OPRND_SHIFT_0_BIT),
7809 (16_19, VREG, OPRND_SHIFT_0_BIT),
7810 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7811 CSKY_ISA_VDSP),
7812 OP32 ("vcmax.u16",
7813 OPCODE_INFO3 (0xf8100980,
7814 (0_3, VREG, OPRND_SHIFT_0_BIT),
7815 (16_19, VREG, OPRND_SHIFT_0_BIT),
7816 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7817 CSKY_ISA_VDSP),
7818 OP32 ("vcmax.u32",
7819 OPCODE_INFO3 (0xfa000980,
7820 (0_3, VREG, OPRND_SHIFT_0_BIT),
7821 (16_19, VREG, OPRND_SHIFT_0_BIT),
7822 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7823 CSKY_ISA_VDSP),
7824 OP32 ("vcmax.s8",
7825 OPCODE_INFO3 (0xf8000990,
7826 (0_3, VREG, OPRND_SHIFT_0_BIT),
7827 (16_19, VREG, OPRND_SHIFT_0_BIT),
7828 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7829 CSKY_ISA_VDSP),
7830 OP32 ("vcmax.s16",
7831 OPCODE_INFO3 (0xf8100990,
7832 (0_3, VREG, OPRND_SHIFT_0_BIT),
7833 (16_19, VREG, OPRND_SHIFT_0_BIT),
7834 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7835 CSKY_ISA_VDSP),
7836 OP32 ("vcmax.s32",
7837 OPCODE_INFO3 (0xfa000990,
7838 (0_3, VREG, OPRND_SHIFT_0_BIT),
7839 (16_19, VREG, OPRND_SHIFT_0_BIT),
7840 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7841 CSKY_ISA_VDSP),
7842 OP32 ("vcmin.u8",
7843 OPCODE_INFO3 (0xf80009a0,
7844 (0_3, VREG, OPRND_SHIFT_0_BIT),
7845 (16_19, VREG, OPRND_SHIFT_0_BIT),
7846 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7847 CSKY_ISA_VDSP),
7848 OP32 ("vcmin.u16",
7849 OPCODE_INFO3 (0xf81009a0,
7850 (0_3, VREG, OPRND_SHIFT_0_BIT),
7851 (16_19, VREG, OPRND_SHIFT_0_BIT),
7852 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7853 CSKY_ISA_VDSP),
7854 OP32 ("vcmin.u32",
7855 OPCODE_INFO3 (0xfa0009a0,
7856 (0_3, VREG, OPRND_SHIFT_0_BIT),
7857 (16_19, VREG, OPRND_SHIFT_0_BIT),
7858 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7859 CSKY_ISA_VDSP),
7860 OP32 ("vcmin.s8",
7861 OPCODE_INFO3 (0xf80009b0,
7862 (0_3, VREG, OPRND_SHIFT_0_BIT),
7863 (16_19, VREG, OPRND_SHIFT_0_BIT),
7864 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7865 CSKY_ISA_VDSP),
7866 OP32 ("vcmin.s16",
7867 OPCODE_INFO3 (0xf81009b0,
7868 (0_3, VREG, OPRND_SHIFT_0_BIT),
7869 (16_19, VREG, OPRND_SHIFT_0_BIT),
7870 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7871 CSKY_ISA_VDSP),
7872 OP32 ("vcmin.s32",
7873 OPCODE_INFO3 (0xfa0009b0,
7874 (0_3, VREG, OPRND_SHIFT_0_BIT),
7875 (16_19, VREG, OPRND_SHIFT_0_BIT),
7876 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7877 CSKY_ISA_VDSP),
7878 OP32 ("vand.8",
7879 OPCODE_INFO3 (0xf8000a00,
7880 (0_3, VREG, OPRND_SHIFT_0_BIT),
7881 (16_19, VREG, OPRND_SHIFT_0_BIT),
7882 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7883 CSKY_ISA_VDSP),
7884 OP32 ("vand.16",
7885 OPCODE_INFO3 (0xf8100a00,
7886 (0_3, VREG, OPRND_SHIFT_0_BIT),
7887 (16_19, VREG, OPRND_SHIFT_0_BIT),
7888 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7889 CSKY_ISA_VDSP),
7890 OP32 ("vand.32",
7891 OPCODE_INFO3 (0xfa000a00,
7892 (0_3, VREG, OPRND_SHIFT_0_BIT),
7893 (16_19, VREG, OPRND_SHIFT_0_BIT),
7894 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7895 CSKY_ISA_VDSP),
7896 OP32 ("vandn.8",
7897 OPCODE_INFO3 (0xf8000a20,
7898 (0_3, VREG, OPRND_SHIFT_0_BIT),
7899 (16_19, VREG, OPRND_SHIFT_0_BIT),
7900 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7901 CSKY_ISA_VDSP),
7902 OP32 ("vandn.16",
7903 OPCODE_INFO3 (0xf8100a20,
7904 (0_3, VREG, OPRND_SHIFT_0_BIT),
7905 (16_19, VREG, OPRND_SHIFT_0_BIT),
7906 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7907 CSKY_ISA_VDSP),
7908 OP32 ("vandn.32",
7909 OPCODE_INFO3 (0xfa000a20,
7910 (0_3, VREG, OPRND_SHIFT_0_BIT),
7911 (16_19, VREG, OPRND_SHIFT_0_BIT),
7912 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7913 CSKY_ISA_VDSP),
7914 OP32 ("vor.8",
7915 OPCODE_INFO3 (0xf8000a40,
7916 (0_3, VREG, OPRND_SHIFT_0_BIT),
7917 (16_19, VREG, OPRND_SHIFT_0_BIT),
7918 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7919 CSKY_ISA_VDSP),
7920 OP32 ("vor.16",
7921 OPCODE_INFO3 (0xf8100a40,
7922 (0_3, VREG, OPRND_SHIFT_0_BIT),
7923 (16_19, VREG, OPRND_SHIFT_0_BIT),
7924 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7925 CSKY_ISA_VDSP),
7926 OP32 ("vor.32",
7927 OPCODE_INFO3 (0xfa000a40,
7928 (0_3, VREG, OPRND_SHIFT_0_BIT),
7929 (16_19, VREG, OPRND_SHIFT_0_BIT),
7930 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7931 CSKY_ISA_VDSP),
7932 OP32 ("vnor.8",
7933 OPCODE_INFO3 (0xf8000a60,
7934 (0_3, VREG, OPRND_SHIFT_0_BIT),
7935 (16_19, VREG, OPRND_SHIFT_0_BIT),
7936 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7937 CSKY_ISA_VDSP),
7938 OP32 ("vnor.16",
7939 OPCODE_INFO3 (0xf8100a60,
7940 (0_3, VREG, OPRND_SHIFT_0_BIT),
7941 (16_19, VREG, OPRND_SHIFT_0_BIT),
7942 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7943 CSKY_ISA_VDSP),
7944 OP32 ("vnor.32",
7945 OPCODE_INFO3 (0xfa000a60,
7946 (0_3, VREG, OPRND_SHIFT_0_BIT),
7947 (16_19, VREG, OPRND_SHIFT_0_BIT),
7948 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7949 CSKY_ISA_VDSP),
7950 OP32 ("vxor.8",
7951 OPCODE_INFO3 (0xf8000a80,
7952 (0_3, VREG, OPRND_SHIFT_0_BIT),
7953 (16_19, VREG, OPRND_SHIFT_0_BIT),
7954 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7955 CSKY_ISA_VDSP),
7956 OP32 ("vxor.16",
7957 OPCODE_INFO3 (0xf8100a80,
7958 (0_3, VREG, OPRND_SHIFT_0_BIT),
7959 (16_19, VREG, OPRND_SHIFT_0_BIT),
7960 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7961 CSKY_ISA_VDSP),
7962 OP32 ("vxor.32",
7963 OPCODE_INFO3 (0xfa000a80,
7964 (0_3, VREG, OPRND_SHIFT_0_BIT),
7965 (16_19, VREG, OPRND_SHIFT_0_BIT),
7966 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7967 CSKY_ISA_VDSP),
7968 OP32 ("vtst.8",
7969 OPCODE_INFO3 (0xf8000b20,
7970 (0_3, VREG, OPRND_SHIFT_0_BIT),
7971 (16_19, VREG, OPRND_SHIFT_0_BIT),
7972 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7973 CSKY_ISA_VDSP),
7974 OP32 ("vtst.16",
7975 OPCODE_INFO3 (0xf8100b20,
7976 (0_3, VREG, OPRND_SHIFT_0_BIT),
7977 (16_19, VREG, OPRND_SHIFT_0_BIT),
7978 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7979 CSKY_ISA_VDSP),
7980 OP32 ("vtst.32",
7981 OPCODE_INFO3 (0xfa000b20,
7982 (0_3, VREG, OPRND_SHIFT_0_BIT),
7983 (16_19, VREG, OPRND_SHIFT_0_BIT),
7984 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7985 CSKY_ISA_VDSP),
7986 OP32 ("vbpermz.8",
7987 OPCODE_INFO3 (0xf8000f00,
7988 (0_3, VREG, OPRND_SHIFT_0_BIT),
7989 (16_19, VREG, OPRND_SHIFT_0_BIT),
7990 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7991 CSKY_ISA_VDSP),
7992 OP32 ("vbpermz.16",
7993 OPCODE_INFO3 (0xf8100f00,
7994 (0_3, VREG, OPRND_SHIFT_0_BIT),
7995 (16_19, VREG, OPRND_SHIFT_0_BIT),
7996 (21_24, VREG, OPRND_SHIFT_0_BIT)),
7997 CSKY_ISA_VDSP),
7998 OP32 ("vbpermz.32",
7999 OPCODE_INFO3 (0xfa000f00,
8000 (0_3, VREG, OPRND_SHIFT_0_BIT),
8001 (16_19, VREG, OPRND_SHIFT_0_BIT),
8002 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8003 CSKY_ISA_VDSP),
8004 OP32 ("vbperm.8",
8005 OPCODE_INFO3 (0xf8000f20,
8006 (0_3, VREG, OPRND_SHIFT_0_BIT),
8007 (16_19, VREG, OPRND_SHIFT_0_BIT),
8008 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8009 CSKY_ISA_VDSP),
8010 OP32 ("vbperm.16",
8011 OPCODE_INFO3 (0xf8100f20,
8012 (0_3, VREG, OPRND_SHIFT_0_BIT),
8013 (16_19, VREG, OPRND_SHIFT_0_BIT),
8014 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8015 CSKY_ISA_VDSP),
8016 OP32 ("vbperm.32",
8017 OPCODE_INFO3 (0xfa000f20,
8018 (0_3, VREG, OPRND_SHIFT_0_BIT),
8019 (16_19, VREG, OPRND_SHIFT_0_BIT),
8020 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8021 CSKY_ISA_VDSP),
8022 OP32 ("vdch.8",
8023 OPCODE_INFO3 (0xf8000fc0,
8024 (0_3, VREG, OPRND_SHIFT_0_BIT),
8025 (16_19, VREG, OPRND_SHIFT_0_BIT),
8026 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8027 CSKY_ISA_VDSP),
8028 OP32 ("vdch.16",
8029 OPCODE_INFO3 (0xf8100fc0,
8030 (0_3, VREG, OPRND_SHIFT_0_BIT),
8031 (16_19, VREG, OPRND_SHIFT_0_BIT),
8032 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8033 CSKY_ISA_VDSP),
8034 OP32 ("vdch.32",
8035 OPCODE_INFO3 (0xfa000fc0,
8036 (0_3, VREG, OPRND_SHIFT_0_BIT),
8037 (16_19, VREG, OPRND_SHIFT_0_BIT),
8038 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8039 CSKY_ISA_VDSP),
8040 OP32 ("vdcl.8",
8041 OPCODE_INFO3 (0xf8000fe0,
8042 (0_3, VREG, OPRND_SHIFT_0_BIT),
8043 (16_19, VREG, OPRND_SHIFT_0_BIT),
8044 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8045 CSKY_ISA_VDSP),
8046 OP32 ("vdcl.16",
8047 OPCODE_INFO3 (0xf8100fe0,
8048 (0_3, VREG, OPRND_SHIFT_0_BIT),
8049 (16_19, VREG, OPRND_SHIFT_0_BIT),
8050 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8051 CSKY_ISA_VDSP),
8052 OP32 ("vdcl.32",
8053 OPCODE_INFO3 (0xfa000fe0,
8054 (0_3, VREG, OPRND_SHIFT_0_BIT),
8055 (16_19, VREG, OPRND_SHIFT_0_BIT),
8056 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8057 CSKY_ISA_VDSP),
8058 OP32 ("vich.8",
8059 OPCODE_INFO3 (0xf8000f80,
8060 (0_3, VREG, OPRND_SHIFT_0_BIT),
8061 (16_19, VREG, OPRND_SHIFT_0_BIT),
8062 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8063 CSKY_ISA_VDSP),
8064 OP32 ("vich.16",
8065 OPCODE_INFO3 (0xf8100f80,
8066 (0_3, VREG, OPRND_SHIFT_0_BIT),
8067 (16_19, VREG, OPRND_SHIFT_0_BIT),
8068 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8069 CSKY_ISA_VDSP),
8070 OP32 ("vich.32",
8071 OPCODE_INFO3 (0xfa000f80,
8072 (0_3, VREG, OPRND_SHIFT_0_BIT),
8073 (16_19, VREG, OPRND_SHIFT_0_BIT),
8074 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8075 CSKY_ISA_VDSP),
8076 OP32 ("vicl.8",
8077 OPCODE_INFO3 (0xf8000fa0,
8078 (0_3, VREG, OPRND_SHIFT_0_BIT),
8079 (16_19, VREG, OPRND_SHIFT_0_BIT),
8080 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8081 CSKY_ISA_VDSP),
8082 OP32 ("vicl.16",
8083 OPCODE_INFO3 (0xf8100fa0,
8084 (0_3, VREG, OPRND_SHIFT_0_BIT),
8085 (16_19, VREG, OPRND_SHIFT_0_BIT),
8086 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8087 CSKY_ISA_VDSP),
8088 OP32 ("vicl.32",
8089 OPCODE_INFO3 (0xfa000fa0,
8090 (0_3, VREG, OPRND_SHIFT_0_BIT),
8091 (16_19, VREG, OPRND_SHIFT_0_BIT),
8092 (21_24, VREG, OPRND_SHIFT_0_BIT)),
8093 CSKY_ISA_VDSP),
8094
8095 /* The following are aliases for other instructions. */
8096 /* setc -> cmphs r0, r0 */
8097 OP16 ("setc",
8098 OPCODE_INFO0 (0x6400),
8099 CSKYV2_ISA_E1),
8100 /* clrc -> cmpne r0, r0 */
8101 OP16 ("clrc",
8102 OPCODE_INFO0 (0x6402),
8103 CSKYV2_ISA_E1),
8104 /* tstlt rd -> btsti rd,31 */
8105 OP32 ("tstlt",
8106 OPCODE_INFO1 (0xc7e02880,
8107 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8108 CSKYV2_ISA_1E2),
8109 /* idly4 -> idly 4 */
8110 OP32 ("idly4",
8111 OPCODE_INFO0 (0xc0601c20),
8112 CSKYV2_ISA_E1),
8113 /* rsub rz, ry, rx -> subu rz, rx, ry */
8114 DOP32 ("rsub",
8115 OPCODE_INFO3 (0xc4000080,
8116 (0_4, AREG, OPRND_SHIFT_0_BIT),
8117 (21_25, AREG, OPRND_SHIFT_0_BIT),
8118 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8119 OPCODE_INFO2 (0xc4000080,
8120 (0_4or21_25, DUP_AREG, OPRND_SHIFT_0_BIT),
8121 (16_20, AREG, OPRND_SHIFT_0_BIT)), CSKYV2_ISA_1E2),
8122 /* cmplei rd,X -> cmplti rd,X+1 */
8123 OP16_OP32 ("cmplei",
8124 OPCODE_INFO2 (0x3820,
8125 (8_10, GREG0_7, OPRND_SHIFT_0_BIT),
8126 (0_4, IMM5b, OPRND_SHIFT_0_BIT)),
8127 CSKYV2_ISA_E1,
8128 OPCODE_INFO2 (0xeb200000,
8129 (16_20, AREG, OPRND_SHIFT_0_BIT),
8130 (0_15, IMM16b, OPRND_SHIFT_0_BIT)),
8131 CSKYV2_ISA_1E2),
8132 /* cmpls -> cmphs */
8133 OP16_OP32 ("cmpls",
8134 OPCODE_INFO2 (0x6400,
8135 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
8136 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
8137 CSKYV2_ISA_E1,
8138 OPCODE_INFO2 (0xc4000420,
8139 (21_25, AREG, OPRND_SHIFT_0_BIT),
8140 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8141 CSKYV2_ISA_2E3),
8142 /* cmpgt -> cmplt */
8143 OP16_OP32 ("cmpgt",
8144 OPCODE_INFO2 (0x6401,
8145 (6_9, GREG0_15, OPRND_SHIFT_0_BIT),
8146 (2_5, GREG0_15, OPRND_SHIFT_0_BIT)),
8147 CSKYV2_ISA_E1,
8148 OPCODE_INFO2 (0xc4000440,
8149 (21_25, AREG, OPRND_SHIFT_0_BIT),
8150 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8151 CSKYV2_ISA_2E3),
8152 /* tstle rd -> cmplti rd,1 */
8153 OP16_OP32 ("tstle",
8154 OPCODE_INFO1 (0x3820,
8155 (8_10, GREG0_7, OPRND_SHIFT_0_BIT)),
8156 CSKYV2_ISA_E1,
8157 OPCODE_INFO1 (0xeb200000,
8158 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8159 CSKYV2_ISA_1E2),
8160 /* tstne rd -> cmpnei rd,0 */
8161 OP16_OP32 ("tstne",
8162 OPCODE_INFO1 (0x3840,
8163 (8_10, GREG0_7, OPRND_SHIFT_0_BIT)),
8164 CSKYV2_ISA_E1,
8165 OPCODE_INFO1 (0xeb400000,
8166 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8167 CSKYV2_ISA_1E2),
8168 /* rotri rz, rx, imm5 -> rotli rz, rx, 32-imm5 */
8169 DOP32 ("rotri",
8170 OPCODE_INFO3 (0xc4004900,
8171 (0_4, AREG, OPRND_SHIFT_0_BIT),
8172 (16_20, AREG, OPRND_SHIFT_0_BIT),
8173 (21_25, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
8174 OPCODE_INFO2 (0xc4004900,
8175 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
8176 (21_25, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
8177 CSKYV2_ISA_2E3),
8178 DOP32 ("rori",
8179 OPCODE_INFO3 (0xc4004900,
8180 (0_4, AREG, OPRND_SHIFT_0_BIT),
8181 (16_20, AREG, OPRND_SHIFT_0_BIT),
8182 (21_25, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
8183 OPCODE_INFO2 (0xc4004900,
8184 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT),
8185 (21_25, IMM5b_RORI, OPRND_SHIFT_0_BIT)),
8186 CSKYV2_ISA_2E3),
8187
8188 /* rotlc rd -> addc rd, rd/ addc rd, rd, rd */
8189 OP16_OP32_WITH_WORK ("rotlc",
8190 OPCODE_INFO2 (0x6001,
8191 (NONE, GREG0_15, OPRND_SHIFT_0_BIT),
8192 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
8193 CSKYV2_ISA_E1,
8194 OPCODE_INFO2 (0xc4000040,
8195 (NONE, AREG, OPRND_SHIFT_0_BIT),
8196 (NONE, CONST1, OPRND_SHIFT_0_BIT)),
8197 CSKYV2_ISA_2E3,
8198 v2_work_rotlc),
8199 /* not rd -> nor rd, rd, not rz, rx -> nor rz, rx, rx */
8200 OP16_OP32_WITH_WORK ("not",
8201 OPCODE_INFO1 (0x6c02,
8202 (NONE, AREG, OPRND_SHIFT_0_BIT)),
8203 CSKYV2_ISA_E1,
8204 OPCODE_INFO2 (0xc4002480,
8205 (NONE, AREG, OPRND_SHIFT_0_BIT),
8206 (NONE, AREG, OPRND_SHIFT_0_BIT)),
8207 CSKYV2_ISA_E1, v2_work_not),
8208
8209 /* Special force 32 bits instruction. */
8210 OP32 ("xtrb0.32",
8211 OPCODE_INFO2 (0xc4007020,
8212 (0_4, AREG, OPRND_SHIFT_0_BIT),
8213 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8214 CSKYV2_ISA_1E2),
8215 OP32 ("xtrb1.32",
8216 OPCODE_INFO2 (0xc4007040,
8217 (0_4, AREG, OPRND_SHIFT_0_BIT),
8218 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8219 CSKYV2_ISA_1E2),
8220 OP32 ("xtrb2.32",
8221 OPCODE_INFO2 (0xc4007080,
8222 (0_4, AREG, OPRND_SHIFT_0_BIT),
8223 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8224 CSKYV2_ISA_1E2),
8225 OP32 ("xtrb3.32",
8226 OPCODE_INFO2 (0xc4007100,
8227 (0_4, AREG, OPRND_SHIFT_0_BIT),
8228 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8229 CSKYV2_ISA_1E2),
8230 OP32 ("ff0.32",
8231 OPCODE_INFO2 (0xc4007c20,
8232 (0_4, AREG, OPRND_SHIFT_0_BIT),
8233 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8234 CSKYV2_ISA_1E2),
8235 DOP32 ("ff1.32",
8236 OPCODE_INFO2 (0xc4007c40,
8237 (0_4, AREG, OPRND_SHIFT_0_BIT),
8238 (16_20, AREG, OPRND_SHIFT_0_BIT)),
8239 OPCODE_INFO1 (0xc4007c40,
8240 (0_4or16_20, DUP_AREG, OPRND_SHIFT_0_BIT)),
8241 CSKYV2_ISA_1E2),
f24ff6e9 8242 {NULL, 0, {}, {}, 0, 0, 0, 0, 0, NULL}
b8891f8d 8243 };
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