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* m32c.cpu (Bit3-S): New.
[thirdparty/binutils-gdb.git] / opcodes / m32c-ibld.c
CommitLineData
49f58d10
JB		 1/* Instruction building/extraction support for m32c. -*- C -*-
2
e729279b
NC		 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
49f58d10 5
54d46aca 6 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006
e729279b 7 Free Software Foundation, Inc.
49f58d10 8
e729279b 9 This file is part of the GNU Binutils and GDB, the GNU debugger.
49f58d10 10
e729279b
NC		 11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
49f58d10 15
e729279b
NC		 16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
49f58d10 20
e729279b
NC		 21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
49f58d10
JB		 24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <stdio.h>
30#include "ansidecl.h"
31#include "dis-asm.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "m32c-desc.h"
35#include "m32c-opc.h"
36#include "opintl.h"
37#include "safe-ctype.h"
38
e729279b 39#undef min
49f58d10 40#define min(a,b) ((a) < (b) ? (a) : (b))
e729279b 41#undef max
49f58d10
JB		 42#define max(a,b) ((a) > (b) ? (a) : (b))
43
44/* Used by the ifield rtx function. */
45#define FLD(f) (fields->f)
46
47static const char * insert_normal
48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
50static const char * insert_insn_normal
51 (CGEN_CPU_DESC, const CGEN_INSN *,
52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
53static int extract_normal
54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
55 unsigned int, unsigned int, unsigned int, unsigned int,
56 unsigned int, unsigned int, bfd_vma, long *);
57static int extract_insn_normal
58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
60#if CGEN_INT_INSN_P
61static void put_insn_int_value
62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
63#endif
64#if ! CGEN_INT_INSN_P
65static CGEN_INLINE void insert_1
66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
67static CGEN_INLINE int fill_cache
68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
69static CGEN_INLINE long extract_1
70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
71#endif
72\f
73/* Operand insertion. */
74
75#if ! CGEN_INT_INSN_P
76
77/* Subroutine of insert_normal. */
78
79static CGEN_INLINE void
80insert_1 (CGEN_CPU_DESC cd,
81 unsigned long value,
82 int start,
83 int length,
84 int word_length,
85 unsigned char *bufp)
86{
87 unsigned long x,mask;
88 int shift;
89
90 x = cgen_get_insn_value (cd, bufp, word_length);
91
92 /* Written this way to avoid undefined behaviour. */
93 mask = (((1L << (length - 1)) - 1) << 1) | 1;
94 if (CGEN_INSN_LSB0_P)
95 shift = (start + 1) - length;
96 else
97 shift = (word_length - (start + length));
98 x = (x & ~(mask << shift)) | ((value & mask) << shift);
99
100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
101}
102
103#endif /* ! CGEN_INT_INSN_P */
104
105/* Default insertion routine.
106
107 ATTRS is a mask of the boolean attributes.
108 WORD_OFFSET is the offset in bits from the start of the insn of the value.
109 WORD_LENGTH is the length of the word in bits in which the value resides.
110 START is the starting bit number in the word, architecture origin.
111 LENGTH is the length of VALUE in bits.
112 TOTAL_LENGTH is the total length of the insn in bits.
113
114 The result is an error message or NULL if success. */
115
116/* ??? This duplicates functionality with bfd's howto table and
117 bfd_install_relocation. */
118/* ??? This doesn't handle bfd_vma's. Create another function when
119 necessary. */
120
121static const char *
122insert_normal (CGEN_CPU_DESC cd,
123 long value,
124 unsigned int attrs,
125 unsigned int word_offset,
126 unsigned int start,
127 unsigned int length,
128 unsigned int word_length,
129 unsigned int total_length,
130 CGEN_INSN_BYTES_PTR buffer)
131{
132 static char errbuf[100];
133 /* Written this way to avoid undefined behaviour. */
134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
135
136 /* If LENGTH is zero, this operand doesn't contribute to the value. */
137 if (length == 0)
138 return NULL;
139
49f58d10
JB		 140 if (word_length > 32)
141 abort ();
142
143 /* For architectures with insns smaller than the base-insn-bitsize,
144 word_length may be too big. */
145 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
146 {
147 if (word_offset == 0
148 && word_length > total_length)
149 word_length = total_length;
150 }
151
152 /* Ensure VALUE will fit. */
153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
154 {
155 long minval = - (1L << (length - 1));
156 unsigned long maxval = mask;
157
158 if ((value > 0 && (unsigned long) value > maxval)
159 || value < minval)
160 {
161 /* xgettext:c-format */
162 sprintf (errbuf,
163 _("operand out of range (%ld not between %ld and %lu)"),
164 value, minval, maxval);
165 return errbuf;
166 }
167 }
168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
169 {
170 unsigned long maxval = mask;
ed963e2d
NC		 171 unsigned long val = (unsigned long) value;
172
173 /* For hosts with a word size > 32 check to see if value has been sign
174 extended beyond 32 bits. If so then ignore these higher sign bits
175 as the user is attempting to store a 32-bit signed value into an
176 unsigned 32-bit field which is allowed. */
177 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
178 val &= 0xFFFFFFFF;
179
180 if (val > maxval)
49f58d10
JB		 181 {
182 /* xgettext:c-format */
183 sprintf (errbuf,
ed963e2d
NC		 184 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
185 val, maxval);
49f58d10
JB		 186 return errbuf;
187 }
188 }
189 else
190 {
191 if (! cgen_signed_overflow_ok_p (cd))
192 {
193 long minval = - (1L << (length - 1));
194 long maxval = (1L << (length - 1)) - 1;
195
196 if (value < minval || value > maxval)
197 {
198 sprintf
199 /* xgettext:c-format */
200 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
201 value, minval, maxval);
202 return errbuf;
203 }
204 }
205 }
206
207#if CGEN_INT_INSN_P
208
209 {
210 int shift;
211
212 if (CGEN_INSN_LSB0_P)
213 shift = (word_offset + start + 1) - length;
214 else
215 shift = total_length - (word_offset + start + length);
216 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
217 }
218
219#else /* ! CGEN_INT_INSN_P */
220
221 {
222 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
223
224 insert_1 (cd, value, start, length, word_length, bufp);
225 }
226
227#endif /* ! CGEN_INT_INSN_P */
228
229 return NULL;
230}
231
232/* Default insn builder (insert handler).
233 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
234 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
235 recorded in host byte order, otherwise BUFFER is an array of bytes
236 and the value is recorded in target byte order).
237 The result is an error message or NULL if success. */
238
239static const char *
240insert_insn_normal (CGEN_CPU_DESC cd,
241 const CGEN_INSN * insn,
242 CGEN_FIELDS * fields,
243 CGEN_INSN_BYTES_PTR buffer,
244 bfd_vma pc)
245{
246 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
247 unsigned long value;
248 const CGEN_SYNTAX_CHAR_TYPE * syn;
249
250 CGEN_INIT_INSERT (cd);
251 value = CGEN_INSN_BASE_VALUE (insn);
252
253 /* If we're recording insns as numbers (rather than a string of bytes),
254 target byte order handling is deferred until later. */
255
256#if CGEN_INT_INSN_P
257
258 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
259 CGEN_FIELDS_BITSIZE (fields), value);
260
261#else
262
263 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
264 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
265 value);
266
267#endif /* ! CGEN_INT_INSN_P */
268
269 /* ??? It would be better to scan the format's fields.
270 Still need to be able to insert a value based on the operand though;
271 e.g. storing a branch displacement that got resolved later.
272 Needs more thought first. */
273
274 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
275 {
276 const char *errmsg;
277
278 if (CGEN_SYNTAX_CHAR_P (* syn))
279 continue;
280
281 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
282 fields, buffer, pc);
283 if (errmsg)
284 return errmsg;
285 }
286
287 return NULL;
288}
289
290#if CGEN_INT_INSN_P
291/* Cover function to store an insn value into an integral insn. Must go here
e729279b 292 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
49f58d10
JB		 293
294static void
295put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
296 CGEN_INSN_BYTES_PTR buf,
297 int length,
298 int insn_length,
299 CGEN_INSN_INT value)
300{
301 /* For architectures with insns smaller than the base-insn-bitsize,
302 length may be too big. */
303 if (length > insn_length)
304 *buf = value;
305 else
306 {
307 int shift = insn_length - length;
308 /* Written this way to avoid undefined behaviour. */
309 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
e729279b 310
49f58d10
JB		 311 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
312 }
313}
314#endif
315\f
316/* Operand extraction. */
317
318#if ! CGEN_INT_INSN_P
319
320/* Subroutine of extract_normal.
321 Ensure sufficient bytes are cached in EX_INFO.
322 OFFSET is the offset in bytes from the start of the insn of the value.
323 BYTES is the length of the needed value.
324 Returns 1 for success, 0 for failure. */
325
326static CGEN_INLINE int
327fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
328 CGEN_EXTRACT_INFO *ex_info,
329 int offset,
330 int bytes,
331 bfd_vma pc)
332{
333 /* It's doubtful that the middle part has already been fetched so
334 we don't optimize that case. kiss. */
335 unsigned int mask;
336 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
337
338 /* First do a quick check. */
339 mask = (1 << bytes) - 1;
340 if (((ex_info->valid >> offset) & mask) == mask)
341 return 1;
342
343 /* Search for the first byte we need to read. */
344 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
345 if (! (mask & ex_info->valid))
346 break;
347
348 if (bytes)
349 {
350 int status;
351
352 pc += offset;
353 status = (*info->read_memory_func)
354 (pc, ex_info->insn_bytes + offset, bytes, info);
355
356 if (status != 0)
357 {
358 (*info->memory_error_func) (status, pc, info);
359 return 0;
360 }
361
362 ex_info->valid |= ((1 << bytes) - 1) << offset;
363 }
364
365 return 1;
366}
367
368/* Subroutine of extract_normal. */
369
370static CGEN_INLINE long
371extract_1 (CGEN_CPU_DESC cd,
372 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
373 int start,
374 int length,
375 int word_length,
376 unsigned char *bufp,
377 bfd_vma pc ATTRIBUTE_UNUSED)
378{
379 unsigned long x;
380 int shift;
e729279b 381
49f58d10
JB		 382 x = cgen_get_insn_value (cd, bufp, word_length);
383
384 if (CGEN_INSN_LSB0_P)
385 shift = (start + 1) - length;
386 else
387 shift = (word_length - (start + length));
388 return x >> shift;
389}
390
391#endif /* ! CGEN_INT_INSN_P */
392
393/* Default extraction routine.
394
395 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
396 or sometimes less for cases like the m32r where the base insn size is 32
397 but some insns are 16 bits.
398 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
399 but for generality we take a bitmask of all of them.
400 WORD_OFFSET is the offset in bits from the start of the insn of the value.
401 WORD_LENGTH is the length of the word in bits in which the value resides.
402 START is the starting bit number in the word, architecture origin.
403 LENGTH is the length of VALUE in bits.
404 TOTAL_LENGTH is the total length of the insn in bits.
405
406 Returns 1 for success, 0 for failure. */
407
408/* ??? The return code isn't properly used. wip. */
409
410/* ??? This doesn't handle bfd_vma's. Create another function when
411 necessary. */
412
413static int
414extract_normal (CGEN_CPU_DESC cd,
415#if ! CGEN_INT_INSN_P
416 CGEN_EXTRACT_INFO *ex_info,
417#else
418 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
419#endif
420 CGEN_INSN_INT insn_value,
421 unsigned int attrs,
422 unsigned int word_offset,
423 unsigned int start,
424 unsigned int length,
425 unsigned int word_length,
426 unsigned int total_length,
427#if ! CGEN_INT_INSN_P
428 bfd_vma pc,
429#else
430 bfd_vma pc ATTRIBUTE_UNUSED,
431#endif
432 long *valuep)
433{
434 long value, mask;
435
436 /* If LENGTH is zero, this operand doesn't contribute to the value
437 so give it a standard value of zero. */
438 if (length == 0)
439 {
440 *valuep = 0;
441 return 1;
442 }
443
49f58d10
JB		 444 if (word_length > 32)
445 abort ();
446
447 /* For architectures with insns smaller than the insn-base-bitsize,
448 word_length may be too big. */
449 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
450 {
54d46aca
DD		 451 if (word_offset + word_length > total_length)
452 word_length = total_length - word_offset;
49f58d10
JB		 453 }
454
455 /* Does the value reside in INSN_VALUE, and at the right alignment? */
456
457 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
458 {
459 if (CGEN_INSN_LSB0_P)
460 value = insn_value >> ((word_offset + start + 1) - length);
461 else
462 value = insn_value >> (total_length - ( word_offset + start + length));
463 }
464
465#if ! CGEN_INT_INSN_P
466
467 else
468 {
469 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
470
471 if (word_length > 32)
472 abort ();
473
474 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
475 return 0;
476
477 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
478 }
479
480#endif /* ! CGEN_INT_INSN_P */
481
482 /* Written this way to avoid undefined behaviour. */
483 mask = (((1L << (length - 1)) - 1) << 1) | 1;
484
485 value &= mask;
486 /* sign extend? */
487 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
488 && (value & (1L << (length - 1))))
489 value |= ~mask;
490
491 *valuep = value;
492
493 return 1;
494}
495
496/* Default insn extractor.
497
498 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
499 The extracted fields are stored in FIELDS.
500 EX_INFO is used to handle reading variable length insns.
501 Return the length of the insn in bits, or 0 if no match,
502 or -1 if an error occurs fetching data (memory_error_func will have
503 been called). */
504
505static int
506extract_insn_normal (CGEN_CPU_DESC cd,
507 const CGEN_INSN *insn,
508 CGEN_EXTRACT_INFO *ex_info,
509 CGEN_INSN_INT insn_value,
510 CGEN_FIELDS *fields,
511 bfd_vma pc)
512{
513 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
514 const CGEN_SYNTAX_CHAR_TYPE *syn;
515
516 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
517
518 CGEN_INIT_EXTRACT (cd);
519
520 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
521 {
522 int length;
523
524 if (CGEN_SYNTAX_CHAR_P (*syn))
525 continue;
526
527 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
528 ex_info, insn_value, fields, pc);
529 if (length <= 0)
530 return length;
531 }
532
533 /* We recognized and successfully extracted this insn. */
534 return CGEN_INSN_BITSIZE (insn);
535}
536\f
e729279b 537/* Machine generated code added here. */
49f58d10
JB		 538
539const char * m32c_cgen_insert_operand
e729279b 540 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
49f58d10
JB		 541
542/* Main entry point for operand insertion.
543
544 This function is basically just a big switch statement. Earlier versions
545 used tables to look up the function to use, but
546 - if the table contains both assembler and disassembler functions then
547 the disassembler contains much of the assembler and vice-versa,
548 - there's a lot of inlining possibilities as things grow,
549 - using a switch statement avoids the function call overhead.
550
551 This function could be moved into `parse_insn_normal', but keeping it
552 separate makes clear the interface between `parse_insn_normal' and each of
553 the handlers. It's also needed by GAS to insert operands that couldn't be
554 resolved during parsing. */
555
556const char *
e729279b
NC		 557m32c_cgen_insert_operand (CGEN_CPU_DESC cd,
558 int opindex,
559 CGEN_FIELDS * fields,
560 CGEN_INSN_BYTES_PTR buffer,
561 bfd_vma pc ATTRIBUTE_UNUSED)
49f58d10
JB		 562{
563 const char * errmsg = NULL;
564 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
565
566 switch (opindex)
567 {
568 case M32C_OPERAND_A0 :
569 break;
570 case M32C_OPERAND_A1 :
571 break;
572 case M32C_OPERAND_AN16_PUSH_S :
573 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
574 break;
575 case M32C_OPERAND_BIT16AN :
576 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
577 break;
578 case M32C_OPERAND_BIT16RN :
579 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
580 break;
581 case M32C_OPERAND_BIT32ANPREFIXED :
582 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
583 break;
584 case M32C_OPERAND_BIT32ANUNPREFIXED :
585 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
586 break;
587 case M32C_OPERAND_BIT32RNPREFIXED :
588 {
589 long value = fields->f_dst32_rn_prefixed_QI;
590 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
591 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
592 }
593 break;
594 case M32C_OPERAND_BIT32RNUNPREFIXED :
595 {
596 long value = fields->f_dst32_rn_unprefixed_QI;
597 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
598 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
599 }
600 break;
601 case M32C_OPERAND_BITBASE16_16_S8 :
602 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
603 break;
604 case M32C_OPERAND_BITBASE16_16_U16 :
605 {
606 long value = fields->f_dsp_16_u16;
607 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
608 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
609 }
610 break;
611 case M32C_OPERAND_BITBASE16_16_U8 :
612 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
613 break;
614 case M32C_OPERAND_BITBASE16_8_U11_S :
615 {
616{
617 FLD (f_bitno16_S) = ((FLD (f_bitbase16_u11_S)) & (7));
618 FLD (f_dsp_8_u8) = ((((unsigned int) (FLD (f_bitbase16_u11_S)) >> (3))) & (255));
619}
620 errmsg = insert_normal (cd, fields->f_bitno16_S, 0, 0, 5, 3, 32, total_length, buffer);
621 if (errmsg)
622 break;
623 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
624 if (errmsg)
625 break;
626 }
627 break;
628 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
629 {
630{
631 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s11_unprefixed)) & (7));
632 FLD (f_dsp_16_s8) = ((int) (FLD (f_bitbase32_16_s11_unprefixed)) >> (3));
633}
634 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
635 if (errmsg)
636 break;
637 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
638 if (errmsg)
639 break;
640 }
641 break;
642 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
643 {
644{
645 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_s19_unprefixed)) & (7));
646 FLD (f_dsp_16_s16) = ((int) (FLD (f_bitbase32_16_s19_unprefixed)) >> (3));
647}
648 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
649 if (errmsg)
650 break;
651 {
652 long value = fields->f_dsp_16_s16;
653 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
654 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
655 }
656 if (errmsg)
657 break;
658 }
659 break;
660 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
661 {
662{
663 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u11_unprefixed)) & (7));
664 FLD (f_dsp_16_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255));
665}
666 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
667 if (errmsg)
668 break;
669 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
670 if (errmsg)
671 break;
672 }
673 break;
674 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
675 {
676{
677 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u19_unprefixed)) & (7));
678 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535));
679}
680 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
681 if (errmsg)
682 break;
683 {
684 long value = fields->f_dsp_16_u16;
685 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
686 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
687 }
688 if (errmsg)
689 break;
690 }
691 break;
692 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
693 {
694{
695 FLD (f_bitno32_unprefixed) = ((FLD (f_bitbase32_16_u27_unprefixed)) & (7));
696 FLD (f_dsp_16_u16) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535));
697 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255));
698}
699 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
700 if (errmsg)
701 break;
702 {
703 long value = fields->f_dsp_16_u16;
704 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
705 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
706 }
707 if (errmsg)
708 break;
709 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
710 if (errmsg)
711 break;
712 }
713 break;
714 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
715 {
716{
717 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s11_prefixed)) & (7));
718 FLD (f_dsp_24_s8) = ((int) (FLD (f_bitbase32_24_s11_prefixed)) >> (3));
719}
720 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
721 if (errmsg)
722 break;
723 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
724 if (errmsg)
725 break;
726 }
727 break;
728 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
729 {
730{
731 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_s19_prefixed)) & (7));
732 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255));
733 FLD (f_dsp_32_s8) = ((int) (FLD (f_bitbase32_24_s19_prefixed)) >> (11));
734}
735 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
736 if (errmsg)
737 break;
738 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
739 if (errmsg)
740 break;
741 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
742 if (errmsg)
743 break;
744 }
745 break;
746 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
747 {
748{
749 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u11_prefixed)) & (7));
750 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255));
751}
752 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
753 if (errmsg)
754 break;
755 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
756 if (errmsg)
757 break;
758 }
759 break;
760 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
761 {
762{
763 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u19_prefixed)) & (7));
764 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255));
765 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u19_prefixed)) >> (11))) & (255));
766}
767 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
768 if (errmsg)
769 break;
770 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
771 if (errmsg)
772 break;
773 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
774 if (errmsg)
775 break;
776 }
777 break;
778 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
779 {
780{
781 FLD (f_bitno32_prefixed) = ((FLD (f_bitbase32_24_u27_prefixed)) & (7));
782 FLD (f_dsp_24_u8) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (3))) & (255));
783 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_bitbase32_24_u27_prefixed)) >> (11))) & (65535));
784}
785 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
786 if (errmsg)
787 break;
788 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
789 if (errmsg)
790 break;
791 {
792 long value = fields->f_dsp_32_u16;
793 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
794 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
795 }
796 if (errmsg)
797 break;
798 }
799 break;
800 case M32C_OPERAND_BITNO16R :
801 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
802 break;
803 case M32C_OPERAND_BITNO32PREFIXED :
804 errmsg = insert_normal (cd, fields->f_bitno32_prefixed, 0, 0, 21, 3, 32, total_length, buffer);
805 break;
806 case M32C_OPERAND_BITNO32UNPREFIXED :
807 errmsg = insert_normal (cd, fields->f_bitno32_unprefixed, 0, 0, 13, 3, 32, total_length, buffer);
808 break;
809 case M32C_OPERAND_DSP_10_U6 :
810 errmsg = insert_normal (cd, fields->f_dsp_10_u6, 0, 0, 10, 6, 32, total_length, buffer);
811 break;
812 case M32C_OPERAND_DSP_16_S16 :
813 {
814 long value = fields->f_dsp_16_s16;
815 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
816 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
817 }
818 break;
819 case M32C_OPERAND_DSP_16_S8 :
820 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
821 break;
822 case M32C_OPERAND_DSP_16_U16 :
823 {
824 long value = fields->f_dsp_16_u16;
825 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
826 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
827 }
828 break;
829 case M32C_OPERAND_DSP_16_U20 :
830 {
831{
832 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
833 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
834}
835 {
836 long value = fields->f_dsp_16_u16;
837 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
838 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
839 }
840 if (errmsg)
841 break;
842 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
843 if (errmsg)
844 break;
845 }
846 break;
847 case M32C_OPERAND_DSP_16_U24 :
848 {
849{
850 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_u24)) & (65535));
851 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_16_u24)) >> (16))) & (255));
852}
853 {
854 long value = fields->f_dsp_16_u16;
855 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
856 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
857 }
858 if (errmsg)
859 break;
860 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
861 if (errmsg)
862 break;
863 }
864 break;
865 case M32C_OPERAND_DSP_16_U8 :
866 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
867 break;
868 case M32C_OPERAND_DSP_24_S16 :
869 {
870{
871 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
872 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
873}
874 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
875 if (errmsg)
876 break;
877 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
878 if (errmsg)
879 break;
880 }
881 break;
882 case M32C_OPERAND_DSP_24_S8 :
883 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
884 break;
885 case M32C_OPERAND_DSP_24_U16 :
886 {
887{
888 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u16)) & (255));
889 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_u16)) >> (8))) & (255));
890}
891 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
892 if (errmsg)
893 break;
894 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
895 if (errmsg)
896 break;
897 }
898 break;
899 case M32C_OPERAND_DSP_24_U20 :
900 {
901{
902 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
903 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
904}
905 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
906 if (errmsg)
907 break;
908 {
909 long value = fields->f_dsp_32_u16;
910 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
911 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
912 }
913 if (errmsg)
914 break;
915 }
916 break;
917 case M32C_OPERAND_DSP_24_U24 :
918 {
919{
920 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_u24)) & (255));
921 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_24_u24)) >> (8))) & (65535));
922}
923 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
924 if (errmsg)
925 break;
926 {
927 long value = fields->f_dsp_32_u16;
928 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
929 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
930 }
931 if (errmsg)
932 break;
933 }
934 break;
935 case M32C_OPERAND_DSP_24_U8 :
936 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
937 break;
938 case M32C_OPERAND_DSP_32_S16 :
939 {
940 long value = fields->f_dsp_32_s16;
941 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
942 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
943 }
944 break;
945 case M32C_OPERAND_DSP_32_S8 :
946 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
947 break;
948 case M32C_OPERAND_DSP_32_U16 :
949 {
950 long value = fields->f_dsp_32_u16;
951 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
952 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
953 }
954 break;
955 case M32C_OPERAND_DSP_32_U20 :
956 {
957 long value = fields->f_dsp_32_u24;
958 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
959 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
960 }
961 break;
962 case M32C_OPERAND_DSP_32_U24 :
963 {
964 long value = fields->f_dsp_32_u24;
965 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
966 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
967 }
968 break;
969 case M32C_OPERAND_DSP_32_U8 :
970 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
971 break;
972 case M32C_OPERAND_DSP_40_S16 :
973 {
974 long value = fields->f_dsp_40_s16;
975 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
976 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
977 }
978 break;
979 case M32C_OPERAND_DSP_40_S8 :
980 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
981 break;
982 case M32C_OPERAND_DSP_40_U16 :
983 {
984 long value = fields->f_dsp_40_u16;
985 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
986 errmsg = insert_normal (cd, value, 0, 32, 8, 16, 32, total_length, buffer);
987 }
988 break;
989 case M32C_OPERAND_DSP_40_U24 :
990 {
991 long value = fields->f_dsp_40_u24;
992 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
993 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
994 }
995 break;
996 case M32C_OPERAND_DSP_40_U8 :
997 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
998 break;
999 case M32C_OPERAND_DSP_48_S16 :
1000 {
1001 long value = fields->f_dsp_48_s16;
1002 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1003 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1004 }
1005 break;
1006 case M32C_OPERAND_DSP_48_S8 :
1007 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1008 break;
1009 case M32C_OPERAND_DSP_48_U16 :
1010 {
1011 long value = fields->f_dsp_48_u16;
1012 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1013 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1014 }
1015 break;
1016 case M32C_OPERAND_DSP_48_U24 :
1017 {
1018{
1019 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_48_u24)) >> (16))) & (255));
1020 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_u24)) & (65535));
1021}
1022 {
1023 long value = fields->f_dsp_48_u16;
1024 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1025 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1026 }
1027 if (errmsg)
1028 break;
1029 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1030 if (errmsg)
1031 break;
1032 }
1033 break;
1034 case M32C_OPERAND_DSP_48_U8 :
1035 errmsg = insert_normal (cd, fields->f_dsp_48_u8, 0, 32, 16, 8, 32, total_length, buffer);
1036 break;
f75eb1c0
DD		 1037 case M32C_OPERAND_DSP_8_S24 :
1038 {
1039 long value = fields->f_dsp_8_s24;
1040 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
1041 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, buffer);
1042 }
1043 break;
49f58d10
JB		 1044 case M32C_OPERAND_DSP_8_S8 :
1045 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1046 break;
1047 case M32C_OPERAND_DSP_8_U16 :
1048 {
1049 long value = fields->f_dsp_8_u16;
1050 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1051 errmsg = insert_normal (cd, value, 0, 0, 8, 16, 32, total_length, buffer);
1052 }
1053 break;
e729279b
NC		 1054 case M32C_OPERAND_DSP_8_U24 :
1055 {
1056 long value = fields->f_dsp_8_u24;
1057 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1058 errmsg = insert_normal (cd, value, 0, 0, 8, 24, 32, total_length, buffer);
1059 }
1060 break;
49f58d10
JB		 1061 case M32C_OPERAND_DSP_8_U6 :
1062 errmsg = insert_normal (cd, fields->f_dsp_8_u6, 0, 0, 8, 6, 32, total_length, buffer);
1063 break;
1064 case M32C_OPERAND_DSP_8_U8 :
1065 errmsg = insert_normal (cd, fields->f_dsp_8_u8, 0, 0, 8, 8, 32, total_length, buffer);
1066 break;
1067 case M32C_OPERAND_DST16AN :
1068 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1069 break;
1070 case M32C_OPERAND_DST16AN_S :
1071 errmsg = insert_normal (cd, fields->f_dst16_an_s, 0, 0, 4, 1, 32, total_length, buffer);
1072 break;
1073 case M32C_OPERAND_DST16ANHI :
1074 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1075 break;
1076 case M32C_OPERAND_DST16ANQI :
1077 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1078 break;
1079 case M32C_OPERAND_DST16ANQI_S :
1080 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1081 break;
1082 case M32C_OPERAND_DST16ANSI :
1083 errmsg = insert_normal (cd, fields->f_dst16_an, 0, 0, 15, 1, 32, total_length, buffer);
1084 break;
1085 case M32C_OPERAND_DST16RNEXTQI :
1086 errmsg = insert_normal (cd, fields->f_dst16_rn_ext, 0, 0, 14, 1, 32, total_length, buffer);
1087 break;
1088 case M32C_OPERAND_DST16RNHI :
1089 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1090 break;
1091 case M32C_OPERAND_DST16RNQI :
1092 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1093 break;
1094 case M32C_OPERAND_DST16RNQI_S :
1095 errmsg = insert_normal (cd, fields->f_dst16_rn_QI_s, 0, 0, 5, 1, 32, total_length, buffer);
1096 break;
1097 case M32C_OPERAND_DST16RNSI :
1098 errmsg = insert_normal (cd, fields->f_dst16_rn, 0, 0, 14, 2, 32, total_length, buffer);
1099 break;
1100 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
1101 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1102 break;
1103 case M32C_OPERAND_DST32ANPREFIXED :
1104 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1105 break;
1106 case M32C_OPERAND_DST32ANPREFIXEDHI :
1107 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1108 break;
1109 case M32C_OPERAND_DST32ANPREFIXEDQI :
1110 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1111 break;
1112 case M32C_OPERAND_DST32ANPREFIXEDSI :
1113 errmsg = insert_normal (cd, fields->f_dst32_an_prefixed, 0, 0, 17, 1, 32, total_length, buffer);
1114 break;
1115 case M32C_OPERAND_DST32ANUNPREFIXED :
1116 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1117 break;
1118 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
1119 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1120 break;
1121 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
1122 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1123 break;
1124 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
1125 errmsg = insert_normal (cd, fields->f_dst32_an_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1126 break;
1127 case M32C_OPERAND_DST32R0HI_S :
1128 break;
1129 case M32C_OPERAND_DST32R0QI_S :
1130 break;
1131 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
1132 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1133 break;
1134 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
1135 errmsg = insert_normal (cd, fields->f_dst32_rn_ext_unprefixed, 0, 0, 9, 1, 32, total_length, buffer);
1136 break;
1137 case M32C_OPERAND_DST32RNPREFIXEDHI :
1138 {
1139 long value = fields->f_dst32_rn_prefixed_HI;
1140 value = ((((value) + (2))) % (4));
1141 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1142 }
1143 break;
1144 case M32C_OPERAND_DST32RNPREFIXEDQI :
1145 {
1146 long value = fields->f_dst32_rn_prefixed_QI;
1147 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1148 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1149 }
1150 break;
1151 case M32C_OPERAND_DST32RNPREFIXEDSI :
1152 {
1153 long value = fields->f_dst32_rn_prefixed_SI;
1154 value = ((value) + (2));
1155 errmsg = insert_normal (cd, value, 0, 0, 16, 2, 32, total_length, buffer);
1156 }
1157 break;
1158 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
1159 {
1160 long value = fields->f_dst32_rn_unprefixed_HI;
1161 value = ((((value) + (2))) % (4));
1162 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1163 }
1164 break;
1165 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
1166 {
1167 long value = fields->f_dst32_rn_unprefixed_QI;
1168 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1169 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1170 }
1171 break;
1172 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
1173 {
1174 long value = fields->f_dst32_rn_unprefixed_SI;
1175 value = ((value) + (2));
1176 errmsg = insert_normal (cd, value, 0, 0, 8, 2, 32, total_length, buffer);
1177 }
1178 break;
1179 case M32C_OPERAND_G :
1180 break;
1181 case M32C_OPERAND_IMM_12_S4 :
1182 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1183 break;
c6552317
DD		 1184 case M32C_OPERAND_IMM_12_S4N :
1185 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1186 break;
49f58d10
JB		 1187 case M32C_OPERAND_IMM_13_U3 :
1188 errmsg = insert_normal (cd, fields->f_imm_13_u3, 0, 0, 13, 3, 32, total_length, buffer);
1189 break;
1190 case M32C_OPERAND_IMM_16_HI :
1191 {
1192 long value = fields->f_dsp_16_s16;
1193 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1194 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, buffer);
1195 }
1196 break;
1197 case M32C_OPERAND_IMM_16_QI :
1198 errmsg = insert_normal (cd, fields->f_dsp_16_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, buffer);
1199 break;
1200 case M32C_OPERAND_IMM_16_SI :
1201 {
1202{
1203 FLD (f_dsp_32_u16) = ((((unsigned int) (FLD (f_dsp_16_s32)) >> (16))) & (65535));
1204 FLD (f_dsp_16_u16) = ((FLD (f_dsp_16_s32)) & (65535));
1205}
1206 {
1207 long value = fields->f_dsp_16_u16;
1208 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1209 errmsg = insert_normal (cd, value, 0, 0, 16, 16, 32, total_length, buffer);
1210 }
1211 if (errmsg)
1212 break;
1213 {
1214 long value = fields->f_dsp_32_u16;
1215 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1216 errmsg = insert_normal (cd, value, 0, 32, 0, 16, 32, total_length, buffer);
1217 }
1218 if (errmsg)
1219 break;
1220 }
1221 break;
1222 case M32C_OPERAND_IMM_20_S4 :
1223 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1224 break;
1225 case M32C_OPERAND_IMM_24_HI :
1226 {
1227{
1228 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s16)) & (255));
1229 FLD (f_dsp_32_u8) = ((((unsigned int) (FLD (f_dsp_24_s16)) >> (8))) & (255));
1230}
1231 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1232 if (errmsg)
1233 break;
1234 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1235 if (errmsg)
1236 break;
1237 }
1238 break;
1239 case M32C_OPERAND_IMM_24_QI :
1240 errmsg = insert_normal (cd, fields->f_dsp_24_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, buffer);
1241 break;
1242 case M32C_OPERAND_IMM_24_SI :
1243 {
1244{
1245 FLD (f_dsp_32_u24) = ((((unsigned int) (FLD (f_dsp_24_s32)) >> (8))) & (16777215));
1246 FLD (f_dsp_24_u8) = ((FLD (f_dsp_24_s32)) & (255));
1247}
1248 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1249 if (errmsg)
1250 break;
1251 {
1252 long value = fields->f_dsp_32_u24;
1253 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1254 errmsg = insert_normal (cd, value, 0, 32, 0, 24, 32, total_length, buffer);
1255 }
1256 if (errmsg)
1257 break;
1258 }
1259 break;
1260 case M32C_OPERAND_IMM_32_HI :
1261 {
1262 long value = fields->f_dsp_32_s16;
1263 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1264 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, buffer);
1265 }
1266 break;
1267 case M32C_OPERAND_IMM_32_QI :
1268 errmsg = insert_normal (cd, fields->f_dsp_32_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, buffer);
1269 break;
1270 case M32C_OPERAND_IMM_32_SI :
1271 {
1272 long value = fields->f_dsp_32_s32;
1273 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
1274 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, buffer);
1275 }
1276 break;
1277 case M32C_OPERAND_IMM_40_HI :
1278 {
1279 long value = fields->f_dsp_40_s16;
1280 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1281 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, buffer);
1282 }
1283 break;
1284 case M32C_OPERAND_IMM_40_QI :
1285 errmsg = insert_normal (cd, fields->f_dsp_40_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, buffer);
1286 break;
1287 case M32C_OPERAND_IMM_40_SI :
1288 {
1289{
1290 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_40_s32)) >> (24))) & (255));
1291 FLD (f_dsp_40_u24) = ((FLD (f_dsp_40_s32)) & (16777215));
1292}
1293 {
1294 long value = fields->f_dsp_40_u24;
1295 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
1296 errmsg = insert_normal (cd, value, 0, 32, 8, 24, 32, total_length, buffer);
1297 }
1298 if (errmsg)
1299 break;
1300 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1301 if (errmsg)
1302 break;
1303 }
1304 break;
1305 case M32C_OPERAND_IMM_48_HI :
1306 {
1307 long value = fields->f_dsp_48_s16;
1308 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1309 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, buffer);
1310 }
1311 break;
1312 case M32C_OPERAND_IMM_48_QI :
1313 errmsg = insert_normal (cd, fields->f_dsp_48_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, buffer);
1314 break;
1315 case M32C_OPERAND_IMM_48_SI :
1316 {
1317{
1318 FLD (f_dsp_64_u16) = ((((unsigned int) (FLD (f_dsp_48_s32)) >> (16))) & (65535));
1319 FLD (f_dsp_48_u16) = ((FLD (f_dsp_48_s32)) & (65535));
1320}
1321 {
1322 long value = fields->f_dsp_48_u16;
1323 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1324 errmsg = insert_normal (cd, value, 0, 32, 16, 16, 32, total_length, buffer);
1325 }
1326 if (errmsg)
1327 break;
1328 {
1329 long value = fields->f_dsp_64_u16;
1330 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1331 errmsg = insert_normal (cd, value, 0, 64, 0, 16, 32, total_length, buffer);
1332 }
1333 if (errmsg)
1334 break;
1335 }
1336 break;
1337 case M32C_OPERAND_IMM_56_HI :
1338 {
1339{
1340 FLD (f_dsp_56_u8) = ((FLD (f_dsp_56_s16)) & (255));
1341 FLD (f_dsp_64_u8) = ((((unsigned int) (FLD (f_dsp_56_s16)) >> (8))) & (255));
1342}
1343 errmsg = insert_normal (cd, fields->f_dsp_56_u8, 0, 32, 24, 8, 32, total_length, buffer);
1344 if (errmsg)
1345 break;
1346 errmsg = insert_normal (cd, fields->f_dsp_64_u8, 0, 64, 0, 8, 32, total_length, buffer);
1347 if (errmsg)
1348 break;
1349 }
1350 break;
1351 case M32C_OPERAND_IMM_56_QI :
1352 errmsg = insert_normal (cd, fields->f_dsp_56_s8, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, buffer);
1353 break;
1354 case M32C_OPERAND_IMM_64_HI :
1355 {
1356 long value = fields->f_dsp_64_s16;
1357 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1358 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, buffer);
1359 }
1360 break;
1361 case M32C_OPERAND_IMM_8_HI :
1362 {
1363 long value = fields->f_dsp_8_s16;
1364 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1365 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, buffer);
1366 }
1367 break;
1368 case M32C_OPERAND_IMM_8_QI :
1369 errmsg = insert_normal (cd, fields->f_dsp_8_s8, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, buffer);
1370 break;
1371 case M32C_OPERAND_IMM_8_S4 :
1372 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1373 break;
c6552317
DD		 1374 case M32C_OPERAND_IMM_8_S4N :
1375 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1376 break;
49f58d10
JB		 1377 case M32C_OPERAND_IMM_SH_12_S4 :
1378 errmsg = insert_normal (cd, fields->f_imm_12_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, buffer);
1379 break;
1380 case M32C_OPERAND_IMM_SH_20_S4 :
1381 errmsg = insert_normal (cd, fields->f_imm_20_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, buffer);
1382 break;
1383 case M32C_OPERAND_IMM_SH_8_S4 :
1384 errmsg = insert_normal (cd, fields->f_imm_8_s4, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, buffer);
1385 break;
1386 case M32C_OPERAND_IMM1_S :
1387 {
1388 long value = fields->f_imm1_S;
1389 value = ((value) - (1));
1390 errmsg = insert_normal (cd, value, 0, 0, 2, 1, 32, total_length, buffer);
1391 }
1392 break;
1393 case M32C_OPERAND_IMM3_S :
1394 {
1395{
1396 FLD (f_7_1) = ((((FLD (f_imm3_S)) - (1))) & (1));
1397 FLD (f_2_2) = ((((unsigned int) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3));
1398}
1399 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1400 if (errmsg)
1401 break;
1402 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1403 if (errmsg)
1404 break;
1405 }
1406 break;
1407 case M32C_OPERAND_LAB_16_8 :
1408 {
1409 long value = fields->f_lab_16_8;
1410 value = ((value) - (((pc) + (2))));
1411 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, buffer);
1412 }
1413 break;
1414 case M32C_OPERAND_LAB_24_8 :
1415 {
1416 long value = fields->f_lab_24_8;
1417 value = ((value) - (((pc) + (2))));
1418 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, buffer);
1419 }
1420 break;
1421 case M32C_OPERAND_LAB_32_8 :
1422 {
1423 long value = fields->f_lab_32_8;
1424 value = ((value) - (((pc) + (2))));
1425 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, buffer);
1426 }
1427 break;
1428 case M32C_OPERAND_LAB_40_8 :
1429 {
1430 long value = fields->f_lab_40_8;
1431 value = ((value) - (((pc) + (2))));
1432 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, buffer);
1433 }
1434 break;
1435 case M32C_OPERAND_LAB_5_3 :
1436 {
1437 long value = fields->f_lab_5_3;
1438 value = ((value) - (((pc) + (2))));
e729279b 1439 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, buffer);
49f58d10
JB		 1440 }
1441 break;
1442 case M32C_OPERAND_LAB_8_16 :
1443 {
1444 long value = fields->f_lab_8_16;
1445 value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((unsigned int) (((((value) - (((pc) + (1))))) & (65535))) >> (8))));
1446 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer);
1447 }
1448 break;
1449 case M32C_OPERAND_LAB_8_24 :
1450 {
1451 long value = fields->f_lab_8_24;
1452 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
1453 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, buffer);
1454 }
1455 break;
1456 case M32C_OPERAND_LAB_8_8 :
1457 {
1458 long value = fields->f_lab_8_8;
1459 value = ((value) - (((pc) + (1))));
1460 errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, buffer);
1461 }
1462 break;
1463 case M32C_OPERAND_LAB32_JMP_S :
1464 {
1465{
e729279b
NC		 1466 SI tmp_val;
1467 tmp_val = ((((FLD (f_lab32_jmp_s)) - (pc))) - (2));
1468 FLD (f_7_1) = ((tmp_val) & (1));
1469 FLD (f_2_2) = ((unsigned int) (tmp_val) >> (1));
49f58d10
JB		 1470}
1471 errmsg = insert_normal (cd, fields->f_2_2, 0, 0, 2, 2, 32, total_length, buffer);
1472 if (errmsg)
1473 break;
1474 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1475 if (errmsg)
1476 break;
1477 }
1478 break;
1479 case M32C_OPERAND_Q :
1480 break;
1481 case M32C_OPERAND_R0 :
1482 break;
1483 case M32C_OPERAND_R0H :
1484 break;
1485 case M32C_OPERAND_R0L :
1486 break;
1487 case M32C_OPERAND_R1 :
1488 break;
1489 case M32C_OPERAND_R1R2R0 :
1490 break;
1491 case M32C_OPERAND_R2 :
1492 break;
1493 case M32C_OPERAND_R2R0 :
1494 break;
1495 case M32C_OPERAND_R3 :
1496 break;
1497 case M32C_OPERAND_R3R1 :
1498 break;
1499 case M32C_OPERAND_REGSETPOP :
1500 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1501 break;
1502 case M32C_OPERAND_REGSETPUSH :
1503 errmsg = insert_normal (cd, fields->f_8_8, 0, 0, 8, 8, 32, total_length, buffer);
1504 break;
1505 case M32C_OPERAND_RN16_PUSH_S :
1506 errmsg = insert_normal (cd, fields->f_4_1, 0, 0, 4, 1, 32, total_length, buffer);
1507 break;
1508 case M32C_OPERAND_S :
1509 break;
1510 case M32C_OPERAND_SRC16AN :
1511 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1512 break;
1513 case M32C_OPERAND_SRC16ANHI :
1514 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1515 break;
1516 case M32C_OPERAND_SRC16ANQI :
1517 errmsg = insert_normal (cd, fields->f_src16_an, 0, 0, 11, 1, 32, total_length, buffer);
1518 break;
1519 case M32C_OPERAND_SRC16RNHI :
1520 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1521 break;
1522 case M32C_OPERAND_SRC16RNQI :
1523 errmsg = insert_normal (cd, fields->f_src16_rn, 0, 0, 10, 2, 32, total_length, buffer);
1524 break;
1525 case M32C_OPERAND_SRC32ANPREFIXED :
1526 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1527 break;
1528 case M32C_OPERAND_SRC32ANPREFIXEDHI :
1529 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1530 break;
1531 case M32C_OPERAND_SRC32ANPREFIXEDQI :
1532 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1533 break;
1534 case M32C_OPERAND_SRC32ANPREFIXEDSI :
1535 errmsg = insert_normal (cd, fields->f_src32_an_prefixed, 0, 0, 19, 1, 32, total_length, buffer);
1536 break;
1537 case M32C_OPERAND_SRC32ANUNPREFIXED :
1538 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1539 break;
1540 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
1541 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1542 break;
1543 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
1544 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1545 break;
1546 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
1547 errmsg = insert_normal (cd, fields->f_src32_an_unprefixed, 0, 0, 11, 1, 32, total_length, buffer);
1548 break;
1549 case M32C_OPERAND_SRC32RNPREFIXEDHI :
1550 {
1551 long value = fields->f_src32_rn_prefixed_HI;
1552 value = ((((value) + (2))) % (4));
1553 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1554 }
1555 break;
1556 case M32C_OPERAND_SRC32RNPREFIXEDQI :
1557 {
1558 long value = fields->f_src32_rn_prefixed_QI;
1559 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1560 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1561 }
1562 break;
1563 case M32C_OPERAND_SRC32RNPREFIXEDSI :
1564 {
1565 long value = fields->f_src32_rn_prefixed_SI;
1566 value = ((value) + (2));
1567 errmsg = insert_normal (cd, value, 0, 0, 18, 2, 32, total_length, buffer);
1568 }
1569 break;
1570 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
1571 {
1572 long value = fields->f_src32_rn_unprefixed_HI;
1573 value = ((((value) + (2))) % (4));
1574 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1575 }
1576 break;
1577 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
1578 {
1579 long value = fields->f_src32_rn_unprefixed_QI;
1580 value = (((((((~ (value))) << (1))) & (2))) | (((((unsigned int) (value) >> (1))) & (1))));
1581 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1582 }
1583 break;
1584 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
1585 {
1586 long value = fields->f_src32_rn_unprefixed_SI;
1587 value = ((value) + (2));
1588 errmsg = insert_normal (cd, value, 0, 0, 10, 2, 32, total_length, buffer);
1589 }
1590 break;
1591 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
1592 errmsg = insert_normal (cd, fields->f_5_1, 0, 0, 5, 1, 32, total_length, buffer);
1593 break;
1594 case M32C_OPERAND_X :
1595 break;
1596 case M32C_OPERAND_Z :
1597 break;
1598 case M32C_OPERAND_COND16_16 :
1599 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1600 break;
1601 case M32C_OPERAND_COND16_24 :
1602 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1603 break;
1604 case M32C_OPERAND_COND16_32 :
1605 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1606 break;
1607 case M32C_OPERAND_COND16C :
1608 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1609 break;
1610 case M32C_OPERAND_COND16J :
1611 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1612 break;
1613 case M32C_OPERAND_COND16J5 :
1614 errmsg = insert_normal (cd, fields->f_cond16j_5, 0, 0, 5, 3, 32, total_length, buffer);
1615 break;
1616 case M32C_OPERAND_COND32 :
1617 {
1618{
1619 FLD (f_9_1) = ((((unsigned int) (FLD (f_cond32)) >> (3))) & (1));
1620 FLD (f_13_3) = ((FLD (f_cond32)) & (7));
1621}
1622 errmsg = insert_normal (cd, fields->f_9_1, 0, 0, 9, 1, 32, total_length, buffer);
1623 if (errmsg)
1624 break;
1625 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1626 if (errmsg)
1627 break;
1628 }
1629 break;
1630 case M32C_OPERAND_COND32_16 :
1631 errmsg = insert_normal (cd, fields->f_dsp_16_u8, 0, 0, 16, 8, 32, total_length, buffer);
1632 break;
1633 case M32C_OPERAND_COND32_24 :
1634 errmsg = insert_normal (cd, fields->f_dsp_24_u8, 0, 0, 24, 8, 32, total_length, buffer);
1635 break;
1636 case M32C_OPERAND_COND32_32 :
1637 errmsg = insert_normal (cd, fields->f_dsp_32_u8, 0, 32, 0, 8, 32, total_length, buffer);
1638 break;
1639 case M32C_OPERAND_COND32_40 :
1640 errmsg = insert_normal (cd, fields->f_dsp_40_u8, 0, 32, 8, 8, 32, total_length, buffer);
1641 break;
1642 case M32C_OPERAND_COND32J :
1643 {
1644{
1645 FLD (f_1_3) = ((((unsigned int) (FLD (f_cond32j)) >> (1))) & (7));
1646 FLD (f_7_1) = ((FLD (f_cond32j)) & (1));
1647}
1648 errmsg = insert_normal (cd, fields->f_1_3, 0, 0, 1, 3, 32, total_length, buffer);
1649 if (errmsg)
1650 break;
1651 errmsg = insert_normal (cd, fields->f_7_1, 0, 0, 7, 1, 32, total_length, buffer);
1652 if (errmsg)
1653 break;
1654 }
1655 break;
1656 case M32C_OPERAND_CR1_PREFIXED_32 :
1657 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1658 break;
1659 case M32C_OPERAND_CR1_UNPREFIXED_32 :
1660 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1661 break;
1662 case M32C_OPERAND_CR16 :
1663 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1664 break;
1665 case M32C_OPERAND_CR2_32 :
1666 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1667 break;
1668 case M32C_OPERAND_CR3_PREFIXED_32 :
1669 errmsg = insert_normal (cd, fields->f_21_3, 0, 0, 21, 3, 32, total_length, buffer);
1670 break;
1671 case M32C_OPERAND_CR3_UNPREFIXED_32 :
1672 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1673 break;
1674 case M32C_OPERAND_FLAGS16 :
1675 errmsg = insert_normal (cd, fields->f_9_3, 0, 0, 9, 3, 32, total_length, buffer);
1676 break;
1677 case M32C_OPERAND_FLAGS32 :
1678 errmsg = insert_normal (cd, fields->f_13_3, 0, 0, 13, 3, 32, total_length, buffer);
1679 break;
1680 case M32C_OPERAND_SCCOND32 :
1681 errmsg = insert_normal (cd, fields->f_cond16, 0, 0, 12, 4, 32, total_length, buffer);
1682 break;
1683 case M32C_OPERAND_SIZE :
1684 break;
1685
1686 default :
1687 /* xgettext:c-format */
1688 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
1689 opindex);
1690 abort ();
1691 }
1692
1693 return errmsg;
1694}
1695
1696int m32c_cgen_extract_operand
e729279b 1697 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
49f58d10
JB		 1698
1699/* Main entry point for operand extraction.
1700 The result is <= 0 for error, >0 for success.
1701 ??? Actual values aren't well defined right now.
1702
1703 This function is basically just a big switch statement. Earlier versions
1704 used tables to look up the function to use, but
1705 - if the table contains both assembler and disassembler functions then
1706 the disassembler contains much of the assembler and vice-versa,
1707 - there's a lot of inlining possibilities as things grow,
1708 - using a switch statement avoids the function call overhead.
1709
1710 This function could be moved into `print_insn_normal', but keeping it
1711 separate makes clear the interface between `print_insn_normal' and each of
1712 the handlers. */
1713
1714int
e729279b
NC		 1715m32c_cgen_extract_operand (CGEN_CPU_DESC cd,
1716 int opindex,
1717 CGEN_EXTRACT_INFO *ex_info,
1718 CGEN_INSN_INT insn_value,
1719 CGEN_FIELDS * fields,
1720 bfd_vma pc)
49f58d10
JB		 1721{
1722 /* Assume success (for those operands that are nops). */
1723 int length = 1;
1724 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
1725
1726 switch (opindex)
1727 {
1728 case M32C_OPERAND_A0 :
1729 break;
1730 case M32C_OPERAND_A1 :
1731 break;
1732 case M32C_OPERAND_AN16_PUSH_S :
1733 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
1734 break;
1735 case M32C_OPERAND_BIT16AN :
1736 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
1737 break;
1738 case M32C_OPERAND_BIT16RN :
1739 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
1740 break;
1741 case M32C_OPERAND_BIT32ANPREFIXED :
1742 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
1743 break;
1744 case M32C_OPERAND_BIT32ANUNPREFIXED :
1745 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
1746 break;
1747 case M32C_OPERAND_BIT32RNPREFIXED :
1748 {
1749 long value;
1750 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
1751 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1752 fields->f_dst32_rn_prefixed_QI = value;
1753 }
1754 break;
1755 case M32C_OPERAND_BIT32RNUNPREFIXED :
1756 {
1757 long value;
1758 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
1759 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
1760 fields->f_dst32_rn_unprefixed_QI = value;
1761 }
1762 break;
1763 case M32C_OPERAND_BITBASE16_16_S8 :
1764 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1765 break;
1766 case M32C_OPERAND_BITBASE16_16_U16 :
1767 {
1768 long value;
1769 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1770 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1771 fields->f_dsp_16_u16 = value;
1772 }
1773 break;
1774 case M32C_OPERAND_BITBASE16_16_U8 :
1775 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1776 break;
1777 case M32C_OPERAND_BITBASE16_8_U11_S :
1778 {
1779 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_bitno16_S);
1780 if (length <= 0) break;
1781 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
1782 if (length <= 0) break;
1783{
1784 FLD (f_bitbase16_u11_S) = ((((FLD (f_dsp_8_u8)) << (3))) | (FLD (f_bitno16_S)));
1785}
1786 }
1787 break;
1788 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
1789 {
1790 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1791 if (length <= 0) break;
1792 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1793 if (length <= 0) break;
1794{
1795 FLD (f_bitbase32_16_s11_unprefixed) = ((((FLD (f_dsp_16_s8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1796}
1797 }
1798 break;
1799 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
1800 {
1801 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1802 if (length <= 0) break;
1803 {
1804 long value;
1805 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1806 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1807 fields->f_dsp_16_s16 = value;
1808 }
1809 if (length <= 0) break;
1810{
1811 FLD (f_bitbase32_16_s19_unprefixed) = ((((FLD (f_dsp_16_s16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1812}
1813 }
1814 break;
1815 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
1816 {
1817 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1818 if (length <= 0) break;
1819 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1820 if (length <= 0) break;
1821{
1822 FLD (f_bitbase32_16_u11_unprefixed) = ((((FLD (f_dsp_16_u8)) << (3))) | (FLD (f_bitno32_unprefixed)));
1823}
1824 }
1825 break;
1826 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
1827 {
1828 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1829 if (length <= 0) break;
1830 {
1831 long value;
1832 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1833 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1834 fields->f_dsp_16_u16 = value;
1835 }
1836 if (length <= 0) break;
1837{
1838 FLD (f_bitbase32_16_u19_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (FLD (f_bitno32_unprefixed)));
1839}
1840 }
1841 break;
1842 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
1843 {
1844 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1845 if (length <= 0) break;
1846 {
1847 long value;
1848 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1849 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1850 fields->f_dsp_16_u16 = value;
1851 }
1852 if (length <= 0) break;
1853 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1854 if (length <= 0) break;
1855{
1856 FLD (f_bitbase32_16_u27_unprefixed) = ((((FLD (f_dsp_16_u16)) << (3))) | (((((FLD (f_dsp_32_u8)) << (19))) | (FLD (f_bitno32_unprefixed)))));
1857}
1858 }
1859 break;
1860 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
1861 {
1862 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1863 if (length <= 0) break;
1864 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
1865 if (length <= 0) break;
1866{
1867 FLD (f_bitbase32_24_s11_prefixed) = ((((FLD (f_dsp_24_s8)) << (3))) | (FLD (f_bitno32_prefixed)));
1868}
1869 }
1870 break;
1871 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
1872 {
1873 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1874 if (length <= 0) break;
1875 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1876 if (length <= 0) break;
1877 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
1878 if (length <= 0) break;
1879{
1880 FLD (f_bitbase32_24_s19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_s8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1881}
1882 }
1883 break;
1884 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
1885 {
1886 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1887 if (length <= 0) break;
1888 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1889 if (length <= 0) break;
1890{
1891 FLD (f_bitbase32_24_u11_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (FLD (f_bitno32_prefixed)));
1892}
1893 }
1894 break;
1895 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
1896 {
1897 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1898 if (length <= 0) break;
1899 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1900 if (length <= 0) break;
1901 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1902 if (length <= 0) break;
1903{
1904 FLD (f_bitbase32_24_u19_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u8)) << (11))) | (FLD (f_bitno32_prefixed)))));
1905}
1906 }
1907 break;
1908 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
1909 {
1910 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1911 if (length <= 0) break;
1912 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1913 if (length <= 0) break;
1914 {
1915 long value;
1916 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
1917 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1918 fields->f_dsp_32_u16 = value;
1919 }
1920 if (length <= 0) break;
1921{
1922 FLD (f_bitbase32_24_u27_prefixed) = ((((FLD (f_dsp_24_u8)) << (3))) | (((((FLD (f_dsp_32_u16)) << (11))) | (FLD (f_bitno32_prefixed)))));
1923}
1924 }
1925 break;
1926 case M32C_OPERAND_BITNO16R :
1927 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1928 break;
1929 case M32C_OPERAND_BITNO32PREFIXED :
1930 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_bitno32_prefixed);
1931 break;
1932 case M32C_OPERAND_BITNO32UNPREFIXED :
1933 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_bitno32_unprefixed);
1934 break;
1935 case M32C_OPERAND_DSP_10_U6 :
1936 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 6, 32, total_length, pc, & fields->f_dsp_10_u6);
1937 break;
1938 case M32C_OPERAND_DSP_16_S16 :
1939 {
1940 long value;
1941 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
1942 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
1943 fields->f_dsp_16_s16 = value;
1944 }
1945 break;
1946 case M32C_OPERAND_DSP_16_S8 :
1947 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
1948 break;
1949 case M32C_OPERAND_DSP_16_U16 :
1950 {
1951 long value;
1952 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1953 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1954 fields->f_dsp_16_u16 = value;
1955 }
1956 break;
1957 case M32C_OPERAND_DSP_16_U20 :
1958 {
1959 {
1960 long value;
1961 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1962 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1963 fields->f_dsp_16_u16 = value;
1964 }
1965 if (length <= 0) break;
1966 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1967 if (length <= 0) break;
1968{
1969 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1970}
1971 }
1972 break;
1973 case M32C_OPERAND_DSP_16_U24 :
1974 {
1975 {
1976 long value;
1977 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
1978 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
1979 fields->f_dsp_16_u16 = value;
1980 }
1981 if (length <= 0) break;
1982 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1983 if (length <= 0) break;
1984{
1985 FLD (f_dsp_16_u24) = ((((FLD (f_dsp_32_u8)) << (16))) | (FLD (f_dsp_16_u16)));
1986}
1987 }
1988 break;
1989 case M32C_OPERAND_DSP_16_U8 :
1990 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
1991 break;
1992 case M32C_OPERAND_DSP_24_S16 :
1993 {
1994 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
1995 if (length <= 0) break;
1996 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
1997 if (length <= 0) break;
1998{
1999 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2000}
2001 }
2002 break;
2003 case M32C_OPERAND_DSP_24_S8 :
2004 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2005 break;
2006 case M32C_OPERAND_DSP_24_U16 :
2007 {
2008 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2009 if (length <= 0) break;
2010 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2011 if (length <= 0) break;
2012{
2013 FLD (f_dsp_24_u16) = ((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8)));
2014}
2015 }
2016 break;
2017 case M32C_OPERAND_DSP_24_U20 :
2018 {
2019 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2020 if (length <= 0) break;
2021 {
2022 long value;
2023 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2024 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2025 fields->f_dsp_32_u16 = value;
2026 }
2027 if (length <= 0) break;
2028{
2029 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2030}
2031 }
2032 break;
2033 case M32C_OPERAND_DSP_24_U24 :
2034 {
2035 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2036 if (length <= 0) break;
2037 {
2038 long value;
2039 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2040 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2041 fields->f_dsp_32_u16 = value;
2042 }
2043 if (length <= 0) break;
2044{
2045 FLD (f_dsp_24_u24) = ((((FLD (f_dsp_32_u16)) << (8))) | (FLD (f_dsp_24_u8)));
2046}
2047 }
2048 break;
2049 case M32C_OPERAND_DSP_24_U8 :
2050 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2051 break;
2052 case M32C_OPERAND_DSP_32_S16 :
2053 {
2054 long value;
2055 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2056 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2057 fields->f_dsp_32_s16 = value;
2058 }
2059 break;
2060 case M32C_OPERAND_DSP_32_S8 :
2061 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2062 break;
2063 case M32C_OPERAND_DSP_32_U16 :
2064 {
2065 long value;
2066 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2067 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2068 fields->f_dsp_32_u16 = value;
2069 }
2070 break;
2071 case M32C_OPERAND_DSP_32_U20 :
2072 {
2073 long value;
2074 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2075 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2076 fields->f_dsp_32_u24 = value;
2077 }
2078 break;
2079 case M32C_OPERAND_DSP_32_U24 :
2080 {
2081 long value;
2082 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2083 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2084 fields->f_dsp_32_u24 = value;
2085 }
2086 break;
2087 case M32C_OPERAND_DSP_32_U8 :
2088 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2089 break;
2090 case M32C_OPERAND_DSP_40_S16 :
2091 {
2092 long value;
2093 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2094 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2095 fields->f_dsp_40_s16 = value;
2096 }
2097 break;
2098 case M32C_OPERAND_DSP_40_S8 :
2099 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2100 break;
2101 case M32C_OPERAND_DSP_40_U16 :
2102 {
2103 long value;
2104 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 16, 32, total_length, pc, & value);
2105 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2106 fields->f_dsp_40_u16 = value;
2107 }
2108 break;
2109 case M32C_OPERAND_DSP_40_U24 :
2110 {
2111 long value;
2112 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2113 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2114 fields->f_dsp_40_u24 = value;
2115 }
2116 break;
2117 case M32C_OPERAND_DSP_40_U8 :
2118 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2119 break;
2120 case M32C_OPERAND_DSP_48_S16 :
2121 {
2122 long value;
2123 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2124 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2125 fields->f_dsp_48_s16 = value;
2126 }
2127 break;
2128 case M32C_OPERAND_DSP_48_S8 :
2129 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2130 break;
2131 case M32C_OPERAND_DSP_48_U16 :
2132 {
2133 long value;
2134 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2135 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2136 fields->f_dsp_48_u16 = value;
2137 }
2138 break;
2139 case M32C_OPERAND_DSP_48_U24 :
2140 {
2141 {
2142 long value;
2143 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2144 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2145 fields->f_dsp_48_u16 = value;
2146 }
2147 if (length <= 0) break;
2148 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2149 if (length <= 0) break;
2150{
2151 FLD (f_dsp_48_u24) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u8)) << (16))) & (16711680))));
2152}
2153 }
2154 break;
2155 case M32C_OPERAND_DSP_48_U8 :
2156 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_u8);
2157 break;
f75eb1c0
DD		 2158 case M32C_OPERAND_DSP_8_S24 :
2159 {
2160 long value;
2161 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 24, 32, total_length, pc, & value);
2162 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((EXTQISI (TRUNCSIQI (((value) & (255))))) << (16))));
2163 fields->f_dsp_8_s24 = value;
2164 }
2165 break;
49f58d10
JB		 2166 case M32C_OPERAND_DSP_8_S8 :
2167 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2168 break;
2169 case M32C_OPERAND_DSP_8_U16 :
2170 {
2171 long value;
2172 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 16, 32, total_length, pc, & value);
2173 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2174 fields->f_dsp_8_u16 = value;
2175 }
2176 break;
e729279b
NC		 2177 case M32C_OPERAND_DSP_8_U24 :
2178 {
2179 long value;
2180 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 24, 32, total_length, pc, & value);
2181 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2182 fields->f_dsp_8_u24 = value;
2183 }
2184 break;
49f58d10
JB		 2185 case M32C_OPERAND_DSP_8_U6 :
2186 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 6, 32, total_length, pc, & fields->f_dsp_8_u6);
2187 break;
2188 case M32C_OPERAND_DSP_8_U8 :
2189 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_u8);
2190 break;
2191 case M32C_OPERAND_DST16AN :
2192 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2193 break;
2194 case M32C_OPERAND_DST16AN_S :
2195 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_dst16_an_s);
2196 break;
2197 case M32C_OPERAND_DST16ANHI :
2198 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2199 break;
2200 case M32C_OPERAND_DST16ANQI :
2201 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2202 break;
2203 case M32C_OPERAND_DST16ANQI_S :
2204 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2205 break;
2206 case M32C_OPERAND_DST16ANSI :
2207 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 1, 32, total_length, pc, & fields->f_dst16_an);
2208 break;
2209 case M32C_OPERAND_DST16RNEXTQI :
2210 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 1, 32, total_length, pc, & fields->f_dst16_rn_ext);
2211 break;
2212 case M32C_OPERAND_DST16RNHI :
2213 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2214 break;
2215 case M32C_OPERAND_DST16RNQI :
2216 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2217 break;
2218 case M32C_OPERAND_DST16RNQI_S :
2219 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_dst16_rn_QI_s);
2220 break;
2221 case M32C_OPERAND_DST16RNSI :
2222 length = extract_normal (cd, ex_info, insn_value, 0, 0, 14, 2, 32, total_length, pc, & fields->f_dst16_rn);
2223 break;
2224 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
2225 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2226 break;
2227 case M32C_OPERAND_DST32ANPREFIXED :
2228 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2229 break;
2230 case M32C_OPERAND_DST32ANPREFIXEDHI :
2231 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2232 break;
2233 case M32C_OPERAND_DST32ANPREFIXEDQI :
2234 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2235 break;
2236 case M32C_OPERAND_DST32ANPREFIXEDSI :
2237 length = extract_normal (cd, ex_info, insn_value, 0, 0, 17, 1, 32, total_length, pc, & fields->f_dst32_an_prefixed);
2238 break;
2239 case M32C_OPERAND_DST32ANUNPREFIXED :
2240 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2241 break;
2242 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
2243 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2244 break;
2245 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
2246 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2247 break;
2248 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
2249 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_an_unprefixed);
2250 break;
2251 case M32C_OPERAND_DST32R0HI_S :
2252 break;
2253 case M32C_OPERAND_DST32R0QI_S :
2254 break;
2255 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
2256 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2257 break;
2258 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
2259 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_dst32_rn_ext_unprefixed);
2260 break;
2261 case M32C_OPERAND_DST32RNPREFIXEDHI :
2262 {
2263 long value;
2264 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2265 value = ((((value) + (2))) % (4));
2266 fields->f_dst32_rn_prefixed_HI = value;
2267 }
2268 break;
2269 case M32C_OPERAND_DST32RNPREFIXEDQI :
2270 {
2271 long value;
2272 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2273 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2274 fields->f_dst32_rn_prefixed_QI = value;
2275 }
2276 break;
2277 case M32C_OPERAND_DST32RNPREFIXEDSI :
2278 {
2279 long value;
2280 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 2, 32, total_length, pc, & value);
2281 value = ((value) - (2));
2282 fields->f_dst32_rn_prefixed_SI = value;
2283 }
2284 break;
2285 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
2286 {
2287 long value;
2288 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2289 value = ((((value) + (2))) % (4));
2290 fields->f_dst32_rn_unprefixed_HI = value;
2291 }
2292 break;
2293 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
2294 {
2295 long value;
2296 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2297 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2298 fields->f_dst32_rn_unprefixed_QI = value;
2299 }
2300 break;
2301 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
2302 {
2303 long value;
2304 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 2, 32, total_length, pc, & value);
2305 value = ((value) - (2));
2306 fields->f_dst32_rn_unprefixed_SI = value;
2307 }
2308 break;
2309 case M32C_OPERAND_G :
2310 break;
2311 case M32C_OPERAND_IMM_12_S4 :
2312 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2313 break;
c6552317
DD		 2314 case M32C_OPERAND_IMM_12_S4N :
2315 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2316 break;
49f58d10
JB		 2317 case M32C_OPERAND_IMM_13_U3 :
2318 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_imm_13_u3);
2319 break;
2320 case M32C_OPERAND_IMM_16_HI :
2321 {
2322 long value;
2323 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 16, 32, total_length, pc, & value);
2324 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2325 fields->f_dsp_16_s16 = value;
2326 }
2327 break;
2328 case M32C_OPERAND_IMM_16_QI :
2329 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_s8);
2330 break;
2331 case M32C_OPERAND_IMM_16_SI :
2332 {
2333 {
2334 long value;
2335 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 16, 32, total_length, pc, & value);
2336 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2337 fields->f_dsp_16_u16 = value;
2338 }
2339 if (length <= 0) break;
2340 {
2341 long value;
2342 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 16, 32, total_length, pc, & value);
2343 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2344 fields->f_dsp_32_u16 = value;
2345 }
2346 if (length <= 0) break;
2347{
2348 FLD (f_dsp_16_s32) = ((((FLD (f_dsp_16_u16)) & (65535))) | (((((FLD (f_dsp_32_u16)) << (16))) & (0xffff0000))));
2349}
2350 }
2351 break;
2352 case M32C_OPERAND_IMM_20_S4 :
2353 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2354 break;
2355 case M32C_OPERAND_IMM_24_HI :
2356 {
2357 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2358 if (length <= 0) break;
2359 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2360 if (length <= 0) break;
2361{
2362 FLD (f_dsp_24_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_32_u8)) << (8))) | (FLD (f_dsp_24_u8))))));
2363}
2364 }
2365 break;
2366 case M32C_OPERAND_IMM_24_QI :
2367 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_s8);
2368 break;
2369 case M32C_OPERAND_IMM_24_SI :
2370 {
2371 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2372 if (length <= 0) break;
2373 {
2374 long value;
2375 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 24, 32, total_length, pc, & value);
2376 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2377 fields->f_dsp_32_u24 = value;
2378 }
2379 if (length <= 0) break;
2380{
2381 FLD (f_dsp_24_s32) = ((((FLD (f_dsp_24_u8)) & (255))) | (((((FLD (f_dsp_32_u24)) << (8))) & (0xffffff00))));
2382}
2383 }
2384 break;
2385 case M32C_OPERAND_IMM_32_HI :
2386 {
2387 long value;
2388 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 16, 32, total_length, pc, & value);
2389 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2390 fields->f_dsp_32_s16 = value;
2391 }
2392 break;
2393 case M32C_OPERAND_IMM_32_QI :
2394 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_s8);
2395 break;
2396 case M32C_OPERAND_IMM_32_SI :
2397 {
2398 long value;
2399 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 0, 32, 32, total_length, pc, & value);
2400 value = EXTSISI (((((((((unsigned int) (value) >> (24))) & (255))) | (((((unsigned int) (value) >> (8))) & (65280))))) | (((((((value) << (8))) & (16711680))) | (((((value) << (24))) & (0xff000000)))))));
2401 fields->f_dsp_32_s32 = value;
2402 }
2403 break;
2404 case M32C_OPERAND_IMM_40_HI :
2405 {
2406 long value;
2407 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 16, 32, total_length, pc, & value);
2408 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2409 fields->f_dsp_40_s16 = value;
2410 }
2411 break;
2412 case M32C_OPERAND_IMM_40_QI :
2413 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_s8);
2414 break;
2415 case M32C_OPERAND_IMM_40_SI :
2416 {
2417 {
2418 long value;
2419 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 24, 32, total_length, pc, & value);
2420 value = ((((((((unsigned int) (value) >> (16))) & (255))) | (((value) & (65280))))) | (((((value) << (16))) & (16711680))));
2421 fields->f_dsp_40_u24 = value;
2422 }
2423 if (length <= 0) break;
2424 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2425 if (length <= 0) break;
2426{
2427 FLD (f_dsp_40_s32) = ((((FLD (f_dsp_40_u24)) & (16777215))) | (((((FLD (f_dsp_64_u8)) << (24))) & (0xff000000))));
2428}
2429 }
2430 break;
2431 case M32C_OPERAND_IMM_48_HI :
2432 {
2433 long value;
2434 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 16, 32, total_length, pc, & value);
2435 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2436 fields->f_dsp_48_s16 = value;
2437 }
2438 break;
2439 case M32C_OPERAND_IMM_48_QI :
2440 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 16, 8, 32, total_length, pc, & fields->f_dsp_48_s8);
2441 break;
2442 case M32C_OPERAND_IMM_48_SI :
2443 {
2444 {
2445 long value;
2446 length = extract_normal (cd, ex_info, insn_value, 0, 32, 16, 16, 32, total_length, pc, & value);
2447 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2448 fields->f_dsp_48_u16 = value;
2449 }
2450 if (length <= 0) break;
2451 {
2452 long value;
2453 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 16, 32, total_length, pc, & value);
2454 value = ((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280))));
2455 fields->f_dsp_64_u16 = value;
2456 }
2457 if (length <= 0) break;
2458{
2459 FLD (f_dsp_48_s32) = ((((FLD (f_dsp_48_u16)) & (65535))) | (((((FLD (f_dsp_64_u16)) << (16))) & (0xffff0000))));
2460}
2461 }
2462 break;
2463 case M32C_OPERAND_IMM_56_HI :
2464 {
2465 length = extract_normal (cd, ex_info, insn_value, 0, 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_u8);
2466 if (length <= 0) break;
2467 length = extract_normal (cd, ex_info, insn_value, 0, 64, 0, 8, 32, total_length, pc, & fields->f_dsp_64_u8);
2468 if (length <= 0) break;
2469{
2470 FLD (f_dsp_56_s16) = EXTHISI (((HI) (UINT) (((((FLD (f_dsp_64_u8)) << (8))) | (FLD (f_dsp_56_u8))))));
2471}
2472 }
2473 break;
2474 case M32C_OPERAND_IMM_56_QI :
2475 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 32, 24, 8, 32, total_length, pc, & fields->f_dsp_56_s8);
2476 break;
2477 case M32C_OPERAND_IMM_64_HI :
2478 {
2479 long value;
2480 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 64, 0, 16, 32, total_length, pc, & value);
2481 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2482 fields->f_dsp_64_s16 = value;
2483 }
2484 break;
2485 case M32C_OPERAND_IMM_8_HI :
2486 {
2487 long value;
2488 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 16, 32, total_length, pc, & value);
2489 value = EXTHISI (((HI) (INT) (((((((unsigned int) (value) >> (8))) & (255))) | (((((value) << (8))) & (65280)))))));
2490 fields->f_dsp_8_s16 = value;
2491 }
2492 break;
2493 case M32C_OPERAND_IMM_8_QI :
2494 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 8, 32, total_length, pc, & fields->f_dsp_8_s8);
2495 break;
2496 case M32C_OPERAND_IMM_8_S4 :
2497 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2498 break;
c6552317
DD		 2499 case M32C_OPERAND_IMM_8_S4N :
2500 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2501 break;
49f58d10
JB		 2502 case M32C_OPERAND_IMM_SH_12_S4 :
2503 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 12, 4, 32, total_length, pc, & fields->f_imm_12_s4);
2504 break;
2505 case M32C_OPERAND_IMM_SH_20_S4 :
2506 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 20, 4, 32, total_length, pc, & fields->f_imm_20_s4);
2507 break;
2508 case M32C_OPERAND_IMM_SH_8_S4 :
2509 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED), 0, 8, 4, 32, total_length, pc, & fields->f_imm_8_s4);
2510 break;
2511 case M32C_OPERAND_IMM1_S :
2512 {
2513 long value;
2514 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 1, 32, total_length, pc, & value);
2515 value = ((value) + (1));
2516 fields->f_imm1_S = value;
2517 }
2518 break;
2519 case M32C_OPERAND_IMM3_S :
2520 {
2521 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2522 if (length <= 0) break;
2523 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2524 if (length <= 0) break;
2525{
2526 FLD (f_imm3_S) = ((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (1));
2527}
2528 }
2529 break;
2530 case M32C_OPERAND_LAB_16_8 :
2531 {
2532 long value;
2533 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 8, 32, total_length, pc, & value);
2534 value = ((value) + (((pc) + (2))));
2535 fields->f_lab_16_8 = value;
2536 }
2537 break;
2538 case M32C_OPERAND_LAB_24_8 :
2539 {
2540 long value;
2541 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 24, 8, 32, total_length, pc, & value);
2542 value = ((value) + (((pc) + (2))));
2543 fields->f_lab_24_8 = value;
2544 }
2545 break;
2546 case M32C_OPERAND_LAB_32_8 :
2547 {
2548 long value;
2549 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 0, 8, 32, total_length, pc, & value);
2550 value = ((value) + (((pc) + (2))));
2551 fields->f_lab_32_8 = value;
2552 }
2553 break;
2554 case M32C_OPERAND_LAB_40_8 :
2555 {
2556 long value;
2557 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 32, 8, 8, 32, total_length, pc, & value);
2558 value = ((value) + (((pc) + (2))));
2559 fields->f_lab_40_8 = value;
2560 }
2561 break;
2562 case M32C_OPERAND_LAB_5_3 :
2563 {
2564 long value;
e729279b 2565 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_PCREL_ADDR), 0, 5, 3, 32, total_length, pc, & value);
49f58d10
JB		 2566 value = ((value) + (((pc) + (2))));
2567 fields->f_lab_5_3 = value;
2568 }
2569 break;
2570 case M32C_OPERAND_LAB_8_16 :
2571 {
2572 long value;
2573 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value);
2574 value = ((((((unsigned int) (((value) & (65535))) >> (8))) | (((int) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1))));
2575 fields->f_lab_8_16 = value;
2576 }
2577 break;
2578 case M32C_OPERAND_LAB_8_24 :
2579 {
2580 long value;
2581 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 24, 32, total_length, pc, & value);
2582 value = ((((((unsigned int) (value) >> (16))) | (((value) & (65280))))) | (((((value) & (255))) << (16))));
2583 fields->f_lab_8_24 = value;
2584 }
2585 break;
2586 case M32C_OPERAND_LAB_8_8 :
2587 {
2588 long value;
2589 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value);
2590 value = ((value) + (((pc) + (1))));
2591 fields->f_lab_8_8 = value;
2592 }
2593 break;
2594 case M32C_OPERAND_LAB32_JMP_S :
2595 {
2596 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 2, 32, total_length, pc, & fields->f_2_2);
2597 if (length <= 0) break;
2598 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2599 if (length <= 0) break;
2600{
2601 FLD (f_lab32_jmp_s) = ((pc) + (((((((FLD (f_2_2)) << (1))) | (FLD (f_7_1)))) + (2))));
2602}
2603 }
2604 break;
2605 case M32C_OPERAND_Q :
2606 break;
2607 case M32C_OPERAND_R0 :
2608 break;
2609 case M32C_OPERAND_R0H :
2610 break;
2611 case M32C_OPERAND_R0L :
2612 break;
2613 case M32C_OPERAND_R1 :
2614 break;
2615 case M32C_OPERAND_R1R2R0 :
2616 break;
2617 case M32C_OPERAND_R2 :
2618 break;
2619 case M32C_OPERAND_R2R0 :
2620 break;
2621 case M32C_OPERAND_R3 :
2622 break;
2623 case M32C_OPERAND_R3R1 :
2624 break;
2625 case M32C_OPERAND_REGSETPOP :
2626 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2627 break;
2628 case M32C_OPERAND_REGSETPUSH :
2629 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 8, 32, total_length, pc, & fields->f_8_8);
2630 break;
2631 case M32C_OPERAND_RN16_PUSH_S :
2632 length = extract_normal (cd, ex_info, insn_value, 0, 0, 4, 1, 32, total_length, pc, & fields->f_4_1);
2633 break;
2634 case M32C_OPERAND_S :
2635 break;
2636 case M32C_OPERAND_SRC16AN :
2637 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2638 break;
2639 case M32C_OPERAND_SRC16ANHI :
2640 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2641 break;
2642 case M32C_OPERAND_SRC16ANQI :
2643 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src16_an);
2644 break;
2645 case M32C_OPERAND_SRC16RNHI :
2646 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2647 break;
2648 case M32C_OPERAND_SRC16RNQI :
2649 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & fields->f_src16_rn);
2650 break;
2651 case M32C_OPERAND_SRC32ANPREFIXED :
2652 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2653 break;
2654 case M32C_OPERAND_SRC32ANPREFIXEDHI :
2655 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2656 break;
2657 case M32C_OPERAND_SRC32ANPREFIXEDQI :
2658 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2659 break;
2660 case M32C_OPERAND_SRC32ANPREFIXEDSI :
2661 length = extract_normal (cd, ex_info, insn_value, 0, 0, 19, 1, 32, total_length, pc, & fields->f_src32_an_prefixed);
2662 break;
2663 case M32C_OPERAND_SRC32ANUNPREFIXED :
2664 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2665 break;
2666 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
2667 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2668 break;
2669 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
2670 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2671 break;
2672 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
2673 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_src32_an_unprefixed);
2674 break;
2675 case M32C_OPERAND_SRC32RNPREFIXEDHI :
2676 {
2677 long value;
2678 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2679 value = ((((value) + (2))) % (4));
2680 fields->f_src32_rn_prefixed_HI = value;
2681 }
2682 break;
2683 case M32C_OPERAND_SRC32RNPREFIXEDQI :
2684 {
2685 long value;
2686 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2687 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2688 fields->f_src32_rn_prefixed_QI = value;
2689 }
2690 break;
2691 case M32C_OPERAND_SRC32RNPREFIXEDSI :
2692 {
2693 long value;
2694 length = extract_normal (cd, ex_info, insn_value, 0, 0, 18, 2, 32, total_length, pc, & value);
2695 value = ((value) - (2));
2696 fields->f_src32_rn_prefixed_SI = value;
2697 }
2698 break;
2699 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
2700 {
2701 long value;
2702 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2703 value = ((((value) + (2))) % (4));
2704 fields->f_src32_rn_unprefixed_HI = value;
2705 }
2706 break;
2707 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
2708 {
2709 long value;
2710 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2711 value = (((((~ (((unsigned int) (value) >> (1))))) & (1))) | (((((value) << (1))) & (2))));
2712 fields->f_src32_rn_unprefixed_QI = value;
2713 }
2714 break;
2715 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
2716 {
2717 long value;
2718 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 2, 32, total_length, pc, & value);
2719 value = ((value) - (2));
2720 fields->f_src32_rn_unprefixed_SI = value;
2721 }
2722 break;
2723 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
2724 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 1, 32, total_length, pc, & fields->f_5_1);
2725 break;
2726 case M32C_OPERAND_X :
2727 break;
2728 case M32C_OPERAND_Z :
2729 break;
2730 case M32C_OPERAND_COND16_16 :
2731 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2732 break;
2733 case M32C_OPERAND_COND16_24 :
2734 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2735 break;
2736 case M32C_OPERAND_COND16_32 :
2737 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2738 break;
2739 case M32C_OPERAND_COND16C :
2740 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2741 break;
2742 case M32C_OPERAND_COND16J :
2743 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2744 break;
2745 case M32C_OPERAND_COND16J5 :
2746 length = extract_normal (cd, ex_info, insn_value, 0, 0, 5, 3, 32, total_length, pc, & fields->f_cond16j_5);
2747 break;
2748 case M32C_OPERAND_COND32 :
2749 {
2750 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_9_1);
2751 if (length <= 0) break;
2752 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2753 if (length <= 0) break;
2754{
2755 FLD (f_cond32) = ((((FLD (f_9_1)) << (3))) | (FLD (f_13_3)));
2756}
2757 }
2758 break;
2759 case M32C_OPERAND_COND32_16 :
2760 length = extract_normal (cd, ex_info, insn_value, 0, 0, 16, 8, 32, total_length, pc, & fields->f_dsp_16_u8);
2761 break;
2762 case M32C_OPERAND_COND32_24 :
2763 length = extract_normal (cd, ex_info, insn_value, 0, 0, 24, 8, 32, total_length, pc, & fields->f_dsp_24_u8);
2764 break;
2765 case M32C_OPERAND_COND32_32 :
2766 length = extract_normal (cd, ex_info, insn_value, 0, 32, 0, 8, 32, total_length, pc, & fields->f_dsp_32_u8);
2767 break;
2768 case M32C_OPERAND_COND32_40 :
2769 length = extract_normal (cd, ex_info, insn_value, 0, 32, 8, 8, 32, total_length, pc, & fields->f_dsp_40_u8);
2770 break;
2771 case M32C_OPERAND_COND32J :
2772 {
2773 length = extract_normal (cd, ex_info, insn_value, 0, 0, 1, 3, 32, total_length, pc, & fields->f_1_3);
2774 if (length <= 0) break;
2775 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 1, 32, total_length, pc, & fields->f_7_1);
2776 if (length <= 0) break;
2777{
2778 FLD (f_cond32j) = ((((FLD (f_1_3)) << (1))) | (FLD (f_7_1)));
2779}
2780 }
2781 break;
2782 case M32C_OPERAND_CR1_PREFIXED_32 :
2783 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2784 break;
2785 case M32C_OPERAND_CR1_UNPREFIXED_32 :
2786 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2787 break;
2788 case M32C_OPERAND_CR16 :
2789 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2790 break;
2791 case M32C_OPERAND_CR2_32 :
2792 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2793 break;
2794 case M32C_OPERAND_CR3_PREFIXED_32 :
2795 length = extract_normal (cd, ex_info, insn_value, 0, 0, 21, 3, 32, total_length, pc, & fields->f_21_3);
2796 break;
2797 case M32C_OPERAND_CR3_UNPREFIXED_32 :
2798 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2799 break;
2800 case M32C_OPERAND_FLAGS16 :
2801 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 3, 32, total_length, pc, & fields->f_9_3);
2802 break;
2803 case M32C_OPERAND_FLAGS32 :
2804 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 3, 32, total_length, pc, & fields->f_13_3);
2805 break;
2806 case M32C_OPERAND_SCCOND32 :
2807 length = extract_normal (cd, ex_info, insn_value, 0, 0, 12, 4, 32, total_length, pc, & fields->f_cond16);
2808 break;
2809 case M32C_OPERAND_SIZE :
2810 break;
2811
2812 default :
2813 /* xgettext:c-format */
2814 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
2815 opindex);
2816 abort ();
2817 }
2818
2819 return length;
2820}
2821
2822cgen_insert_fn * const m32c_cgen_insert_handlers[] =
2823{
2824 insert_insn_normal,
2825};
2826
2827cgen_extract_fn * const m32c_cgen_extract_handlers[] =
2828{
2829 extract_insn_normal,
2830};
2831
e729279b
NC		 2832int m32c_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
2833bfd_vma m32c_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
49f58d10
JB		 2834
2835/* Getting values from cgen_fields is handled by a collection of functions.
2836 They are distinguished by the type of the VALUE argument they return.
2837 TODO: floating point, inlining support, remove cases where result type
2838 not appropriate. */
2839
2840int
e729279b
NC		 2841m32c_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
2842 int opindex,
2843 const CGEN_FIELDS * fields)
49f58d10
JB		 2844{
2845 int value;
2846
2847 switch (opindex)
2848 {
2849 case M32C_OPERAND_A0 :
2850 value = 0;
2851 break;
2852 case M32C_OPERAND_A1 :
2853 value = 0;
2854 break;
2855 case M32C_OPERAND_AN16_PUSH_S :
2856 value = fields->f_4_1;
2857 break;
2858 case M32C_OPERAND_BIT16AN :
2859 value = fields->f_dst16_an;
2860 break;
2861 case M32C_OPERAND_BIT16RN :
2862 value = fields->f_dst16_rn;
2863 break;
2864 case M32C_OPERAND_BIT32ANPREFIXED :
2865 value = fields->f_dst32_an_prefixed;
2866 break;
2867 case M32C_OPERAND_BIT32ANUNPREFIXED :
2868 value = fields->f_dst32_an_unprefixed;
2869 break;
2870 case M32C_OPERAND_BIT32RNPREFIXED :
2871 value = fields->f_dst32_rn_prefixed_QI;
2872 break;
2873 case M32C_OPERAND_BIT32RNUNPREFIXED :
2874 value = fields->f_dst32_rn_unprefixed_QI;
2875 break;
2876 case M32C_OPERAND_BITBASE16_16_S8 :
2877 value = fields->f_dsp_16_s8;
2878 break;
2879 case M32C_OPERAND_BITBASE16_16_U16 :
2880 value = fields->f_dsp_16_u16;
2881 break;
2882 case M32C_OPERAND_BITBASE16_16_U8 :
2883 value = fields->f_dsp_16_u8;
2884 break;
2885 case M32C_OPERAND_BITBASE16_8_U11_S :
2886 value = fields->f_bitbase16_u11_S;
2887 break;
2888 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
2889 value = fields->f_bitbase32_16_s11_unprefixed;
2890 break;
2891 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
2892 value = fields->f_bitbase32_16_s19_unprefixed;
2893 break;
2894 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
2895 value = fields->f_bitbase32_16_u11_unprefixed;
2896 break;
2897 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
2898 value = fields->f_bitbase32_16_u19_unprefixed;
2899 break;
2900 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
2901 value = fields->f_bitbase32_16_u27_unprefixed;
2902 break;
2903 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
2904 value = fields->f_bitbase32_24_s11_prefixed;
2905 break;
2906 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
2907 value = fields->f_bitbase32_24_s19_prefixed;
2908 break;
2909 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
2910 value = fields->f_bitbase32_24_u11_prefixed;
2911 break;
2912 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
2913 value = fields->f_bitbase32_24_u19_prefixed;
2914 break;
2915 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
2916 value = fields->f_bitbase32_24_u27_prefixed;
2917 break;
2918 case M32C_OPERAND_BITNO16R :
2919 value = fields->f_dsp_16_u8;
2920 break;
2921 case M32C_OPERAND_BITNO32PREFIXED :
2922 value = fields->f_bitno32_prefixed;
2923 break;
2924 case M32C_OPERAND_BITNO32UNPREFIXED :
2925 value = fields->f_bitno32_unprefixed;
2926 break;
2927 case M32C_OPERAND_DSP_10_U6 :
2928 value = fields->f_dsp_10_u6;
2929 break;
2930 case M32C_OPERAND_DSP_16_S16 :
2931 value = fields->f_dsp_16_s16;
2932 break;
2933 case M32C_OPERAND_DSP_16_S8 :
2934 value = fields->f_dsp_16_s8;
2935 break;
2936 case M32C_OPERAND_DSP_16_U16 :
2937 value = fields->f_dsp_16_u16;
2938 break;
2939 case M32C_OPERAND_DSP_16_U20 :
2940 value = fields->f_dsp_16_u24;
2941 break;
2942 case M32C_OPERAND_DSP_16_U24 :
2943 value = fields->f_dsp_16_u24;
2944 break;
2945 case M32C_OPERAND_DSP_16_U8 :
2946 value = fields->f_dsp_16_u8;
2947 break;
2948 case M32C_OPERAND_DSP_24_S16 :
2949 value = fields->f_dsp_24_s16;
2950 break;
2951 case M32C_OPERAND_DSP_24_S8 :
2952 value = fields->f_dsp_24_s8;
2953 break;
2954 case M32C_OPERAND_DSP_24_U16 :
2955 value = fields->f_dsp_24_u16;
2956 break;
2957 case M32C_OPERAND_DSP_24_U20 :
2958 value = fields->f_dsp_24_u24;
2959 break;
2960 case M32C_OPERAND_DSP_24_U24 :
2961 value = fields->f_dsp_24_u24;
2962 break;
2963 case M32C_OPERAND_DSP_24_U8 :
2964 value = fields->f_dsp_24_u8;
2965 break;
2966 case M32C_OPERAND_DSP_32_S16 :
2967 value = fields->f_dsp_32_s16;
2968 break;
2969 case M32C_OPERAND_DSP_32_S8 :
2970 value = fields->f_dsp_32_s8;
2971 break;
2972 case M32C_OPERAND_DSP_32_U16 :
2973 value = fields->f_dsp_32_u16;
2974 break;
2975 case M32C_OPERAND_DSP_32_U20 :
2976 value = fields->f_dsp_32_u24;
2977 break;
2978 case M32C_OPERAND_DSP_32_U24 :
2979 value = fields->f_dsp_32_u24;
2980 break;
2981 case M32C_OPERAND_DSP_32_U8 :
2982 value = fields->f_dsp_32_u8;
2983 break;
2984 case M32C_OPERAND_DSP_40_S16 :
2985 value = fields->f_dsp_40_s16;
2986 break;
2987 case M32C_OPERAND_DSP_40_S8 :
2988 value = fields->f_dsp_40_s8;
2989 break;
2990 case M32C_OPERAND_DSP_40_U16 :
2991 value = fields->f_dsp_40_u16;
2992 break;
2993 case M32C_OPERAND_DSP_40_U24 :
2994 value = fields->f_dsp_40_u24;
2995 break;
2996 case M32C_OPERAND_DSP_40_U8 :
2997 value = fields->f_dsp_40_u8;
2998 break;
2999 case M32C_OPERAND_DSP_48_S16 :
3000 value = fields->f_dsp_48_s16;
3001 break;
3002 case M32C_OPERAND_DSP_48_S8 :
3003 value = fields->f_dsp_48_s8;
3004 break;
3005 case M32C_OPERAND_DSP_48_U16 :
3006 value = fields->f_dsp_48_u16;
3007 break;
3008 case M32C_OPERAND_DSP_48_U24 :
3009 value = fields->f_dsp_48_u24;
3010 break;
3011 case M32C_OPERAND_DSP_48_U8 :
3012 value = fields->f_dsp_48_u8;
3013 break;
f75eb1c0
DD		 3014 case M32C_OPERAND_DSP_8_S24 :
3015 value = fields->f_dsp_8_s24;
3016 break;
49f58d10
JB		 3017 case M32C_OPERAND_DSP_8_S8 :
3018 value = fields->f_dsp_8_s8;
3019 break;
3020 case M32C_OPERAND_DSP_8_U16 :
3021 value = fields->f_dsp_8_u16;
3022 break;
e729279b
NC		 3023 case M32C_OPERAND_DSP_8_U24 :
3024 value = fields->f_dsp_8_u24;
3025 break;
49f58d10
JB		 3026 case M32C_OPERAND_DSP_8_U6 :
3027 value = fields->f_dsp_8_u6;
3028 break;
3029 case M32C_OPERAND_DSP_8_U8 :
3030 value = fields->f_dsp_8_u8;
3031 break;
3032 case M32C_OPERAND_DST16AN :
3033 value = fields->f_dst16_an;
3034 break;
3035 case M32C_OPERAND_DST16AN_S :
3036 value = fields->f_dst16_an_s;
3037 break;
3038 case M32C_OPERAND_DST16ANHI :
3039 value = fields->f_dst16_an;
3040 break;
3041 case M32C_OPERAND_DST16ANQI :
3042 value = fields->f_dst16_an;
3043 break;
3044 case M32C_OPERAND_DST16ANQI_S :
3045 value = fields->f_dst16_rn_QI_s;
3046 break;
3047 case M32C_OPERAND_DST16ANSI :
3048 value = fields->f_dst16_an;
3049 break;
3050 case M32C_OPERAND_DST16RNEXTQI :
3051 value = fields->f_dst16_rn_ext;
3052 break;
3053 case M32C_OPERAND_DST16RNHI :
3054 value = fields->f_dst16_rn;
3055 break;
3056 case M32C_OPERAND_DST16RNQI :
3057 value = fields->f_dst16_rn;
3058 break;
3059 case M32C_OPERAND_DST16RNQI_S :
3060 value = fields->f_dst16_rn_QI_s;
3061 break;
3062 case M32C_OPERAND_DST16RNSI :
3063 value = fields->f_dst16_rn;
3064 break;
3065 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3066 value = fields->f_dst32_an_unprefixed;
3067 break;
3068 case M32C_OPERAND_DST32ANPREFIXED :
3069 value = fields->f_dst32_an_prefixed;
3070 break;
3071 case M32C_OPERAND_DST32ANPREFIXEDHI :
3072 value = fields->f_dst32_an_prefixed;
3073 break;
3074 case M32C_OPERAND_DST32ANPREFIXEDQI :
3075 value = fields->f_dst32_an_prefixed;
3076 break;
3077 case M32C_OPERAND_DST32ANPREFIXEDSI :
3078 value = fields->f_dst32_an_prefixed;
3079 break;
3080 case M32C_OPERAND_DST32ANUNPREFIXED :
3081 value = fields->f_dst32_an_unprefixed;
3082 break;
3083 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3084 value = fields->f_dst32_an_unprefixed;
3085 break;
3086 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3087 value = fields->f_dst32_an_unprefixed;
3088 break;
3089 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3090 value = fields->f_dst32_an_unprefixed;
3091 break;
3092 case M32C_OPERAND_DST32R0HI_S :
3093 value = 0;
3094 break;
3095 case M32C_OPERAND_DST32R0QI_S :
3096 value = 0;
3097 break;
3098 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3099 value = fields->f_dst32_rn_ext_unprefixed;
3100 break;
3101 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3102 value = fields->f_dst32_rn_ext_unprefixed;
3103 break;
3104 case M32C_OPERAND_DST32RNPREFIXEDHI :
3105 value = fields->f_dst32_rn_prefixed_HI;
3106 break;
3107 case M32C_OPERAND_DST32RNPREFIXEDQI :
3108 value = fields->f_dst32_rn_prefixed_QI;
3109 break;
3110 case M32C_OPERAND_DST32RNPREFIXEDSI :
3111 value = fields->f_dst32_rn_prefixed_SI;
3112 break;
3113 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3114 value = fields->f_dst32_rn_unprefixed_HI;
3115 break;
3116 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3117 value = fields->f_dst32_rn_unprefixed_QI;
3118 break;
3119 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3120 value = fields->f_dst32_rn_unprefixed_SI;
3121 break;
3122 case M32C_OPERAND_G :
3123 value = 0;
3124 break;
3125 case M32C_OPERAND_IMM_12_S4 :
3126 value = fields->f_imm_12_s4;
3127 break;
c6552317
DD		 3128 case M32C_OPERAND_IMM_12_S4N :
3129 value = fields->f_imm_12_s4;
3130 break;
49f58d10
JB		 3131 case M32C_OPERAND_IMM_13_U3 :
3132 value = fields->f_imm_13_u3;
3133 break;
3134 case M32C_OPERAND_IMM_16_HI :
3135 value = fields->f_dsp_16_s16;
3136 break;
3137 case M32C_OPERAND_IMM_16_QI :
3138 value = fields->f_dsp_16_s8;
3139 break;
3140 case M32C_OPERAND_IMM_16_SI :
3141 value = fields->f_dsp_16_s32;
3142 break;
3143 case M32C_OPERAND_IMM_20_S4 :
3144 value = fields->f_imm_20_s4;
3145 break;
3146 case M32C_OPERAND_IMM_24_HI :
3147 value = fields->f_dsp_24_s16;
3148 break;
3149 case M32C_OPERAND_IMM_24_QI :
3150 value = fields->f_dsp_24_s8;
3151 break;
3152 case M32C_OPERAND_IMM_24_SI :
3153 value = fields->f_dsp_24_s32;
3154 break;
3155 case M32C_OPERAND_IMM_32_HI :
3156 value = fields->f_dsp_32_s16;
3157 break;
3158 case M32C_OPERAND_IMM_32_QI :
3159 value = fields->f_dsp_32_s8;
3160 break;
3161 case M32C_OPERAND_IMM_32_SI :
3162 value = fields->f_dsp_32_s32;
3163 break;
3164 case M32C_OPERAND_IMM_40_HI :
3165 value = fields->f_dsp_40_s16;
3166 break;
3167 case M32C_OPERAND_IMM_40_QI :
3168 value = fields->f_dsp_40_s8;
3169 break;
3170 case M32C_OPERAND_IMM_40_SI :
3171 value = fields->f_dsp_40_s32;
3172 break;
3173 case M32C_OPERAND_IMM_48_HI :
3174 value = fields->f_dsp_48_s16;
3175 break;
3176 case M32C_OPERAND_IMM_48_QI :
3177 value = fields->f_dsp_48_s8;
3178 break;
3179 case M32C_OPERAND_IMM_48_SI :
3180 value = fields->f_dsp_48_s32;
3181 break;
3182 case M32C_OPERAND_IMM_56_HI :
3183 value = fields->f_dsp_56_s16;
3184 break;
3185 case M32C_OPERAND_IMM_56_QI :
3186 value = fields->f_dsp_56_s8;
3187 break;
3188 case M32C_OPERAND_IMM_64_HI :
3189 value = fields->f_dsp_64_s16;
3190 break;
3191 case M32C_OPERAND_IMM_8_HI :
3192 value = fields->f_dsp_8_s16;
3193 break;
3194 case M32C_OPERAND_IMM_8_QI :
3195 value = fields->f_dsp_8_s8;
3196 break;
3197 case M32C_OPERAND_IMM_8_S4 :
3198 value = fields->f_imm_8_s4;
3199 break;
c6552317
DD		 3200 case M32C_OPERAND_IMM_8_S4N :
3201 value = fields->f_imm_8_s4;
3202 break;
49f58d10
JB		 3203 case M32C_OPERAND_IMM_SH_12_S4 :
3204 value = fields->f_imm_12_s4;
3205 break;
3206 case M32C_OPERAND_IMM_SH_20_S4 :
3207 value = fields->f_imm_20_s4;
3208 break;
3209 case M32C_OPERAND_IMM_SH_8_S4 :
3210 value = fields->f_imm_8_s4;
3211 break;
3212 case M32C_OPERAND_IMM1_S :
3213 value = fields->f_imm1_S;
3214 break;
3215 case M32C_OPERAND_IMM3_S :
3216 value = fields->f_imm3_S;
3217 break;
3218 case M32C_OPERAND_LAB_16_8 :
3219 value = fields->f_lab_16_8;
3220 break;
3221 case M32C_OPERAND_LAB_24_8 :
3222 value = fields->f_lab_24_8;
3223 break;
3224 case M32C_OPERAND_LAB_32_8 :
3225 value = fields->f_lab_32_8;
3226 break;
3227 case M32C_OPERAND_LAB_40_8 :
3228 value = fields->f_lab_40_8;
3229 break;
3230 case M32C_OPERAND_LAB_5_3 :
3231 value = fields->f_lab_5_3;
3232 break;
3233 case M32C_OPERAND_LAB_8_16 :
3234 value = fields->f_lab_8_16;
3235 break;
3236 case M32C_OPERAND_LAB_8_24 :
3237 value = fields->f_lab_8_24;
3238 break;
3239 case M32C_OPERAND_LAB_8_8 :
3240 value = fields->f_lab_8_8;
3241 break;
3242 case M32C_OPERAND_LAB32_JMP_S :
3243 value = fields->f_lab32_jmp_s;
3244 break;
3245 case M32C_OPERAND_Q :
3246 value = 0;
3247 break;
3248 case M32C_OPERAND_R0 :
3249 value = 0;
3250 break;
3251 case M32C_OPERAND_R0H :
3252 value = 0;
3253 break;
3254 case M32C_OPERAND_R0L :
3255 value = 0;
3256 break;
3257 case M32C_OPERAND_R1 :
3258 value = 0;
3259 break;
3260 case M32C_OPERAND_R1R2R0 :
3261 value = 0;
3262 break;
3263 case M32C_OPERAND_R2 :
3264 value = 0;
3265 break;
3266 case M32C_OPERAND_R2R0 :
3267 value = 0;
3268 break;
3269 case M32C_OPERAND_R3 :
3270 value = 0;
3271 break;
3272 case M32C_OPERAND_R3R1 :
3273 value = 0;
3274 break;
3275 case M32C_OPERAND_REGSETPOP :
3276 value = fields->f_8_8;
3277 break;
3278 case M32C_OPERAND_REGSETPUSH :
3279 value = fields->f_8_8;
3280 break;
3281 case M32C_OPERAND_RN16_PUSH_S :
3282 value = fields->f_4_1;
3283 break;
3284 case M32C_OPERAND_S :
3285 value = 0;
3286 break;
3287 case M32C_OPERAND_SRC16AN :
3288 value = fields->f_src16_an;
3289 break;
3290 case M32C_OPERAND_SRC16ANHI :
3291 value = fields->f_src16_an;
3292 break;
3293 case M32C_OPERAND_SRC16ANQI :
3294 value = fields->f_src16_an;
3295 break;
3296 case M32C_OPERAND_SRC16RNHI :
3297 value = fields->f_src16_rn;
3298 break;
3299 case M32C_OPERAND_SRC16RNQI :
3300 value = fields->f_src16_rn;
3301 break;
3302 case M32C_OPERAND_SRC32ANPREFIXED :
3303 value = fields->f_src32_an_prefixed;
3304 break;
3305 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3306 value = fields->f_src32_an_prefixed;
3307 break;
3308 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3309 value = fields->f_src32_an_prefixed;
3310 break;
3311 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3312 value = fields->f_src32_an_prefixed;
3313 break;
3314 case M32C_OPERAND_SRC32ANUNPREFIXED :
3315 value = fields->f_src32_an_unprefixed;
3316 break;
3317 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3318 value = fields->f_src32_an_unprefixed;
3319 break;
3320 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3321 value = fields->f_src32_an_unprefixed;
3322 break;
3323 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3324 value = fields->f_src32_an_unprefixed;
3325 break;
3326 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3327 value = fields->f_src32_rn_prefixed_HI;
3328 break;
3329 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3330 value = fields->f_src32_rn_prefixed_QI;
3331 break;
3332 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3333 value = fields->f_src32_rn_prefixed_SI;
3334 break;
3335 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3336 value = fields->f_src32_rn_unprefixed_HI;
3337 break;
3338 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3339 value = fields->f_src32_rn_unprefixed_QI;
3340 break;
3341 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3342 value = fields->f_src32_rn_unprefixed_SI;
3343 break;
3344 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3345 value = fields->f_5_1;
3346 break;
3347 case M32C_OPERAND_X :
3348 value = 0;
3349 break;
3350 case M32C_OPERAND_Z :
3351 value = 0;
3352 break;
3353 case M32C_OPERAND_COND16_16 :
3354 value = fields->f_dsp_16_u8;
3355 break;
3356 case M32C_OPERAND_COND16_24 :
3357 value = fields->f_dsp_24_u8;
3358 break;
3359 case M32C_OPERAND_COND16_32 :
3360 value = fields->f_dsp_32_u8;
3361 break;
3362 case M32C_OPERAND_COND16C :
3363 value = fields->f_cond16;
3364 break;
3365 case M32C_OPERAND_COND16J :
3366 value = fields->f_cond16;
3367 break;
3368 case M32C_OPERAND_COND16J5 :
3369 value = fields->f_cond16j_5;
3370 break;
3371 case M32C_OPERAND_COND32 :
3372 value = fields->f_cond32;
3373 break;
3374 case M32C_OPERAND_COND32_16 :
3375 value = fields->f_dsp_16_u8;
3376 break;
3377 case M32C_OPERAND_COND32_24 :
3378 value = fields->f_dsp_24_u8;
3379 break;
3380 case M32C_OPERAND_COND32_32 :
3381 value = fields->f_dsp_32_u8;
3382 break;
3383 case M32C_OPERAND_COND32_40 :
3384 value = fields->f_dsp_40_u8;
3385 break;
3386 case M32C_OPERAND_COND32J :
3387 value = fields->f_cond32j;
3388 break;
3389 case M32C_OPERAND_CR1_PREFIXED_32 :
3390 value = fields->f_21_3;
3391 break;
3392 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3393 value = fields->f_13_3;
3394 break;
3395 case M32C_OPERAND_CR16 :
3396 value = fields->f_9_3;
3397 break;
3398 case M32C_OPERAND_CR2_32 :
3399 value = fields->f_13_3;
3400 break;
3401 case M32C_OPERAND_CR3_PREFIXED_32 :
3402 value = fields->f_21_3;
3403 break;
3404 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3405 value = fields->f_13_3;
3406 break;
3407 case M32C_OPERAND_FLAGS16 :
3408 value = fields->f_9_3;
3409 break;
3410 case M32C_OPERAND_FLAGS32 :
3411 value = fields->f_13_3;
3412 break;
3413 case M32C_OPERAND_SCCOND32 :
3414 value = fields->f_cond16;
3415 break;
3416 case M32C_OPERAND_SIZE :
3417 value = 0;
3418 break;
3419
3420 default :
3421 /* xgettext:c-format */
3422 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
3423 opindex);
3424 abort ();
3425 }
3426
3427 return value;
3428}
3429
3430bfd_vma
e729279b
NC		 3431m32c_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
3432 int opindex,
3433 const CGEN_FIELDS * fields)
49f58d10
JB		 3434{
3435 bfd_vma value;
3436
3437 switch (opindex)
3438 {
3439 case M32C_OPERAND_A0 :
3440 value = 0;
3441 break;
3442 case M32C_OPERAND_A1 :
3443 value = 0;
3444 break;
3445 case M32C_OPERAND_AN16_PUSH_S :
3446 value = fields->f_4_1;
3447 break;
3448 case M32C_OPERAND_BIT16AN :
3449 value = fields->f_dst16_an;
3450 break;
3451 case M32C_OPERAND_BIT16RN :
3452 value = fields->f_dst16_rn;
3453 break;
3454 case M32C_OPERAND_BIT32ANPREFIXED :
3455 value = fields->f_dst32_an_prefixed;
3456 break;
3457 case M32C_OPERAND_BIT32ANUNPREFIXED :
3458 value = fields->f_dst32_an_unprefixed;
3459 break;
3460 case M32C_OPERAND_BIT32RNPREFIXED :
3461 value = fields->f_dst32_rn_prefixed_QI;
3462 break;
3463 case M32C_OPERAND_BIT32RNUNPREFIXED :
3464 value = fields->f_dst32_rn_unprefixed_QI;
3465 break;
3466 case M32C_OPERAND_BITBASE16_16_S8 :
3467 value = fields->f_dsp_16_s8;
3468 break;
3469 case M32C_OPERAND_BITBASE16_16_U16 :
3470 value = fields->f_dsp_16_u16;
3471 break;
3472 case M32C_OPERAND_BITBASE16_16_U8 :
3473 value = fields->f_dsp_16_u8;
3474 break;
3475 case M32C_OPERAND_BITBASE16_8_U11_S :
3476 value = fields->f_bitbase16_u11_S;
3477 break;
3478 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
3479 value = fields->f_bitbase32_16_s11_unprefixed;
3480 break;
3481 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
3482 value = fields->f_bitbase32_16_s19_unprefixed;
3483 break;
3484 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
3485 value = fields->f_bitbase32_16_u11_unprefixed;
3486 break;
3487 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
3488 value = fields->f_bitbase32_16_u19_unprefixed;
3489 break;
3490 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
3491 value = fields->f_bitbase32_16_u27_unprefixed;
3492 break;
3493 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
3494 value = fields->f_bitbase32_24_s11_prefixed;
3495 break;
3496 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
3497 value = fields->f_bitbase32_24_s19_prefixed;
3498 break;
3499 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
3500 value = fields->f_bitbase32_24_u11_prefixed;
3501 break;
3502 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
3503 value = fields->f_bitbase32_24_u19_prefixed;
3504 break;
3505 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
3506 value = fields->f_bitbase32_24_u27_prefixed;
3507 break;
3508 case M32C_OPERAND_BITNO16R :
3509 value = fields->f_dsp_16_u8;
3510 break;
3511 case M32C_OPERAND_BITNO32PREFIXED :
3512 value = fields->f_bitno32_prefixed;
3513 break;
3514 case M32C_OPERAND_BITNO32UNPREFIXED :
3515 value = fields->f_bitno32_unprefixed;
3516 break;
3517 case M32C_OPERAND_DSP_10_U6 :
3518 value = fields->f_dsp_10_u6;
3519 break;
3520 case M32C_OPERAND_DSP_16_S16 :
3521 value = fields->f_dsp_16_s16;
3522 break;
3523 case M32C_OPERAND_DSP_16_S8 :
3524 value = fields->f_dsp_16_s8;
3525 break;
3526 case M32C_OPERAND_DSP_16_U16 :
3527 value = fields->f_dsp_16_u16;
3528 break;
3529 case M32C_OPERAND_DSP_16_U20 :
3530 value = fields->f_dsp_16_u24;
3531 break;
3532 case M32C_OPERAND_DSP_16_U24 :
3533 value = fields->f_dsp_16_u24;
3534 break;
3535 case M32C_OPERAND_DSP_16_U8 :
3536 value = fields->f_dsp_16_u8;
3537 break;
3538 case M32C_OPERAND_DSP_24_S16 :
3539 value = fields->f_dsp_24_s16;
3540 break;
3541 case M32C_OPERAND_DSP_24_S8 :
3542 value = fields->f_dsp_24_s8;
3543 break;
3544 case M32C_OPERAND_DSP_24_U16 :
3545 value = fields->f_dsp_24_u16;
3546 break;
3547 case M32C_OPERAND_DSP_24_U20 :
3548 value = fields->f_dsp_24_u24;
3549 break;
3550 case M32C_OPERAND_DSP_24_U24 :
3551 value = fields->f_dsp_24_u24;
3552 break;
3553 case M32C_OPERAND_DSP_24_U8 :
3554 value = fields->f_dsp_24_u8;
3555 break;
3556 case M32C_OPERAND_DSP_32_S16 :
3557 value = fields->f_dsp_32_s16;
3558 break;
3559 case M32C_OPERAND_DSP_32_S8 :
3560 value = fields->f_dsp_32_s8;
3561 break;
3562 case M32C_OPERAND_DSP_32_U16 :
3563 value = fields->f_dsp_32_u16;
3564 break;
3565 case M32C_OPERAND_DSP_32_U20 :
3566 value = fields->f_dsp_32_u24;
3567 break;
3568 case M32C_OPERAND_DSP_32_U24 :
3569 value = fields->f_dsp_32_u24;
3570 break;
3571 case M32C_OPERAND_DSP_32_U8 :
3572 value = fields->f_dsp_32_u8;
3573 break;
3574 case M32C_OPERAND_DSP_40_S16 :
3575 value = fields->f_dsp_40_s16;
3576 break;
3577 case M32C_OPERAND_DSP_40_S8 :
3578 value = fields->f_dsp_40_s8;
3579 break;
3580 case M32C_OPERAND_DSP_40_U16 :
3581 value = fields->f_dsp_40_u16;
3582 break;
3583 case M32C_OPERAND_DSP_40_U24 :
3584 value = fields->f_dsp_40_u24;
3585 break;
3586 case M32C_OPERAND_DSP_40_U8 :
3587 value = fields->f_dsp_40_u8;
3588 break;
3589 case M32C_OPERAND_DSP_48_S16 :
3590 value = fields->f_dsp_48_s16;
3591 break;
3592 case M32C_OPERAND_DSP_48_S8 :
3593 value = fields->f_dsp_48_s8;
3594 break;
3595 case M32C_OPERAND_DSP_48_U16 :
3596 value = fields->f_dsp_48_u16;
3597 break;
3598 case M32C_OPERAND_DSP_48_U24 :
3599 value = fields->f_dsp_48_u24;
3600 break;
3601 case M32C_OPERAND_DSP_48_U8 :
3602 value = fields->f_dsp_48_u8;
3603 break;
f75eb1c0
DD		 3604 case M32C_OPERAND_DSP_8_S24 :
3605 value = fields->f_dsp_8_s24;
3606 break;
49f58d10
JB		 3607 case M32C_OPERAND_DSP_8_S8 :
3608 value = fields->f_dsp_8_s8;
3609 break;
3610 case M32C_OPERAND_DSP_8_U16 :
3611 value = fields->f_dsp_8_u16;
3612 break;
e729279b
NC		 3613 case M32C_OPERAND_DSP_8_U24 :
3614 value = fields->f_dsp_8_u24;
3615 break;
49f58d10
JB		 3616 case M32C_OPERAND_DSP_8_U6 :
3617 value = fields->f_dsp_8_u6;
3618 break;
3619 case M32C_OPERAND_DSP_8_U8 :
3620 value = fields->f_dsp_8_u8;
3621 break;
3622 case M32C_OPERAND_DST16AN :
3623 value = fields->f_dst16_an;
3624 break;
3625 case M32C_OPERAND_DST16AN_S :
3626 value = fields->f_dst16_an_s;
3627 break;
3628 case M32C_OPERAND_DST16ANHI :
3629 value = fields->f_dst16_an;
3630 break;
3631 case M32C_OPERAND_DST16ANQI :
3632 value = fields->f_dst16_an;
3633 break;
3634 case M32C_OPERAND_DST16ANQI_S :
3635 value = fields->f_dst16_rn_QI_s;
3636 break;
3637 case M32C_OPERAND_DST16ANSI :
3638 value = fields->f_dst16_an;
3639 break;
3640 case M32C_OPERAND_DST16RNEXTQI :
3641 value = fields->f_dst16_rn_ext;
3642 break;
3643 case M32C_OPERAND_DST16RNHI :
3644 value = fields->f_dst16_rn;
3645 break;
3646 case M32C_OPERAND_DST16RNQI :
3647 value = fields->f_dst16_rn;
3648 break;
3649 case M32C_OPERAND_DST16RNQI_S :
3650 value = fields->f_dst16_rn_QI_s;
3651 break;
3652 case M32C_OPERAND_DST16RNSI :
3653 value = fields->f_dst16_rn;
3654 break;
3655 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
3656 value = fields->f_dst32_an_unprefixed;
3657 break;
3658 case M32C_OPERAND_DST32ANPREFIXED :
3659 value = fields->f_dst32_an_prefixed;
3660 break;
3661 case M32C_OPERAND_DST32ANPREFIXEDHI :
3662 value = fields->f_dst32_an_prefixed;
3663 break;
3664 case M32C_OPERAND_DST32ANPREFIXEDQI :
3665 value = fields->f_dst32_an_prefixed;
3666 break;
3667 case M32C_OPERAND_DST32ANPREFIXEDSI :
3668 value = fields->f_dst32_an_prefixed;
3669 break;
3670 case M32C_OPERAND_DST32ANUNPREFIXED :
3671 value = fields->f_dst32_an_unprefixed;
3672 break;
3673 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
3674 value = fields->f_dst32_an_unprefixed;
3675 break;
3676 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
3677 value = fields->f_dst32_an_unprefixed;
3678 break;
3679 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
3680 value = fields->f_dst32_an_unprefixed;
3681 break;
3682 case M32C_OPERAND_DST32R0HI_S :
3683 value = 0;
3684 break;
3685 case M32C_OPERAND_DST32R0QI_S :
3686 value = 0;
3687 break;
3688 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
3689 value = fields->f_dst32_rn_ext_unprefixed;
3690 break;
3691 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
3692 value = fields->f_dst32_rn_ext_unprefixed;
3693 break;
3694 case M32C_OPERAND_DST32RNPREFIXEDHI :
3695 value = fields->f_dst32_rn_prefixed_HI;
3696 break;
3697 case M32C_OPERAND_DST32RNPREFIXEDQI :
3698 value = fields->f_dst32_rn_prefixed_QI;
3699 break;
3700 case M32C_OPERAND_DST32RNPREFIXEDSI :
3701 value = fields->f_dst32_rn_prefixed_SI;
3702 break;
3703 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
3704 value = fields->f_dst32_rn_unprefixed_HI;
3705 break;
3706 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
3707 value = fields->f_dst32_rn_unprefixed_QI;
3708 break;
3709 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
3710 value = fields->f_dst32_rn_unprefixed_SI;
3711 break;
3712 case M32C_OPERAND_G :
3713 value = 0;
3714 break;
3715 case M32C_OPERAND_IMM_12_S4 :
3716 value = fields->f_imm_12_s4;
3717 break;
c6552317
DD		 3718 case M32C_OPERAND_IMM_12_S4N :
3719 value = fields->f_imm_12_s4;
3720 break;
49f58d10
JB		 3721 case M32C_OPERAND_IMM_13_U3 :
3722 value = fields->f_imm_13_u3;
3723 break;
3724 case M32C_OPERAND_IMM_16_HI :
3725 value = fields->f_dsp_16_s16;
3726 break;
3727 case M32C_OPERAND_IMM_16_QI :
3728 value = fields->f_dsp_16_s8;
3729 break;
3730 case M32C_OPERAND_IMM_16_SI :
3731 value = fields->f_dsp_16_s32;
3732 break;
3733 case M32C_OPERAND_IMM_20_S4 :
3734 value = fields->f_imm_20_s4;
3735 break;
3736 case M32C_OPERAND_IMM_24_HI :
3737 value = fields->f_dsp_24_s16;
3738 break;
3739 case M32C_OPERAND_IMM_24_QI :
3740 value = fields->f_dsp_24_s8;
3741 break;
3742 case M32C_OPERAND_IMM_24_SI :
3743 value = fields->f_dsp_24_s32;
3744 break;
3745 case M32C_OPERAND_IMM_32_HI :
3746 value = fields->f_dsp_32_s16;
3747 break;
3748 case M32C_OPERAND_IMM_32_QI :
3749 value = fields->f_dsp_32_s8;
3750 break;
3751 case M32C_OPERAND_IMM_32_SI :
3752 value = fields->f_dsp_32_s32;
3753 break;
3754 case M32C_OPERAND_IMM_40_HI :
3755 value = fields->f_dsp_40_s16;
3756 break;
3757 case M32C_OPERAND_IMM_40_QI :
3758 value = fields->f_dsp_40_s8;
3759 break;
3760 case M32C_OPERAND_IMM_40_SI :
3761 value = fields->f_dsp_40_s32;
3762 break;
3763 case M32C_OPERAND_IMM_48_HI :
3764 value = fields->f_dsp_48_s16;
3765 break;
3766 case M32C_OPERAND_IMM_48_QI :
3767 value = fields->f_dsp_48_s8;
3768 break;
3769 case M32C_OPERAND_IMM_48_SI :
3770 value = fields->f_dsp_48_s32;
3771 break;
3772 case M32C_OPERAND_IMM_56_HI :
3773 value = fields->f_dsp_56_s16;
3774 break;
3775 case M32C_OPERAND_IMM_56_QI :
3776 value = fields->f_dsp_56_s8;
3777 break;
3778 case M32C_OPERAND_IMM_64_HI :
3779 value = fields->f_dsp_64_s16;
3780 break;
3781 case M32C_OPERAND_IMM_8_HI :
3782 value = fields->f_dsp_8_s16;
3783 break;
3784 case M32C_OPERAND_IMM_8_QI :
3785 value = fields->f_dsp_8_s8;
3786 break;
3787 case M32C_OPERAND_IMM_8_S4 :
3788 value = fields->f_imm_8_s4;
3789 break;
c6552317
DD		 3790 case M32C_OPERAND_IMM_8_S4N :
3791 value = fields->f_imm_8_s4;
3792 break;
49f58d10
JB		 3793 case M32C_OPERAND_IMM_SH_12_S4 :
3794 value = fields->f_imm_12_s4;
3795 break;
3796 case M32C_OPERAND_IMM_SH_20_S4 :
3797 value = fields->f_imm_20_s4;
3798 break;
3799 case M32C_OPERAND_IMM_SH_8_S4 :
3800 value = fields->f_imm_8_s4;
3801 break;
3802 case M32C_OPERAND_IMM1_S :
3803 value = fields->f_imm1_S;
3804 break;
3805 case M32C_OPERAND_IMM3_S :
3806 value = fields->f_imm3_S;
3807 break;
3808 case M32C_OPERAND_LAB_16_8 :
3809 value = fields->f_lab_16_8;
3810 break;
3811 case M32C_OPERAND_LAB_24_8 :
3812 value = fields->f_lab_24_8;
3813 break;
3814 case M32C_OPERAND_LAB_32_8 :
3815 value = fields->f_lab_32_8;
3816 break;
3817 case M32C_OPERAND_LAB_40_8 :
3818 value = fields->f_lab_40_8;
3819 break;
3820 case M32C_OPERAND_LAB_5_3 :
3821 value = fields->f_lab_5_3;
3822 break;
3823 case M32C_OPERAND_LAB_8_16 :
3824 value = fields->f_lab_8_16;
3825 break;
3826 case M32C_OPERAND_LAB_8_24 :
3827 value = fields->f_lab_8_24;
3828 break;
3829 case M32C_OPERAND_LAB_8_8 :
3830 value = fields->f_lab_8_8;
3831 break;
3832 case M32C_OPERAND_LAB32_JMP_S :
3833 value = fields->f_lab32_jmp_s;
3834 break;
3835 case M32C_OPERAND_Q :
3836 value = 0;
3837 break;
3838 case M32C_OPERAND_R0 :
3839 value = 0;
3840 break;
3841 case M32C_OPERAND_R0H :
3842 value = 0;
3843 break;
3844 case M32C_OPERAND_R0L :
3845 value = 0;
3846 break;
3847 case M32C_OPERAND_R1 :
3848 value = 0;
3849 break;
3850 case M32C_OPERAND_R1R2R0 :
3851 value = 0;
3852 break;
3853 case M32C_OPERAND_R2 :
3854 value = 0;
3855 break;
3856 case M32C_OPERAND_R2R0 :
3857 value = 0;
3858 break;
3859 case M32C_OPERAND_R3 :
3860 value = 0;
3861 break;
3862 case M32C_OPERAND_R3R1 :
3863 value = 0;
3864 break;
3865 case M32C_OPERAND_REGSETPOP :
3866 value = fields->f_8_8;
3867 break;
3868 case M32C_OPERAND_REGSETPUSH :
3869 value = fields->f_8_8;
3870 break;
3871 case M32C_OPERAND_RN16_PUSH_S :
3872 value = fields->f_4_1;
3873 break;
3874 case M32C_OPERAND_S :
3875 value = 0;
3876 break;
3877 case M32C_OPERAND_SRC16AN :
3878 value = fields->f_src16_an;
3879 break;
3880 case M32C_OPERAND_SRC16ANHI :
3881 value = fields->f_src16_an;
3882 break;
3883 case M32C_OPERAND_SRC16ANQI :
3884 value = fields->f_src16_an;
3885 break;
3886 case M32C_OPERAND_SRC16RNHI :
3887 value = fields->f_src16_rn;
3888 break;
3889 case M32C_OPERAND_SRC16RNQI :
3890 value = fields->f_src16_rn;
3891 break;
3892 case M32C_OPERAND_SRC32ANPREFIXED :
3893 value = fields->f_src32_an_prefixed;
3894 break;
3895 case M32C_OPERAND_SRC32ANPREFIXEDHI :
3896 value = fields->f_src32_an_prefixed;
3897 break;
3898 case M32C_OPERAND_SRC32ANPREFIXEDQI :
3899 value = fields->f_src32_an_prefixed;
3900 break;
3901 case M32C_OPERAND_SRC32ANPREFIXEDSI :
3902 value = fields->f_src32_an_prefixed;
3903 break;
3904 case M32C_OPERAND_SRC32ANUNPREFIXED :
3905 value = fields->f_src32_an_unprefixed;
3906 break;
3907 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
3908 value = fields->f_src32_an_unprefixed;
3909 break;
3910 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
3911 value = fields->f_src32_an_unprefixed;
3912 break;
3913 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
3914 value = fields->f_src32_an_unprefixed;
3915 break;
3916 case M32C_OPERAND_SRC32RNPREFIXEDHI :
3917 value = fields->f_src32_rn_prefixed_HI;
3918 break;
3919 case M32C_OPERAND_SRC32RNPREFIXEDQI :
3920 value = fields->f_src32_rn_prefixed_QI;
3921 break;
3922 case M32C_OPERAND_SRC32RNPREFIXEDSI :
3923 value = fields->f_src32_rn_prefixed_SI;
3924 break;
3925 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
3926 value = fields->f_src32_rn_unprefixed_HI;
3927 break;
3928 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
3929 value = fields->f_src32_rn_unprefixed_QI;
3930 break;
3931 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
3932 value = fields->f_src32_rn_unprefixed_SI;
3933 break;
3934 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
3935 value = fields->f_5_1;
3936 break;
3937 case M32C_OPERAND_X :
3938 value = 0;
3939 break;
3940 case M32C_OPERAND_Z :
3941 value = 0;
3942 break;
3943 case M32C_OPERAND_COND16_16 :
3944 value = fields->f_dsp_16_u8;
3945 break;
3946 case M32C_OPERAND_COND16_24 :
3947 value = fields->f_dsp_24_u8;
3948 break;
3949 case M32C_OPERAND_COND16_32 :
3950 value = fields->f_dsp_32_u8;
3951 break;
3952 case M32C_OPERAND_COND16C :
3953 value = fields->f_cond16;
3954 break;
3955 case M32C_OPERAND_COND16J :
3956 value = fields->f_cond16;
3957 break;
3958 case M32C_OPERAND_COND16J5 :
3959 value = fields->f_cond16j_5;
3960 break;
3961 case M32C_OPERAND_COND32 :
3962 value = fields->f_cond32;
3963 break;
3964 case M32C_OPERAND_COND32_16 :
3965 value = fields->f_dsp_16_u8;
3966 break;
3967 case M32C_OPERAND_COND32_24 :
3968 value = fields->f_dsp_24_u8;
3969 break;
3970 case M32C_OPERAND_COND32_32 :
3971 value = fields->f_dsp_32_u8;
3972 break;
3973 case M32C_OPERAND_COND32_40 :
3974 value = fields->f_dsp_40_u8;
3975 break;
3976 case M32C_OPERAND_COND32J :
3977 value = fields->f_cond32j;
3978 break;
3979 case M32C_OPERAND_CR1_PREFIXED_32 :
3980 value = fields->f_21_3;
3981 break;
3982 case M32C_OPERAND_CR1_UNPREFIXED_32 :
3983 value = fields->f_13_3;
3984 break;
3985 case M32C_OPERAND_CR16 :
3986 value = fields->f_9_3;
3987 break;
3988 case M32C_OPERAND_CR2_32 :
3989 value = fields->f_13_3;
3990 break;
3991 case M32C_OPERAND_CR3_PREFIXED_32 :
3992 value = fields->f_21_3;
3993 break;
3994 case M32C_OPERAND_CR3_UNPREFIXED_32 :
3995 value = fields->f_13_3;
3996 break;
3997 case M32C_OPERAND_FLAGS16 :
3998 value = fields->f_9_3;
3999 break;
4000 case M32C_OPERAND_FLAGS32 :
4001 value = fields->f_13_3;
4002 break;
4003 case M32C_OPERAND_SCCOND32 :
4004 value = fields->f_cond16;
4005 break;
4006 case M32C_OPERAND_SIZE :
4007 value = 0;
4008 break;
4009
4010 default :
4011 /* xgettext:c-format */
4012 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
4013 opindex);
4014 abort ();
4015 }
4016
4017 return value;
4018}
4019
e729279b
NC		 4020void m32c_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
4021void m32c_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
49f58d10
JB		 4022
4023/* Stuffing values in cgen_fields is handled by a collection of functions.
4024 They are distinguished by the type of the VALUE argument they accept.
4025 TODO: floating point, inlining support, remove cases where argument type
4026 not appropriate. */
4027
4028void
e729279b
NC		 4029m32c_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4030 int opindex,
4031 CGEN_FIELDS * fields,
4032 int value)
49f58d10
JB		 4033{
4034 switch (opindex)
4035 {
4036 case M32C_OPERAND_A0 :
4037 break;
4038 case M32C_OPERAND_A1 :
4039 break;
4040 case M32C_OPERAND_AN16_PUSH_S :
4041 fields->f_4_1 = value;
4042 break;
4043 case M32C_OPERAND_BIT16AN :
4044 fields->f_dst16_an = value;
4045 break;
4046 case M32C_OPERAND_BIT16RN :
4047 fields->f_dst16_rn = value;
4048 break;
4049 case M32C_OPERAND_BIT32ANPREFIXED :
4050 fields->f_dst32_an_prefixed = value;
4051 break;
4052 case M32C_OPERAND_BIT32ANUNPREFIXED :
4053 fields->f_dst32_an_unprefixed = value;
4054 break;
4055 case M32C_OPERAND_BIT32RNPREFIXED :
4056 fields->f_dst32_rn_prefixed_QI = value;
4057 break;
4058 case M32C_OPERAND_BIT32RNUNPREFIXED :
4059 fields->f_dst32_rn_unprefixed_QI = value;
4060 break;
4061 case M32C_OPERAND_BITBASE16_16_S8 :
4062 fields->f_dsp_16_s8 = value;
4063 break;
4064 case M32C_OPERAND_BITBASE16_16_U16 :
4065 fields->f_dsp_16_u16 = value;
4066 break;
4067 case M32C_OPERAND_BITBASE16_16_U8 :
4068 fields->f_dsp_16_u8 = value;
4069 break;
4070 case M32C_OPERAND_BITBASE16_8_U11_S :
4071 fields->f_bitbase16_u11_S = value;
4072 break;
4073 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4074 fields->f_bitbase32_16_s11_unprefixed = value;
4075 break;
4076 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4077 fields->f_bitbase32_16_s19_unprefixed = value;
4078 break;
4079 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4080 fields->f_bitbase32_16_u11_unprefixed = value;
4081 break;
4082 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4083 fields->f_bitbase32_16_u19_unprefixed = value;
4084 break;
4085 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4086 fields->f_bitbase32_16_u27_unprefixed = value;
4087 break;
4088 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4089 fields->f_bitbase32_24_s11_prefixed = value;
4090 break;
4091 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4092 fields->f_bitbase32_24_s19_prefixed = value;
4093 break;
4094 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4095 fields->f_bitbase32_24_u11_prefixed = value;
4096 break;
4097 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4098 fields->f_bitbase32_24_u19_prefixed = value;
4099 break;
4100 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4101 fields->f_bitbase32_24_u27_prefixed = value;
4102 break;
4103 case M32C_OPERAND_BITNO16R :
4104 fields->f_dsp_16_u8 = value;
4105 break;
4106 case M32C_OPERAND_BITNO32PREFIXED :
4107 fields->f_bitno32_prefixed = value;
4108 break;
4109 case M32C_OPERAND_BITNO32UNPREFIXED :
4110 fields->f_bitno32_unprefixed = value;
4111 break;
4112 case M32C_OPERAND_DSP_10_U6 :
4113 fields->f_dsp_10_u6 = value;
4114 break;
4115 case M32C_OPERAND_DSP_16_S16 :
4116 fields->f_dsp_16_s16 = value;
4117 break;
4118 case M32C_OPERAND_DSP_16_S8 :
4119 fields->f_dsp_16_s8 = value;
4120 break;
4121 case M32C_OPERAND_DSP_16_U16 :
4122 fields->f_dsp_16_u16 = value;
4123 break;
4124 case M32C_OPERAND_DSP_16_U20 :
4125 fields->f_dsp_16_u24 = value;
4126 break;
4127 case M32C_OPERAND_DSP_16_U24 :
4128 fields->f_dsp_16_u24 = value;
4129 break;
4130 case M32C_OPERAND_DSP_16_U8 :
4131 fields->f_dsp_16_u8 = value;
4132 break;
4133 case M32C_OPERAND_DSP_24_S16 :
4134 fields->f_dsp_24_s16 = value;
4135 break;
4136 case M32C_OPERAND_DSP_24_S8 :
4137 fields->f_dsp_24_s8 = value;
4138 break;
4139 case M32C_OPERAND_DSP_24_U16 :
4140 fields->f_dsp_24_u16 = value;
4141 break;
4142 case M32C_OPERAND_DSP_24_U20 :
4143 fields->f_dsp_24_u24 = value;
4144 break;
4145 case M32C_OPERAND_DSP_24_U24 :
4146 fields->f_dsp_24_u24 = value;
4147 break;
4148 case M32C_OPERAND_DSP_24_U8 :
4149 fields->f_dsp_24_u8 = value;
4150 break;
4151 case M32C_OPERAND_DSP_32_S16 :
4152 fields->f_dsp_32_s16 = value;
4153 break;
4154 case M32C_OPERAND_DSP_32_S8 :
4155 fields->f_dsp_32_s8 = value;
4156 break;
4157 case M32C_OPERAND_DSP_32_U16 :
4158 fields->f_dsp_32_u16 = value;
4159 break;
4160 case M32C_OPERAND_DSP_32_U20 :
4161 fields->f_dsp_32_u24 = value;
4162 break;
4163 case M32C_OPERAND_DSP_32_U24 :
4164 fields->f_dsp_32_u24 = value;
4165 break;
4166 case M32C_OPERAND_DSP_32_U8 :
4167 fields->f_dsp_32_u8 = value;
4168 break;
4169 case M32C_OPERAND_DSP_40_S16 :
4170 fields->f_dsp_40_s16 = value;
4171 break;
4172 case M32C_OPERAND_DSP_40_S8 :
4173 fields->f_dsp_40_s8 = value;
4174 break;
4175 case M32C_OPERAND_DSP_40_U16 :
4176 fields->f_dsp_40_u16 = value;
4177 break;
4178 case M32C_OPERAND_DSP_40_U24 :
4179 fields->f_dsp_40_u24 = value;
4180 break;
4181 case M32C_OPERAND_DSP_40_U8 :
4182 fields->f_dsp_40_u8 = value;
4183 break;
4184 case M32C_OPERAND_DSP_48_S16 :
4185 fields->f_dsp_48_s16 = value;
4186 break;
4187 case M32C_OPERAND_DSP_48_S8 :
4188 fields->f_dsp_48_s8 = value;
4189 break;
4190 case M32C_OPERAND_DSP_48_U16 :
4191 fields->f_dsp_48_u16 = value;
4192 break;
4193 case M32C_OPERAND_DSP_48_U24 :
4194 fields->f_dsp_48_u24 = value;
4195 break;
4196 case M32C_OPERAND_DSP_48_U8 :
4197 fields->f_dsp_48_u8 = value;
4198 break;
f75eb1c0
DD		 4199 case M32C_OPERAND_DSP_8_S24 :
4200 fields->f_dsp_8_s24 = value;
4201 break;
49f58d10
JB		 4202 case M32C_OPERAND_DSP_8_S8 :
4203 fields->f_dsp_8_s8 = value;
4204 break;
4205 case M32C_OPERAND_DSP_8_U16 :
4206 fields->f_dsp_8_u16 = value;
4207 break;
e729279b
NC		 4208 case M32C_OPERAND_DSP_8_U24 :
4209 fields->f_dsp_8_u24 = value;
4210 break;
49f58d10
JB		 4211 case M32C_OPERAND_DSP_8_U6 :
4212 fields->f_dsp_8_u6 = value;
4213 break;
4214 case M32C_OPERAND_DSP_8_U8 :
4215 fields->f_dsp_8_u8 = value;
4216 break;
4217 case M32C_OPERAND_DST16AN :
4218 fields->f_dst16_an = value;
4219 break;
4220 case M32C_OPERAND_DST16AN_S :
4221 fields->f_dst16_an_s = value;
4222 break;
4223 case M32C_OPERAND_DST16ANHI :
4224 fields->f_dst16_an = value;
4225 break;
4226 case M32C_OPERAND_DST16ANQI :
4227 fields->f_dst16_an = value;
4228 break;
4229 case M32C_OPERAND_DST16ANQI_S :
4230 fields->f_dst16_rn_QI_s = value;
4231 break;
4232 case M32C_OPERAND_DST16ANSI :
4233 fields->f_dst16_an = value;
4234 break;
4235 case M32C_OPERAND_DST16RNEXTQI :
4236 fields->f_dst16_rn_ext = value;
4237 break;
4238 case M32C_OPERAND_DST16RNHI :
4239 fields->f_dst16_rn = value;
4240 break;
4241 case M32C_OPERAND_DST16RNQI :
4242 fields->f_dst16_rn = value;
4243 break;
4244 case M32C_OPERAND_DST16RNQI_S :
4245 fields->f_dst16_rn_QI_s = value;
4246 break;
4247 case M32C_OPERAND_DST16RNSI :
4248 fields->f_dst16_rn = value;
4249 break;
4250 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4251 fields->f_dst32_an_unprefixed = value;
4252 break;
4253 case M32C_OPERAND_DST32ANPREFIXED :
4254 fields->f_dst32_an_prefixed = value;
4255 break;
4256 case M32C_OPERAND_DST32ANPREFIXEDHI :
4257 fields->f_dst32_an_prefixed = value;
4258 break;
4259 case M32C_OPERAND_DST32ANPREFIXEDQI :
4260 fields->f_dst32_an_prefixed = value;
4261 break;
4262 case M32C_OPERAND_DST32ANPREFIXEDSI :
4263 fields->f_dst32_an_prefixed = value;
4264 break;
4265 case M32C_OPERAND_DST32ANUNPREFIXED :
4266 fields->f_dst32_an_unprefixed = value;
4267 break;
4268 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4269 fields->f_dst32_an_unprefixed = value;
4270 break;
4271 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4272 fields->f_dst32_an_unprefixed = value;
4273 break;
4274 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4275 fields->f_dst32_an_unprefixed = value;
4276 break;
4277 case M32C_OPERAND_DST32R0HI_S :
4278 break;
4279 case M32C_OPERAND_DST32R0QI_S :
4280 break;
4281 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4282 fields->f_dst32_rn_ext_unprefixed = value;
4283 break;
4284 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4285 fields->f_dst32_rn_ext_unprefixed = value;
4286 break;
4287 case M32C_OPERAND_DST32RNPREFIXEDHI :
4288 fields->f_dst32_rn_prefixed_HI = value;
4289 break;
4290 case M32C_OPERAND_DST32RNPREFIXEDQI :
4291 fields->f_dst32_rn_prefixed_QI = value;
4292 break;
4293 case M32C_OPERAND_DST32RNPREFIXEDSI :
4294 fields->f_dst32_rn_prefixed_SI = value;
4295 break;
4296 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4297 fields->f_dst32_rn_unprefixed_HI = value;
4298 break;
4299 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4300 fields->f_dst32_rn_unprefixed_QI = value;
4301 break;
4302 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4303 fields->f_dst32_rn_unprefixed_SI = value;
4304 break;
4305 case M32C_OPERAND_G :
4306 break;
4307 case M32C_OPERAND_IMM_12_S4 :
4308 fields->f_imm_12_s4 = value;
4309 break;
c6552317
DD		 4310 case M32C_OPERAND_IMM_12_S4N :
4311 fields->f_imm_12_s4 = value;
4312 break;
49f58d10
JB		 4313 case M32C_OPERAND_IMM_13_U3 :
4314 fields->f_imm_13_u3 = value;
4315 break;
4316 case M32C_OPERAND_IMM_16_HI :
4317 fields->f_dsp_16_s16 = value;
4318 break;
4319 case M32C_OPERAND_IMM_16_QI :
4320 fields->f_dsp_16_s8 = value;
4321 break;
4322 case M32C_OPERAND_IMM_16_SI :
4323 fields->f_dsp_16_s32 = value;
4324 break;
4325 case M32C_OPERAND_IMM_20_S4 :
4326 fields->f_imm_20_s4 = value;
4327 break;
4328 case M32C_OPERAND_IMM_24_HI :
4329 fields->f_dsp_24_s16 = value;
4330 break;
4331 case M32C_OPERAND_IMM_24_QI :
4332 fields->f_dsp_24_s8 = value;
4333 break;
4334 case M32C_OPERAND_IMM_24_SI :
4335 fields->f_dsp_24_s32 = value;
4336 break;
4337 case M32C_OPERAND_IMM_32_HI :
4338 fields->f_dsp_32_s16 = value;
4339 break;
4340 case M32C_OPERAND_IMM_32_QI :
4341 fields->f_dsp_32_s8 = value;
4342 break;
4343 case M32C_OPERAND_IMM_32_SI :
4344 fields->f_dsp_32_s32 = value;
4345 break;
4346 case M32C_OPERAND_IMM_40_HI :
4347 fields->f_dsp_40_s16 = value;
4348 break;
4349 case M32C_OPERAND_IMM_40_QI :
4350 fields->f_dsp_40_s8 = value;
4351 break;
4352 case M32C_OPERAND_IMM_40_SI :
4353 fields->f_dsp_40_s32 = value;
4354 break;
4355 case M32C_OPERAND_IMM_48_HI :
4356 fields->f_dsp_48_s16 = value;
4357 break;
4358 case M32C_OPERAND_IMM_48_QI :
4359 fields->f_dsp_48_s8 = value;
4360 break;
4361 case M32C_OPERAND_IMM_48_SI :
4362 fields->f_dsp_48_s32 = value;
4363 break;
4364 case M32C_OPERAND_IMM_56_HI :
4365 fields->f_dsp_56_s16 = value;
4366 break;
4367 case M32C_OPERAND_IMM_56_QI :
4368 fields->f_dsp_56_s8 = value;
4369 break;
4370 case M32C_OPERAND_IMM_64_HI :
4371 fields->f_dsp_64_s16 = value;
4372 break;
4373 case M32C_OPERAND_IMM_8_HI :
4374 fields->f_dsp_8_s16 = value;
4375 break;
4376 case M32C_OPERAND_IMM_8_QI :
4377 fields->f_dsp_8_s8 = value;
4378 break;
4379 case M32C_OPERAND_IMM_8_S4 :
4380 fields->f_imm_8_s4 = value;
4381 break;
c6552317
DD		 4382 case M32C_OPERAND_IMM_8_S4N :
4383 fields->f_imm_8_s4 = value;
4384 break;
49f58d10
JB		 4385 case M32C_OPERAND_IMM_SH_12_S4 :
4386 fields->f_imm_12_s4 = value;
4387 break;
4388 case M32C_OPERAND_IMM_SH_20_S4 :
4389 fields->f_imm_20_s4 = value;
4390 break;
4391 case M32C_OPERAND_IMM_SH_8_S4 :
4392 fields->f_imm_8_s4 = value;
4393 break;
4394 case M32C_OPERAND_IMM1_S :
4395 fields->f_imm1_S = value;
4396 break;
4397 case M32C_OPERAND_IMM3_S :
4398 fields->f_imm3_S = value;
4399 break;
4400 case M32C_OPERAND_LAB_16_8 :
4401 fields->f_lab_16_8 = value;
4402 break;
4403 case M32C_OPERAND_LAB_24_8 :
4404 fields->f_lab_24_8 = value;
4405 break;
4406 case M32C_OPERAND_LAB_32_8 :
4407 fields->f_lab_32_8 = value;
4408 break;
4409 case M32C_OPERAND_LAB_40_8 :
4410 fields->f_lab_40_8 = value;
4411 break;
4412 case M32C_OPERAND_LAB_5_3 :
4413 fields->f_lab_5_3 = value;
4414 break;
4415 case M32C_OPERAND_LAB_8_16 :
4416 fields->f_lab_8_16 = value;
4417 break;
4418 case M32C_OPERAND_LAB_8_24 :
4419 fields->f_lab_8_24 = value;
4420 break;
4421 case M32C_OPERAND_LAB_8_8 :
4422 fields->f_lab_8_8 = value;
4423 break;
4424 case M32C_OPERAND_LAB32_JMP_S :
4425 fields->f_lab32_jmp_s = value;
4426 break;
4427 case M32C_OPERAND_Q :
4428 break;
4429 case M32C_OPERAND_R0 :
4430 break;
4431 case M32C_OPERAND_R0H :
4432 break;
4433 case M32C_OPERAND_R0L :
4434 break;
4435 case M32C_OPERAND_R1 :
4436 break;
4437 case M32C_OPERAND_R1R2R0 :
4438 break;
4439 case M32C_OPERAND_R2 :
4440 break;
4441 case M32C_OPERAND_R2R0 :
4442 break;
4443 case M32C_OPERAND_R3 :
4444 break;
4445 case M32C_OPERAND_R3R1 :
4446 break;
4447 case M32C_OPERAND_REGSETPOP :
4448 fields->f_8_8 = value;
4449 break;
4450 case M32C_OPERAND_REGSETPUSH :
4451 fields->f_8_8 = value;
4452 break;
4453 case M32C_OPERAND_RN16_PUSH_S :
4454 fields->f_4_1 = value;
4455 break;
4456 case M32C_OPERAND_S :
4457 break;
4458 case M32C_OPERAND_SRC16AN :
4459 fields->f_src16_an = value;
4460 break;
4461 case M32C_OPERAND_SRC16ANHI :
4462 fields->f_src16_an = value;
4463 break;
4464 case M32C_OPERAND_SRC16ANQI :
4465 fields->f_src16_an = value;
4466 break;
4467 case M32C_OPERAND_SRC16RNHI :
4468 fields->f_src16_rn = value;
4469 break;
4470 case M32C_OPERAND_SRC16RNQI :
4471 fields->f_src16_rn = value;
4472 break;
4473 case M32C_OPERAND_SRC32ANPREFIXED :
4474 fields->f_src32_an_prefixed = value;
4475 break;
4476 case M32C_OPERAND_SRC32ANPREFIXEDHI :
4477 fields->f_src32_an_prefixed = value;
4478 break;
4479 case M32C_OPERAND_SRC32ANPREFIXEDQI :
4480 fields->f_src32_an_prefixed = value;
4481 break;
4482 case M32C_OPERAND_SRC32ANPREFIXEDSI :
4483 fields->f_src32_an_prefixed = value;
4484 break;
4485 case M32C_OPERAND_SRC32ANUNPREFIXED :
4486 fields->f_src32_an_unprefixed = value;
4487 break;
4488 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
4489 fields->f_src32_an_unprefixed = value;
4490 break;
4491 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
4492 fields->f_src32_an_unprefixed = value;
4493 break;
4494 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
4495 fields->f_src32_an_unprefixed = value;
4496 break;
4497 case M32C_OPERAND_SRC32RNPREFIXEDHI :
4498 fields->f_src32_rn_prefixed_HI = value;
4499 break;
4500 case M32C_OPERAND_SRC32RNPREFIXEDQI :
4501 fields->f_src32_rn_prefixed_QI = value;
4502 break;
4503 case M32C_OPERAND_SRC32RNPREFIXEDSI :
4504 fields->f_src32_rn_prefixed_SI = value;
4505 break;
4506 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
4507 fields->f_src32_rn_unprefixed_HI = value;
4508 break;
4509 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
4510 fields->f_src32_rn_unprefixed_QI = value;
4511 break;
4512 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
4513 fields->f_src32_rn_unprefixed_SI = value;
4514 break;
4515 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
4516 fields->f_5_1 = value;
4517 break;
4518 case M32C_OPERAND_X :
4519 break;
4520 case M32C_OPERAND_Z :
4521 break;
4522 case M32C_OPERAND_COND16_16 :
4523 fields->f_dsp_16_u8 = value;
4524 break;
4525 case M32C_OPERAND_COND16_24 :
4526 fields->f_dsp_24_u8 = value;
4527 break;
4528 case M32C_OPERAND_COND16_32 :
4529 fields->f_dsp_32_u8 = value;
4530 break;
4531 case M32C_OPERAND_COND16C :
4532 fields->f_cond16 = value;
4533 break;
4534 case M32C_OPERAND_COND16J :
4535 fields->f_cond16 = value;
4536 break;
4537 case M32C_OPERAND_COND16J5 :
4538 fields->f_cond16j_5 = value;
4539 break;
4540 case M32C_OPERAND_COND32 :
4541 fields->f_cond32 = value;
4542 break;
4543 case M32C_OPERAND_COND32_16 :
4544 fields->f_dsp_16_u8 = value;
4545 break;
4546 case M32C_OPERAND_COND32_24 :
4547 fields->f_dsp_24_u8 = value;
4548 break;
4549 case M32C_OPERAND_COND32_32 :
4550 fields->f_dsp_32_u8 = value;
4551 break;
4552 case M32C_OPERAND_COND32_40 :
4553 fields->f_dsp_40_u8 = value;
4554 break;
4555 case M32C_OPERAND_COND32J :
4556 fields->f_cond32j = value;
4557 break;
4558 case M32C_OPERAND_CR1_PREFIXED_32 :
4559 fields->f_21_3 = value;
4560 break;
4561 case M32C_OPERAND_CR1_UNPREFIXED_32 :
4562 fields->f_13_3 = value;
4563 break;
4564 case M32C_OPERAND_CR16 :
4565 fields->f_9_3 = value;
4566 break;
4567 case M32C_OPERAND_CR2_32 :
4568 fields->f_13_3 = value;
4569 break;
4570 case M32C_OPERAND_CR3_PREFIXED_32 :
4571 fields->f_21_3 = value;
4572 break;
4573 case M32C_OPERAND_CR3_UNPREFIXED_32 :
4574 fields->f_13_3 = value;
4575 break;
4576 case M32C_OPERAND_FLAGS16 :
4577 fields->f_9_3 = value;
4578 break;
4579 case M32C_OPERAND_FLAGS32 :
4580 fields->f_13_3 = value;
4581 break;
4582 case M32C_OPERAND_SCCOND32 :
4583 fields->f_cond16 = value;
4584 break;
4585 case M32C_OPERAND_SIZE :
4586 break;
4587
4588 default :
4589 /* xgettext:c-format */
4590 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
4591 opindex);
4592 abort ();
4593 }
4594}
4595
4596void
e729279b
NC		 4597m32c_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
4598 int opindex,
4599 CGEN_FIELDS * fields,
4600 bfd_vma value)
49f58d10
JB		 4601{
4602 switch (opindex)
4603 {
4604 case M32C_OPERAND_A0 :
4605 break;
4606 case M32C_OPERAND_A1 :
4607 break;
4608 case M32C_OPERAND_AN16_PUSH_S :
4609 fields->f_4_1 = value;
4610 break;
4611 case M32C_OPERAND_BIT16AN :
4612 fields->f_dst16_an = value;
4613 break;
4614 case M32C_OPERAND_BIT16RN :
4615 fields->f_dst16_rn = value;
4616 break;
4617 case M32C_OPERAND_BIT32ANPREFIXED :
4618 fields->f_dst32_an_prefixed = value;
4619 break;
4620 case M32C_OPERAND_BIT32ANUNPREFIXED :
4621 fields->f_dst32_an_unprefixed = value;
4622 break;
4623 case M32C_OPERAND_BIT32RNPREFIXED :
4624 fields->f_dst32_rn_prefixed_QI = value;
4625 break;
4626 case M32C_OPERAND_BIT32RNUNPREFIXED :
4627 fields->f_dst32_rn_unprefixed_QI = value;
4628 break;
4629 case M32C_OPERAND_BITBASE16_16_S8 :
4630 fields->f_dsp_16_s8 = value;
4631 break;
4632 case M32C_OPERAND_BITBASE16_16_U16 :
4633 fields->f_dsp_16_u16 = value;
4634 break;
4635 case M32C_OPERAND_BITBASE16_16_U8 :
4636 fields->f_dsp_16_u8 = value;
4637 break;
4638 case M32C_OPERAND_BITBASE16_8_U11_S :
4639 fields->f_bitbase16_u11_S = value;
4640 break;
4641 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED :
4642 fields->f_bitbase32_16_s11_unprefixed = value;
4643 break;
4644 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED :
4645 fields->f_bitbase32_16_s19_unprefixed = value;
4646 break;
4647 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED :
4648 fields->f_bitbase32_16_u11_unprefixed = value;
4649 break;
4650 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED :
4651 fields->f_bitbase32_16_u19_unprefixed = value;
4652 break;
4653 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED :
4654 fields->f_bitbase32_16_u27_unprefixed = value;
4655 break;
4656 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED :
4657 fields->f_bitbase32_24_s11_prefixed = value;
4658 break;
4659 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED :
4660 fields->f_bitbase32_24_s19_prefixed = value;
4661 break;
4662 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED :
4663 fields->f_bitbase32_24_u11_prefixed = value;
4664 break;
4665 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED :
4666 fields->f_bitbase32_24_u19_prefixed = value;
4667 break;
4668 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED :
4669 fields->f_bitbase32_24_u27_prefixed = value;
4670 break;
4671 case M32C_OPERAND_BITNO16R :
4672 fields->f_dsp_16_u8 = value;
4673 break;
4674 case M32C_OPERAND_BITNO32PREFIXED :
4675 fields->f_bitno32_prefixed = value;
4676 break;
4677 case M32C_OPERAND_BITNO32UNPREFIXED :
4678 fields->f_bitno32_unprefixed = value;
4679 break;
4680 case M32C_OPERAND_DSP_10_U6 :
4681 fields->f_dsp_10_u6 = value;
4682 break;
4683 case M32C_OPERAND_DSP_16_S16 :
4684 fields->f_dsp_16_s16 = value;
4685 break;
4686 case M32C_OPERAND_DSP_16_S8 :
4687 fields->f_dsp_16_s8 = value;
4688 break;
4689 case M32C_OPERAND_DSP_16_U16 :
4690 fields->f_dsp_16_u16 = value;
4691 break;
4692 case M32C_OPERAND_DSP_16_U20 :
4693 fields->f_dsp_16_u24 = value;
4694 break;
4695 case M32C_OPERAND_DSP_16_U24 :
4696 fields->f_dsp_16_u24 = value;
4697 break;
4698 case M32C_OPERAND_DSP_16_U8 :
4699 fields->f_dsp_16_u8 = value;
4700 break;
4701 case M32C_OPERAND_DSP_24_S16 :
4702 fields->f_dsp_24_s16 = value;
4703 break;
4704 case M32C_OPERAND_DSP_24_S8 :
4705 fields->f_dsp_24_s8 = value;
4706 break;
4707 case M32C_OPERAND_DSP_24_U16 :
4708 fields->f_dsp_24_u16 = value;
4709 break;
4710 case M32C_OPERAND_DSP_24_U20 :
4711 fields->f_dsp_24_u24 = value;
4712 break;
4713 case M32C_OPERAND_DSP_24_U24 :
4714 fields->f_dsp_24_u24 = value;
4715 break;
4716 case M32C_OPERAND_DSP_24_U8 :
4717 fields->f_dsp_24_u8 = value;
4718 break;
4719 case M32C_OPERAND_DSP_32_S16 :
4720 fields->f_dsp_32_s16 = value;
4721 break;
4722 case M32C_OPERAND_DSP_32_S8 :
4723 fields->f_dsp_32_s8 = value;
4724 break;
4725 case M32C_OPERAND_DSP_32_U16 :
4726 fields->f_dsp_32_u16 = value;
4727 break;
4728 case M32C_OPERAND_DSP_32_U20 :
4729 fields->f_dsp_32_u24 = value;
4730 break;
4731 case M32C_OPERAND_DSP_32_U24 :
4732 fields->f_dsp_32_u24 = value;
4733 break;
4734 case M32C_OPERAND_DSP_32_U8 :
4735 fields->f_dsp_32_u8 = value;
4736 break;
4737 case M32C_OPERAND_DSP_40_S16 :
4738 fields->f_dsp_40_s16 = value;
4739 break;
4740 case M32C_OPERAND_DSP_40_S8 :
4741 fields->f_dsp_40_s8 = value;
4742 break;
4743 case M32C_OPERAND_DSP_40_U16 :
4744 fields->f_dsp_40_u16 = value;
4745 break;
4746 case M32C_OPERAND_DSP_40_U24 :
4747 fields->f_dsp_40_u24 = value;
4748 break;
4749 case M32C_OPERAND_DSP_40_U8 :
4750 fields->f_dsp_40_u8 = value;
4751 break;
4752 case M32C_OPERAND_DSP_48_S16 :
4753 fields->f_dsp_48_s16 = value;
4754 break;
4755 case M32C_OPERAND_DSP_48_S8 :
4756 fields->f_dsp_48_s8 = value;
4757 break;
4758 case M32C_OPERAND_DSP_48_U16 :
4759 fields->f_dsp_48_u16 = value;
4760 break;
4761 case M32C_OPERAND_DSP_48_U24 :
4762 fields->f_dsp_48_u24 = value;
4763 break;
4764 case M32C_OPERAND_DSP_48_U8 :
4765 fields->f_dsp_48_u8 = value;
4766 break;
f75eb1c0
DD		 4767 case M32C_OPERAND_DSP_8_S24 :
4768 fields->f_dsp_8_s24 = value;
4769 break;
49f58d10
JB		 4770 case M32C_OPERAND_DSP_8_S8 :
4771 fields->f_dsp_8_s8 = value;
4772 break;
4773 case M32C_OPERAND_DSP_8_U16 :
4774 fields->f_dsp_8_u16 = value;
4775 break;
e729279b
NC		 4776 case M32C_OPERAND_DSP_8_U24 :
4777 fields->f_dsp_8_u24 = value;
4778 break;
49f58d10
JB		 4779 case M32C_OPERAND_DSP_8_U6 :
4780 fields->f_dsp_8_u6 = value;
4781 break;
4782 case M32C_OPERAND_DSP_8_U8 :
4783 fields->f_dsp_8_u8 = value;
4784 break;
4785 case M32C_OPERAND_DST16AN :
4786 fields->f_dst16_an = value;
4787 break;
4788 case M32C_OPERAND_DST16AN_S :
4789 fields->f_dst16_an_s = value;
4790 break;
4791 case M32C_OPERAND_DST16ANHI :
4792 fields->f_dst16_an = value;
4793 break;
4794 case M32C_OPERAND_DST16ANQI :
4795 fields->f_dst16_an = value;
4796 break;
4797 case M32C_OPERAND_DST16ANQI_S :
4798 fields->f_dst16_rn_QI_s = value;
4799 break;
4800 case M32C_OPERAND_DST16ANSI :
4801 fields->f_dst16_an = value;
4802 break;
4803 case M32C_OPERAND_DST16RNEXTQI :
4804 fields->f_dst16_rn_ext = value;
4805 break;
4806 case M32C_OPERAND_DST16RNHI :
4807 fields->f_dst16_rn = value;
4808 break;
4809 case M32C_OPERAND_DST16RNQI :
4810 fields->f_dst16_rn = value;
4811 break;
4812 case M32C_OPERAND_DST16RNQI_S :
4813 fields->f_dst16_rn_QI_s = value;
4814 break;
4815 case M32C_OPERAND_DST16RNSI :
4816 fields->f_dst16_rn = value;
4817 break;
4818 case M32C_OPERAND_DST32ANEXTUNPREFIXED :
4819 fields->f_dst32_an_unprefixed = value;
4820 break;
4821 case M32C_OPERAND_DST32ANPREFIXED :
4822 fields->f_dst32_an_prefixed = value;
4823 break;
4824 case M32C_OPERAND_DST32ANPREFIXEDHI :
4825 fields->f_dst32_an_prefixed = value;
4826 break;
4827 case M32C_OPERAND_DST32ANPREFIXEDQI :
4828 fields->f_dst32_an_prefixed = value;
4829 break;
4830 case M32C_OPERAND_DST32ANPREFIXEDSI :
4831 fields->f_dst32_an_prefixed = value;
4832 break;
4833 case M32C_OPERAND_DST32ANUNPREFIXED :
4834 fields->f_dst32_an_unprefixed = value;
4835 break;
4836 case M32C_OPERAND_DST32ANUNPREFIXEDHI :
4837 fields->f_dst32_an_unprefixed = value;
4838 break;
4839 case M32C_OPERAND_DST32ANUNPREFIXEDQI :
4840 fields->f_dst32_an_unprefixed = value;
4841 break;
4842 case M32C_OPERAND_DST32ANUNPREFIXEDSI :
4843 fields->f_dst32_an_unprefixed = value;
4844 break;
4845 case M32C_OPERAND_DST32R0HI_S :
4846 break;
4847 case M32C_OPERAND_DST32R0QI_S :
4848 break;
4849 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI :
4850 fields->f_dst32_rn_ext_unprefixed = value;
4851 break;
4852 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI :
4853 fields->f_dst32_rn_ext_unprefixed = value;
4854 break;
4855 case M32C_OPERAND_DST32RNPREFIXEDHI :
4856 fields->f_dst32_rn_prefixed_HI = value;
4857 break;
4858 case M32C_OPERAND_DST32RNPREFIXEDQI :
4859 fields->f_dst32_rn_prefixed_QI = value;
4860 break;
4861 case M32C_OPERAND_DST32RNPREFIXEDSI :
4862 fields->f_dst32_rn_prefixed_SI = value;
4863 break;
4864 case M32C_OPERAND_DST32RNUNPREFIXEDHI :
4865 fields->f_dst32_rn_unprefixed_HI = value;
4866 break;
4867 case M32C_OPERAND_DST32RNUNPREFIXEDQI :
4868 fields->f_dst32_rn_unprefixed_QI = value;
4869 break;
4870 case M32C_OPERAND_DST32RNUNPREFIXEDSI :
4871 fields->f_dst32_rn_unprefixed_SI = value;
4872 break;
4873 case M32C_OPERAND_G :
4874 break;
4875 case M32C_OPERAND_IMM_12_S4 :
4876 fields->f_imm_12_s4 = value;
4877 break;
c6552317
DD		 4878 case M32C_OPERAND_IMM_12_S4N :
4879 fields->f_imm_12_s4 = value;
4880 break;
49f58d10
JB		 4881 case M32C_OPERAND_IMM_13_U3 :
4882 fields->f_imm_13_u3 = value;
4883 break;
4884 case M32C_OPERAND_IMM_16_HI :
4885 fields->f_dsp_16_s16 = value;
4886 break;
4887 case M32C_OPERAND_IMM_16_QI :
4888 fields->f_dsp_16_s8 = value;
4889 break;
4890 case M32C_OPERAND_IMM_16_SI :
4891 fields->f_dsp_16_s32 = value;
4892 break;
4893 case M32C_OPERAND_IMM_20_S4 :
4894 fields->f_imm_20_s4 = value;
4895 break;
4896 case M32C_OPERAND_IMM_24_HI :
4897 fields->f_dsp_24_s16 = value;
4898 break;
4899 case M32C_OPERAND_IMM_24_QI :
4900 fields->f_dsp_24_s8 = value;
4901 break;
4902 case M32C_OPERAND_IMM_24_SI :
4903 fields->f_dsp_24_s32 = value;
4904 break;
4905 case M32C_OPERAND_IMM_32_HI :
4906 fields->f_dsp_32_s16 = value;
4907 break;
4908 case M32C_OPERAND_IMM_32_QI :
4909 fields->f_dsp_32_s8 = value;
4910 break;
4911 case M32C_OPERAND_IMM_32_SI :
4912 fields->f_dsp_32_s32 = value;
4913 break;
4914 case M32C_OPERAND_IMM_40_HI :
4915 fields->f_dsp_40_s16 = value;
4916 break;
4917 case M32C_OPERAND_IMM_40_QI :
4918 fields->f_dsp_40_s8 = value;
4919 break;
4920 case M32C_OPERAND_IMM_40_SI :
4921 fields->f_dsp_40_s32 = value;
4922 break;
4923 case M32C_OPERAND_IMM_48_HI :
4924 fields->f_dsp_48_s16 = value;
4925 break;
4926 case M32C_OPERAND_IMM_48_QI :
4927 fields->f_dsp_48_s8 = value;
4928 break;
4929 case M32C_OPERAND_IMM_48_SI :
4930 fields->f_dsp_48_s32 = value;
4931 break;
4932 case M32C_OPERAND_IMM_56_HI :
4933 fields->f_dsp_56_s16 = value;
4934 break;
4935 case M32C_OPERAND_IMM_56_QI :
4936 fields->f_dsp_56_s8 = value;
4937 break;
4938 case M32C_OPERAND_IMM_64_HI :
4939 fields->f_dsp_64_s16 = value;
4940 break;
4941 case M32C_OPERAND_IMM_8_HI :
4942 fields->f_dsp_8_s16 = value;
4943 break;
4944 case M32C_OPERAND_IMM_8_QI :
4945 fields->f_dsp_8_s8 = value;
4946 break;
4947 case M32C_OPERAND_IMM_8_S4 :
4948 fields->f_imm_8_s4 = value;
4949 break;
c6552317
DD		 4950 case M32C_OPERAND_IMM_8_S4N :
4951 fields->f_imm_8_s4 = value;
4952 break;
49f58d10
JB		 4953 case M32C_OPERAND_IMM_SH_12_S4 :
4954 fields->f_imm_12_s4 = value;
4955 break;
4956 case M32C_OPERAND_IMM_SH_20_S4 :
4957 fields->f_imm_20_s4 = value;
4958 break;
4959 case M32C_OPERAND_IMM_SH_8_S4 :
4960 fields->f_imm_8_s4 = value;
4961 break;
4962 case M32C_OPERAND_IMM1_S :
4963 fields->f_imm1_S = value;
4964 break;
4965 case M32C_OPERAND_IMM3_S :
4966 fields->f_imm3_S = value;
4967 break;
4968 case M32C_OPERAND_LAB_16_8 :
4969 fields->f_lab_16_8 = value;
4970 break;
4971 case M32C_OPERAND_LAB_24_8 :
4972 fields->f_lab_24_8 = value;
4973 break;
4974 case M32C_OPERAND_LAB_32_8 :
4975 fields->f_lab_32_8 = value;
4976 break;
4977 case M32C_OPERAND_LAB_40_8 :
4978 fields->f_lab_40_8 = value;
4979 break;
4980 case M32C_OPERAND_LAB_5_3 :
4981 fields->f_lab_5_3 = value;
4982 break;
4983 case M32C_OPERAND_LAB_8_16 :
4984 fields->f_lab_8_16 = value;
4985 break;
4986 case M32C_OPERAND_LAB_8_24 :
4987 fields->f_lab_8_24 = value;
4988 break;
4989 case M32C_OPERAND_LAB_8_8 :
4990 fields->f_lab_8_8 = value;
4991 break;
4992 case M32C_OPERAND_LAB32_JMP_S :
4993 fields->f_lab32_jmp_s = value;
4994 break;
4995 case M32C_OPERAND_Q :
4996 break;
4997 case M32C_OPERAND_R0 :
4998 break;
4999 case M32C_OPERAND_R0H :
5000 break;
5001 case M32C_OPERAND_R0L :
5002 break;
5003 case M32C_OPERAND_R1 :
5004 break;
5005 case M32C_OPERAND_R1R2R0 :
5006 break;
5007 case M32C_OPERAND_R2 :
5008 break;
5009 case M32C_OPERAND_R2R0 :
5010 break;
5011 case M32C_OPERAND_R3 :
5012 break;
5013 case M32C_OPERAND_R3R1 :
5014 break;
5015 case M32C_OPERAND_REGSETPOP :
5016 fields->f_8_8 = value;
5017 break;
5018 case M32C_OPERAND_REGSETPUSH :
5019 fields->f_8_8 = value;
5020 break;
5021 case M32C_OPERAND_RN16_PUSH_S :
5022 fields->f_4_1 = value;
5023 break;
5024 case M32C_OPERAND_S :
5025 break;
5026 case M32C_OPERAND_SRC16AN :
5027 fields->f_src16_an = value;
5028 break;
5029 case M32C_OPERAND_SRC16ANHI :
5030 fields->f_src16_an = value;
5031 break;
5032 case M32C_OPERAND_SRC16ANQI :
5033 fields->f_src16_an = value;
5034 break;
5035 case M32C_OPERAND_SRC16RNHI :
5036 fields->f_src16_rn = value;
5037 break;
5038 case M32C_OPERAND_SRC16RNQI :
5039 fields->f_src16_rn = value;
5040 break;
5041 case M32C_OPERAND_SRC32ANPREFIXED :
5042 fields->f_src32_an_prefixed = value;
5043 break;
5044 case M32C_OPERAND_SRC32ANPREFIXEDHI :
5045 fields->f_src32_an_prefixed = value;
5046 break;
5047 case M32C_OPERAND_SRC32ANPREFIXEDQI :
5048 fields->f_src32_an_prefixed = value;
5049 break;
5050 case M32C_OPERAND_SRC32ANPREFIXEDSI :
5051 fields->f_src32_an_prefixed = value;
5052 break;
5053 case M32C_OPERAND_SRC32ANUNPREFIXED :
5054 fields->f_src32_an_unprefixed = value;
5055 break;
5056 case M32C_OPERAND_SRC32ANUNPREFIXEDHI :
5057 fields->f_src32_an_unprefixed = value;
5058 break;
5059 case M32C_OPERAND_SRC32ANUNPREFIXEDQI :
5060 fields->f_src32_an_unprefixed = value;
5061 break;
5062 case M32C_OPERAND_SRC32ANUNPREFIXEDSI :
5063 fields->f_src32_an_unprefixed = value;
5064 break;
5065 case M32C_OPERAND_SRC32RNPREFIXEDHI :
5066 fields->f_src32_rn_prefixed_HI = value;
5067 break;
5068 case M32C_OPERAND_SRC32RNPREFIXEDQI :
5069 fields->f_src32_rn_prefixed_QI = value;
5070 break;
5071 case M32C_OPERAND_SRC32RNPREFIXEDSI :
5072 fields->f_src32_rn_prefixed_SI = value;
5073 break;
5074 case M32C_OPERAND_SRC32RNUNPREFIXEDHI :
5075 fields->f_src32_rn_unprefixed_HI = value;
5076 break;
5077 case M32C_OPERAND_SRC32RNUNPREFIXEDQI :
5078 fields->f_src32_rn_unprefixed_QI = value;
5079 break;
5080 case M32C_OPERAND_SRC32RNUNPREFIXEDSI :
5081 fields->f_src32_rn_unprefixed_SI = value;
5082 break;
5083 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL :
5084 fields->f_5_1 = value;
5085 break;
5086 case M32C_OPERAND_X :
5087 break;
5088 case M32C_OPERAND_Z :
5089 break;
5090 case M32C_OPERAND_COND16_16 :
5091 fields->f_dsp_16_u8 = value;
5092 break;
5093 case M32C_OPERAND_COND16_24 :
5094 fields->f_dsp_24_u8 = value;
5095 break;
5096 case M32C_OPERAND_COND16_32 :
5097 fields->f_dsp_32_u8 = value;
5098 break;
5099 case M32C_OPERAND_COND16C :
5100 fields->f_cond16 = value;
5101 break;
5102 case M32C_OPERAND_COND16J :
5103 fields->f_cond16 = value;
5104 break;
5105 case M32C_OPERAND_COND16J5 :
5106 fields->f_cond16j_5 = value;
5107 break;
5108 case M32C_OPERAND_COND32 :
5109 fields->f_cond32 = value;
5110 break;
5111 case M32C_OPERAND_COND32_16 :
5112 fields->f_dsp_16_u8 = value;
5113 break;
5114 case M32C_OPERAND_COND32_24 :
5115 fields->f_dsp_24_u8 = value;
5116 break;
5117 case M32C_OPERAND_COND32_32 :
5118 fields->f_dsp_32_u8 = value;
5119 break;
5120 case M32C_OPERAND_COND32_40 :
5121 fields->f_dsp_40_u8 = value;
5122 break;
5123 case M32C_OPERAND_COND32J :
5124 fields->f_cond32j = value;
5125 break;
5126 case M32C_OPERAND_CR1_PREFIXED_32 :
5127 fields->f_21_3 = value;
5128 break;
5129 case M32C_OPERAND_CR1_UNPREFIXED_32 :
5130 fields->f_13_3 = value;
5131 break;
5132 case M32C_OPERAND_CR16 :
5133 fields->f_9_3 = value;
5134 break;
5135 case M32C_OPERAND_CR2_32 :
5136 fields->f_13_3 = value;
5137 break;
5138 case M32C_OPERAND_CR3_PREFIXED_32 :
5139 fields->f_21_3 = value;
5140 break;
5141 case M32C_OPERAND_CR3_UNPREFIXED_32 :
5142 fields->f_13_3 = value;
5143 break;
5144 case M32C_OPERAND_FLAGS16 :
5145 fields->f_9_3 = value;
5146 break;
5147 case M32C_OPERAND_FLAGS32 :
5148 fields->f_13_3 = value;
5149 break;
5150 case M32C_OPERAND_SCCOND32 :
5151 fields->f_cond16 = value;
5152 break;
5153 case M32C_OPERAND_SIZE :
5154 break;
5155
5156 default :
5157 /* xgettext:c-format */
5158 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
5159 opindex);
5160 abort ();
5161 }
5162}
5163
5164/* Function to call before using the instruction builder tables. */
5165
5166void
e729279b 5167m32c_cgen_init_ibld_table (CGEN_CPU_DESC cd)
49f58d10
JB		 5168{
5169 cd->insert_handlers = & m32c_cgen_insert_handlers[0];
5170 cd->extract_handlers = & m32c_cgen_extract_handlers[0];
5171
5172 cd->insert_operand = m32c_cgen_insert_operand;
5173 cd->extract_operand = m32c_cgen_extract_operand;
5174
5175 cd->get_int_operand = m32c_cgen_get_int_operand;
5176 cd->set_int_operand = m32c_cgen_set_int_operand;
5177 cd->get_vma_operand = m32c_cgen_get_vma_operand;
5178 cd->set_vma_operand = m32c_cgen_set_vma_operand;
5179}
A mirror of the official binutils-gdb repository