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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
ad5bb451 WD |
2 | /* |
3 | * (C) Copyright 2002 | |
4 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
ad5bb451 WD |
5 | */ |
6 | ||
d678a59d | 7 | #include <common.h> |
36bf446b | 8 | #include <irq_func.h> |
f7ae49fc | 9 | #include <log.h> |
ad5bb451 WD |
10 | |
11 | /* | |
12 | * CPU test | |
13 | * Load/store multiple word instructions: lmw, stmw | |
14 | * | |
7ddd4475 WD |
15 | * 27 consecutive words are loaded from a source memory buffer |
16 | * into GPRs r5 through r31. After that, 27 consecutive words are stored | |
17 | * from the GPRs r5 through r31 into a target memory buffer. The contents | |
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18 | * of the source and target buffers are then compared. |
19 | */ | |
20 | ||
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21 | #include <post.h> |
22 | #include "cpu_asm.h" | |
23 | ||
1e019503 | 24 | #if CFG_POST & CFG_SYS_POST_CPU |
ad5bb451 | 25 | |
a63aec54 | 26 | extern void cpu_post_exec_02(ulong *code, ulong op1, ulong op2); |
ad5bb451 | 27 | |
a63aec54 | 28 | int cpu_post_test_multi(void) |
ad5bb451 | 29 | { |
a63aec54 WD |
30 | int ret = 0; |
31 | unsigned int i; | |
7ddd4475 | 32 | ulong src[27], dst[27]; |
a63aec54 | 33 | int flag = disable_interrupts(); |
ad5bb451 | 34 | |
38081ff7 WD |
35 | ulong code[] = { |
36 | ASM_LMW(5, 3, 0), /* lmw r5, 0(r3) */ | |
37 | ASM_STMW(5, 4, 0), /* stmr r5, 0(r4) */ | |
38 | ASM_BLR, /* blr */ | |
39 | }; | |
ad5bb451 | 40 | |
38081ff7 WD |
41 | for (i = 0; i < ARRAY_SIZE(src); ++i) { |
42 | src[i] = i; | |
43 | dst[i] = 0; | |
44 | } | |
ad5bb451 | 45 | |
38081ff7 | 46 | cpu_post_exec_02(code, (ulong) src, (ulong) dst); |
ad5bb451 | 47 | |
38081ff7 | 48 | ret = memcmp(src, dst, sizeof(dst)) == 0 ? 0 : -1; |
ad5bb451 | 49 | |
a63aec54 WD |
50 | if (ret != 0) |
51 | post_log("Error at multi test !\n"); | |
ad5bb451 | 52 | |
a63aec54 WD |
53 | if (flag) |
54 | enable_interrupts(); | |
f2302d44 | 55 | |
a63aec54 | 56 | return ret; |
ad5bb451 WD |
57 | } |
58 | ||
59 | #endif |